From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kishon Vijay Abraham I Date: Mon, 18 Aug 2014 19:58:32 +0530 Subject: [U-Boot] [UBOOT RFC PATCH 10/13] board: ti: DRA7: added USB initializtion code In-Reply-To: <1408372115-4570-1-git-send-email-kishon@ti.com> References: <1408372115-4570-1-git-send-email-kishon@ti.com> Message-ID: <1408372115-4570-11-git-send-email-kishon@ti.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Implemented board_usb_init(), board_usb_cleanup() and board_usb_gadget_handle_interrupts() in dra7xx board file that can be invoked by various gadget drivers. Signed-off-by: Kishon Vijay Abraham I --- arch/arm/include/asm/arch-omap5/omap.h | 12 ++++ board/ti/dra7xx/evm.c | 106 +++++++++++++++++++++++++++++++++ 2 files changed, 118 insertions(+) diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index b9600cf..a2348a2 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -33,6 +33,18 @@ #define CONTROL_ID_CODE CONTROL_CORE_ID_CODE #endif +#ifdef CONFIG_DRA7XX +#define DRA7_USB_OTG_SS1_BASE 0x48890000 +#define DRA7_USB_OTG_SS1_GLUE_BASE 0x48880000 +#define DRA7_USB3_PHY1_PLL_CTRL 0x4A084C00 +#define DRA7_USB3_PHY1_POWER 0x4A002370 +#define DRA7_USB2_PHY1_POWER 0x4A002300 + +#define DRA7_USB_OTG_SS2_BASE 0x488D0000 +#define DRA7_USB_OTG_SS2_GLUE_BASE 0x488C0000 +#define DRA7_USB2_PHY2_POWER 0x4A002E74 +#endif + /* To be verified */ #define OMAP5430_CONTROL_ID_CODE_ES1_0 0x0B94202F #define OMAP5430_CONTROL_ID_CODE_ES2_0 0x1B94202F diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c index 073d151..0d1b93f 100644 --- a/board/ti/dra7xx/evm.c +++ b/board/ti/dra7xx/evm.c @@ -13,10 +13,14 @@ #include #include #include +#include #include #include #include #include +#include +#include +#include #include "mux_data.h" @@ -125,6 +129,108 @@ int board_mmc_init(bd_t *bis) } #endif +static struct dwc3_device usb_otg_ss1 = { + .maximum_speed = USB_SPEED_SUPER, + .base = DRA7_USB_OTG_SS1_BASE, + .needs_fifo_resize = true, +}; + +static struct dwc3_omap_device usb_otg_ss1_glue = { + .base = (void *)DRA7_USB_OTG_SS1_GLUE_BASE, + .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, + .vbus_id_status = OMAP_DWC3_VBUS_VALID, +}; + +static struct ti_usb_phy_device usb_phy1_device = { + .pll_ctrl_base = (void *)DRA7_USB3_PHY1_PLL_CTRL, + .usb2_phy_power = (void *)DRA7_USB2_PHY1_POWER, + .usb3_phy_power = (void *)DRA7_USB3_PHY1_POWER, +}; + +static struct dwc3_device usb_otg_ss2 = { + .maximum_speed = USB_SPEED_SUPER, + .base = DRA7_USB_OTG_SS2_BASE, + .needs_fifo_resize = true, +}; + +static struct dwc3_omap_device usb_otg_ss2_glue = { + .base = (void *) DRA7_USB_OTG_SS2_GLUE_BASE, + .utmi_mode = DWC3_OMAP_UTMI_MODE_SW, + .vbus_id_status = OMAP_DWC3_VBUS_VALID, +}; + +static struct ti_usb_phy_device usb_phy2_device = { + .usb2_phy_power = (void *) DRA7_USB2_PHY2_POWER, +}; + +int board_usb_init(int index, enum usb_init_type init) +{ + switch (index) { + case 0: + if (init == USB_INIT_DEVICE) { + usb_otg_ss1.dr_mode = USB_DR_MODE_PERIPHERAL; + usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID; + } else { + usb_otg_ss1.dr_mode = USB_DR_MODE_HOST; + usb_otg_ss1_glue.vbus_id_status = OMAP_DWC3_ID_GROUND; + } + + ti_usb_phy_uboot_init(&usb_phy1_device); + dwc3_omap_uboot_init(&usb_otg_ss1_glue); + dwc3_uboot_init(&usb_otg_ss1); + break; + case 1: + if (init == USB_INIT_DEVICE) { + usb_otg_ss2.dr_mode = USB_DR_MODE_PERIPHERAL; + usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_VBUS_VALID; + } else { + usb_otg_ss2.dr_mode = USB_DR_MODE_HOST; + usb_otg_ss2_glue.vbus_id_status = OMAP_DWC3_ID_GROUND; + } + + ti_usb_phy_uboot_init(&usb_phy2_device); + dwc3_omap_uboot_init(&usb_otg_ss2_glue); + dwc3_uboot_init(&usb_otg_ss2); + break; + default: + printf("Invalid Controller Index\n"); + } + + return 0; +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + switch (index) { + case 0: + case 1: + ti_usb_phy_uboot_exit(index); + dwc3_uboot_exit(index); + dwc3_omap_uboot_exit(index); + break; + default: + printf("Invalid Controller Index\n"); + } + return 0; +} + +int board_usb_gadget_handle_interrupts(int index) +{ + u32 status; + switch (index) { + case 0: + case 1: + status = dwc3_omap_uboot_interrupt_status(index); + if (status) + dwc3_uboot_handle_interrupt(index); + break; + default: + printf("Invalid Controller Index\n"); + } + + return 0; +} + #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_OS_BOOT) int spl_start_uboot(void) { -- 1.9.1