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From: Ye.Li <B37916@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 5/5] iMX6Solo:SABREAUTO: Add the i.MX6Solo SABREAUTO board support
Date: Tue, 2 Sep 2014 14:11:56 +0800	[thread overview]
Message-ID: <1409638316-22012-5-git-send-email-B37916@freescale.com> (raw)
In-Reply-To: <1409638316-22012-1-git-send-email-B37916@freescale.com>

This patch is to add the i.MX6solo sabreauto support,

The i.MX6solo sabreauto board configuration has the following
difference with i.MX6dl sabreauto:

- DDR bus width: 32bit
- DDR capacity:  1024M

Signed-off-by: Ye.Li <B37916@freescale.com>
---
 board/freescale/mx6qsabreauto/mx6solo.cfg |  106 +++++++++++++++++++++++++++++
 configs/mx6solosabreauto_defconfig        |    3 +
 2 files changed, 109 insertions(+), 0 deletions(-)
 create mode 100644 board/freescale/mx6qsabreauto/mx6solo.cfg
 create mode 100644 configs/mx6solosabreauto_defconfig

diff --git a/board/freescale/mx6qsabreauto/mx6solo.cfg b/board/freescale/mx6qsabreauto/mx6solo.cfg
new file mode 100644
index 0000000..4311f68
--- /dev/null
+++ b/board/freescale/mx6qsabreauto/mx6solo.cfg
@@ -0,0 +1,106 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ * Jason Liu <r64343@freescale.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ *
+ * Refer doc/README.imximage for more details about how-to configure
+ * and create imximage boot image
+ *
+ * The syntax is taken as close as possible with the kwbimage
+ */
+/* image version */
+
+IMAGE_VERSION 2
+
+/*
+ * Boot Device : one of
+ * spi, sd (the board has no nand neither onenand)
+ */
+BOOT_FROM	sd
+
+/*
+ * Device Configuration Data (DCD)
+ *
+ * Each entry must have the format:
+ * Addr-type           Address        Value
+ *
+ * where:
+ *	Addr-type register length (1,2 or 4 bytes)
+ *	Address	  absolute address of the register
+ *	value	  value to be stored in the register
+ */
+DATA 4 0x020e0774 0x000C0000
+DATA 4 0x020e0754 0x00000000
+DATA 4 0x020e04ac 0x00000030
+DATA 4 0x020e04b0 0x00000030
+DATA 4 0x020e0464 0x00000030
+DATA 4 0x020e0490 0x00000030
+DATA 4 0x020e074c 0x00000030
+DATA 4 0x020e0494 0x00000030
+DATA 4 0x020e04a0 0x00000000
+DATA 4 0x020e04b4 0x00000030
+DATA 4 0x020e04b8 0x00000030
+DATA 4 0x020e076c 0x00000030
+DATA 4 0x020e0750 0x00020000
+DATA 4 0x020e04bc 0x00000028
+DATA 4 0x020e04c0 0x00000028
+DATA 4 0x020e04c4 0x00000028
+DATA 4 0x020e04c8 0x00000028
+DATA 4 0x020e0760 0x00020000
+DATA 4 0x020e0764 0x00000028
+DATA 4 0x020e0770 0x00000028
+DATA 4 0x020e0778 0x00000028
+DATA 4 0x020e077c 0x00000028
+DATA 4 0x020e0470 0x00000028
+DATA 4 0x020e0474 0x00000028
+DATA 4 0x020e0478 0x00000028
+DATA 4 0x020e047c 0x00000028
+DATA 4 0x021b0800 0xa1390003
+DATA 4 0x021b080c 0x001F001F
+DATA 4 0x021b0810 0x001F001F
+DATA 4 0x021b083c 0x421C0216
+DATA 4 0x021b0840 0x017B017A
+DATA 4 0x021b0848 0x4B4A4E4C
+DATA 4 0x021b0850 0x3F3F3334
+DATA 4 0x021b081c 0x33333333
+DATA 4 0x021b0820 0x33333333
+DATA 4 0x021b0824 0x33333333
+DATA 4 0x021b0828 0x33333333
+DATA 4 0x021b08b8 0x00000800
+DATA 4 0x021b0004 0x00020025
+DATA 4 0x021b0008 0x00333030
+DATA 4 0x021b000c 0x676B5313
+DATA 4 0x021b0010 0xB66E8B63
+DATA 4 0x021b0014 0x01FF00DB
+DATA 4 0x021b0018 0x00001740
+DATA 4 0x021b001c 0x00008000
+DATA 4 0x021b002c 0x000026d2
+DATA 4 0x021b0030 0x006B1023
+DATA 4 0x021b0040 0x00000027
+DATA 4 0x021b0000 0x84190000
+DATA 4 0x021b001c 0x04008032
+DATA 4 0x021b001c 0x00008033
+DATA 4 0x021b001c 0x00048031
+DATA 4 0x021b001c 0x05208030
+DATA 4 0x021b001c 0x04008040
+DATA 4 0x021b0020 0x00005800
+DATA 4 0x021b0818 0x00011117
+DATA 4 0x021b0004 0x00025565
+DATA 4 0x021b0404 0x00011006
+DATA 4 0x021b001c 0x00000000
+
+/* set the default clock gate to save power */
+DATA 4 0x020c4068 0x00C03F3F
+DATA 4 0x020c406c 0x0030FC03
+DATA 4 0x020c4070 0x0FFFC000
+DATA 4 0x020c4074 0x3FF00000
+DATA 4 0x020c4078 0xFFFFF300
+DATA 4 0x020c407c 0x0F0000C3
+DATA 4 0x020c4080 0x00000FFF
+
+/* enable AXI cache for VDOA/VPU/IPU */
+DATA 4 0x020e0010 0xF00000CF
+/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
+DATA 4 0x020e0018 0x007F007F
+DATA 4 0x020e001c 0x007F007F
diff --git a/configs/mx6solosabreauto_defconfig b/configs/mx6solosabreauto_defconfig
new file mode 100644
index 0000000..17610c6
--- /dev/null
+++ b/configs/mx6solosabreauto_defconfig
@@ -0,0 +1,3 @@
+CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx6qsabreauto/mx6solo.cfg,MX6S,DEFAULT_FDT_FILE=\"imx6dl-sabreauto.dtb\",DDR_MB=1024"
+CONFIG_ARM=y
+CONFIG_TARGET_MX6QSABREAUTO=y
-- 
1.7.4.1

      parent reply	other threads:[~2014-09-02  6:11 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-02  6:11 [U-Boot] [PATCH 1/5] iMX6Q/DL:SABREAUTO/SABRESD: Move DDR and FDT configs to defconfig Ye.Li
2014-09-02  6:11 ` [U-Boot] [PATCH 2/5] iMX6Q:SABREAUTO: Rename the imximage.cfg to mx6q.cfg Ye.Li
2014-09-02 14:08   ` Fabio Estevam
2014-09-03  3:45     ` Li Ye-B37916
2014-09-02  6:11 ` [U-Boot] [PATCH 3/5] iMX6DL:SABRESD: Add new DDR script Ye.Li
2014-09-02 12:13   ` Fabio Estevam
2014-09-03  3:44     ` Li Ye-B37916
2014-09-02  6:11 ` [U-Boot] [PATCH 4/5] iMX6Solo:SABRESD: Add the i.MX6Solo SABRESD board support Ye.Li
2014-09-02 14:06   ` Fabio Estevam
2014-09-03  7:23     ` Li Ye-B37916
2014-09-08 23:41       ` Otavio Salvador
2014-09-09  3:35         ` Li Ye-B37916
2014-09-09  3:56           ` Fabio Estevam
2014-09-09  5:49             ` Li Ye-B37916
2014-09-02  6:11 ` Ye.Li [this message]

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