From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 14/14] drm/i915: Move DP port disable to post_disable for pch platforms Date: Wed, 03 Sep 2014 14:20:59 +0300 Message-ID: <1409743259.15662.21.camel@intelbox> References: <1408389369-22898-1-git-send-email-ville.syrjala@linux.intel.com> <1408389369-22898-15-git-send-email-ville.syrjala@linux.intel.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0829152071==" Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 8E8066E533 for ; Wed, 3 Sep 2014 04:21:06 -0700 (PDT) In-Reply-To: <1408389369-22898-15-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org --===============0829152071== Content-Type: multipart/signed; micalg="pgp-sha1"; protocol="application/pgp-signature"; boundary="=-hfVvDrek5WTah/9Kub+5" --=-hfVvDrek5WTah/9Kub+5 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, 2014-08-18 at 22:16 +0300, ville.syrjala@linux.intel.com wrote: > From: Ville Syrj=C3=A4l=C3=A4 >=20 > We need to turn the DP port off after the pipe, otherwise the pipe won't > turn off properly on certain pch platforms at least (happens on my ILK fo= r > example). This also matches the BSpec modeset sequence better. We still > don't match the spec exactly though (eg. audio disable should happen > much earlier), but at last this eliminates the nasty > wait_for_pipe_off() timeouts. >=20 > We already did the port disable after the pipe for VLV/CHV and for CPU > eDP. >=20 > For g4x leave the port disable where it is since that matches the > modeset sequence in the documentation and I don't have a suitable > machine to test if the other order would work. >=20 > Signed-off-by: Ville Syrj=C3=A4l=C3=A4 Reviewed-by: Imre Deak > --- > drivers/gpu/drm/i915/intel_dp.c | 16 +++++++--------- > 1 file changed, 7 insertions(+), 9 deletions(-) >=20 > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel= _dp.c > index 12925be..915d4ec 100644 > --- a/drivers/gpu/drm/i915/intel_dp.c > +++ b/drivers/gpu/drm/i915/intel_dp.c > @@ -2194,7 +2194,6 @@ void intel_edp_psr_init(struct drm_device *dev) > static void intel_disable_dp(struct intel_encoder *encoder) > { > struct intel_dp *intel_dp =3D enc_to_intel_dp(&encoder->base); > - enum port port =3D dp_to_dig_port(intel_dp)->port; > struct drm_device *dev =3D encoder->base.dev; > =20 > /* Make sure the panel is off before trying to change the mode. But als= o > @@ -2204,21 +2203,19 @@ static void intel_disable_dp(struct intel_encoder= *encoder) > intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF); > intel_edp_panel_off(intel_dp); > =20 > - /* cpu edp my only be disable _after_ the cpu pipe/plane is disabled. *= / > - if (!(port =3D=3D PORT_A || IS_VALLEYVIEW(dev))) > + /* disable the port before the pipe on g4x */ > + if (INTEL_INFO(dev)->gen < 5) > intel_dp_link_down(intel_dp); > } > =20 > -static void g4x_post_disable_dp(struct intel_encoder *encoder) > +static void ilk_post_disable_dp(struct intel_encoder *encoder) > { > struct intel_dp *intel_dp =3D enc_to_intel_dp(&encoder->base); > enum port port =3D dp_to_dig_port(intel_dp)->port; > =20 > - if (port !=3D PORT_A) > - return; > - > intel_dp_link_down(intel_dp); > - ironlake_edp_pll_off(intel_dp); > + if (port =3D=3D PORT_A) > + ironlake_edp_pll_off(intel_dp); > } > =20 > static void vlv_post_disable_dp(struct intel_encoder *encoder) > @@ -5044,7 +5041,8 @@ intel_dp_init(struct drm_device *dev, int output_re= g, enum port port) > } else { > intel_encoder->pre_enable =3D g4x_pre_enable_dp; > intel_encoder->enable =3D g4x_enable_dp; > - intel_encoder->post_disable =3D g4x_post_disable_dp; > + if (INTEL_INFO(dev)->gen >=3D 5) > + intel_encoder->post_disable =3D ilk_post_disable_dp; > } > =20 > intel_dig_port->port =3D port; --=-hfVvDrek5WTah/9Kub+5 Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQEcBAABAgAGBQJUBvmbAAoJEORIIAnNuWDFXnUH/j6enWfCwGpKYZ2a0TDwEZr8 jyyE6/W8RapaQNYF5VZZk6m2PUxeTqHKV82iTZjXBaICu2dEGrB91g5iz//w6tdm j/K89jDggKcbLQUtsKB4CpxiBLPkzFowuPhhFSM6MzDWiAaTNnQqI7fDU4CSvAU1 8196GKIW1Lp4GikNquUoOBYUiODHpggeD+nCSjpykJeRO/3bHmHfbP/FtP3LlQuq ZWlaxdOFnZwFdVUWvGxrWcSCVfrj7pvvpGRz7NVe/Gu7z6DmvPQGBhWpra2nbt1M F0D5vt0FmyZJykWQ/uxe/OroBqSFWedUnKEAenuUjXhKRsNCGRfBbIwzcj7VeWo= =EkZf -----END PGP SIGNATURE----- --=-hfVvDrek5WTah/9Kub+5-- --===============0829152071== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0829152071==--