From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tomeu Vizoso Subject: [PATCH v9 2/6] clk: Move all drivers to use internal API Date: Wed, 3 Sep 2014 17:31:57 +0200 Message-ID: <1409758317-20564-1-git-send-email-tomeu.vizoso@collabora.com> References: <1409758148-20104-2-git-send-email-tomeu.vizoso@collabora.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <1409758148-20104-2-git-send-email-tomeu.vizoso@collabora.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+glppe-linuxppc-embedded-2=m.gmane.org@lists.ozlabs.org Sender: "Linuxppc-dev" To: Mike Turquette Cc: Andrew Lunn , Ulf Hansson , Prashant Gaikwad , Tony Lindgren , tomasz.figa@gmail.com, Liam Girdwood , Thierry Reding , Paul Mackerras , Sylwester Nawrocki , Daniel Walker , linux-arch@vger.kernel.org, Boris Brezillon , linux-samsung-soc@vger.kernel.org, Kukjin Kim , Russell King , =?UTF-8?q?Emilio=20L=C3=B3pez?= , Takashi Iwai , Michal Simek , Kyungmin Park , Kevin Hilman , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, patches@opensource.wolfsonmicro.com, Viresh List-Id: linux-tegra@vger.kernel.org SW4gcHJlcGFyYXRpb24gdG8gY2hhbmdlIHRoZSBwdWJsaWMgQVBJIHRvIHJldHVybiBhIHBlci11 c2VyIGNsayBzdHJ1Y3R1cmUsCnJlbW92ZSBhbnkgdXNhZ2Ugb2YgdGhpcyBwdWJsaWMgQVBJIGZy b20gdGhlIGNsb2NrIGltcGxlbWVudGF0aW9ucy4KClRoZSByZWFzb24gZm9yIGhhdmluZyB0aGlz IGluIGEgc2VwYXJhdGUgY29tbWl0IGZyb20gdGhlIG9uZSB0aGF0IGludHJvZHVjZXMKdGhlIGlt cGxlbWVudGF0aW9uIG9mIHRoZSBuZXcgZnVuY3Rpb25zIGlzIHRvIHNlcGFyYXRlIHRoZSBjaGFu Z2VzIGdlbmVyYXRlZAp3aXRoIENvY2NpbmVsbGUgZnJvbSB0aGUgcmVzdCwgYW5kIGtlZXAgdGhl IHBhdGNoZXMnIHNpemUgcmVhc29uYWJsZS4KClNpZ25lZC1vZmYtYnk6IFRvbWV1IFZpem9zbyA8 dG9tZXUudml6b3NvQGNvbGxhYm9yYS5jb20+ClRlc3RlZC1ieTogQm9yaXMgQnJlemlsbG9uIDxi b3Jpcy5icmV6aWxsb25AZnJlZS1lbGVjdHJvbnMuY29tPgpUZXN0ZWQtYnk6IEhlaWtvIFN0dWVi bmVyIDxoZWlrb0BzbnRlY2guZGU+CkFja2VkLWJ5OiBCb3JpcyBCcmV6aWxsb24gPGJvcmlzLmJy ZXppbGxvbkBmcmVlLWVsZWN0cm9ucy5jb20+CgotLS0KCnY5OiAqIEZvbGQgaW4gY2hhbmdlcyB0 byBteHMtc2FpZi5jLCBzbyB0byBub3QgYnJlYWsgYmlzZWN0YWJpbGl0eQogICAgKiBSZS1nZW5l cmF0ZSB0aGUgcGF0Y2ggb24gdG9wIG9mIHRoZSBsYXRlc3QgY2hhbmdlcwogICAgKiBSZW1vdmUg bGludXgvY2xrLmggaW5jbHVkZXMgZnJvbSBjbGsgaW1wbGVtZW50YXRpb25zCi0tLQogYXJjaC9h cm0vbWFjaC1kb3ZlL2NvbW1vbi5jICAgICAgICAgICAgICAgICAgIHwgIDEwICstCiBhcmNoL2Fy bS9tYWNoLWlteC9jbGstYnVzeS5jICAgICAgICAgICAgICAgICAgfCAgIDkgKy0KIGFyY2gvYXJt L21hY2gtaW14L2Nsay1maXh1cC1kaXYuYyAgICAgICAgICAgICB8ICAgNCArLQogYXJjaC9hcm0v bWFjaC1pbXgvY2xrLWZpeHVwLW11eC5jICAgICAgICAgICAgIHwgICA0ICstCiBhcmNoL2FybS9t YWNoLWlteC9jbGstZ2F0ZTIuYyAgICAgICAgICAgICAgICAgfCAgIDQgKy0KIGFyY2gvYXJtL21h Y2gtaW14L2Nsay1pbXgxLmMgICAgICAgICAgICAgICAgICB8ICAgMyArLQogYXJjaC9hcm0vbWFj aC1pbXgvY2xrLWlteDIxLmMgICAgICAgICAgICAgICAgIHwgICAzICstCiBhcmNoL2FybS9tYWNo LWlteC9jbGstaW14MjUuYyAgICAgICAgICAgICAgICAgfCAgIDkgKy0KIGFyY2gvYXJtL21hY2gt aW14L2Nsay1pbXgyNy5jICAgICAgICAgICAgICAgICB8ICAgNSArLQogYXJjaC9hcm0vbWFjaC1p bXgvY2xrLWlteDMxLmMgICAgICAgICAgICAgICAgIHwgIDExICstCiBhcmNoL2FybS9tYWNoLWlt eC9jbGstaW14MzUuYyAgICAgICAgICAgICAgICAgfCAgMjMgKy0KIGFyY2gvYXJtL21hY2gtaW14 L2Nsay1pbXg1MS1pbXg1My5jICAgICAgICAgICB8ICA3OCArKystLS0KIGFyY2gvYXJtL21hY2gt aW14L2Nsay1pbXg2cS5jICAgICAgICAgICAgICAgICB8ICA1NCArKy0tCiBhcmNoL2FybS9tYWNo LWlteC9jbGstaW14NnNsLmMgICAgICAgICAgICAgICAgfCAgMTQgKy0KIGFyY2gvYXJtL21hY2gt aW14L2Nsay1pbXg2c3guYyAgICAgICAgICAgICAgICB8ICA5OCArKysrLS0tCiBhcmNoL2FybS9t YWNoLWlteC9jbGstcGZkLmMgICAgICAgICAgICAgICAgICAgfCAgIDUgKy0KIGFyY2gvYXJtL21h Y2gtaW14L2Nsay1wbGx2MS5jICAgICAgICAgICAgICAgICB8ICAgNSArLQogYXJjaC9hcm0vbWFj aC1pbXgvY2xrLXBsbHYyLmMgICAgICAgICAgICAgICAgIHwgICA1ICstCiBhcmNoL2FybS9tYWNo LWlteC9jbGstcGxsdjMuYyAgICAgICAgICAgICAgICAgfCAgIDUgKy0KIGFyY2gvYXJtL21hY2gt aW14L2Nsay12ZjYxMC5jICAgICAgICAgICAgICAgICB8ICA0MyArLS0KIGFyY2gvYXJtL21hY2gt aW14L2Nsay5jICAgICAgICAgICAgICAgICAgICAgICB8ICAxMSArLQogYXJjaC9hcm0vbWFjaC1p bXgvY2xrLmggICAgICAgICAgICAgICAgICAgICAgIHwgIDQyICstLQogYXJjaC9hcm0vbWFjaC1t c20vY2xvY2stcGNvbS5jICAgICAgICAgICAgICAgIHwgICAyICstCiBhcmNoL2FybS9tYWNoLW12 Nzh4eDAvY29tbW9uLmMgICAgICAgICAgICAgICAgfCAgIDIgKy0KIGFyY2gvYXJtL21hY2gtb21h cDIvYm9hcmQtY20tdDM1LmMgICAgICAgICAgICB8ICAgMiArLQogYXJjaC9hcm0vbWFjaC1vbWFw Mi9jY2xvY2szeHh4X2RhdGEuYyAgICAgICAgIHwgMzcxICsrKysrKysrKysrKystLS0tLS0tLS0t LS0tCiBhcmNoL2FybS9tYWNoLW9tYXAyL2Nsa3QyeHh4X2RwbGwuYyAgICAgICAgICAgfCAgIDUg Ky0KIGFyY2gvYXJtL21hY2gtb21hcDIvY2xrdDJ4eHhfZHBsbGNvcmUuYyAgICAgICB8ICAgNSAr LQogYXJjaC9hcm0vbWFjaC1vbWFwMi9jbGt0Mnh4eF92aXJ0X3ByY21fc2V0LmMgIHwgIDExICst CiBhcmNoL2FybS9tYWNoLW9tYXAyL2Nsa3QzNHh4X2RwbGwzbTIuYyAgICAgICAgfCAgIDMgKy0K IGFyY2gvYXJtL21hY2gtb21hcDIvY2xrdF9jbGtzZWwuYyAgICAgICAgICAgICB8ICA0NiArKy0t CiBhcmNoL2FybS9tYWNoLW9tYXAyL2Nsa3RfZHBsbC5jICAgICAgICAgICAgICAgfCAgIDggKy0K IGFyY2gvYXJtL21hY2gtb21hcDIvY2xvY2suYyAgICAgICAgICAgICAgICAgICB8ICA1MiArKy0t CiBhcmNoL2FybS9tYWNoLW9tYXAyL2Nsb2NrLmggICAgICAgICAgICAgICAgICAgfCAgMTggKy0K IGFyY2gvYXJtL21hY2gtb21hcDIvY2xvY2szeHh4LmMgICAgICAgICAgICAgICB8ICAyMyArLQog YXJjaC9hcm0vbWFjaC1vbWFwMi9jbG9jazN4eHguaCAgICAgICAgICAgICAgIHwgICA0ICstCiBh cmNoL2FybS9tYWNoLW9tYXAyL2Nsb2NrX2NvbW1vbl9kYXRhLmMgICAgICAgfCAgIDIgKy0KIGFy Y2gvYXJtL21hY2gtb21hcDIvY2xvY2tkb21haW4uYyAgICAgICAgICAgICB8ICAgOSArLQogYXJj aC9hcm0vbWFjaC1vbWFwMi9jbG9ja2RvbWFpbi5oICAgICAgICAgICAgIHwgICA0ICstCiBhcmNo L2FybS9tYWNoLW9tYXAyL2Rpc3BsYXkuYyAgICAgICAgICAgICAgICAgfCAgIDUgKy0KIGFyY2gv YXJtL21hY2gtb21hcDIvZHBsbDN4eHguYyAgICAgICAgICAgICAgICB8ICAyOSArLQogYXJjaC9h cm0vbWFjaC1vbWFwMi9kcGxsNDR4eC5jICAgICAgICAgICAgICAgIHwgICA1ICstCiBhcmNoL2Fy bS9tYWNoLW9tYXAyL21jYnNwLmMgICAgICAgICAgICAgICAgICAgfCAgIDUgKy0KIGFyY2gvYXJt L21hY2gtb21hcDIvb21hcF9kZXZpY2UuYyAgICAgICAgICAgICB8ICAgOSArLQogYXJjaC9hcm0v bWFjaC1vbWFwMi9vbWFwX2h3bW9kLmMgICAgICAgICAgICAgIHwgIDQyICstLQogYXJjaC9hcm0v bWFjaC1vbWFwMi9vbWFwX2h3bW9kLmggICAgICAgICAgICAgIHwgIDEyICstCiBhcmNoL2FybS9t YWNoLW9tYXAyL3BtMjR4eC5jICAgICAgICAgICAgICAgICAgfCAgMTIgKy0KIGFyY2gvYXJtL21h Y2gtb3Jpb241eC9jb21tb24uYyAgICAgICAgICAgICAgICB8ICAgMiArLQogYXJjaC9hcm0vbWFj aC1zaG1vYmlsZS9jbG9jay5jICAgICAgICAgICAgICAgIHwgICA5ICstCiBhcmNoL2FybS9tYWNo LXZleHByZXNzL3NwYy5jICAgICAgICAgICAgICAgICAgfCAgIDQgKy0KIGFyY2gvYXJtL3BsYXQt b3Jpb24vY29tbW9uLmMgICAgICAgICAgICAgICAgICB8ICAyMSArLQogYXJjaC9hcm0vcGxhdC1v cmlvbi9pbmNsdWRlL3BsYXQvY29tbW9uLmggICAgIHwgIDEyICstCiBhcmNoL3Bvd2VycGMvcGxh dGZvcm1zLzUxMngvY2xvY2stY29tbW9uY2xrLmMgfCAgNDggKystLQogZHJpdmVycy9jbGsvYXQ5 MS9jbGstbWFpbi5jICAgICAgICAgICAgICAgICAgIHwgIDI0ICstCiBkcml2ZXJzL2Nsay9hdDkx L2Nsay1tYXN0ZXIuYyAgICAgICAgICAgICAgICAgfCAgIDYgKy0KIGRyaXZlcnMvY2xrL2F0OTEv Y2xrLXBlcmlwaGVyYWwuYyAgICAgICAgICAgICB8ICAxMiArLQogZHJpdmVycy9jbGsvYXQ5MS9j bGstcGxsLmMgICAgICAgICAgICAgICAgICAgIHwgICA2ICstCiBkcml2ZXJzL2Nsay9hdDkxL2Ns ay1wbGxkaXYuYyAgICAgICAgICAgICAgICAgfCAgIDYgKy0KIGRyaXZlcnMvY2xrL2F0OTEvY2xr LXByb2dyYW1tYWJsZS5jICAgICAgICAgICB8ICAxMCArLQogZHJpdmVycy9jbGsvYXQ5MS9jbGst c2xvdy5jICAgICAgICAgICAgICAgICAgIHwgIDI0ICstCiBkcml2ZXJzL2Nsay9hdDkxL2Nsay1z bWQuYyAgICAgICAgICAgICAgICAgICAgfCAgIDYgKy0KIGRyaXZlcnMvY2xrL2F0OTEvY2xrLXN5 c3RlbS5jICAgICAgICAgICAgICAgICB8ICAgNiArLQogZHJpdmVycy9jbGsvYXQ5MS9jbGstdXNi LmMgICAgICAgICAgICAgICAgICAgIHwgIDIwICstCiBkcml2ZXJzL2Nsay9hdDkxL2Nsay11dG1p LmMgICAgICAgICAgICAgICAgICAgfCAgIDYgKy0KIGRyaXZlcnMvY2xrL2JjbS9jbGsta29uYS1z ZXR1cC5jICAgICAgICAgICAgICB8ICAgNiArLQogZHJpdmVycy9jbGsvYmNtL2Nsay1rb25hLmMg ICAgICAgICAgICAgICAgICAgIHwgIDEyICstCiBkcml2ZXJzL2Nsay9iY20vY2xrLWtvbmEuaCAg ICAgICAgICAgICAgICAgICAgfCAgIDIgKy0KIGRyaXZlcnMvY2xrL2Jlcmxpbi9iZXJsaW4yLWF2 cGxsLmMgICAgICAgICAgICB8ICAgNCArLQogZHJpdmVycy9jbGsvYmVybGluL2JlcmxpbjItYXZw bGwuaCAgICAgICAgICAgIHwgICA0ICstCiBkcml2ZXJzL2Nsay9iZXJsaW4vYmVybGluMi1kaXYu YyAgICAgICAgICAgICAgfCAgIDIgKy0KIGRyaXZlcnMvY2xrL2Jlcmxpbi9iZXJsaW4yLWRpdi5o ICAgICAgICAgICAgICB8ICAgMiArLQogZHJpdmVycy9jbGsvYmVybGluL2JlcmxpbjItcGxsLmMg ICAgICAgICAgICAgIHwgICAyICstCiBkcml2ZXJzL2Nsay9iZXJsaW4vYmVybGluMi1wbGwuaCAg ICAgICAgICAgICAgfCAgIDIgKy0KIGRyaXZlcnMvY2xrL2Jlcmxpbi9iZzIuYyAgICAgICAgICAg ICAgICAgICAgICB8ICAxMyArLQogZHJpdmVycy9jbGsvYmVybGluL2JnMnEuYyAgICAgICAgICAg ICAgICAgICAgIHwgICA5ICstCiBkcml2ZXJzL2Nsay9jbGstYXhpLWNsa2dlbi5jICAgICAgICAg ICAgICAgICAgfCAgIDMgKy0KIGRyaXZlcnMvY2xrL2Nsay1heG01NTE2LmMgICAgICAgICAgICAg ICAgICAgICB8ICAgNCArLQogZHJpdmVycy9jbGsvY2xrLWJjbTI4MzUuYyAgICAgICAgICAgICAg ICAgICAgIHwgICAyICstCiBkcml2ZXJzL2Nsay9jbGstY29tcG9zaXRlLmMgICAgICAgICAgICAg ICAgICAgfCAgMTEgKy0KIGRyaXZlcnMvY2xrL2Nsay1jb25mLmMgICAgICAgICAgICAgICAgICAg ICAgICB8ICAxNyArLQogZHJpdmVycy9jbGsvY2xrLWRpdmlkZXIuYyAgICAgICAgICAgICAgICAg ICAgIHwgICA4ICstCiBkcml2ZXJzL2Nsay9jbGstZWZtMzJnZy5jICAgICAgICAgICAgICAgICAg ICAgfCAgIDMgKy0KIGRyaXZlcnMvY2xrL2Nsay1maXhlZC1mYWN0b3IuYyAgICAgICAgICAgICAg ICB8ICAgNiArLQogZHJpdmVycy9jbGsvY2xrLWZpeGVkLXJhdGUuYyAgICAgICAgICAgICAgICAg IHwgICA4ICstCiBkcml2ZXJzL2Nsay9jbGstZnJhY3Rpb25hbC1kaXZpZGVyLmMgICAgICAgICAg fCAgIDQgKy0KIGRyaXZlcnMvY2xrL2Nsay1nYXRlLmMgICAgICAgICAgICAgICAgICAgICAgICB8 ICAgNCArLQogZHJpdmVycy9jbGsvY2xrLWhpZ2hiYW5rLmMgICAgICAgICAgICAgICAgICAgIHwg ICA4ICstCiBkcml2ZXJzL2Nsay9jbGstbHMxeC5jICAgICAgICAgICAgICAgICAgICAgICAgfCAg MTYgKy0KIGRyaXZlcnMvY2xrL2Nsay1tYXg3NzY4Ni5jICAgICAgICAgICAgICAgICAgICB8ICAx MCArLQogZHJpdmVycy9jbGsvY2xrLW1veGFydC5jICAgICAgICAgICAgICAgICAgICAgIHwgICA4 ICstCiBkcml2ZXJzL2Nsay9jbGstbXV4LmMgICAgICAgICAgICAgICAgICAgICAgICAgfCAgIDcg Ky0KIGRyaXZlcnMvY2xrL2Nsay1ub21hZGlrLmMgICAgICAgICAgICAgICAgICAgICB8ICAxNSAr LQogZHJpdmVycy9jbGsvY2xrLW5zcGlyZS5jICAgICAgICAgICAgICAgICAgICAgIHwgICA0ICst CiBkcml2ZXJzL2Nsay9jbGstcGFsbWFzLmMgICAgICAgICAgICAgICAgICAgICAgfCAgIDcgKy0K IGRyaXZlcnMvY2xrL2Nsay1wcGMtY29yZW5ldC5jICAgICAgICAgICAgICAgICB8ICAgOCArLQog ZHJpdmVycy9jbGsvY2xrLXMybXBzMTEuYyAgICAgICAgICAgICAgICAgICAgIHwgICA2ICstCiBk cml2ZXJzL2Nsay9jbGstc2k1MzUxLmMgICAgICAgICAgICAgICAgICAgICAgfCAgMTcgKy0KIGRy aXZlcnMvY2xrL2Nsay1zaTU3MC5jICAgICAgICAgICAgICAgICAgICAgICB8ICAgNCArLQogZHJp dmVycy9jbGsvY2xrLXR3bDYwNDAuYyAgICAgICAgICAgICAgICAgICAgIHwgICAzICstCiBkcml2 ZXJzL2Nsay9jbGstdTMwMC5jICAgICAgICAgICAgICAgICAgICAgICAgfCAgMTMgKy0KIGRyaXZl cnMvY2xrL2Nsay12dDg1MDAuYyAgICAgICAgICAgICAgICAgICAgICB8ICAgNCArLQogZHJpdmVy cy9jbGsvY2xrLXdtODMxeC5jICAgICAgICAgICAgICAgICAgICAgIHwgICA3ICstCiBkcml2ZXJz L2Nsay9jbGsteGdlbmUuYyAgICAgICAgICAgICAgICAgICAgICAgfCAgMTIgKy0KIGRyaXZlcnMv Y2xrL2Nsay5oICAgICAgICAgICAgICAgICAgICAgICAgICAgICB8ICAgNCArLQogZHJpdmVycy9j bGsvaGlzaWxpY29uL2Nsay1oaTM2MjAuYyAgICAgICAgICAgIHwgICA5ICstCiBkcml2ZXJzL2Ns ay9oaXNpbGljb24vY2xrLWhpcDA0LmMgICAgICAgICAgICAgfCAgIDEgLQogZHJpdmVycy9jbGsv aGlzaWxpY29uL2Nsay5jICAgICAgICAgICAgICAgICAgIHwgIDE3ICstCiBkcml2ZXJzL2Nsay9o aXNpbGljb24vY2xrLmggICAgICAgICAgICAgICAgICAgfCAgIDIgKy0KIGRyaXZlcnMvY2xrL2hp c2lsaWNvbi9jbGtnYXRlLXNlcGFyYXRlZC5jICAgICB8ICAgNSArLQogZHJpdmVycy9jbGsva2V5 c3RvbmUvZ2F0ZS5jICAgICAgICAgICAgICAgICAgIHwgICA3ICstCiBkcml2ZXJzL2Nsay9rZXlz dG9uZS9wbGwuYyAgICAgICAgICAgICAgICAgICAgfCAgMTEgKy0KIGRyaXZlcnMvY2xrL21tcC9j bGstYXBiYy5jICAgICAgICAgICAgICAgICAgICB8ICAgNSArLQogZHJpdmVycy9jbGsvbW1wL2Ns ay1hcG11LmMgICAgICAgICAgICAgICAgICAgIHwgICA1ICstCiBkcml2ZXJzL2Nsay9tbXAvY2xr LWZyYWMuYyAgICAgICAgICAgICAgICAgICAgfCAgIDQgKy0KIGRyaXZlcnMvY2xrL21tcC9jbGst bW1wMi5jICAgICAgICAgICAgICAgICAgICB8ICAxNCArLQogZHJpdmVycy9jbGsvbW1wL2Nsay1w eGExNjguYyAgICAgICAgICAgICAgICAgIHwgIDEyICstCiBkcml2ZXJzL2Nsay9tbXAvY2xrLXB4 YTkxMC5jICAgICAgICAgICAgICAgICAgfCAgMTIgKy0KIGRyaXZlcnMvY2xrL21tcC9jbGsuaCAg ICAgICAgICAgICAgICAgICAgICAgICB8ICAgOCArLQogZHJpdmVycy9jbGsvbXZlYnUvY2xrLWNv cmVkaXYuYyAgICAgICAgICAgICAgIHwgICA0ICstCiBkcml2ZXJzL2Nsay9tdmVidS9jbGstY3B1 LmMgICAgICAgICAgICAgICAgICAgfCAgIDggKy0KIGRyaXZlcnMvY2xrL212ZWJ1L2NvbW1vbi5j ICAgICAgICAgICAgICAgICAgICB8ICAxNSArLQogZHJpdmVycy9jbGsvbXZlYnUva2lya3dvb2Qu YyAgICAgICAgICAgICAgICAgIHwgICA2ICstCiBkcml2ZXJzL2Nsay9teHMvY2xrLWRpdi5jICAg ICAgICAgICAgICAgICAgICAgfCAgIDUgKy0KIGRyaXZlcnMvY2xrL214cy9jbGstZnJhYy5jICAg ICAgICAgICAgICAgICAgICB8ICAgNSArLQogZHJpdmVycy9jbGsvbXhzL2Nsay1pbXgyMy5jICAg ICAgICAgICAgICAgICAgIHwgICA1ICstCiBkcml2ZXJzL2Nsay9teHMvY2xrLWlteDI4LmMgICAg ICAgICAgICAgICAgICAgfCAgIDUgKy0KIGRyaXZlcnMvY2xrL214cy9jbGstcGxsLmMgICAgICAg ICAgICAgICAgICAgICB8ICAgNSArLQogZHJpdmVycy9jbGsvbXhzL2Nsay1yZWYuYyAgICAgICAg ICAgICAgICAgICAgIHwgICA1ICstCiBkcml2ZXJzL2Nsay9teHMvY2xrLmggICAgICAgICAgICAg ICAgICAgICAgICAgfCAgMTcgKy0KIGRyaXZlcnMvY2xrL3Fjb20vY2xrLXJjZy5jICAgICAgICAg ICAgICAgICAgICB8ICAgOCArLQogZHJpdmVycy9jbGsvcWNvbS9jbGstcmNnMi5jICAgICAgICAg ICAgICAgICAgIHwgIDE0ICstCiBkcml2ZXJzL2Nsay9xY29tL2Nsay1yZWdtYXAuYyAgICAgICAg ICAgICAgICAgfCAgIDIgKy0KIGRyaXZlcnMvY2xrL3Fjb20vY2xrLXJlZ21hcC5oICAgICAgICAg ICAgICAgICB8ICAgMiArLQogZHJpdmVycy9jbGsvcWNvbS9jb21tb24uYyAgICAgICAgICAgICAg ICAgICAgIHwgICA2ICstCiBkcml2ZXJzL2Nsay9xY29tL2djYy1hcHE4MDg0LmMgICAgICAgICAg ICAgICAgfCAgIDIgKy0KIGRyaXZlcnMvY2xrL3Fjb20vZ2NjLWlwcTgwNnguYyAgICAgICAgICAg ICAgICB8ICAgMiArLQogZHJpdmVycy9jbGsvcWNvbS9nY2MtbXNtODY2MC5jICAgICAgICAgICAg ICAgIHwgICAyICstCiBkcml2ZXJzL2Nsay9xY29tL2djYy1tc204OTYwLmMgICAgICAgICAgICAg ICAgfCAgIDIgKy0KIGRyaXZlcnMvY2xrL3Fjb20vZ2NjLW1zbTg5NzQuYyAgICAgICAgICAgICAg ICB8ICAgMiArLQogZHJpdmVycy9jbGsvcWNvbS9tbWNjLW1zbTg5NjAuYyAgICAgICAgICAgICAg IHwgICA2ICstCiBkcml2ZXJzL2Nsay9yb2NrY2hpcC9jbGstcGxsLmMgICAgICAgICAgICAgICAg fCAgIDkgKy0KIGRyaXZlcnMvY2xrL3JvY2tjaGlwL2Nsay1yazMxODguYyAgICAgICAgICAgICB8 ICAgMiArLQogZHJpdmVycy9jbGsvcm9ja2NoaXAvY2xrLXJrMzI4OC5jICAgICAgICAgICAgIHwg ICAyICstCiBkcml2ZXJzL2Nsay9yb2NrY2hpcC9jbGstcm9ja2NoaXAuYyAgICAgICAgICAgfCAg IDIgKy0KIGRyaXZlcnMvY2xrL3JvY2tjaGlwL2Nsay5jICAgICAgICAgICAgICAgICAgICB8ICAy MyArLQogZHJpdmVycy9jbGsvcm9ja2NoaXAvY2xrLmggICAgICAgICAgICAgICAgICAgIHwgICA1 ICstCiBkcml2ZXJzL2Nsay9zYW1zdW5nL2Nsay1leHlub3MtYXVkc3MuYyAgICAgICAgfCAgMTYg Ky0KIGRyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLWV4eW5vcy1jbGtvdXQuYyAgICAgICB8ICAgOSAr LQogZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstZXh5bm9zMzI1MC5jICAgICAgICAgIHwgICAxIC0K IGRyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLWV4eW5vczQuYyAgICAgICAgICAgICB8ICAgNyArLQog ZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstZXh5bm9zNTI1MC5jICAgICAgICAgIHwgICAxIC0KIGRy aXZlcnMvY2xrL3NhbXN1bmcvY2xrLWV4eW5vczUyNjAuYyAgICAgICAgICB8ICAgMSAtCiBkcml2 ZXJzL2Nsay9zYW1zdW5nL2Nsay1leHlub3M1NDEwLmMgICAgICAgICAgfCAgIDEgLQogZHJpdmVy cy9jbGsvc2Ftc3VuZy9jbGstZXh5bm9zNTQyMC5jICAgICAgICAgIHwgICAxIC0KIGRyaXZlcnMv Y2xrL3NhbXN1bmcvY2xrLWV4eW5vczU0NDAuYyAgICAgICAgICB8ICAgMSAtCiBkcml2ZXJzL2Ns ay9zYW1zdW5nL2Nsay1wbGwuYyAgICAgICAgICAgICAgICAgfCAgIDYgKy0KIGRyaXZlcnMvY2xr L3NhbXN1bmcvY2xrLXBsbC5oICAgICAgICAgICAgICAgICB8ICAgMiArLQogZHJpdmVycy9jbGsv c2Ftc3VuZy9jbGstczNjMjQxMC1kY2xrLmMgICAgICAgIHwgIDMwICstLQogZHJpdmVycy9jbGsv c2Ftc3VuZy9jbGstczNjMjQxMC5jICAgICAgICAgICAgIHwgICAxIC0KIGRyaXZlcnMvY2xrL3Nh bXN1bmcvY2xrLXMzYzI0MTIuYyAgICAgICAgICAgICB8ICAgMSAtCiBkcml2ZXJzL2Nsay9zYW1z dW5nL2Nsay1zM2MyNDQzLmMgICAgICAgICAgICAgfCAgIDEgLQogZHJpdmVycy9jbGsvc2Ftc3Vu Zy9jbGstczNjNjR4eC5jICAgICAgICAgICAgIHwgICAxIC0KIGRyaXZlcnMvY2xrL3NhbXN1bmcv Y2xrLXM1cHYyMTAtYXVkc3MuYyAgICAgICB8ICAxNiArLQogZHJpdmVycy9jbGsvc2Ftc3VuZy9j bGsuYyAgICAgICAgICAgICAgICAgICAgIHwgIDIyICstCiBkcml2ZXJzL2Nsay9zYW1zdW5nL2Ns ay5oICAgICAgICAgICAgICAgICAgICAgfCAgIDMgKy0KIGRyaXZlcnMvY2xrL3NobW9iaWxlL2Ns ay1kaXY2LmMgICAgICAgICAgICAgICB8ICAgMiArLQogZHJpdmVycy9jbGsvc2htb2JpbGUvY2xr LWVtZXYyLmMgICAgICAgICAgICAgIHwgICA0ICstCiBkcml2ZXJzL2Nsay9zaG1vYmlsZS9jbGst bXN0cC5jICAgICAgICAgICAgICAgfCAgIDYgKy0KIGRyaXZlcnMvY2xrL3NobW9iaWxlL2Nsay1y OGE3NzQwLmMgICAgICAgICAgICB8ICAgNiArLQogZHJpdmVycy9jbGsvc2htb2JpbGUvY2xrLXI4 YTc3NzkuYyAgICAgICAgICAgIHwgICA2ICstCiBkcml2ZXJzL2Nsay9zaG1vYmlsZS9jbGstcmNh ci1nZW4yLmMgICAgICAgICAgfCAgMTAgKy0KIGRyaXZlcnMvY2xrL3NobW9iaWxlL2Nsay1yei5j ICAgICAgICAgICAgICAgICB8ICAgNiArLQogZHJpdmVycy9jbGsvc2lyZi9jbGstYXRsYXM2LmMg ICAgICAgICAgICAgICAgIHwgICAzICstCiBkcml2ZXJzL2Nsay9zaXJmL2Nsay1jb21tb24uYyAg ICAgICAgICAgICAgICAgfCAgMzAgKy0tCiBkcml2ZXJzL2Nsay9zaXJmL2Nsay1wcmltYTIuYyAg ICAgICAgICAgICAgICAgfCAgIDMgKy0KIGRyaXZlcnMvY2xrL3NvY2ZwZ2EvY2xrLWdhdGUuYyAg ICAgICAgICAgICAgICB8ICAgMyArLQogZHJpdmVycy9jbGsvc29jZnBnYS9jbGstcGVyaXBoLmMg ICAgICAgICAgICAgIHwgICAzICstCiBkcml2ZXJzL2Nsay9zb2NmcGdhL2Nsay1wbGwuYyAgICAg ICAgICAgICAgICAgfCAgIDUgKy0KIGRyaXZlcnMvY2xrL3NwZWFyL2Nsay1hdXgtc3ludGguYyAg ICAgICAgICAgICB8ICAgOCArLQogZHJpdmVycy9jbGsvc3BlYXIvY2xrLWZyYWMtc3ludGguYyAg ICAgICAgICAgIHwgICA0ICstCiBkcml2ZXJzL2Nsay9zcGVhci9jbGstZ3B0LXN5bnRoLmMgICAg ICAgICAgICAgfCAgIDQgKy0KIGRyaXZlcnMvY2xrL3NwZWFyL2Nsay12Y28tcGxsLmMgICAgICAg ICAgICAgICB8ICAgOCArLQogZHJpdmVycy9jbGsvc3BlYXIvY2xrLmggICAgICAgICAgICAgICAg ICAgICAgIHwgIDE0ICstCiBkcml2ZXJzL2Nsay9zcGVhci9zcGVhcjEzMTBfY2xvY2suYyAgICAg ICAgICAgfCAgIDMgKy0KIGRyaXZlcnMvY2xrL3NwZWFyL3NwZWFyMTM0MF9jbG9jay5jICAgICAg ICAgICB8ICAgMyArLQogZHJpdmVycy9jbGsvc3BlYXIvc3BlYXIzeHhfY2xvY2suYyAgICAgICAg ICAgIHwgIDE3ICstCiBkcml2ZXJzL2Nsay9zcGVhci9zcGVhcjZ4eF9jbG9jay5jICAgICAgICAg ICAgfCAgIDMgKy0KIGRyaXZlcnMvY2xrL3N0L2Nsay1mbGV4Z2VuLmMgICAgICAgICAgICAgICAg ICB8ICAxMiArLQogZHJpdmVycy9jbGsvc3QvY2xrZ2VuLWZzeW4uYyAgICAgICAgICAgICAgICAg IHwgIDIyICstCiBkcml2ZXJzL2Nsay9zdC9jbGtnZW4tbXV4LmMgICAgICAgICAgICAgICAgICAg fCAgMzIgKy0tCiBkcml2ZXJzL2Nsay9zdC9jbGtnZW4tcGxsLmMgICAgICAgICAgICAgICAgICAg fCAgMzQgKy0tCiBkcml2ZXJzL2Nsay9zdW54aS9jbGstYTEwLWhvc2MuYyAgICAgICAgICAgICAg fCAgIDIgKy0KIGRyaXZlcnMvY2xrL3N1bnhpL2Nsay1hMjAtZ21hYy5jICAgICAgICAgICAgICB8 ICAgMiArLQogZHJpdmVycy9jbGsvc3VueGkvY2xrLWZhY3RvcnMuYyAgICAgICAgICAgICAgIHwg ICA0ICstCiBkcml2ZXJzL2Nsay9zdW54aS9jbGstc3VuNmktYXBiMC1nYXRlcy5jICAgICAgfCAg IDIgKy0KIGRyaXZlcnMvY2xrL3N1bnhpL2Nsay1zdW42aS1hcGIwLmMgICAgICAgICAgICB8ICAg MiArLQogZHJpdmVycy9jbGsvc3VueGkvY2xrLXN1bjZpLWFyMTAwLmMgICAgICAgICAgIHwgICA2 ICstCiBkcml2ZXJzL2Nsay9zdW54aS9jbGstc3VuOGktYXBiMC5jICAgICAgICAgICAgfCAgIDIg Ky0KIGRyaXZlcnMvY2xrL3N1bnhpL2Nsay1zdW54aS5jICAgICAgICAgICAgICAgICB8ICAxOCAr LQogZHJpdmVycy9jbGsvdGVncmEvY2xrLWF1ZGlvLXN5bmMuYyAgICAgICAgICAgIHwgICA0ICst CiBkcml2ZXJzL2Nsay90ZWdyYS9jbGstZGl2aWRlci5jICAgICAgICAgICAgICAgfCAgIDUgKy0K IGRyaXZlcnMvY2xrL3RlZ3JhL2Nsay1wZXJpcGgtZ2F0ZS5jICAgICAgICAgICB8ICAgNSArLQog ZHJpdmVycy9jbGsvdGVncmEvY2xrLXBlcmlwaC5jICAgICAgICAgICAgICAgIHwgICA5ICstCiBk cml2ZXJzL2Nsay90ZWdyYS9jbGstcGxsLW91dC5jICAgICAgICAgICAgICAgfCAgIDUgKy0KIGRy aXZlcnMvY2xrL3RlZ3JhL2Nsay1wbGwuYyAgICAgICAgICAgICAgICAgICB8ICA0MSArKy0KIGRy aXZlcnMvY2xrL3RlZ3JhL2Nsay1zdXBlci5jICAgICAgICAgICAgICAgICB8ICAgNSArLQogZHJp dmVycy9jbGsvdGVncmEvY2xrLXRlZ3JhLWF1ZGlvLmMgICAgICAgICAgIHwgICA1ICstCiBkcml2 ZXJzL2Nsay90ZWdyYS9jbGstdGVncmEtZml4ZWQuYyAgICAgICAgICAgfCAgIDkgKy0KIGRyaXZl cnMvY2xrL3RlZ3JhL2Nsay10ZWdyYS1wZXJpcGguYyAgICAgICAgICB8ICAxMyArLQogZHJpdmVy cy9jbGsvdGVncmEvY2xrLXRlZ3JhLXBtYy5jICAgICAgICAgICAgIHwgICA1ICstCiBkcml2ZXJz L2Nsay90ZWdyYS9jbGstdGVncmEtc3VwZXItZ2VuNC5jICAgICAgfCAgIDkgKy0KIGRyaXZlcnMv Y2xrL3RlZ3JhL2Nsay10ZWdyYTExNC5jICAgICAgICAgICAgICB8ICAxMSArLQogZHJpdmVycy9j bGsvdGVncmEvY2xrLXRlZ3JhMTI0LmMgICAgICAgICAgICAgIHwgICA3ICstCiBkcml2ZXJzL2Ns ay90ZWdyYS9jbGstdGVncmEyMC5jICAgICAgICAgICAgICAgfCAgMTMgKy0KIGRyaXZlcnMvY2xr L3RlZ3JhL2Nsay10ZWdyYTMwLmMgICAgICAgICAgICAgICB8ICAgOSArLQogZHJpdmVycy9jbGsv dGVncmEvY2xrLmMgICAgICAgICAgICAgICAgICAgICAgIHwgIDI1ICstCiBkcml2ZXJzL2Nsay90 ZWdyYS9jbGsuaCAgICAgICAgICAgICAgICAgICAgICAgfCAgMzggKy0tCiBkcml2ZXJzL2Nsay90 aS9hcGxsLmMgICAgICAgICAgICAgICAgICAgICAgICAgfCAgIDggKy0KIGRyaXZlcnMvY2xrL3Rp L2Nsay0yeHh4LmMgICAgICAgICAgICAgICAgICAgICB8ICAgOCArLQogZHJpdmVycy9jbGsvdGkv Y2xrLTMzeHguYyAgICAgICAgICAgICAgICAgICAgIHwgIDE4ICstCiBkcml2ZXJzL2Nsay90aS9j bGstM3h4eC5jICAgICAgICAgICAgICAgICAgICAgfCAgIDggKy0KIGRyaXZlcnMvY2xrL3RpL2Ns ay00M3h4LmMgICAgICAgICAgICAgICAgICAgICB8ICAgOCArLQogZHJpdmVycy9jbGsvdGkvY2xr LTQ0eHguYyAgICAgICAgICAgICAgICAgICAgIHwgIDE2ICstCiBkcml2ZXJzL2Nsay90aS9jbGst NTR4eC5jICAgICAgICAgICAgICAgICAgICAgfCAgMjUgKy0KIGRyaXZlcnMvY2xrL3RpL2Nsay03 eHguYyAgICAgICAgICAgICAgICAgICAgICB8ICAyOCArLQogZHJpdmVycy9jbGsvdGkvY2xrLWRy YTctYXRsLmMgICAgICAgICAgICAgICAgIHwgICA2ICstCiBkcml2ZXJzL2Nsay90aS9jbGsuYyAg ICAgICAgICAgICAgICAgICAgICAgICAgfCAgIDIgKy0KIGRyaXZlcnMvY2xrL3RpL2Nsb2NrZG9t YWluLmMgICAgICAgICAgICAgICAgICB8ICAgNCArLQogZHJpdmVycy9jbGsvdGkvY29tcG9zaXRl LmMgICAgICAgICAgICAgICAgICAgIHwgICAyICstCiBkcml2ZXJzL2Nsay90aS9kaXZpZGVyLmMg ICAgICAgICAgICAgICAgICAgICAgfCAgIDYgKy0KIGRyaXZlcnMvY2xrL3RpL2RwbGwuYyAgICAg ICAgICAgICAgICAgICAgICAgICB8ICAgOCArLQogZHJpdmVycy9jbGsvdGkvZml4ZWQtZmFjdG9y LmMgICAgICAgICAgICAgICAgIHwgICAyICstCiBkcml2ZXJzL2Nsay90aS9nYXRlLmMgICAgICAg ICAgICAgICAgICAgICAgICAgfCAgIDIgKy0KIGRyaXZlcnMvY2xrL3RpL2ludGVyZmFjZS5jICAg ICAgICAgICAgICAgICAgICB8ICAgMiArLQogZHJpdmVycy9jbGsvdGkvbXV4LmMgICAgICAgICAg ICAgICAgICAgICAgICAgIHwgICA2ICstCiBkcml2ZXJzL2Nsay91eDUwMC9hYng1MDAtY2xrLmMg ICAgICAgICAgICAgICAgfCAgIDMgKy0KIGRyaXZlcnMvY2xrL3V4NTAwL2Nsay1wcmNjLmMgICAg ICAgICAgICAgICAgICB8ICAgOCArLQogZHJpdmVycy9jbGsvdXg1MDAvY2xrLXByY211LmMgICAg ICAgICAgICAgICAgIHwgIDE2ICstCiBkcml2ZXJzL2Nsay91eDUwMC9jbGstc3lzY3RybC5jICAg ICAgICAgICAgICAgfCAgMTAgKy0KIGRyaXZlcnMvY2xrL3V4NTAwL2Nsay5oICAgICAgICAgICAg ICAgICAgICAgICB8ICAyMyArLQogZHJpdmVycy9jbGsvdXg1MDAvdTg1MDBfY2xrLmMgICAgICAg ICAgICAgICAgIHwgICAzICstCiBkcml2ZXJzL2Nsay91eDUwMC91ODUwMF9vZl9jbGsuYyAgICAg ICAgICAgICAgfCAgMTMgKy0KIGRyaXZlcnMvY2xrL3V4NTAwL3U4NTQwX2Nsay5jICAgICAgICAg ICAgICAgICB8ICAgMyArLQogZHJpdmVycy9jbGsvdXg1MDAvdTk1NDBfY2xrLmMgICAgICAgICAg ICAgICAgIHwgICAxIC0KIGRyaXZlcnMvY2xrL3ZlcnNhdGlsZS9jbGstaWNzdC5jICAgICAgICAg ICAgICB8ICAgNSArLQogZHJpdmVycy9jbGsvdmVyc2F0aWxlL2Nsay1pY3N0LmggICAgICAgICAg ICAgIHwgICAyICstCiBkcml2ZXJzL2Nsay92ZXJzYXRpbGUvY2xrLWltcGQxLmMgICAgICAgICAg ICAgfCAgMTkgKy0KIGRyaXZlcnMvY2xrL3ZlcnNhdGlsZS9jbGstcmVhbHZpZXcuYyAgICAgICAg ICB8ICAgMyArLQogZHJpdmVycy9jbGsvdmVyc2F0aWxlL2Nsay1zcDgxMC5jICAgICAgICAgICAg IHwgIDMwICsrLQogZHJpdmVycy9jbGsvdmVyc2F0aWxlL2Nsay12ZXJzYXRpbGUuYyAgICAgICAg IHwgICAzICstCiBkcml2ZXJzL2Nsay92ZXJzYXRpbGUvY2xrLXZleHByZXNzLW9zYy5jICAgICAg fCAgIDIgKy0KIGRyaXZlcnMvY2xrL3ZlcnNhdGlsZS9jbGstdmV4cHJlc3MuYyAgICAgICAgICB8 ICAgNiArLQogZHJpdmVycy9jbGsveDg2L2Nsay1scHQuYyAgICAgICAgICAgICAgICAgICAgIHwg ICAzICstCiBkcml2ZXJzL2Nsay96eW5xL2Nsa2MuYyAgICAgICAgICAgICAgICAgICAgICAgfCAg MjIgKy0KIGRyaXZlcnMvY2xrL3p5bnEvcGxsLmMgICAgICAgICAgICAgICAgICAgICAgICB8ICAg NCArLQogZHJpdmVycy9ncHUvZHJtL21zbS9oZG1pL2hkbWlfcGh5Xzg5NjAuYyAgICAgIHwgICAz ICstCiBkcml2ZXJzL21lZGlhL3BsYXRmb3JtL2V4eW5vczQtaXMvbWVkaWEtZGV2LmMgfCAgMTcg Ky0KIGRyaXZlcnMvbWVkaWEvcGxhdGZvcm0vZXh5bm9zNC1pcy9tZWRpYS1kZXYuaCB8ICAgNyAr LQogZHJpdmVycy9tZWRpYS9wbGF0Zm9ybS9vbWFwM2lzcC9pc3AuaCAgICAgICAgIHwgICAyICst CiBkcml2ZXJzL3J0Yy9ydGMtaHltODU2My5jICAgICAgICAgICAgICAgICAgICAgfCAgIDQgKy0K IGRyaXZlcnMvc3RhZ2luZy9pbXgtZHJtL2lteC10dmUuYyAgICAgICAgICAgICB8ICAyNyArLQog aW5jbHVkZS9hc20tZ2VuZXJpYy9jbGtkZXYuaCAgICAgICAgICAgICAgICAgIHwgICA2ICstCiBp bmNsdWRlL2xpbnV4L2Nsay90aS5oICAgICAgICAgICAgICAgICAgICAgICAgfCAgMTAgKy0KIGlu Y2x1ZGUvbGludXgvY2xrL3p5bnEuaCAgICAgICAgICAgICAgICAgICAgICB8ICAgMiArLQogaW5j bHVkZS9saW51eC9wbGF0Zm9ybV9kYXRhL3NpNTM1MS5oICAgICAgICAgIHwgICA0ICstCiBzb3Vu ZC9zb2MvbXhzL214cy1zYWlmLmMgICAgICAgICAgICAgICAgICAgICAgfCAgIDQgKy0KIDI2NiBm aWxlcyBjaGFuZ2VkLCAxNDUzIGluc2VydGlvbnMoKyksIDE1MTYgZGVsZXRpb25zKC0pCgpkaWZm IC0tZ2l0IGEvYXJjaC9hcm0vbWFjaC1kb3ZlL2NvbW1vbi5jIGIvYXJjaC9hcm0vbWFjaC1kb3Zl L2NvbW1vbi5jCmluZGV4IDBkMWE4OTIuLjRkOTU2ODUgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL21h Y2gtZG92ZS9jb21tb24uYworKysgYi9hcmNoL2FybS9tYWNoLWRvdmUvY29tbW9uLmMKQEAgLTcx LDkgKzcxLDkgQEAgdm9pZCBfX2luaXQgZG92ZV9tYXBfaW8odm9pZCkKIHN0YXRpYyBpbnQgZG92 ZV90Y2xrOwogCiBzdGF0aWMgREVGSU5FX1NQSU5MT0NLKGdhdGluZ19sb2NrKTsKLXN0YXRpYyBz dHJ1Y3QgY2xrICp0Y2xrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqdGNsazsKIAotc3RhdGlj IHN0cnVjdCBjbGsgX19pbml0ICpkb3ZlX3JlZ2lzdGVyX2dhdGUoY29uc3QgY2hhciAqbmFtZSwK K3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgX19pbml0ICpkb3ZlX3JlZ2lzdGVyX2dhdGUoY29uc3Qg Y2hhciAqbmFtZSwKIAkJCQkJICAgICBjb25zdCBjaGFyICpwYXJlbnQsIHU4IGJpdF9pZHgpCiB7 CiAJcmV0dXJuIGNsa19yZWdpc3Rlcl9nYXRlKE5VTEwsIG5hbWUsIHBhcmVudCwgMCwKQEAgLTgz LDkgKzgzLDkgQEAgc3RhdGljIHN0cnVjdCBjbGsgX19pbml0ICpkb3ZlX3JlZ2lzdGVyX2dhdGUo Y29uc3QgY2hhciAqbmFtZSwKIAogc3RhdGljIHZvaWQgX19pbml0IGRvdmVfY2xrX2luaXQodm9p ZCkKIHsKLQlzdHJ1Y3QgY2xrICp1c2IwLCAqdXNiMSwgKnNhdGEsICpwZXgwLCAqcGV4MSwgKnNk aW8wLCAqc2RpbzE7Ci0Jc3RydWN0IGNsayAqbmFuZCwgKmNhbWVyYSwgKmkyczAsICppMnMxLCAq Y3J5cHRvLCAqYWM5NywgKnBkbWE7Ci0Jc3RydWN0IGNsayAqeG9yMCwgKnhvcjEsICpnZSwgKmdl cGh5OworCXN0cnVjdCBjbGtfY29yZSAqdXNiMCwgKnVzYjEsICpzYXRhLCAqcGV4MCwgKnBleDEs ICpzZGlvMCwgKnNkaW8xOworCXN0cnVjdCBjbGtfY29yZSAqbmFuZCwgKmNhbWVyYSwgKmkyczAs ICppMnMxLCAqY3J5cHRvLCAqYWM5NywgKnBkbWE7CisJc3RydWN0IGNsa19jb3JlICp4b3IwLCAq eG9yMSwgKmdlLCAqZ2VwaHk7CiAKIAl0Y2xrID0gY2xrX3JlZ2lzdGVyX2ZpeGVkX3JhdGUoTlVM TCwgInRjbGsiLCBOVUxMLCBDTEtfSVNfUk9PVCwKIAkJCQkgICAgICAgZG92ZV90Y2xrKTsKZGlm ZiAtLWdpdCBhL2FyY2gvYXJtL21hY2gtaW14L2Nsay1idXN5LmMgYi9hcmNoL2FybS9tYWNoLWlt eC9jbGstYnVzeS5jCmluZGV4IDRiYjFiYzQuLmJiM2VkYzUgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJt L21hY2gtaW14L2Nsay1idXN5LmMKKysrIGIvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLWJ1c3kuYwpA QCAtMTAsNyArMTAsNiBAQAogICogaHR0cDovL3d3dy5nbnUub3JnL2NvcHlsZWZ0L2dwbC5odG1s CiAgKi8KIAotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92 aWRlci5oPgogI2luY2x1ZGUgPGxpbnV4L2lvLmg+CiAjaW5jbHVkZSA8bGludXgvc2xhYi5oPgpA QCAtNzgsMTIgKzc3LDEyIEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX29wcyBjbGtfYnVzeV9kaXZpZGVy X29wcyA9IHsKIAkuc2V0X3JhdGUgPSBjbGtfYnVzeV9kaXZpZGVyX3NldF9yYXRlLAogfTsKIAot c3RydWN0IGNsayAqaW14X2Nsa19idXN5X2RpdmlkZXIoY29uc3QgY2hhciAqbmFtZSwgY29uc3Qg Y2hhciAqcGFyZW50X25hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmlteF9jbGtfYnVzeV9kaXZpZGVy KGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAogCQkJCSB2b2lkIF9f aW9tZW0gKnJlZywgdTggc2hpZnQsIHU4IHdpZHRoLAogCQkJCSB2b2lkIF9faW9tZW0gKmJ1c3lf cmVnLCB1OCBidXN5X3NoaWZ0KQogewogCXN0cnVjdCBjbGtfYnVzeV9kaXZpZGVyICpidXN5Owot CXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xrX2lu aXRfZGF0YSBpbml0OwogCiAJYnVzeSA9IGt6YWxsb2Moc2l6ZW9mKCpidXN5KSwgR0ZQX0tFUk5F TCk7CkBAIC0xNTIsMTIgKzE1MSwxMiBAQCBzdGF0aWMgc3RydWN0IGNsa19vcHMgY2xrX2J1c3lf bXV4X29wcyA9IHsKIAkuc2V0X3BhcmVudCA9IGNsa19idXN5X211eF9zZXRfcGFyZW50LAogfTsK IAotc3RydWN0IGNsayAqaW14X2Nsa19idXN5X211eChjb25zdCBjaGFyICpuYW1lLCB2b2lkIF9f aW9tZW0gKnJlZywgdTggc2hpZnQsCitzdHJ1Y3QgY2xrX2NvcmUgKmlteF9jbGtfYnVzeV9tdXgo Y29uc3QgY2hhciAqbmFtZSwgdm9pZCBfX2lvbWVtICpyZWcsIHU4IHNoaWZ0LAogCQkJICAgICB1 OCB3aWR0aCwgdm9pZCBfX2lvbWVtICpidXN5X3JlZywgdTggYnVzeV9zaGlmdCwKIAkJCSAgICAg Y29uc3QgY2hhciAqKnBhcmVudF9uYW1lcywgaW50IG51bV9wYXJlbnRzKQogewogCXN0cnVjdCBj bGtfYnVzeV9tdXggKmJ1c3k7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAq Y2xrOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAlidXN5ID0ga3phbGxvYyhzaXpl b2YoKmJ1c3kpLCBHRlBfS0VSTkVMKTsKZGlmZiAtLWdpdCBhL2FyY2gvYXJtL21hY2gtaW14L2Ns ay1maXh1cC1kaXYuYyBiL2FyY2gvYXJtL21hY2gtaW14L2Nsay1maXh1cC1kaXYuYwppbmRleCAy MWRiMDIwLi44YTYyYmZkIDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNoLWlteC9jbGstZml4dXAt ZGl2LmMKKysrIGIvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLWZpeHVwLWRpdi5jCkBAIC05MiwxMiAr OTIsMTIgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIGNsa19maXh1cF9kaXZfb3BzID0g ewogCS5zZXRfcmF0ZSA9IGNsa19maXh1cF9kaXZfc2V0X3JhdGUsCiB9OwogCi1zdHJ1Y3QgY2xr ICppbXhfY2xrX2ZpeHVwX2RpdmlkZXIoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFy ZW50LAorc3RydWN0IGNsa19jb3JlICppbXhfY2xrX2ZpeHVwX2RpdmlkZXIoY29uc3QgY2hhciAq bmFtZSwgY29uc3QgY2hhciAqcGFyZW50LAogCQkJCSAgdm9pZCBfX2lvbWVtICpyZWcsIHU4IHNo aWZ0LCB1OCB3aWR0aCwKIAkJCQkgIHZvaWQgKCpmaXh1cCkodTMyICp2YWwpKQogewogCXN0cnVj dCBjbGtfZml4dXBfZGl2ICpmaXh1cF9kaXY7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBj bGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAlpZiAoIWZpeHVw KQpkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLWZpeHVwLW11eC5jIGIvYXJjaC9h cm0vbWFjaC1pbXgvY2xrLWZpeHVwLW11eC5jCmluZGV4IDBkNDBiMzUuLmUyOWRjNjIgMTAwNjQ0 Ci0tLSBhL2FyY2gvYXJtL21hY2gtaW14L2Nsay1maXh1cC1tdXguYworKysgYi9hcmNoL2FybS9t YWNoLWlteC9jbGstZml4dXAtbXV4LmMKQEAgLTcxLDEyICs3MSwxMiBAQCBzdGF0aWMgY29uc3Qg c3RydWN0IGNsa19vcHMgY2xrX2ZpeHVwX211eF9vcHMgPSB7CiAJLnNldF9wYXJlbnQgPSBjbGtf Zml4dXBfbXV4X3NldF9wYXJlbnQsCiB9OwogCi1zdHJ1Y3QgY2xrICppbXhfY2xrX2ZpeHVwX211 eChjb25zdCBjaGFyICpuYW1lLCB2b2lkIF9faW9tZW0gKnJlZywKK3N0cnVjdCBjbGtfY29yZSAq aW14X2Nsa19maXh1cF9tdXgoY29uc3QgY2hhciAqbmFtZSwgdm9pZCBfX2lvbWVtICpyZWcsCiAJ CQkgICAgICB1OCBzaGlmdCwgdTggd2lkdGgsIGNvbnN0IGNoYXIgKipwYXJlbnRzLAogCQkJICAg ICAgaW50IG51bV9wYXJlbnRzLCB2b2lkICgqZml4dXApKHUzMiAqdmFsKSkKIHsKIAlzdHJ1Y3Qg Y2xrX2ZpeHVwX211eCAqZml4dXBfbXV4OwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xr X2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwogCiAJaWYgKCFmaXh1cCkK ZGlmZiAtLWdpdCBhL2FyY2gvYXJtL21hY2gtaW14L2Nsay1nYXRlMi5jIGIvYXJjaC9hcm0vbWFj aC1pbXgvY2xrLWdhdGUyLmMKaW5kZXggODRhY2RmZC4uZDc4ZjQwOSAxMDA2NDQKLS0tIGEvYXJj aC9hcm0vbWFjaC1pbXgvY2xrLWdhdGUyLmMKKysrIGIvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLWdh dGUyLmMKQEAgLTEwOCwxNCArMTA4LDE0IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX29wcyBjbGtfZ2F0 ZTJfb3BzID0gewogCS5pc19lbmFibGVkID0gY2xrX2dhdGUyX2lzX2VuYWJsZWQsCiB9OwogCi1z dHJ1Y3QgY2xrICpjbGtfcmVnaXN0ZXJfZ2F0ZTIoc3RydWN0IGRldmljZSAqZGV2LCBjb25zdCBj aGFyICpuYW1lLAorc3RydWN0IGNsa19jb3JlICpjbGtfcmVnaXN0ZXJfZ2F0ZTIoc3RydWN0IGRl dmljZSAqZGV2LCBjb25zdCBjaGFyICpuYW1lLAogCQljb25zdCBjaGFyICpwYXJlbnRfbmFtZSwg dW5zaWduZWQgbG9uZyBmbGFncywKIAkJdm9pZCBfX2lvbWVtICpyZWcsIHU4IGJpdF9pZHgsCiAJ CXU4IGNsa19nYXRlMl9mbGFncywgc3BpbmxvY2tfdCAqbG9jaywKIAkJdW5zaWduZWQgaW50ICpz aGFyZV9jb3VudCkKIHsKIAlzdHJ1Y3QgY2xrX2dhdGUyICpnYXRlOwotCXN0cnVjdCBjbGsgKmNs azsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0Owog CiAJZ2F0ZSA9IGt6YWxsb2Moc2l6ZW9mKHN0cnVjdCBjbGtfZ2F0ZTIpLCBHRlBfS0VSTkVMKTsK ZGlmZiAtLWdpdCBhL2FyY2gvYXJtL21hY2gtaW14L2Nsay1pbXgxLmMgYi9hcmNoL2FybS9tYWNo LWlteC9jbGstaW14MS5jCmluZGV4IDM3YzMwN2EuLjg0NTliZDcgMTAwNjQ0Ci0tLSBhL2FyY2gv YXJtL21hY2gtaW14L2Nsay1pbXgxLmMKKysrIGIvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLWlteDEu YwpAQCAtMTUsNyArMTUsNiBAQAogICogNTEgRnJhbmtsaW4gU3QsIEZpZnRoIEZsb29yLCBCb3N0 b24sIE1BIDAyMTEwLTEzMDEsIFVTQS4KICAqLwogCi0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAj aW5jbHVkZSA8bGludXgvY2xrZGV2Lmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+ CiAjaW5jbHVkZSA8bGludXgvZXJyLmg+CkBAIC0zMiw3ICszMSw3IEBAIHN0YXRpYyBjb25zdCBj aGFyICpwcmVtX3NlbF9jbGtzW10gPSB7ICJjbGszMl9wcmVtdWx0IiwgImNsazE2bSIsIH07CiBz dGF0aWMgY29uc3QgY2hhciAqY2xrb19zZWxfY2xrc1tdID0geyAicGVyMSIsICJoY2xrIiwgImNs azQ4bSIsICJjbGsxNm0iLAogCQkJCSAgICAgICAicHJlbSIsICJmY2xrIiwgfTsKIAotc3RhdGlj IHN0cnVjdCBjbGsgKmNsa1tJTVgxX0NMS19NQVhdOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSAq Y2xrW0lNWDFfQ0xLX01BWF07CiBzdGF0aWMgc3RydWN0IGNsa19vbmVjZWxsX2RhdGEgY2xrX2Rh dGE7CiAKIHN0YXRpYyB2b2lkIF9faW9tZW0gKmNjbSBfX2luaXRkYXRhOwpkaWZmIC0tZ2l0IGEv YXJjaC9hcm0vbWFjaC1pbXgvY2xrLWlteDIxLmMgYi9hcmNoL2FybS9tYWNoLWlteC9jbGstaW14 MjEuYwppbmRleCA0YjRjNzUzLi41NmQ3OTljIDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNoLWlt eC9jbGstaW14MjEuYworKysgYi9hcmNoL2FybS9tYWNoLWlteC9jbGstaW14MjEuYwpAQCAtOSw3 ICs5LDYgQEAKICAqIG9mIHRoZSBMaWNlbnNlLCBvciAoYXQgeW91ciBvcHRpb24pIGFueSBsYXRl ciB2ZXJzaW9uLgogICovCiAKLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51 eC9jbGstcHJvdmlkZXIuaD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNpbmNsdWRlIDxs aW51eC9vZi5oPgpAQCAtMzYsNyArMzUsNyBAQCBzdGF0aWMgY29uc3QgY2hhciAqbXBsbF9zZWxf Y2xrc1tdID0geyAiZnBtX2dhdGUiLCAibXBsbF9vc2Nfc2VsIiwgfTsKIHN0YXRpYyBjb25zdCBj aGFyICpzcGxsX3NlbF9jbGtzW10gPSB7ICJmcG1fZ2F0ZSIsICJtcGxsX29zY19zZWwiLCB9Owog c3RhdGljIGNvbnN0IGNoYXIgKnNzaV9zZWxfY2xrc1tdID0geyAic3BsbF9nYXRlIiwgIm1wbGxf Z2F0ZSIsIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICpjbGtbSU1YMjFfQ0xLX01BWF07CitzdGF0 aWMgc3RydWN0IGNsa19jb3JlICpjbGtbSU1YMjFfQ0xLX01BWF07CiBzdGF0aWMgc3RydWN0IGNs a19vbmVjZWxsX2RhdGEgY2xrX2RhdGE7CiAKIHN0YXRpYyB2b2lkIF9faW5pdCBfbXgyMV9jbG9j a3NfaW5pdCh1bnNpZ25lZCBsb25nIGxyZWYsIHVuc2lnbmVkIGxvbmcgaHJlZikKZGlmZiAtLWdp dCBhL2FyY2gvYXJtL21hY2gtaW14L2Nsay1pbXgyNS5jIGIvYXJjaC9hcm0vbWFjaC1pbXgvY2xr LWlteDI1LmMKaW5kZXggNTljMGM4NS4uMDZkMmM3MiAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vbWFj aC1pbXgvY2xrLWlteDI1LmMKKysrIGIvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLWlteDI1LmMKQEAg LTE5LDcgKzE5LDYgQEAKICNpbmNsdWRlIDxsaW51eC9rZXJuZWwuaD4KICNpbmNsdWRlIDxsaW51 eC9pbml0Lmg+CiAjaW5jbHVkZSA8bGludXgvbGlzdC5oPgotI2luY2x1ZGUgPGxpbnV4L2Nsay5o PgogI2luY2x1ZGUgPGxpbnV4L2lvLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrZGV2Lmg+CiAjaW5j bHVkZSA8bGludXgvZXJyLmg+CkBAIC04Nyw3ICs4Niw3IEBAIGVudW0gbXgyNV9jbGtzIHsKIAl3 ZHRfaXBnLCBja29fZGl2LCBja29fc2VsLCBja28sIGNsa19tYXgKIH07CiAKLXN0YXRpYyBzdHJ1 Y3QgY2xrICpjbGtbY2xrX21heF07CitzdGF0aWMgc3RydWN0IGNsa19jb3JlICpjbGtbY2xrX21h eF07CiAKIHN0YXRpYyBpbnQgX19pbml0IF9fbXgyNV9jbG9ja3NfaW5pdCh1bnNpZ25lZCBsb25n IG9zY19yYXRlLAogCQkJCSAgICAgdm9pZCBfX2lvbWVtICpjY21fYmFzZSkKQEAgLTIyNSwxNiAr MjI0LDE2IEBAIHN0YXRpYyBpbnQgX19pbml0IF9fbXgyNV9jbG9ja3NfaW5pdCh1bnNpZ25lZCBs b25nIG9zY19yYXRlLAogCiAJaW14X2NoZWNrX2Nsb2NrcyhjbGssIEFSUkFZX1NJWkUoY2xrKSk7 CiAKLQljbGtfcHJlcGFyZV9lbmFibGUoY2xrW2VtaV9haGJdKTsKKwljbGtfcHJvdmlkZXJfcHJl cGFyZV9lbmFibGUoY2xrW2VtaV9haGJdKTsKIAogCS8qIENsb2NrIHNvdXJjZSBmb3IgZ3B0IG11 c3QgYmUgZGVyaXZlZCBmcm9tIEFIQiAqLwotCWNsa19zZXRfcGFyZW50KGNsa1twZXI1X3NlbF0s IGNsa1thaGJdKTsKKwljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChjbGtbcGVyNV9zZWxdLCBjbGtb YWhiXSk7CiAKIAkvKgogCSAqIExldCdzIGluaXRpYWxseSBzZXQgdXAgQ0xLTyBwYXJlbnQgYXMg aXBnLCBzaW5jZSB0aGlzIGNvbmZpZ3VyYXRpb24KIAkgKiBpcyB1c2VkIG9uIHNvbWUgaW14MjUg Ym9hcmQgZGVzaWducyB0byBjbG9jayB0aGUgYXVkaW8gY29kZWMuCiAJICovCi0JY2xrX3NldF9w YXJlbnQoY2xrW2Nrb19zZWxdLCBjbGtbaXBnXSk7CisJY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQo Y2xrW2Nrb19zZWxdLCBjbGtbaXBnXSk7CiAKIAlyZXR1cm4gMDsKIH0KZGlmZiAtLWdpdCBhL2Fy Y2gvYXJtL21hY2gtaW14L2Nsay1pbXgyNy5jIGIvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLWlteDI3 LmMKaW5kZXggYWI2MzQ5ZS4uN2IwZjAxYyAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vbWFjaC1pbXgv Y2xrLWlteDI3LmMKKysrIGIvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLWlteDI3LmMKQEAgLTEsNCAr MSwzIEBACi0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3Zp ZGVyLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrZGV2Lmg+CiAjaW5jbHVkZSA8bGludXgvZXJyLmg+ CkBAIC0zOSw3ICszOCw3IEBAIHN0YXRpYyBjb25zdCBjaGFyICpjbGtvX3NlbF9jbGtzW10gPSB7 CiAKIHN0YXRpYyBjb25zdCBjaGFyICpzc2lfc2VsX2Nsa3NbXSA9IHsgInNwbGxfZ2F0ZSIsICJt cGxsIiwgfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKmNsa1tJTVgyN19DTEtfTUFYXTsKK3N0YXRp YyBzdHJ1Y3QgY2xrX2NvcmUgKmNsa1tJTVgyN19DTEtfTUFYXTsKIHN0YXRpYyBzdHJ1Y3QgY2xr X29uZWNlbGxfZGF0YSBjbGtfZGF0YTsKIAogc3RhdGljIHZvaWQgX19pbml0IF9teDI3X2Nsb2Nr c19pbml0KHVuc2lnbmVkIGxvbmcgZnJlZikKQEAgLTE1Niw3ICsxNTUsNyBAQCBzdGF0aWMgdm9p ZCBfX2luaXQgX214MjdfY2xvY2tzX2luaXQodW5zaWduZWQgbG9uZyBmcmVmKQogCiAJY2xrX3Jl Z2lzdGVyX2Nsa2RldihjbGtbSU1YMjdfQ0xLX0NQVV9ESVZdLCBOVUxMLCAiY3B1MCIpOwogCi0J Y2xrX3ByZXBhcmVfZW5hYmxlKGNsa1tJTVgyN19DTEtfRU1JX0FIQl9HQVRFXSk7CisJY2xrX3By b3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsa1tJTVgyN19DTEtfRU1JX0FIQl9HQVRFXSk7CiAKIAlp bXhfcHJpbnRfc2lsaWNvbl9yZXYoImkuTVgyNyIsIG14MjdfcmV2aXNpb24oKSk7CiB9CmRpZmYg LS1naXQgYS9hcmNoL2FybS9tYWNoLWlteC9jbGstaW14MzEuYyBiL2FyY2gvYXJtL21hY2gtaW14 L2Nsay1pbXgzMS5jCmluZGV4IDI4NmVmNDIuLmM5NWZjNWMgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJt L21hY2gtaW14L2Nsay1pbXgzMS5jCisrKyBiL2FyY2gvYXJtL21hY2gtaW14L2Nsay1pbXgzMS5j CkBAIC0xNiw3ICsxNiw2IEBACiAgKi8KIAogI2luY2x1ZGUgPGxpbnV4L21vZHVsZS5oPgotI2lu Y2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsa2Rldi5oPgogI2luY2x1ZGUg PGxpbnV4L2lvLmg+CiAjaW5jbHVkZSA8bGludXgvZXJyLmg+CkBAIC00NSw3ICs0NCw3IEBAIGVu dW0gbXgzMV9jbGtzIHsKIAlnYWNjX2dhdGUsIGVtaV9nYXRlLCBydGljX2dhdGUsIGZpcmlfZ2F0 ZSwgY2xrX21heAogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKmNsa1tjbGtfbWF4XTsKK3N0YXRp YyBzdHJ1Y3QgY2xrX2NvcmUgKmNsa1tjbGtfbWF4XTsKIHN0YXRpYyBzdHJ1Y3QgY2xrX29uZWNl bGxfZGF0YSBjbGtfZGF0YTsKIAogaW50IF9faW5pdCBteDMxX2Nsb2Nrc19pbml0KHVuc2lnbmVk IGxvbmcgZnJlZikKQEAgLTE3NiwxMSArMTc1LDExIEBAIGludCBfX2luaXQgbXgzMV9jbG9ja3Nf aW5pdCh1bnNpZ25lZCBsb25nIGZyZWYpCiAJY2xrX3JlZ2lzdGVyX2Nsa2RldihjbGtbc2RtYV9n YXRlXSwgTlVMTCwgImlteDMxLXNkbWEiKTsKIAljbGtfcmVnaXN0ZXJfY2xrZGV2KGNsa1tpaW1f Z2F0ZV0sICJpaW0iLCBOVUxMKTsKIAotCWNsa19zZXRfcGFyZW50KGNsa1tjc2ldLCBjbGtbdXBs bF0pOwotCWNsa19wcmVwYXJlX2VuYWJsZShjbGtbZW1pX2dhdGVdKTsKLQljbGtfcHJlcGFyZV9l bmFibGUoY2xrW2lpbV9nYXRlXSk7CisJY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQoY2xrW2NzaV0s IGNsa1t1cGxsXSk7CisJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsa1tlbWlfZ2F0ZV0p OworCWNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtbaWltX2dhdGVdKTsKIAlteDMxX3Jl dmlzaW9uKCk7Ci0JY2xrX2Rpc2FibGVfdW5wcmVwYXJlKGNsa1tpaW1fZ2F0ZV0pOworCWNsa19w cm92aWRlcl9kaXNhYmxlX3VucHJlcGFyZShjbGtbaWltX2dhdGVdKTsKIAogCW14Y190aW1lcl9p bml0KE1YMzFfSU9fQUREUkVTUyhNWDMxX0dQVDFfQkFTRV9BRERSKSwgTVgzMV9JTlRfR1BUKTsK IApkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLWlteDM1LmMgYi9hcmNoL2FybS9t YWNoLWlteC9jbGstaW14MzUuYwppbmRleCBhMGQyYjU3Li44NDZiMmNjIDEwMDY0NAotLS0gYS9h cmNoL2FybS9tYWNoLWlteC9jbGstaW14MzUuYworKysgYi9hcmNoL2FybS9tYWNoLWlteC9jbGst aW14MzUuYwpAQCAtOCw3ICs4LDYgQEAKICAqLwogI2luY2x1ZGUgPGxpbnV4L21tLmg+CiAjaW5j bHVkZSA8bGludXgvZGVsYXkuaD4KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxs aW51eC9pby5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsa2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L29m Lmg+CkBAIC02Nyw3ICs2Niw3IEBAIGVudW0gbXgzNV9jbGtzIHsKIAlncHUyZF9nYXRlLCBjbGtf bWF4CiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayAqY2xrW2Nsa19tYXhdOworc3RhdGljIHN0cnVj dCBjbGtfY29yZSAqY2xrW2Nsa19tYXhdOwogCiBpbnQgX19pbml0IG14MzVfY2xvY2tzX2luaXQo dm9pZCkKIHsKQEAgLTk5LDcgKzk4LDcgQEAgaW50IF9faW5pdCBteDM1X2Nsb2Nrc19pbml0KHZv aWQpCiAJZWxzZQogCQljbGtbYXJtXSA9IGlteF9jbGtfZml4ZWRfZmFjdG9yKCJhcm0iLCAibXBs bCIsIDEsIGFhZC0+YXJtKTsKIAotCWlmIChjbGtfZ2V0X3JhdGUoY2xrW2FybV0pID4gNDAwMDAw MDAwKQorCWlmIChjbGtfcHJvdmlkZXJfZ2V0X3JhdGUoY2xrW2FybV0pID4gNDAwMDAwMDAwKQog CQloc3BfZGl2ID0gaHNwX2Rpdl81MzI7CiAJZWxzZQogCQloc3BfZGl2ID0gaHNwX2Rpdl80MDA7 CkBAIC0yNTcsMTQgKzI1NiwxNCBAQCBpbnQgX19pbml0IG14MzVfY2xvY2tzX2luaXQodm9pZCkK IAljbGtfcmVnaXN0ZXJfY2xrZGV2KGNsa1tjc2lfZ2F0ZV0sIE5VTEwsICJteDMtY2FtZXJhLjAi KTsKIAljbGtfcmVnaXN0ZXJfY2xrZGV2KGNsa1thZG11eF9nYXRlXSwgImF1ZG11eCIsIE5VTEwp OwogCi0JY2xrX3ByZXBhcmVfZW5hYmxlKGNsa1tzcGJhX2dhdGVdKTsKLQljbGtfcHJlcGFyZV9l bmFibGUoY2xrW2dwaW8xX2dhdGVdKTsKLQljbGtfcHJlcGFyZV9lbmFibGUoY2xrW2dwaW8yX2dh dGVdKTsKLQljbGtfcHJlcGFyZV9lbmFibGUoY2xrW2dwaW8zX2dhdGVdKTsKLQljbGtfcHJlcGFy ZV9lbmFibGUoY2xrW2lpbV9nYXRlXSk7Ci0JY2xrX3ByZXBhcmVfZW5hYmxlKGNsa1tlbWlfZ2F0 ZV0pOwotCWNsa19wcmVwYXJlX2VuYWJsZShjbGtbbWF4X2dhdGVdKTsKLQljbGtfcHJlcGFyZV9l bmFibGUoY2xrW2lvbXV4Y19nYXRlXSk7CisJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNs a1tzcGJhX2dhdGVdKTsKKwljbGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUoY2xrW2dwaW8xX2dh dGVdKTsKKwljbGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUoY2xrW2dwaW8yX2dhdGVdKTsKKwlj bGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUoY2xrW2dwaW8zX2dhdGVdKTsKKwljbGtfcHJvdmlk ZXJfcHJlcGFyZV9lbmFibGUoY2xrW2lpbV9nYXRlXSk7CisJY2xrX3Byb3ZpZGVyX3ByZXBhcmVf ZW5hYmxlKGNsa1tlbWlfZ2F0ZV0pOworCWNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtb bWF4X2dhdGVdKTsKKwljbGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUoY2xrW2lvbXV4Y19nYXRl XSk7CiAKIAkvKgogCSAqIFNDQyBpcyBuZWVkZWQgdG8gYm9vdCB2aWEgbW1jIGFmdGVyIGEgd2F0 Y2hkb2cgcmVzZXQuIFRoZSBjbG9jayBjb2RlCkBAIC0yNzIsNyArMjcxLDcgQEAgaW50IF9faW5p dCBteDM1X2Nsb2Nrc19pbml0KHZvaWQpCiAJICogaGFuZGxlZCBoZXJlIGFuZCBub3QgbmVlZGVk IGZvciBtbWMpIGFuZCBJSU0gKHdoaWNoIGlzIGVuYWJsZWQKIAkgKiB1bmNvbmRpdGlvbmFsbHkg YWJvdmUpLgogCSAqLwotCWNsa19wcmVwYXJlX2VuYWJsZShjbGtbc2NjX2dhdGVdKTsKKwljbGtf cHJvdmlkZXJfcHJlcGFyZV9lbmFibGUoY2xrW3NjY19nYXRlXSk7CiAKIAlpbXhfcHJpbnRfc2ls aWNvbl9yZXYoImkuTVgzNSIsIG14MzVfcmV2aXNpb24oKSk7CiAKZGlmZiAtLWdpdCBhL2FyY2gv YXJtL21hY2gtaW14L2Nsay1pbXg1MS1pbXg1My5jIGIvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLWlt eDUxLWlteDUzLmMKaW5kZXggNzJkNjUyMS4uZmE5ZmM4NCAxMDA2NDQKLS0tIGEvYXJjaC9hcm0v bWFjaC1pbXgvY2xrLWlteDUxLWlteDUzLmMKKysrIGIvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLWlt eDUxLWlteDUzLmMKQEAgLTgsNyArOCw2IEBACiAgKi8KICNpbmNsdWRlIDxsaW51eC9tbS5oPgog I2luY2x1ZGUgPGxpbnV4L2RlbGF5Lmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVk ZSA8bGludXgvaW8uaD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNpbmNsdWRlIDxsaW51 eC9jbGstcHJvdmlkZXIuaD4KQEAgLTEyNiw3ICsxMjUsNyBAQCBzdGF0aWMgY29uc3QgY2hhciAq c3BkaWZfc2VsW10gPSB7ICJwbGwxX3N3IiwgInBsbDJfc3ciLCAicGxsM19zdyIsICJzcGRpZl94 dGFsXwogc3RhdGljIGNvbnN0IGNoYXIgKnNwZGlmMF9jb21fc2VsW10gPSB7ICJzcGRpZjBfcG9k ZiIsICJzc2kxX3Jvb3RfZ2F0ZSIsIH07CiBzdGF0aWMgY29uc3QgY2hhciAqbXg1MV9zcGRpZjFf Y29tX3NlbFtdID0geyAic3BkaWYxX3BvZGYiLCAic3NpMl9yb290X2dhdGUiLCB9OwogCi1zdGF0 aWMgc3RydWN0IGNsayAqY2xrW0lNWDVfQ0xLX0VORF07CitzdGF0aWMgc3RydWN0IGNsa19jb3Jl ICpjbGtbSU1YNV9DTEtfRU5EXTsKIHN0YXRpYyBzdHJ1Y3QgY2xrX29uZWNlbGxfZGF0YSBjbGtf ZGF0YTsKIAogc3RhdGljIHZvaWQgX19pbml0IG14NV9jbG9ja3NfY29tbW9uX2luaXQodm9pZCBf X2lvbWVtICpjY21fYmFzZSkKQEAgLTI4OSwyNiArMjg4LDI4IEBAIHN0YXRpYyB2b2lkIF9faW5p dCBteDVfY2xvY2tzX2NvbW1vbl9pbml0KHZvaWQgX19pb21lbSAqY2NtX2Jhc2UpCiAJY2xrX3Jl Z2lzdGVyX2Nsa2RldihjbGtbSU1YNV9DTEtfR1BDX0RWRlNdLCAiZ3BjX2R2ZnMiLCBOVUxMKTsK IAogCS8qIFNldCBTREhDIHBhcmVudHMgdG8gYmUgUExMMiAqLwotCWNsa19zZXRfcGFyZW50KGNs a1tJTVg1X0NMS19FU0RIQ19BX1NFTF0sIGNsa1tJTVg1X0NMS19QTEwyX1NXXSk7Ci0JY2xrX3Nl dF9wYXJlbnQoY2xrW0lNWDVfQ0xLX0VTREhDX0JfU0VMXSwgY2xrW0lNWDVfQ0xLX1BMTDJfU1dd KTsKKwljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChjbGtbSU1YNV9DTEtfRVNESENfQV9TRUxdLAor CQkJCWNsa1tJTVg1X0NMS19QTEwyX1NXXSk7CisJY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQoY2xr W0lNWDVfQ0xLX0VTREhDX0JfU0VMXSwKKwkJCQljbGtbSU1YNV9DTEtfUExMMl9TV10pOwogCiAJ LyogbW92ZSB1c2IgcGh5IGNsayB0byAyNE1IeiAqLwotCWNsa19zZXRfcGFyZW50KGNsa1tJTVg1 X0NMS19VU0JfUEhZX1NFTF0sIGNsa1tJTVg1X0NMS19PU0NdKTsKLQotCWNsa19wcmVwYXJlX2Vu YWJsZShjbGtbSU1YNV9DTEtfR1BDX0RWRlNdKTsKLQljbGtfcHJlcGFyZV9lbmFibGUoY2xrW0lN WDVfQ0xLX0FIQl9NQVhdKTsgLyogZXNkaGMzICovCi0JY2xrX3ByZXBhcmVfZW5hYmxlKGNsa1tJ TVg1X0NMS19BSVBTX1RaMV0pOwotCWNsa19wcmVwYXJlX2VuYWJsZShjbGtbSU1YNV9DTEtfQUlQ U19UWjJdKTsgLyogZmVjICovCi0JY2xrX3ByZXBhcmVfZW5hYmxlKGNsa1tJTVg1X0NMS19TUEJB XSk7Ci0JY2xrX3ByZXBhcmVfZW5hYmxlKGNsa1tJTVg1X0NMS19FTUlfRkFTVF9HQVRFXSk7IC8q IGZlYyAqLwotCWNsa19wcmVwYXJlX2VuYWJsZShjbGtbSU1YNV9DTEtfRU1JX1NMT1dfR0FURV0p OyAvKiBlaW0gKi8KLQljbGtfcHJlcGFyZV9lbmFibGUoY2xrW0lNWDVfQ0xLX01JUElfSFNDMV9H QVRFXSk7Ci0JY2xrX3ByZXBhcmVfZW5hYmxlKGNsa1tJTVg1X0NMS19NSVBJX0hTQzJfR0FURV0p OwotCWNsa19wcmVwYXJlX2VuYWJsZShjbGtbSU1YNV9DTEtfTUlQSV9FU0NfR0FURV0pOwotCWNs a19wcmVwYXJlX2VuYWJsZShjbGtbSU1YNV9DTEtfTUlQSV9IU1BfR0FURV0pOwotCWNsa19wcmVw YXJlX2VuYWJsZShjbGtbSU1YNV9DTEtfVE1BWDFdKTsKLQljbGtfcHJlcGFyZV9lbmFibGUoY2xr W0lNWDVfQ0xLX1RNQVgyXSk7IC8qIGVzZGhjMiwgZmVjICovCi0JY2xrX3ByZXBhcmVfZW5hYmxl KGNsa1tJTVg1X0NMS19UTUFYM10pOyAvKiBlc2RoYzEsIGVzZGhjNCAqLworCWNsa19wcm92aWRl cl9zZXRfcGFyZW50KGNsa1tJTVg1X0NMS19VU0JfUEhZX1NFTF0sIGNsa1tJTVg1X0NMS19PU0Nd KTsKKworCWNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtbSU1YNV9DTEtfR1BDX0RWRlNd KTsKKwljbGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUoY2xrW0lNWDVfQ0xLX0FIQl9NQVhdKTsg LyogZXNkaGMzICovCisJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsa1tJTVg1X0NMS19B SVBTX1RaMV0pOworCWNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtbSU1YNV9DTEtfQUlQ U19UWjJdKTsgLyogZmVjICovCisJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsa1tJTVg1 X0NMS19TUEJBXSk7CisJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsa1tJTVg1X0NMS19F TUlfRkFTVF9HQVRFXSk7IC8qIGZlYyAqLworCWNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShj bGtbSU1YNV9DTEtfRU1JX1NMT1dfR0FURV0pOyAvKiBlaW0gKi8KKwljbGtfcHJvdmlkZXJfcHJl cGFyZV9lbmFibGUoY2xrW0lNWDVfQ0xLX01JUElfSFNDMV9HQVRFXSk7CisJY2xrX3Byb3ZpZGVy X3ByZXBhcmVfZW5hYmxlKGNsa1tJTVg1X0NMS19NSVBJX0hTQzJfR0FURV0pOworCWNsa19wcm92 aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtbSU1YNV9DTEtfTUlQSV9FU0NfR0FURV0pOworCWNsa19w cm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtbSU1YNV9DTEtfTUlQSV9IU1BfR0FURV0pOworCWNs a19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtbSU1YNV9DTEtfVE1BWDFdKTsKKwljbGtfcHJv dmlkZXJfcHJlcGFyZV9lbmFibGUoY2xrW0lNWDVfQ0xLX1RNQVgyXSk7IC8qIGVzZGhjMiwgZmVj ICovCisJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsa1tJTVg1X0NMS19UTUFYM10pOyAv KiBlc2RoYzEsIGVzZGhjNCAqLwogfQogCiBzdGF0aWMgdm9pZCBfX2luaXQgbXg1MF9jbG9ja3Nf aW5pdChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wKQpAQCAtMzYxLDE1ICszNjIsMTUgQEAgc3RhdGlj IHZvaWQgX19pbml0IG14NTBfY2xvY2tzX2luaXQoc3RydWN0IGRldmljZV9ub2RlICpucCkKIAlv Zl9jbGtfYWRkX3Byb3ZpZGVyKG5wLCBvZl9jbGtfc3JjX29uZWNlbGxfZ2V0LCAmY2xrX2RhdGEp OwogCiAJLyogc2V0IFNESEMgcm9vdCBjbG9jayB0byAyMDBNSFoqLwotCWNsa19zZXRfcmF0ZShj bGtbSU1YNV9DTEtfRVNESENfQV9QT0RGXSwgMjAwMDAwMDAwKTsKLQljbGtfc2V0X3JhdGUoY2xr W0lNWDVfQ0xLX0VTREhDX0JfUE9ERl0sIDIwMDAwMDAwMCk7CisJY2xrX3Byb3ZpZGVyX3NldF9y YXRlKGNsa1tJTVg1X0NMS19FU0RIQ19BX1BPREZdLCAyMDAwMDAwMDApOworCWNsa19wcm92aWRl cl9zZXRfcmF0ZShjbGtbSU1YNV9DTEtfRVNESENfQl9QT0RGXSwgMjAwMDAwMDAwKTsKIAotCWNs a19wcmVwYXJlX2VuYWJsZShjbGtbSU1YNV9DTEtfSUlNX0dBVEVdKTsKKwljbGtfcHJvdmlkZXJf cHJlcGFyZV9lbmFibGUoY2xrW0lNWDVfQ0xLX0lJTV9HQVRFXSk7CiAJaW14X3ByaW50X3NpbGlj b25fcmV2KCJpLk1YNTAiLCBJTVhfQ0hJUF9SRVZJU0lPTl8xXzEpOwotCWNsa19kaXNhYmxlX3Vu cHJlcGFyZShjbGtbSU1YNV9DTEtfSUlNX0dBVEVdKTsKKwljbGtfcHJvdmlkZXJfZGlzYWJsZV91 bnByZXBhcmUoY2xrW0lNWDVfQ0xLX0lJTV9HQVRFXSk7CiAKLQlyID0gY2xrX3JvdW5kX3JhdGUo Y2xrW0lNWDVfQ0xLX1VTQk9IM19QRVJfR0FURV0sIDU0MDAwMDAwKTsKLQljbGtfc2V0X3JhdGUo Y2xrW0lNWDVfQ0xLX1VTQk9IM19QRVJfR0FURV0sIHIpOworCXIgPSBjbGtfcHJvdmlkZXJfcm91 bmRfcmF0ZShjbGtbSU1YNV9DTEtfVVNCT0gzX1BFUl9HQVRFXSwgNTQwMDAwMDApOworCWNsa19w cm92aWRlcl9zZXRfcmF0ZShjbGtbSU1YNV9DTEtfVVNCT0gzX1BFUl9HQVRFXSwgcik7CiB9CiBD TEtfT0ZfREVDTEFSRShpbXg1MF9jY20sICJmc2wsaW14NTAtY2NtIiwgbXg1MF9jbG9ja3NfaW5p dCk7CiAKQEAgLTQzNSwxNSArNDM2LDE2IEBAIHN0YXRpYyB2b2lkIF9faW5pdCBteDUxX2Nsb2Nr c19pbml0KHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnApCiAJb2ZfY2xrX2FkZF9wcm92aWRlcihucCwg b2ZfY2xrX3NyY19vbmVjZWxsX2dldCwgJmNsa19kYXRhKTsKIAogCS8qIHNldCB0aGUgdXNib2gz IHBhcmVudCB0byBwbGwyX3N3ICovCi0JY2xrX3NldF9wYXJlbnQoY2xrW0lNWDVfQ0xLX1VTQk9I M19TRUxdLCBjbGtbSU1YNV9DTEtfUExMMl9TV10pOworCWNsa19wcm92aWRlcl9zZXRfcGFyZW50 KGNsa1tJTVg1X0NMS19VU0JPSDNfU0VMXSwKKwkJCQljbGtbSU1YNV9DTEtfUExMMl9TV10pOwog CiAJLyogc2V0IFNESEMgcm9vdCBjbG9jayB0byAxNjYuMjVNSFoqLwotCWNsa19zZXRfcmF0ZShj bGtbSU1YNV9DTEtfRVNESENfQV9QT0RGXSwgMTY2MjUwMDAwKTsKLQljbGtfc2V0X3JhdGUoY2xr W0lNWDVfQ0xLX0VTREhDX0JfUE9ERl0sIDE2NjI1MDAwMCk7CisJY2xrX3Byb3ZpZGVyX3NldF9y YXRlKGNsa1tJTVg1X0NMS19FU0RIQ19BX1BPREZdLCAxNjYyNTAwMDApOworCWNsa19wcm92aWRl cl9zZXRfcmF0ZShjbGtbSU1YNV9DTEtfRVNESENfQl9QT0RGXSwgMTY2MjUwMDAwKTsKIAotCWNs a19wcmVwYXJlX2VuYWJsZShjbGtbSU1YNV9DTEtfSUlNX0dBVEVdKTsKKwljbGtfcHJvdmlkZXJf cHJlcGFyZV9lbmFibGUoY2xrW0lNWDVfQ0xLX0lJTV9HQVRFXSk7CiAJaW14X3ByaW50X3NpbGlj b25fcmV2KCJpLk1YNTEiLCBteDUxX3JldmlzaW9uKCkpOwotCWNsa19kaXNhYmxlX3VucHJlcGFy ZShjbGtbSU1YNV9DTEtfSUlNX0dBVEVdKTsKKwljbGtfcHJvdmlkZXJfZGlzYWJsZV91bnByZXBh cmUoY2xrW0lNWDVfQ0xLX0lJTV9HQVRFXSk7CiAKIAkvKgogCSAqIFJlZmVyZW5jZSBNYW51YWwg c2F5czogRnVuY3Rpb25hbGl0eSBvZiBDQ0RSWzE4XSBhbmQgQ0xQQ1JbMjNdIGlzIG5vCkBAIC01 NDUsMTcgKzU0NywxNyBAQCBzdGF0aWMgdm9pZCBfX2luaXQgbXg1M19jbG9ja3NfaW5pdChzdHJ1 Y3QgZGV2aWNlX25vZGUgKm5wKQogCW9mX2Nsa19hZGRfcHJvdmlkZXIobnAsIG9mX2Nsa19zcmNf b25lY2VsbF9nZXQsICZjbGtfZGF0YSk7CiAKIAkvKiBzZXQgU0RIQyByb290IGNsb2NrIHRvIDIw ME1IWiovCi0JY2xrX3NldF9yYXRlKGNsa1tJTVg1X0NMS19FU0RIQ19BX1BPREZdLCAyMDAwMDAw MDApOwotCWNsa19zZXRfcmF0ZShjbGtbSU1YNV9DTEtfRVNESENfQl9QT0RGXSwgMjAwMDAwMDAw KTsKKwljbGtfcHJvdmlkZXJfc2V0X3JhdGUoY2xrW0lNWDVfQ0xLX0VTREhDX0FfUE9ERl0sIDIw MDAwMDAwMCk7CisJY2xrX3Byb3ZpZGVyX3NldF9yYXRlKGNsa1tJTVg1X0NMS19FU0RIQ19CX1BP REZdLCAyMDAwMDAwMDApOwogCiAJLyogbW92ZSBjYW4gYnVzIGNsayB0byAyNE1IeiAqLwotCWNs a19zZXRfcGFyZW50KGNsa1tJTVg1X0NMS19DQU5fU0VMXSwgY2xrW0lNWDVfQ0xLX0xQX0FQTV0p OworCWNsa19wcm92aWRlcl9zZXRfcGFyZW50KGNsa1tJTVg1X0NMS19DQU5fU0VMXSwgY2xrW0lN WDVfQ0xLX0xQX0FQTV0pOwogCi0JY2xrX3ByZXBhcmVfZW5hYmxlKGNsa1tJTVg1X0NMS19JSU1f R0FURV0pOworCWNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtbSU1YNV9DTEtfSUlNX0dB VEVdKTsKIAlpbXhfcHJpbnRfc2lsaWNvbl9yZXYoImkuTVg1MyIsIG14NTNfcmV2aXNpb24oKSk7 Ci0JY2xrX2Rpc2FibGVfdW5wcmVwYXJlKGNsa1tJTVg1X0NMS19JSU1fR0FURV0pOworCWNsa19w cm92aWRlcl9kaXNhYmxlX3VucHJlcGFyZShjbGtbSU1YNV9DTEtfSUlNX0dBVEVdKTsKIAotCXIg PSBjbGtfcm91bmRfcmF0ZShjbGtbSU1YNV9DTEtfVVNCT0gzX1BFUl9HQVRFXSwgNTQwMDAwMDAp OwotCWNsa19zZXRfcmF0ZShjbGtbSU1YNV9DTEtfVVNCT0gzX1BFUl9HQVRFXSwgcik7CisJciA9 IGNsa19wcm92aWRlcl9yb3VuZF9yYXRlKGNsa1tJTVg1X0NMS19VU0JPSDNfUEVSX0dBVEVdLCA1 NDAwMDAwMCk7CisJY2xrX3Byb3ZpZGVyX3NldF9yYXRlKGNsa1tJTVg1X0NMS19VU0JPSDNfUEVS X0dBVEVdLCByKTsKIH0KIENMS19PRl9ERUNMQVJFKGlteDUzX2NjbSwgImZzbCxpbXg1My1jY20i LCBteDUzX2Nsb2Nrc19pbml0KTsKZGlmZiAtLWdpdCBhL2FyY2gvYXJtL21hY2gtaW14L2Nsay1p bXg2cS5jIGIvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLWlteDZxLmMKaW5kZXggMjlkNDEyOS4uMWE4 MTZhMiAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLWlteDZxLmMKKysrIGIvYXJj aC9hcm0vbWFjaC1pbXgvY2xrLWlteDZxLmMKQEAgLTEyLDcgKzEyLDYgQEAKIAogI2luY2x1ZGUg PGxpbnV4L2luaXQuaD4KICNpbmNsdWRlIDxsaW51eC90eXBlcy5oPgotI2luY2x1ZGUgPGxpbnV4 L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsa2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L2Vyci5o PgogI2luY2x1ZGUgPGxpbnV4L2lvLmg+CkBAIC03NCw3ICs3Myw3IEBAIHN0YXRpYyBjb25zdCBj aGFyICpsdmRzX3NlbHNbXSA9IHsKIAkicGNpZV9yZWZfMTI1bSIsICJzYXRhX3JlZl8xMDBtIiwK IH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICpjbGtbSU1YNlFETF9DTEtfRU5EXTsKK3N0YXRpYyBz dHJ1Y3QgY2xrX2NvcmUgKmNsa1tJTVg2UURMX0NMS19FTkRdOwogc3RhdGljIHN0cnVjdCBjbGtf b25lY2VsbF9kYXRhIGNsa19kYXRhOwogCiBzdGF0aWMgdW5zaWduZWQgaW50IGNvbnN0IGNsa3Nf aW5pdF9vbltdIF9faW5pdGNvbnN0ID0gewpAQCAtNDE0LDUwICs0MTMsNjUgQEAgc3RhdGljIHZv aWQgX19pbml0IGlteDZxX2Nsb2Nrc19pbml0KHN0cnVjdCBkZXZpY2Vfbm9kZSAqY2NtX25vZGUp CiAKIAlpZiAoKGlteF9nZXRfc29jX3JldmlzaW9uKCkgIT0gSU1YX0NISVBfUkVWSVNJT05fMV8w KSB8fAogCSAgICBjcHVfaXNfaW14NmRsKCkpIHsKLQkJY2xrX3NldF9wYXJlbnQoY2xrW0lNWDZR RExfQ0xLX0xEQl9ESTBfU0VMXSwgY2xrW0lNWDZRRExfQ0xLX1BMTDVfVklERU9fRElWXSk7Ci0J CWNsa19zZXRfcGFyZW50KGNsa1tJTVg2UURMX0NMS19MREJfREkxX1NFTF0sIGNsa1tJTVg2UURM X0NMS19QTEw1X1ZJREVPX0RJVl0pOworCQljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChjbGtbSU1Y NlFETF9DTEtfTERCX0RJMF9TRUxdLAorCQkJCQljbGtbSU1YNlFETF9DTEtfUExMNV9WSURFT19E SVZdKTsKKwkJY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQoY2xrW0lNWDZRRExfQ0xLX0xEQl9ESTFf U0VMXSwKKwkJCQkJY2xrW0lNWDZRRExfQ0xLX1BMTDVfVklERU9fRElWXSk7CiAJfQogCi0JY2xr X3NldF9wYXJlbnQoY2xrW0lNWDZRRExfQ0xLX0lQVTFfREkwX1BSRV9TRUxdLCBjbGtbSU1YNlFE TF9DTEtfUExMNV9WSURFT19ESVZdKTsKLQljbGtfc2V0X3BhcmVudChjbGtbSU1YNlFETF9DTEtf SVBVMV9ESTFfUFJFX1NFTF0sIGNsa1tJTVg2UURMX0NMS19QTEw1X1ZJREVPX0RJVl0pOwotCWNs a19zZXRfcGFyZW50KGNsa1tJTVg2UURMX0NMS19JUFUyX0RJMF9QUkVfU0VMXSwgY2xrW0lNWDZR RExfQ0xLX1BMTDVfVklERU9fRElWXSk7Ci0JY2xrX3NldF9wYXJlbnQoY2xrW0lNWDZRRExfQ0xL X0lQVTJfREkxX1BSRV9TRUxdLCBjbGtbSU1YNlFETF9DTEtfUExMNV9WSURFT19ESVZdKTsKLQlj bGtfc2V0X3BhcmVudChjbGtbSU1YNlFETF9DTEtfSVBVMV9ESTBfU0VMXSwgY2xrW0lNWDZRRExf Q0xLX0lQVTFfREkwX1BSRV0pOwotCWNsa19zZXRfcGFyZW50KGNsa1tJTVg2UURMX0NMS19JUFUx X0RJMV9TRUxdLCBjbGtbSU1YNlFETF9DTEtfSVBVMV9ESTFfUFJFXSk7Ci0JY2xrX3NldF9wYXJl bnQoY2xrW0lNWDZRRExfQ0xLX0lQVTJfREkwX1NFTF0sIGNsa1tJTVg2UURMX0NMS19JUFUyX0RJ MF9QUkVdKTsKLQljbGtfc2V0X3BhcmVudChjbGtbSU1YNlFETF9DTEtfSVBVMl9ESTFfU0VMXSwg Y2xrW0lNWDZRRExfQ0xLX0lQVTJfREkxX1BSRV0pOworCWNsa19wcm92aWRlcl9zZXRfcGFyZW50 KGNsa1tJTVg2UURMX0NMS19JUFUxX0RJMF9QUkVfU0VMXSwKKwkJCQljbGtbSU1YNlFETF9DTEtf UExMNV9WSURFT19ESVZdKTsKKwljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChjbGtbSU1YNlFETF9D TEtfSVBVMV9ESTFfUFJFX1NFTF0sCisJCQkJY2xrW0lNWDZRRExfQ0xLX1BMTDVfVklERU9fRElW XSk7CisJY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQoY2xrW0lNWDZRRExfQ0xLX0lQVTJfREkwX1BS RV9TRUxdLAorCQkJCWNsa1tJTVg2UURMX0NMS19QTEw1X1ZJREVPX0RJVl0pOworCWNsa19wcm92 aWRlcl9zZXRfcGFyZW50KGNsa1tJTVg2UURMX0NMS19JUFUyX0RJMV9QUkVfU0VMXSwKKwkJCQlj bGtbSU1YNlFETF9DTEtfUExMNV9WSURFT19ESVZdKTsKKwljbGtfcHJvdmlkZXJfc2V0X3BhcmVu dChjbGtbSU1YNlFETF9DTEtfSVBVMV9ESTBfU0VMXSwKKwkJCQljbGtbSU1YNlFETF9DTEtfSVBV MV9ESTBfUFJFXSk7CisJY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQoY2xrW0lNWDZRRExfQ0xLX0lQ VTFfREkxX1NFTF0sCisJCQkJY2xrW0lNWDZRRExfQ0xLX0lQVTFfREkxX1BSRV0pOworCWNsa19w cm92aWRlcl9zZXRfcGFyZW50KGNsa1tJTVg2UURMX0NMS19JUFUyX0RJMF9TRUxdLAorCQkJCWNs a1tJTVg2UURMX0NMS19JUFUyX0RJMF9QUkVdKTsKKwljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChj bGtbSU1YNlFETF9DTEtfSVBVMl9ESTFfU0VMXSwKKwkJCQljbGtbSU1YNlFETF9DTEtfSVBVMl9E STFfUFJFXSk7CiAKIAkvKgogCSAqIFRoZSBncG1pIG5lZWRzIDEwME1IeiBmcmVxdWVuY3kgaW4g dGhlIEVETy9TeW5jIG1vZGUsCiAJICogV2UgY2FuIG5vdCBnZXQgdGhlIDEwME1IeiBmcm9tIHRo ZSBwbGwyX3BmZDBfMzUybS4KIAkgKiBTbyBjaG9vc2UgcGxsMl9wZmQyXzM5Nm0gYXMgZW5mY19z ZWwncyBwYXJlbnQuCiAJICovCi0JY2xrX3NldF9wYXJlbnQoY2xrW0lNWDZRRExfQ0xLX0VORkNf U0VMXSwgY2xrW0lNWDZRRExfQ0xLX1BMTDJfUEZEMl8zOTZNXSk7CisJY2xrX3Byb3ZpZGVyX3Nl dF9wYXJlbnQoY2xrW0lNWDZRRExfQ0xLX0VORkNfU0VMXSwKKwkJCQljbGtbSU1YNlFETF9DTEtf UExMMl9QRkQyXzM5Nk1dKTsKIAogCWZvciAoaSA9IDA7IGkgPCBBUlJBWV9TSVpFKGNsa3NfaW5p dF9vbik7IGkrKykKLQkJY2xrX3ByZXBhcmVfZW5hYmxlKGNsa1tjbGtzX2luaXRfb25baV1dKTsK KwkJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsa1tjbGtzX2luaXRfb25baV1dKTsKIAog CWlmIChJU19FTkFCTEVEKENPTkZJR19VU0JfTVhTX1BIWSkpIHsKLQkJY2xrX3ByZXBhcmVfZW5h YmxlKGNsa1tJTVg2UURMX0NMS19VU0JQSFkxX0dBVEVdKTsKLQkJY2xrX3ByZXBhcmVfZW5hYmxl KGNsa1tJTVg2UURMX0NMS19VU0JQSFkyX0dBVEVdKTsKKwkJY2xrX3Byb3ZpZGVyX3ByZXBhcmVf ZW5hYmxlKGNsa1tJTVg2UURMX0NMS19VU0JQSFkxX0dBVEVdKTsKKwkJY2xrX3Byb3ZpZGVyX3By ZXBhcmVfZW5hYmxlKGNsa1tJTVg2UURMX0NMS19VU0JQSFkyX0dBVEVdKTsKIAl9CiAKIAkvKgog CSAqIExldCdzIGluaXRpYWxseSBzZXQgdXAgQ0xLTyB3aXRoIE9TQzI0TSwgc2luY2UgdGhpcyBj b25maWd1cmF0aW9uCiAJICogaXMgd2lkZWx5IHVzZWQgYnkgaW14NnEgYm9hcmQgZGVzaWducyB0 byBjbG9jayBhdWRpbyBjb2RlYy4KIAkgKi8KLQlyZXQgPSBjbGtfc2V0X3BhcmVudChjbGtbSU1Y NlFETF9DTEtfQ0tPMl9TRUxdLCBjbGtbSU1YNlFETF9DTEtfT1NDXSk7CisJcmV0ID0gY2xrX3By b3ZpZGVyX3NldF9wYXJlbnQoY2xrW0lNWDZRRExfQ0xLX0NLTzJfU0VMXSwKKwkJCQkgICAgICBj bGtbSU1YNlFETF9DTEtfT1NDXSk7CiAJaWYgKCFyZXQpCi0JCXJldCA9IGNsa19zZXRfcGFyZW50 KGNsa1tJTVg2UURMX0NMS19DS09dLCBjbGtbSU1YNlFETF9DTEtfQ0tPMl0pOworCQlyZXQgPSBj bGtfcHJvdmlkZXJfc2V0X3BhcmVudChjbGtbSU1YNlFETF9DTEtfQ0tPXSwKKwkJCQkJICAgICAg Y2xrW0lNWDZRRExfQ0xLX0NLTzJdKTsKIAlpZiAocmV0KQogCQlwcl93YXJuKCJmYWlsZWQgdG8g c2V0IHVwIENMS086ICVkXG4iLCByZXQpOwogCiAJLyogQXVkaW8tcmVsYXRlZCBjbG9ja3MgY29u ZmlndXJhdGlvbiAqLwotCWNsa19zZXRfcGFyZW50KGNsa1tJTVg2UURMX0NMS19TUERJRl9TRUxd LCBjbGtbSU1YNlFETF9DTEtfUExMM19QRkQzXzQ1NE1dKTsKKwljbGtfcHJvdmlkZXJfc2V0X3Bh cmVudChjbGtbSU1YNlFETF9DTEtfU1BESUZfU0VMXSwKKwkJCQljbGtbSU1YNlFETF9DTEtfUExM M19QRkQzXzQ1NE1dKTsKIAogCS8qIEFsbCBleGlzdGluZyBib2FyZHMgd2l0aCBQQ0llIHVzZSBM VkRTMSAqLwogCWlmIChJU19FTkFCTEVEKENPTkZJR19QQ0lfSU1YNikpCi0JCWNsa19zZXRfcGFy ZW50KGNsa1tJTVg2UURMX0NMS19MVkRTMV9TRUxdLCBjbGtbSU1YNlFETF9DTEtfU0FUQV9SRUZf MTAwTV0pOworCQljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChjbGtbSU1YNlFETF9DTEtfTFZEUzFf U0VMXSwKKwkJCQkJY2xrW0lNWDZRRExfQ0xLX1NBVEFfUkVGXzEwME1dKTsKIAogCS8qIFNldCBp bml0aWFsIHBvd2VyIG1vZGUgKi8KIAlpbXg2cV9zZXRfbHBtKFdBSVRfQ0xPQ0tFRCk7CmRpZmYg LS1naXQgYS9hcmNoL2FybS9tYWNoLWlteC9jbGstaW14NnNsLmMgYi9hcmNoL2FybS9tYWNoLWlt eC9jbGstaW14NnNsLmMKaW5kZXggZmVmNDZmYS4uOWYxMjI0ZCAxMDA2NDQKLS0tIGEvYXJjaC9h cm0vbWFjaC1pbXgvY2xrLWlteDZzbC5jCisrKyBiL2FyY2gvYXJtL21hY2gtaW14L2Nsay1pbXg2 c2wuYwpAQCAtNyw3ICs3LDYgQEAKICAqCiAgKi8KIAotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgog I2luY2x1ZGUgPGxpbnV4L2Nsa2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L2Vyci5oPgogI2luY2x1 ZGUgPGxpbnV4L29mLmg+CkBAIC03OSw3ICs3OCw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2Rpdl90 YWJsZSB2aWRlb19kaXZfdGFibGVbXSA9IHsKIAl7IH0KIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xr ICpjbGtzW0lNWDZTTF9DTEtfRU5EXTsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKmNsa3NbSU1Y NlNMX0NMS19FTkRdOwogc3RhdGljIHN0cnVjdCBjbGtfb25lY2VsbF9kYXRhIGNsa19kYXRhOwog c3RhdGljIHZvaWQgX19pb21lbSAqY2NtX2Jhc2U7CiBzdGF0aWMgdm9pZCBfX2lvbWVtICphbmF0 b3BfYmFzZTsKQEAgLTM1NSw3ICszNTQsNyBAQCBzdGF0aWMgdm9pZCBfX2luaXQgaW14NnNsX2Ns b2Nrc19pbml0KHN0cnVjdCBkZXZpY2Vfbm9kZSAqY2NtX25vZGUpCiAJb2ZfY2xrX2FkZF9wcm92 aWRlcihucCwgb2ZfY2xrX3NyY19vbmVjZWxsX2dldCwgJmNsa19kYXRhKTsKIAogCS8qIEVuc3Vy ZSB0aGUgQUhCIGNsayBpcyBhdCAxMzJNSHouICovCi0JcmV0ID0gY2xrX3NldF9yYXRlKGNsa3Nb SU1YNlNMX0NMS19BSEJdLCAxMzIwMDAwMDApOworCXJldCA9IGNsa19wcm92aWRlcl9zZXRfcmF0 ZShjbGtzW0lNWDZTTF9DTEtfQUhCXSwgMTMyMDAwMDAwKTsKIAlpZiAocmV0KQogCQlwcl93YXJu KCIlczogZmFpbGVkIHRvIHNldCBBSEIgY2xvY2sgcmF0ZSAlZCFcbiIsCiAJCQlfX2Z1bmNfXywg cmV0KTsKQEAgLTM2NSwxNSArMzY0LDE2IEBAIHN0YXRpYyB2b2lkIF9faW5pdCBpbXg2c2xfY2xv Y2tzX2luaXQoc3RydWN0IGRldmljZV9ub2RlICpjY21fbm9kZSkKIAkgKiB1c2Vjb3VudCBhbmQg ZW5hYmxpbmcvZGlzYWJsaW5nIG9mIHBhcmVudCBQTExzLgogCSAqLwogCWZvciAoaSA9IDA7IGkg PCBBUlJBWV9TSVpFKGNsa3NfaW5pdF9vbik7IGkrKykKLQkJY2xrX3ByZXBhcmVfZW5hYmxlKGNs a3NbY2xrc19pbml0X29uW2ldXSk7CisJCWNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtz W2Nsa3NfaW5pdF9vbltpXV0pOwogCiAJaWYgKElTX0VOQUJMRUQoQ09ORklHX1VTQl9NWFNfUEhZ KSkgewotCQljbGtfcHJlcGFyZV9lbmFibGUoY2xrc1tJTVg2U0xfQ0xLX1VTQlBIWTFfR0FURV0p OwotCQljbGtfcHJlcGFyZV9lbmFibGUoY2xrc1tJTVg2U0xfQ0xLX1VTQlBIWTJfR0FURV0pOwor CQljbGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUoY2xrc1tJTVg2U0xfQ0xLX1VTQlBIWTFfR0FU RV0pOworCQljbGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUoY2xrc1tJTVg2U0xfQ0xLX1VTQlBI WTJfR0FURV0pOwogCX0KIAogCS8qIEF1ZGlvLXJlbGF0ZWQgY2xvY2tzIGNvbmZpZ3VyYXRpb24g Ki8KLQljbGtfc2V0X3BhcmVudChjbGtzW0lNWDZTTF9DTEtfU1BESUYwX1NFTF0sIGNsa3NbSU1Y NlNMX0NMS19QTEwzX1BGRDNdKTsKKwljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChjbGtzW0lNWDZT TF9DTEtfU1BESUYwX1NFTF0sCisJCQkJY2xrc1tJTVg2U0xfQ0xLX1BMTDNfUEZEM10pOwogCiAJ LyogU2V0IGluaXRpYWwgcG93ZXIgbW9kZSAqLwogCWlteDZxX3NldF9scG0oV0FJVF9DTE9DS0VE KTsKZGlmZiAtLWdpdCBhL2FyY2gvYXJtL21hY2gtaW14L2Nsay1pbXg2c3guYyBiL2FyY2gvYXJt L21hY2gtaW14L2Nsay1pbXg2c3guYwppbmRleCBlY2RlNzJiLi4xZjJiYzRiIDEwMDY0NAotLS0g YS9hcmNoL2FybS9tYWNoLWlteC9jbGstaW14NnN4LmMKKysrIGIvYXJjaC9hcm0vbWFjaC1pbXgv Y2xrLWlteDZzeC5jCkBAIC0xMCw3ICsxMCw2IEBACiAgKi8KIAogI2luY2x1ZGUgPGR0LWJpbmRp bmdzL2Nsb2NrL2lteDZzeC1jbG9jay5oPgotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1 ZGUgPGxpbnV4L2Nsa2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L2Vyci5oPgogI2luY2x1ZGUgPGxp bnV4L2luaXQuaD4KQEAgLTgyLDcgKzgxLDcgQEAgc3RhdGljIGNvbnN0IGNoYXIgKmx2ZHNfc2Vs c1tdCT0gewogCSJkdW1teSIsICJkdW1teSIsICJwY2llX3JlZl8xMjVtIiwgImR1bW15IiwgInVz YnBoeTEiLCAidXNicGh5MiIsCiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayAqY2xrc1tJTVg2U1hf Q0xLX0NMS19FTkRdOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqY2xrc1tJTVg2U1hfQ0xLX0NM S19FTkRdOwogc3RhdGljIHN0cnVjdCBjbGtfb25lY2VsbF9kYXRhIGNsa19kYXRhOwogCiBzdGF0 aWMgaW50IGNvbnN0IGNsa3NfaW5pdF9vbltdIF9faW5pdGNvbnN0ID0gewpAQCAtMTM2LDEyICsx MzUsMTQgQEAgc3RhdGljIHZvaWQgX19pbml0IGlteDZzeF9jbG9ja3NfaW5pdChzdHJ1Y3QgZGV2 aWNlX25vZGUgKmNjbV9ub2RlKQogCiAJY2xrc1tJTVg2U1hfQ0xLX0RVTU1ZXSA9IGlteF9jbGtf Zml4ZWQoImR1bW15IiwgMCk7CiAKLQljbGtzW0lNWDZTWF9DTEtfQ0tJTF0gPSBvZl9jbGtfZ2V0 X2J5X25hbWUoY2NtX25vZGUsICJja2lsIik7Ci0JY2xrc1tJTVg2U1hfQ0xLX09TQ10gPSBvZl9j bGtfZ2V0X2J5X25hbWUoY2NtX25vZGUsICJvc2MiKTsKKwljbGtzW0lNWDZTWF9DTEtfQ0tJTF0g PSBvZl9jbGtfcHJvdmlkZXJfZ2V0X2J5X25hbWUoY2NtX25vZGUsICJja2lsIik7CisJY2xrc1tJ TVg2U1hfQ0xLX09TQ10gPSBvZl9jbGtfcHJvdmlkZXJfZ2V0X2J5X25hbWUoY2NtX25vZGUsICJv c2MiKTsKIAogCS8qIGlwcF9kaSBjbG9jayBpcyBleHRlcm5hbCBpbnB1dCAqLwotCWNsa3NbSU1Y NlNYX0NMS19JUFBfREkwXSA9IG9mX2Nsa19nZXRfYnlfbmFtZShjY21fbm9kZSwgImlwcF9kaTAi KTsKLQljbGtzW0lNWDZTWF9DTEtfSVBQX0RJMV0gPSBvZl9jbGtfZ2V0X2J5X25hbWUoY2NtX25v ZGUsICJpcHBfZGkxIik7CisJY2xrc1tJTVg2U1hfQ0xLX0lQUF9ESTBdID0gb2ZfY2xrX3Byb3Zp ZGVyX2dldF9ieV9uYW1lKGNjbV9ub2RlLAorCQkJCQkJCSAgICAgICAiaXBwX2RpMCIpOworCWNs a3NbSU1YNlNYX0NMS19JUFBfREkxXSA9IG9mX2Nsa19wcm92aWRlcl9nZXRfYnlfbmFtZShjY21f bm9kZSwKKwkJCQkJCQkgICAgICAgImlwcF9kaTEiKTsKIAogCW5wID0gb2ZfZmluZF9jb21wYXRp YmxlX25vZGUoTlVMTCwgTlVMTCwgImZzbCxpbXg2c3gtYW5hdG9wIik7CiAJYmFzZSA9IG9mX2lv bWFwKG5wLCAwKTsKQEAgLTQ1Myw2NSArNDU0LDgwIEBAIHN0YXRpYyB2b2lkIF9faW5pdCBpbXg2 c3hfY2xvY2tzX2luaXQoc3RydWN0IGRldmljZV9ub2RlICpjY21fbm9kZSkKIAlvZl9jbGtfYWRk X3Byb3ZpZGVyKG5wLCBvZl9jbGtfc3JjX29uZWNlbGxfZ2V0LCAmY2xrX2RhdGEpOwogCiAJZm9y IChpID0gMDsgaSA8IEFSUkFZX1NJWkUoY2xrc19pbml0X29uKTsgaSsrKQotCQljbGtfcHJlcGFy ZV9lbmFibGUoY2xrc1tjbGtzX2luaXRfb25baV1dKTsKKwkJY2xrX3Byb3ZpZGVyX3ByZXBhcmVf ZW5hYmxlKGNsa3NbY2xrc19pbml0X29uW2ldXSk7CiAKIAlpZiAoSVNfRU5BQkxFRChDT05GSUdf VVNCX01YU19QSFkpKSB7Ci0JCWNsa19wcmVwYXJlX2VuYWJsZShjbGtzW0lNWDZTWF9DTEtfVVNC UEhZMV9HQVRFXSk7Ci0JCWNsa19wcmVwYXJlX2VuYWJsZShjbGtzW0lNWDZTWF9DTEtfVVNCUEhZ Ml9HQVRFXSk7CisJCWNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtzW0lNWDZTWF9DTEtf VVNCUEhZMV9HQVRFXSk7CisJCWNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtzW0lNWDZT WF9DTEtfVVNCUEhZMl9HQVRFXSk7CiAJfQogCiAJLyogU2V0IHRoZSBkZWZhdWx0IDEzMk1IeiBm b3IgRUlNIG1vZHVsZSAqLwotCWNsa19zZXRfcGFyZW50KGNsa3NbSU1YNlNYX0NMS19FSU1fU0xP V19TRUxdLCBjbGtzW0lNWDZTWF9DTEtfUExMMl9QRkQyXSk7Ci0JY2xrX3NldF9yYXRlKGNsa3Nb SU1YNlNYX0NMS19FSU1fU0xPV10sIDEzMjAwMDAwMCk7CisJY2xrX3Byb3ZpZGVyX3NldF9wYXJl bnQoY2xrc1tJTVg2U1hfQ0xLX0VJTV9TTE9XX1NFTF0sCisJCQkJY2xrc1tJTVg2U1hfQ0xLX1BM TDJfUEZEMl0pOworCWNsa19wcm92aWRlcl9zZXRfcmF0ZShjbGtzW0lNWDZTWF9DTEtfRUlNX1NM T1ddLCAxMzIwMDAwMDApOwogCiAJLyogc2V0IHBhcmVudCBjbG9jayBmb3IgTENESUYxIHBpeGVs IGNsb2NrICovCi0JY2xrX3NldF9wYXJlbnQoY2xrc1tJTVg2U1hfQ0xLX0xDRElGMV9QUkVfU0VM XSwgY2xrc1tJTVg2U1hfQ0xLX1BMTDVfVklERU9fRElWXSk7Ci0JY2xrX3NldF9wYXJlbnQoY2xr c1tJTVg2U1hfQ0xLX0xDRElGMV9TRUxdLCBjbGtzW0lNWDZTWF9DTEtfTENESUYxX1BPREZdKTsK KwljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChjbGtzW0lNWDZTWF9DTEtfTENESUYxX1BSRV9TRUxd LAorCQkJCWNsa3NbSU1YNlNYX0NMS19QTEw1X1ZJREVPX0RJVl0pOworCWNsa19wcm92aWRlcl9z ZXRfcGFyZW50KGNsa3NbSU1YNlNYX0NMS19MQ0RJRjFfU0VMXSwKKwkJCQljbGtzW0lNWDZTWF9D TEtfTENESUYxX1BPREZdKTsKIAogCS8qIFNldCB0aGUgcGFyZW50IGNsa3Mgb2YgUENJZSBsdmRz MSBhbmQgcGNpZV9heGkgdG8gYmUgcGNpZSByZWYsIGF4aSAqLwotCWlmIChjbGtfc2V0X3BhcmVu dChjbGtzW0lNWDZTWF9DTEtfTFZEUzFfU0VMXSwgY2xrc1tJTVg2U1hfQ0xLX1BDSUVfUkVGXzEy NU1dKSkKKwlpZiAoY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQoY2xrc1tJTVg2U1hfQ0xLX0xWRFMx X1NFTF0sIGNsa3NbSU1YNlNYX0NMS19QQ0lFX1JFRl8xMjVNXSkpCiAJCXByX2VycigiRmFpbGVk IHRvIHNldCBwY2llIGJ1cyBwYXJlbnQgY2xrLlxuIik7Ci0JaWYgKGNsa19zZXRfcGFyZW50KGNs a3NbSU1YNlNYX0NMS19QQ0lFX0FYSV9TRUxdLCBjbGtzW0lNWDZTWF9DTEtfQVhJXSkpCisJaWYg KGNsa19wcm92aWRlcl9zZXRfcGFyZW50KGNsa3NbSU1YNlNYX0NMS19QQ0lFX0FYSV9TRUxdLCBj bGtzW0lNWDZTWF9DTEtfQVhJXSkpCiAJCXByX2VycigiRmFpbGVkIHRvIHNldCBwY2llIHBhcmVu dCBjbGsuXG4iKTsKIAogCS8qCiAJICogSW5pdCBlbmV0IHN5c3RlbSBBSEIgY2xvY2ssIHNldCB0 byAyMDBNaHoKIAkgKiBwbGwyX3BmZDJfMzk2bS0+IEVORVRfUE9ERi0+IEVORVRfQUhCCiAJICov Ci0JY2xrX3NldF9wYXJlbnQoY2xrc1tJTVg2U1hfQ0xLX0VORVRfUFJFX1NFTF0sIGNsa3NbSU1Y NlNYX0NMS19QTEwyX1BGRDJdKTsKLQljbGtfc2V0X3BhcmVudChjbGtzW0lNWDZTWF9DTEtfRU5F VF9TRUxdLCBjbGtzW0lNWDZTWF9DTEtfRU5FVF9QT0RGXSk7Ci0JY2xrX3NldF9yYXRlKGNsa3Nb SU1YNlNYX0NMS19FTkVUX1BPREZdLCAyMDAwMDAwMDApOwotCWNsa19zZXRfcmF0ZShjbGtzW0lN WDZTWF9DTEtfRU5FVF9SRUZdLCAxMjUwMDAwMDApOwotCWNsa19zZXRfcmF0ZShjbGtzW0lNWDZT WF9DTEtfRU5FVDJfUkVGXSwgMTI1MDAwMDAwKTsKKwljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChj bGtzW0lNWDZTWF9DTEtfRU5FVF9QUkVfU0VMXSwKKwkJCQljbGtzW0lNWDZTWF9DTEtfUExMMl9Q RkQyXSk7CisJY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQoY2xrc1tJTVg2U1hfQ0xLX0VORVRfU0VM XSwKKwkJCQljbGtzW0lNWDZTWF9DTEtfRU5FVF9QT0RGXSk7CisJY2xrX3Byb3ZpZGVyX3NldF9y YXRlKGNsa3NbSU1YNlNYX0NMS19FTkVUX1BPREZdLCAyMDAwMDAwMDApOworCWNsa19wcm92aWRl cl9zZXRfcmF0ZShjbGtzW0lNWDZTWF9DTEtfRU5FVF9SRUZdLCAxMjUwMDAwMDApOworCWNsa19w cm92aWRlcl9zZXRfcmF0ZShjbGtzW0lNWDZTWF9DTEtfRU5FVDJfUkVGXSwgMTI1MDAwMDAwKTsK IAogCS8qIEF1ZGlvIGNsb2NrcyAqLwotCWNsa19zZXRfcmF0ZShjbGtzW0lNWDZTWF9DTEtfUExM NF9BVURJT19ESVZdLCAzOTMyMTYwMDApOwotCi0JY2xrX3NldF9wYXJlbnQoY2xrc1tJTVg2U1hf Q0xLX1NQRElGX1NFTF0sIGNsa3NbSU1YNlNYX0NMS19QTEw0X0FVRElPX0RJVl0pOwotCWNsa19z ZXRfcmF0ZShjbGtzW0lNWDZTWF9DTEtfU1BESUZfUE9ERl0sIDk4MzA0MDAwKTsKLQotCWNsa19z ZXRfcGFyZW50KGNsa3NbSU1YNlNYX0NMS19BVURJT19TRUxdLCBjbGtzW0lNWDZTWF9DTEtfUExM M19VU0JfT1RHXSk7Ci0JY2xrX3NldF9yYXRlKGNsa3NbSU1YNlNYX0NMS19BVURJT19QT0RGXSwg MjQwMDAwMDApOwotCi0JY2xrX3NldF9wYXJlbnQoY2xrc1tJTVg2U1hfQ0xLX1NTSTFfU0VMXSwg Y2xrc1tJTVg2U1hfQ0xLX1BMTDRfQVVESU9fRElWXSk7Ci0JY2xrX3NldF9wYXJlbnQoY2xrc1tJ TVg2U1hfQ0xLX1NTSTJfU0VMXSwgY2xrc1tJTVg2U1hfQ0xLX1BMTDRfQVVESU9fRElWXSk7Ci0J Y2xrX3NldF9wYXJlbnQoY2xrc1tJTVg2U1hfQ0xLX1NTSTNfU0VMXSwgY2xrc1tJTVg2U1hfQ0xL X1BMTDRfQVVESU9fRElWXSk7Ci0JY2xrX3NldF9yYXRlKGNsa3NbSU1YNlNYX0NMS19TU0kxX1BP REZdLCAyNDU3NjAwMCk7Ci0JY2xrX3NldF9yYXRlKGNsa3NbSU1YNlNYX0NMS19TU0kyX1BPREZd LCAyNDU3NjAwMCk7Ci0JY2xrX3NldF9yYXRlKGNsa3NbSU1YNlNYX0NMS19TU0kzX1BPREZdLCAy NDU3NjAwMCk7Ci0KLQljbGtfc2V0X3BhcmVudChjbGtzW0lNWDZTWF9DTEtfRVNBSV9TRUxdLCBj bGtzW0lNWDZTWF9DTEtfUExMNF9BVURJT19ESVZdKTsKLQljbGtfc2V0X3JhdGUoY2xrc1tJTVg2 U1hfQ0xLX0VTQUlfUE9ERl0sIDI0NTc2MDAwKTsKKwljbGtfcHJvdmlkZXJfc2V0X3JhdGUoY2xr c1tJTVg2U1hfQ0xLX1BMTDRfQVVESU9fRElWXSwgMzkzMjE2MDAwKTsKKworCWNsa19wcm92aWRl cl9zZXRfcGFyZW50KGNsa3NbSU1YNlNYX0NMS19TUERJRl9TRUxdLAorCQkJCWNsa3NbSU1YNlNY X0NMS19QTEw0X0FVRElPX0RJVl0pOworCWNsa19wcm92aWRlcl9zZXRfcmF0ZShjbGtzW0lNWDZT WF9DTEtfU1BESUZfUE9ERl0sIDk4MzA0MDAwKTsKKworCWNsa19wcm92aWRlcl9zZXRfcGFyZW50 KGNsa3NbSU1YNlNYX0NMS19BVURJT19TRUxdLAorCQkJCWNsa3NbSU1YNlNYX0NMS19QTEwzX1VT Ql9PVEddKTsKKwljbGtfcHJvdmlkZXJfc2V0X3JhdGUoY2xrc1tJTVg2U1hfQ0xLX0FVRElPX1BP REZdLCAyNDAwMDAwMCk7CisKKwljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChjbGtzW0lNWDZTWF9D TEtfU1NJMV9TRUxdLAorCQkJCWNsa3NbSU1YNlNYX0NMS19QTEw0X0FVRElPX0RJVl0pOworCWNs a19wcm92aWRlcl9zZXRfcGFyZW50KGNsa3NbSU1YNlNYX0NMS19TU0kyX1NFTF0sCisJCQkJY2xr c1tJTVg2U1hfQ0xLX1BMTDRfQVVESU9fRElWXSk7CisJY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQo Y2xrc1tJTVg2U1hfQ0xLX1NTSTNfU0VMXSwKKwkJCQljbGtzW0lNWDZTWF9DTEtfUExMNF9BVURJ T19ESVZdKTsKKwljbGtfcHJvdmlkZXJfc2V0X3JhdGUoY2xrc1tJTVg2U1hfQ0xLX1NTSTFfUE9E Rl0sIDI0NTc2MDAwKTsKKwljbGtfcHJvdmlkZXJfc2V0X3JhdGUoY2xrc1tJTVg2U1hfQ0xLX1NT STJfUE9ERl0sIDI0NTc2MDAwKTsKKwljbGtfcHJvdmlkZXJfc2V0X3JhdGUoY2xrc1tJTVg2U1hf Q0xLX1NTSTNfUE9ERl0sIDI0NTc2MDAwKTsKKworCWNsa19wcm92aWRlcl9zZXRfcGFyZW50KGNs a3NbSU1YNlNYX0NMS19FU0FJX1NFTF0sCisJCQkJY2xrc1tJTVg2U1hfQ0xLX1BMTDRfQVVESU9f RElWXSk7CisJY2xrX3Byb3ZpZGVyX3NldF9yYXRlKGNsa3NbSU1YNlNYX0NMS19FU0FJX1BPREZd LCAyNDU3NjAwMCk7CiAKIAkvKiBTZXQgcGFyZW50IGNsb2NrIGZvciB2YWRjICovCi0JY2xrX3Nl dF9wYXJlbnQoY2xrc1tJTVg2U1hfQ0xLX1ZJRF9TRUxdLCBjbGtzW0lNWDZTWF9DTEtfUExMM19V U0JfT1RHXSk7CisJY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQoY2xrc1tJTVg2U1hfQ0xLX1ZJRF9T RUxdLAorCQkJCWNsa3NbSU1YNlNYX0NMS19QTEwzX1VTQl9PVEddKTsKIAogCS8qIGRlZmF1bHQg cGFyZW50IG9mIGNhbl9zZWwgY2xvY2sgaXMgaW52YWxpZCwgbWFudWFsbHkgc2V0IGl0IGhlcmUg Ki8KLQljbGtfc2V0X3BhcmVudChjbGtzW0lNWDZTWF9DTEtfQ0FOX1NFTF0sIGNsa3NbSU1YNlNY X0NMS19QTEwzXzYwTV0pOworCWNsa19wcm92aWRlcl9zZXRfcGFyZW50KGNsa3NbSU1YNlNYX0NM S19DQU5fU0VMXSwKKwkJCQljbGtzW0lNWDZTWF9DTEtfUExMM182ME1dKTsKIAogCS8qIFVwZGF0 ZSBncHUgY2xvY2sgZnJvbSBkZWZhdWx0IDUyOE0gdG8gNzIwTSAqLwotCWNsa19zZXRfcGFyZW50 KGNsa3NbSU1YNlNYX0NMS19HUFVfQ09SRV9TRUxdLCBjbGtzW0lNWDZTWF9DTEtfUExMM19QRkQw XSk7Ci0JY2xrX3NldF9wYXJlbnQoY2xrc1tJTVg2U1hfQ0xLX0dQVV9BWElfU0VMXSwgY2xrc1tJ TVg2U1hfQ0xLX1BMTDNfUEZEMF0pOworCWNsa19wcm92aWRlcl9zZXRfcGFyZW50KGNsa3NbSU1Y NlNYX0NMS19HUFVfQ09SRV9TRUxdLAorCQkJCWNsa3NbSU1YNlNYX0NMS19QTEwzX1BGRDBdKTsK KwljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChjbGtzW0lNWDZTWF9DTEtfR1BVX0FYSV9TRUxdLAor CQkJCWNsa3NbSU1YNlNYX0NMS19QTEwzX1BGRDBdKTsKIAogCS8qIFNldCBpbml0aWFsIHBvd2Vy IG1vZGUgKi8KIAlpbXg2cV9zZXRfbHBtKFdBSVRfQ0xPQ0tFRCk7CmRpZmYgLS1naXQgYS9hcmNo L2FybS9tYWNoLWlteC9jbGstcGZkLmMgYi9hcmNoL2FybS9tYWNoLWlteC9jbGstcGZkLmMKaW5k ZXggMGIwZjZmNi4uN2YxNzJhMiAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLXBm ZC5jCisrKyBiL2FyY2gvYXJtL21hY2gtaW14L2Nsay1wZmQuYwpAQCAtMTAsNyArMTAsNiBAQAog ICogaHR0cDovL3d3dy5nbnUub3JnL2NvcHlsZWZ0L2dwbC5odG1sCiAgKi8KIAotI2luY2x1ZGUg PGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUg PGxpbnV4L2lvLmg+CiAjaW5jbHVkZSA8bGludXgvc2xhYi5oPgpAQCAtMTI4LDExICsxMjcsMTEg QEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIGNsa19wZmRfb3BzID0gewogCS5pc19lbmFi bGVkICAgICA9IGNsa19wZmRfaXNfZW5hYmxlZCwKIH07CiAKLXN0cnVjdCBjbGsgKmlteF9jbGtf cGZkKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAorc3RydWN0IGNs a19jb3JlICppbXhfY2xrX3BmZChjb25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnRf bmFtZSwKIAkJCXZvaWQgX19pb21lbSAqcmVnLCB1OCBpZHgpCiB7CiAJc3RydWN0IGNsa19wZmQg KnBmZDsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0 IGNsa19pbml0X2RhdGEgaW5pdDsKIAogCXBmZCA9IGt6YWxsb2Moc2l6ZW9mKCpwZmQpLCBHRlBf S0VSTkVMKTsKZGlmZiAtLWdpdCBhL2FyY2gvYXJtL21hY2gtaW14L2Nsay1wbGx2MS5jIGIvYXJj aC9hcm0vbWFjaC1pbXgvY2xrLXBsbHYxLmMKaW5kZXggZDIxZDE0Yy4uN2VmMmNhYiAxMDA2NDQK LS0tIGEvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLXBsbHYxLmMKKysrIGIvYXJjaC9hcm0vbWFjaC1p bXgvY2xrLXBsbHYxLmMKQEAgLTEsNCArMSwzIEBACi0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAj aW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5jbHVkZSA8bGludXgvaW8uaD4KICNp bmNsdWRlIDxsaW51eC9zbGFiLmg+CkBAIC05NywxMSArOTYsMTEgQEAgc3RhdGljIHN0cnVjdCBj bGtfb3BzIGNsa19wbGx2MV9vcHMgPSB7CiAJLnJlY2FsY19yYXRlID0gY2xrX3BsbHYxX3JlY2Fs Y19yYXRlLAogfTsKIAotc3RydWN0IGNsayAqaW14X2Nsa19wbGx2MShjb25zdCBjaGFyICpuYW1l LCBjb25zdCBjaGFyICpwYXJlbnQsCitzdHJ1Y3QgY2xrX2NvcmUgKmlteF9jbGtfcGxsdjEoY29u c3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50LAogCQl2b2lkIF9faW9tZW0gKmJhc2Up CiB7CiAJc3RydWN0IGNsa19wbGx2MSAqcGxsOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3Qg Y2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwogCiAJcGxsID0ga21h bGxvYyhzaXplb2YoKnBsbCksIEdGUF9LRVJORUwpOwpkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vbWFj aC1pbXgvY2xrLXBsbHYyLmMgYi9hcmNoL2FybS9tYWNoLWlteC9jbGstcGxsdjIuYwppbmRleCAy MDg4OWQ1Li4zZGNhN2RmIDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNoLWlteC9jbGstcGxsdjIu YworKysgYi9hcmNoL2FybS9tYWNoLWlteC9jbGstcGxsdjIuYwpAQCAtMSw1ICsxLDQgQEAKICNp bmNsdWRlIDxsaW51eC9rZXJuZWwuaD4KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRl IDxsaW51eC9pby5oPgogI2luY2x1ZGUgPGxpbnV4L2Vycm5vLmg+CiAjaW5jbHVkZSA8bGludXgv ZGVsYXkuaD4KQEAgLTIzNywxMSArMjM2LDExIEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX29wcyBjbGtf cGxsdjJfb3BzID0gewogCS5zZXRfcmF0ZSA9IGNsa19wbGx2Ml9zZXRfcmF0ZSwKIH07CiAKLXN0 cnVjdCBjbGsgKmlteF9jbGtfcGxsdjIoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFy ZW50LAorc3RydWN0IGNsa19jb3JlICppbXhfY2xrX3BsbHYyKGNvbnN0IGNoYXIgKm5hbWUsIGNv bnN0IGNoYXIgKnBhcmVudCwKIAkJdm9pZCBfX2lvbWVtICpiYXNlKQogewogCXN0cnVjdCBjbGtf cGxsdjIgKnBsbDsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJ c3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAogCXBsbCA9IGt6YWxsb2Moc2l6ZW9mKCpwbGwp LCBHRlBfS0VSTkVMKTsKZGlmZiAtLWdpdCBhL2FyY2gvYXJtL21hY2gtaW14L2Nsay1wbGx2My5j IGIvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLXBsbHYzLmMKaW5kZXggNjEzNjQwNS4uYTA3NjAzZCAx MDA2NDQKLS0tIGEvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLXBsbHYzLmMKKysrIGIvYXJjaC9hcm0v bWFjaC1pbXgvY2xrLXBsbHYzLmMKQEAgLTEwLDcgKzEwLDYgQEAKICAqIGh0dHA6Ly93d3cuZ251 Lm9yZy9jb3B5bGVmdC9ncGwuaHRtbAogICovCiAKLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNp bmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIuaD4KICNpbmNsdWRlIDxsaW51eC9kZWxheS5oPgog I2luY2x1ZGUgPGxpbnV4L2lvLmg+CkBAIC0zMjAsMTMgKzMxOSwxMyBAQCBzdGF0aWMgY29uc3Qg c3RydWN0IGNsa19vcHMgY2xrX3BsbHYzX2VuZXRfb3BzID0gewogCS5yZWNhbGNfcmF0ZQk9IGNs a19wbGx2M19lbmV0X3JlY2FsY19yYXRlLAogfTsKIAotc3RydWN0IGNsayAqaW14X2Nsa19wbGx2 MyhlbnVtIGlteF9wbGx2M190eXBlIHR5cGUsIGNvbnN0IGNoYXIgKm5hbWUsCitzdHJ1Y3QgY2xr X2NvcmUgKmlteF9jbGtfcGxsdjMoZW51bSBpbXhfcGxsdjNfdHlwZSB0eXBlLCBjb25zdCBjaGFy ICpuYW1lLAogCQkJICBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwgdm9pZCBfX2lvbWVtICpiYXNl LAogCQkJICB1MzIgZGl2X21hc2spCiB7CiAJc3RydWN0IGNsa19wbGx2MyAqcGxsOwogCWNvbnN0 IHN0cnVjdCBjbGtfb3BzICpvcHM7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29y ZSAqY2xrOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAlwbGwgPSBremFsbG9jKHNp emVvZigqcGxsKSwgR0ZQX0tFUk5FTCk7CmRpZmYgLS1naXQgYS9hcmNoL2FybS9tYWNoLWlteC9j bGstdmY2MTAuYyBiL2FyY2gvYXJtL21hY2gtaW14L2Nsay12ZjYxMC5jCmluZGV4IGY2MGQ2ZDUu LmJkMjQ1MGIgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL21hY2gtaW14L2Nsay12ZjYxMC5jCisrKyBi L2FyY2gvYXJtL21hY2gtaW14L2Nsay12ZjYxMC5jCkBAIC05LDcgKzksNiBAQAogICovCiAKICNp bmNsdWRlIDxsaW51eC9vZl9hZGRyZXNzLmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5j bHVkZSA8ZHQtYmluZGluZ3MvY2xvY2svdmY2MTAtY2xvY2suaD4KIAogI2luY2x1ZGUgImNsay5o IgpAQCAtOTUsNyArOTQsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19kaXZfdGFibGUgcGxsNF9tYWlu X2Rpdl90YWJsZVtdID0gewogCXsgfQogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKmNsa1tWRjYx MF9DTEtfRU5EXTsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKmNsa1tWRjYxMF9DTEtfRU5EXTsK IHN0YXRpYyBzdHJ1Y3QgY2xrX29uZWNlbGxfZGF0YSBjbGtfZGF0YTsKIAogc3RhdGljIHZvaWQg X19pbml0IHZmNjEwX2Nsb2Nrc19pbml0KHN0cnVjdCBkZXZpY2Vfbm9kZSAqY2NtX25vZGUpCkBA IC0zMDcsMjAgKzMwNiwzMiBAQCBzdGF0aWMgdm9pZCBfX2luaXQgdmY2MTBfY2xvY2tzX2luaXQo c3RydWN0IGRldmljZV9ub2RlICpjY21fbm9kZSkKIAogCWlteF9jaGVja19jbG9ja3MoY2xrLCBB UlJBWV9TSVpFKGNsaykpOwogCi0JY2xrX3NldF9wYXJlbnQoY2xrW1ZGNjEwX0NMS19RU1BJMF9T RUxdLCBjbGtbVkY2MTBfQ0xLX1BMTDFfUEZENF0pOwotCWNsa19zZXRfcmF0ZShjbGtbVkY2MTBf Q0xLX1FTUEkwX1g0X0RJVl0sIGNsa19nZXRfcmF0ZShjbGtbVkY2MTBfQ0xLX1FTUEkwX1NFTF0p IC8gMik7Ci0JY2xrX3NldF9yYXRlKGNsa1tWRjYxMF9DTEtfUVNQSTBfWDJfRElWXSwgY2xrX2dl dF9yYXRlKGNsa1tWRjYxMF9DTEtfUVNQSTBfWDRfRElWXSkgLyAyKTsKLQljbGtfc2V0X3JhdGUo Y2xrW1ZGNjEwX0NMS19RU1BJMF9YMV9ESVZdLCBjbGtfZ2V0X3JhdGUoY2xrW1ZGNjEwX0NMS19R U1BJMF9YMl9ESVZdKSAvIDIpOwotCi0JY2xrX3NldF9wYXJlbnQoY2xrW1ZGNjEwX0NMS19RU1BJ MV9TRUxdLCBjbGtbVkY2MTBfQ0xLX1BMTDFfUEZENF0pOwotCWNsa19zZXRfcmF0ZShjbGtbVkY2 MTBfQ0xLX1FTUEkxX1g0X0RJVl0sIGNsa19nZXRfcmF0ZShjbGtbVkY2MTBfQ0xLX1FTUEkxX1NF TF0pIC8gMik7Ci0JY2xrX3NldF9yYXRlKGNsa1tWRjYxMF9DTEtfUVNQSTFfWDJfRElWXSwgY2xr X2dldF9yYXRlKGNsa1tWRjYxMF9DTEtfUVNQSTFfWDRfRElWXSkgLyAyKTsKLQljbGtfc2V0X3Jh dGUoY2xrW1ZGNjEwX0NMS19RU1BJMV9YMV9ESVZdLCBjbGtfZ2V0X3JhdGUoY2xrW1ZGNjEwX0NM S19RU1BJMV9YMl9ESVZdKSAvIDIpOwotCi0JY2xrX3NldF9wYXJlbnQoY2xrW1ZGNjEwX0NMS19T QUkwX1NFTF0sIGNsa1tWRjYxMF9DTEtfQVVESU9fRVhUXSk7Ci0JY2xrX3NldF9wYXJlbnQoY2xr W1ZGNjEwX0NMS19TQUkxX1NFTF0sIGNsa1tWRjYxMF9DTEtfQVVESU9fRVhUXSk7Ci0JY2xrX3Nl dF9wYXJlbnQoY2xrW1ZGNjEwX0NMS19TQUkyX1NFTF0sIGNsa1tWRjYxMF9DTEtfQVVESU9fRVhU XSk7Ci0JY2xrX3NldF9wYXJlbnQoY2xrW1ZGNjEwX0NMS19TQUkzX1NFTF0sIGNsa1tWRjYxMF9D TEtfQVVESU9fRVhUXSk7CisJY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQoY2xrW1ZGNjEwX0NMS19R U1BJMF9TRUxdLAorCQkJCWNsa1tWRjYxMF9DTEtfUExMMV9QRkQ0XSk7CisJY2xrX3Byb3ZpZGVy X3NldF9yYXRlKGNsa1tWRjYxMF9DTEtfUVNQSTBfWDRfRElWXSwKKwkJCSAgICAgIGNsa19wcm92 aWRlcl9nZXRfcmF0ZShjbGtbVkY2MTBfQ0xLX1FTUEkwX1NFTF0pIC8gMik7CisJY2xrX3Byb3Zp ZGVyX3NldF9yYXRlKGNsa1tWRjYxMF9DTEtfUVNQSTBfWDJfRElWXSwKKwkJCSAgICAgIGNsa19w cm92aWRlcl9nZXRfcmF0ZShjbGtbVkY2MTBfQ0xLX1FTUEkwX1g0X0RJVl0pIC8gMik7CisJY2xr X3Byb3ZpZGVyX3NldF9yYXRlKGNsa1tWRjYxMF9DTEtfUVNQSTBfWDFfRElWXSwKKwkJCSAgICAg IGNsa19wcm92aWRlcl9nZXRfcmF0ZShjbGtbVkY2MTBfQ0xLX1FTUEkwX1gyX0RJVl0pIC8gMik7 CisKKwljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChjbGtbVkY2MTBfQ0xLX1FTUEkxX1NFTF0sCisJ CQkJY2xrW1ZGNjEwX0NMS19QTEwxX1BGRDRdKTsKKwljbGtfcHJvdmlkZXJfc2V0X3JhdGUoY2xr W1ZGNjEwX0NMS19RU1BJMV9YNF9ESVZdLAorCQkJICAgICAgY2xrX3Byb3ZpZGVyX2dldF9yYXRl KGNsa1tWRjYxMF9DTEtfUVNQSTFfU0VMXSkgLyAyKTsKKwljbGtfcHJvdmlkZXJfc2V0X3JhdGUo Y2xrW1ZGNjEwX0NMS19RU1BJMV9YMl9ESVZdLAorCQkJICAgICAgY2xrX3Byb3ZpZGVyX2dldF9y YXRlKGNsa1tWRjYxMF9DTEtfUVNQSTFfWDRfRElWXSkgLyAyKTsKKwljbGtfcHJvdmlkZXJfc2V0 X3JhdGUoY2xrW1ZGNjEwX0NMS19RU1BJMV9YMV9ESVZdLAorCQkJICAgICAgY2xrX3Byb3ZpZGVy X2dldF9yYXRlKGNsa1tWRjYxMF9DTEtfUVNQSTFfWDJfRElWXSkgLyAyKTsKKworCWNsa19wcm92 aWRlcl9zZXRfcGFyZW50KGNsa1tWRjYxMF9DTEtfU0FJMF9TRUxdLAorCQkJCWNsa1tWRjYxMF9D TEtfQVVESU9fRVhUXSk7CisJY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQoY2xrW1ZGNjEwX0NMS19T QUkxX1NFTF0sCisJCQkJY2xrW1ZGNjEwX0NMS19BVURJT19FWFRdKTsKKwljbGtfcHJvdmlkZXJf c2V0X3BhcmVudChjbGtbVkY2MTBfQ0xLX1NBSTJfU0VMXSwKKwkJCQljbGtbVkY2MTBfQ0xLX0FV RElPX0VYVF0pOworCWNsa19wcm92aWRlcl9zZXRfcGFyZW50KGNsa1tWRjYxMF9DTEtfU0FJM19T RUxdLAorCQkJCWNsa1tWRjYxMF9DTEtfQVVESU9fRVhUXSk7CiAKIAkvKiBBZGQgdGhlIGNsb2Nr cyB0byBwcm92aWRlciBsaXN0ICovCiAJY2xrX2RhdGEuY2xrcyA9IGNsazsKZGlmZiAtLWdpdCBh L2FyY2gvYXJtL21hY2gtaW14L2Nsay5jIGIvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLmMKaW5kZXgg ZGYxMmI1My4uZmM1NDIwMyAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLmMKKysr IGIvYXJjaC9hcm0vbWFjaC1pbXgvY2xrLmMKQEAgLTEsNCArMSwzIEBACi0jaW5jbHVkZSA8bGlu dXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvZXJyLmg+CiAjaW5jbHVkZSA8bGludXgvb2YuaD4K ICNpbmNsdWRlIDxsaW51eC9zbGFiLmg+CkBAIC03LDcgKzYsNyBAQAogCiBERUZJTkVfU1BJTkxP Q0soaW14X2NjbV9sb2NrKTsKIAotdm9pZCBfX2luaXQgaW14X2NoZWNrX2Nsb2NrcyhzdHJ1Y3Qg Y2xrICpjbGtzW10sIHVuc2lnbmVkIGludCBjb3VudCkKK3ZvaWQgX19pbml0IGlteF9jaGVja19j bG9ja3Moc3RydWN0IGNsa19jb3JlICpjbGtzW10sIHVuc2lnbmVkIGludCBjb3VudCkKIHsKIAl1 bnNpZ25lZCBpOwogCkBAIC0xNywxMCArMTYsMTAgQEAgdm9pZCBfX2luaXQgaW14X2NoZWNrX2Ns b2NrcyhzdHJ1Y3QgY2xrICpjbGtzW10sIHVuc2lnbmVkIGludCBjb3VudCkKIAkJCSAgICAgICBp LCBQVFJfRVJSKGNsa3NbaV0pKTsKIH0KIAotc3RhdGljIHN0cnVjdCBjbGsgKiBfX2luaXQgaW14 X29idGFpbl9maXhlZF9jbG9ja19mcm9tX2R0KGNvbnN0IGNoYXIgKm5hbWUpCitzdGF0aWMgc3Ry dWN0IGNsa19jb3JlICogX19pbml0IGlteF9vYnRhaW5fZml4ZWRfY2xvY2tfZnJvbV9kdChjb25z dCBjaGFyICpuYW1lKQogewogCXN0cnVjdCBvZl9waGFuZGxlX2FyZ3MgcGhhbmRsZTsKLQlzdHJ1 Y3QgY2xrICpjbGsgPSBFUlJfUFRSKC1FTk9ERVYpOworCXN0cnVjdCBjbGtfY29yZSAqY2xrID0g RVJSX1BUUigtRU5PREVWKTsKIAljaGFyICpwYXRoOwogCiAJcGF0aCA9IGthc3ByaW50ZihHRlBf S0VSTkVMLCAiL2Nsb2Nrcy8lcyIsIG5hbWUpOwpAQCAtMzcsMTAgKzM2LDEwIEBAIHN0YXRpYyBz dHJ1Y3QgY2xrICogX19pbml0IGlteF9vYnRhaW5fZml4ZWRfY2xvY2tfZnJvbV9kdChjb25zdCBj aGFyICpuYW1lKQogCXJldHVybiBjbGs7CiB9CiAKLXN0cnVjdCBjbGsgKiBfX2luaXQgaW14X29i dGFpbl9maXhlZF9jbG9jaygKK3N0cnVjdCBjbGtfY29yZSAqIF9faW5pdCBpbXhfb2J0YWluX2Zp eGVkX2Nsb2NrKAogCQkJY29uc3QgY2hhciAqbmFtZSwgdW5zaWduZWQgbG9uZyByYXRlKQogewot CXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAogCWNsayA9IGlteF9v YnRhaW5fZml4ZWRfY2xvY2tfZnJvbV9kdChuYW1lKTsKIAlpZiAoSVNfRVJSKGNsaykpCmRpZmYg LS1naXQgYS9hcmNoL2FybS9tYWNoLWlteC9jbGsuaCBiL2FyY2gvYXJtL21hY2gtaW14L2Nsay5o CmluZGV4IGQ1YmE3NmYuLjA5MjY4ODkgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL21hY2gtaW14L2Ns ay5oCisrKyBiL2FyY2gvYXJtL21hY2gtaW14L2Nsay5oCkBAIC02LDE0ICs2LDE0IEBACiAKIGV4 dGVybiBzcGlubG9ja190IGlteF9jY21fbG9jazsKIAotdm9pZCBpbXhfY2hlY2tfY2xvY2tzKHN0 cnVjdCBjbGsgKmNsa3NbXSwgdW5zaWduZWQgaW50IGNvdW50KTsKK3ZvaWQgaW14X2NoZWNrX2Ns b2NrcyhzdHJ1Y3QgY2xrX2NvcmUgKmNsa3NbXSwgdW5zaWduZWQgaW50IGNvdW50KTsKIAogZXh0 ZXJuIHZvaWQgaW14X2NzY21yMV9maXh1cCh1MzIgKnZhbCk7CiAKLXN0cnVjdCBjbGsgKmlteF9j bGtfcGxsdjEoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50LAorc3RydWN0IGNs a19jb3JlICppbXhfY2xrX3BsbHYxKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVu dCwKIAkJdm9pZCBfX2lvbWVtICpiYXNlKTsKIAotc3RydWN0IGNsayAqaW14X2Nsa19wbGx2Mihj b25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnQsCitzdHJ1Y3QgY2xrX2NvcmUgKmlt eF9jbGtfcGxsdjIoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50LAogCQl2b2lk IF9faW9tZW0gKmJhc2UpOwogCiBlbnVtIGlteF9wbGx2M190eXBlIHsKQEAgLTI0LDI2ICsyNCwy NiBAQCBlbnVtIGlteF9wbGx2M190eXBlIHsKIAlJTVhfUExMVjNfRU5FVCwKIH07CiAKLXN0cnVj dCBjbGsgKmlteF9jbGtfcGxsdjMoZW51bSBpbXhfcGxsdjNfdHlwZSB0eXBlLCBjb25zdCBjaGFy ICpuYW1lLAorc3RydWN0IGNsa19jb3JlICppbXhfY2xrX3BsbHYzKGVudW0gaW14X3BsbHYzX3R5 cGUgdHlwZSwgY29uc3QgY2hhciAqbmFtZSwKIAkJY29uc3QgY2hhciAqcGFyZW50X25hbWUsIHZv aWQgX19pb21lbSAqYmFzZSwgdTMyIGRpdl9tYXNrKTsKIAotc3RydWN0IGNsayAqY2xrX3JlZ2lz dGVyX2dhdGUyKHN0cnVjdCBkZXZpY2UgKmRldiwgY29uc3QgY2hhciAqbmFtZSwKK3N0cnVjdCBj bGtfY29yZSAqY2xrX3JlZ2lzdGVyX2dhdGUyKHN0cnVjdCBkZXZpY2UgKmRldiwgY29uc3QgY2hh ciAqbmFtZSwKIAkJY29uc3QgY2hhciAqcGFyZW50X25hbWUsIHVuc2lnbmVkIGxvbmcgZmxhZ3Ms CiAJCXZvaWQgX19pb21lbSAqcmVnLCB1OCBiaXRfaWR4LAogCQl1OCBjbGtfZ2F0ZV9mbGFncywg c3BpbmxvY2tfdCAqbG9jaywKIAkJdW5zaWduZWQgaW50ICpzaGFyZV9jb3VudCk7CiAKLXN0cnVj dCBjbGsgKiBpbXhfb2J0YWluX2ZpeGVkX2Nsb2NrKAorc3RydWN0IGNsa19jb3JlICogaW14X29i dGFpbl9maXhlZF9jbG9jaygKIAkJCWNvbnN0IGNoYXIgKm5hbWUsIHVuc2lnbmVkIGxvbmcgcmF0 ZSk7CiAKLXN0YXRpYyBpbmxpbmUgc3RydWN0IGNsayAqaW14X2Nsa19nYXRlMihjb25zdCBjaGFy ICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnQsCitzdGF0aWMgaW5saW5lIHN0cnVjdCBjbGtfY29y ZSAqaW14X2Nsa19nYXRlMihjb25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnQsCiAJ CXZvaWQgX19pb21lbSAqcmVnLCB1OCBzaGlmdCkKIHsKIAlyZXR1cm4gY2xrX3JlZ2lzdGVyX2dh dGUyKE5VTEwsIG5hbWUsIHBhcmVudCwgQ0xLX1NFVF9SQVRFX1BBUkVOVCwgcmVnLAogCQkJc2hp ZnQsIDAsICZpbXhfY2NtX2xvY2ssIE5VTEwpOwogfQogCi1zdGF0aWMgaW5saW5lIHN0cnVjdCBj bGsgKmlteF9jbGtfZ2F0ZTJfc2hhcmVkKGNvbnN0IGNoYXIgKm5hbWUsCitzdGF0aWMgaW5saW5l IHN0cnVjdCBjbGtfY29yZSAqaW14X2Nsa19nYXRlMl9zaGFyZWQoY29uc3QgY2hhciAqbmFtZSwK IAkJY29uc3QgY2hhciAqcGFyZW50LCB2b2lkIF9faW9tZW0gKnJlZywgdTggc2hpZnQsCiAJCXVu c2lnbmVkIGludCAqc2hhcmVfY291bnQpCiB7CkBAIC01MSwzOCArNTEsMzggQEAgc3RhdGljIGlu bGluZSBzdHJ1Y3QgY2xrICppbXhfY2xrX2dhdGUyX3NoYXJlZChjb25zdCBjaGFyICpuYW1lLAog CQkJc2hpZnQsIDAsICZpbXhfY2NtX2xvY2ssIHNoYXJlX2NvdW50KTsKIH0KIAotc3RydWN0IGNs ayAqaW14X2Nsa19wZmQoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUs CitzdHJ1Y3QgY2xrX2NvcmUgKmlteF9jbGtfcGZkKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNo YXIgKnBhcmVudF9uYW1lLAogCQl2b2lkIF9faW9tZW0gKnJlZywgdTggaWR4KTsKIAotc3RydWN0 IGNsayAqaW14X2Nsa19idXN5X2RpdmlkZXIoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAq cGFyZW50X25hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmlteF9jbGtfYnVzeV9kaXZpZGVyKGNvbnN0 IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAogCQkJCSB2b2lkIF9faW9tZW0g KnJlZywgdTggc2hpZnQsIHU4IHdpZHRoLAogCQkJCSB2b2lkIF9faW9tZW0gKmJ1c3lfcmVnLCB1 OCBidXN5X3NoaWZ0KTsKIAotc3RydWN0IGNsayAqaW14X2Nsa19idXN5X211eChjb25zdCBjaGFy ICpuYW1lLCB2b2lkIF9faW9tZW0gKnJlZywgdTggc2hpZnQsCitzdHJ1Y3QgY2xrX2NvcmUgKmlt eF9jbGtfYnVzeV9tdXgoY29uc3QgY2hhciAqbmFtZSwgdm9pZCBfX2lvbWVtICpyZWcsIHU4IHNo aWZ0LAogCQkJICAgICB1OCB3aWR0aCwgdm9pZCBfX2lvbWVtICpidXN5X3JlZywgdTggYnVzeV9z aGlmdCwKIAkJCSAgICAgY29uc3QgY2hhciAqKnBhcmVudF9uYW1lcywgaW50IG51bV9wYXJlbnRz KTsKIAotc3RydWN0IGNsayAqaW14X2Nsa19maXh1cF9kaXZpZGVyKGNvbnN0IGNoYXIgKm5hbWUs IGNvbnN0IGNoYXIgKnBhcmVudCwKK3N0cnVjdCBjbGtfY29yZSAqaW14X2Nsa19maXh1cF9kaXZp ZGVyKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudCwKIAkJCQkgIHZvaWQgX19p b21lbSAqcmVnLCB1OCBzaGlmdCwgdTggd2lkdGgsCiAJCQkJICB2b2lkICgqZml4dXApKHUzMiAq dmFsKSk7CiAKLXN0cnVjdCBjbGsgKmlteF9jbGtfZml4dXBfbXV4KGNvbnN0IGNoYXIgKm5hbWUs IHZvaWQgX19pb21lbSAqcmVnLAorc3RydWN0IGNsa19jb3JlICppbXhfY2xrX2ZpeHVwX211eChj b25zdCBjaGFyICpuYW1lLCB2b2lkIF9faW9tZW0gKnJlZywKIAkJCSAgICAgIHU4IHNoaWZ0LCB1 OCB3aWR0aCwgY29uc3QgY2hhciAqKnBhcmVudHMsCiAJCQkgICAgICBpbnQgbnVtX3BhcmVudHMs IHZvaWQgKCpmaXh1cCkodTMyICp2YWwpKTsKIAotc3RhdGljIGlubGluZSBzdHJ1Y3QgY2xrICpp bXhfY2xrX2ZpeGVkKGNvbnN0IGNoYXIgKm5hbWUsIGludCByYXRlKQorc3RhdGljIGlubGluZSBz dHJ1Y3QgY2xrX2NvcmUgKmlteF9jbGtfZml4ZWQoY29uc3QgY2hhciAqbmFtZSwgaW50IHJhdGUp CiB7CiAJcmV0dXJuIGNsa19yZWdpc3Rlcl9maXhlZF9yYXRlKE5VTEwsIG5hbWUsIE5VTEwsIENM S19JU19ST09ULCByYXRlKTsKIH0KIAotc3RhdGljIGlubGluZSBzdHJ1Y3QgY2xrICppbXhfY2xr X2RpdmlkZXIoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50LAorc3RhdGljIGlu bGluZSBzdHJ1Y3QgY2xrX2NvcmUgKmlteF9jbGtfZGl2aWRlcihjb25zdCBjaGFyICpuYW1lLCBj b25zdCBjaGFyICpwYXJlbnQsCiAJCXZvaWQgX19pb21lbSAqcmVnLCB1OCBzaGlmdCwgdTggd2lk dGgpCiB7CiAJcmV0dXJuIGNsa19yZWdpc3Rlcl9kaXZpZGVyKE5VTEwsIG5hbWUsIHBhcmVudCwg Q0xLX1NFVF9SQVRFX1BBUkVOVCwKIAkJCXJlZywgc2hpZnQsIHdpZHRoLCAwLCAmaW14X2NjbV9s b2NrKTsKIH0KIAotc3RhdGljIGlubGluZSBzdHJ1Y3QgY2xrICppbXhfY2xrX2RpdmlkZXJfZmxh Z3MoY29uc3QgY2hhciAqbmFtZSwKK3N0YXRpYyBpbmxpbmUgc3RydWN0IGNsa19jb3JlICppbXhf Y2xrX2RpdmlkZXJfZmxhZ3MoY29uc3QgY2hhciAqbmFtZSwKIAkJY29uc3QgY2hhciAqcGFyZW50 LCB2b2lkIF9faW9tZW0gKnJlZywgdTggc2hpZnQsIHU4IHdpZHRoLAogCQl1bnNpZ25lZCBsb25n IGZsYWdzKQogewpAQCAtOTAsMjEgKzkwLDIxIEBAIHN0YXRpYyBpbmxpbmUgc3RydWN0IGNsayAq aW14X2Nsa19kaXZpZGVyX2ZsYWdzKGNvbnN0IGNoYXIgKm5hbWUsCiAJCQlyZWcsIHNoaWZ0LCB3 aWR0aCwgMCwgJmlteF9jY21fbG9jayk7CiB9CiAKLXN0YXRpYyBpbmxpbmUgc3RydWN0IGNsayAq aW14X2Nsa19nYXRlKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudCwKK3N0YXRp YyBpbmxpbmUgc3RydWN0IGNsa19jb3JlICppbXhfY2xrX2dhdGUoY29uc3QgY2hhciAqbmFtZSwg Y29uc3QgY2hhciAqcGFyZW50LAogCQl2b2lkIF9faW9tZW0gKnJlZywgdTggc2hpZnQpCiB7CiAJ cmV0dXJuIGNsa19yZWdpc3Rlcl9nYXRlKE5VTEwsIG5hbWUsIHBhcmVudCwgQ0xLX1NFVF9SQVRF X1BBUkVOVCwgcmVnLAogCQkJc2hpZnQsIDAsICZpbXhfY2NtX2xvY2spOwogfQogCi1zdGF0aWMg aW5saW5lIHN0cnVjdCBjbGsgKmlteF9jbGtfZ2F0ZV9kaXMoY29uc3QgY2hhciAqbmFtZSwgY29u c3QgY2hhciAqcGFyZW50LAorc3RhdGljIGlubGluZSBzdHJ1Y3QgY2xrX2NvcmUgKmlteF9jbGtf Z2F0ZV9kaXMoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50LAogCQl2b2lkIF9f aW9tZW0gKnJlZywgdTggc2hpZnQpCiB7CiAJcmV0dXJuIGNsa19yZWdpc3Rlcl9nYXRlKE5VTEws IG5hbWUsIHBhcmVudCwgQ0xLX1NFVF9SQVRFX1BBUkVOVCwgcmVnLAogCQkJc2hpZnQsIENMS19H QVRFX1NFVF9UT19ESVNBQkxFLCAmaW14X2NjbV9sb2NrKTsKIH0KIAotc3RhdGljIGlubGluZSBz dHJ1Y3QgY2xrICppbXhfY2xrX211eChjb25zdCBjaGFyICpuYW1lLCB2b2lkIF9faW9tZW0gKnJl ZywKK3N0YXRpYyBpbmxpbmUgc3RydWN0IGNsa19jb3JlICppbXhfY2xrX211eChjb25zdCBjaGFy ICpuYW1lLCB2b2lkIF9faW9tZW0gKnJlZywKIAkJdTggc2hpZnQsIHU4IHdpZHRoLCBjb25zdCBj aGFyICoqcGFyZW50cywgaW50IG51bV9wYXJlbnRzKQogewogCXJldHVybiBjbGtfcmVnaXN0ZXJf bXV4KE5VTEwsIG5hbWUsIHBhcmVudHMsIG51bV9wYXJlbnRzLApAQCAtMTEyLDcgKzExMiw3IEBA IHN0YXRpYyBpbmxpbmUgc3RydWN0IGNsayAqaW14X2Nsa19tdXgoY29uc3QgY2hhciAqbmFtZSwg dm9pZCBfX2lvbWVtICpyZWcsCiAJCQl3aWR0aCwgMCwgJmlteF9jY21fbG9jayk7CiB9CiAKLXN0 YXRpYyBpbmxpbmUgc3RydWN0IGNsayAqaW14X2Nsa19tdXhfZmxhZ3MoY29uc3QgY2hhciAqbmFt ZSwKK3N0YXRpYyBpbmxpbmUgc3RydWN0IGNsa19jb3JlICppbXhfY2xrX211eF9mbGFncyhjb25z dCBjaGFyICpuYW1lLAogCQl2b2lkIF9faW9tZW0gKnJlZywgdTggc2hpZnQsIHU4IHdpZHRoLCBj b25zdCBjaGFyICoqcGFyZW50cywKIAkJaW50IG51bV9wYXJlbnRzLCB1bnNpZ25lZCBsb25nIGZs YWdzKQogewpAQCAtMTIxLDcgKzEyMSw3IEBAIHN0YXRpYyBpbmxpbmUgc3RydWN0IGNsayAqaW14 X2Nsa19tdXhfZmxhZ3MoY29uc3QgY2hhciAqbmFtZSwKIAkJCSZpbXhfY2NtX2xvY2spOwogfQog Ci1zdGF0aWMgaW5saW5lIHN0cnVjdCBjbGsgKmlteF9jbGtfZml4ZWRfZmFjdG9yKGNvbnN0IGNo YXIgKm5hbWUsCitzdGF0aWMgaW5saW5lIHN0cnVjdCBjbGtfY29yZSAqaW14X2Nsa19maXhlZF9m YWN0b3IoY29uc3QgY2hhciAqbmFtZSwKIAkJY29uc3QgY2hhciAqcGFyZW50LCB1bnNpZ25lZCBp bnQgbXVsdCwgdW5zaWduZWQgaW50IGRpdikKIHsKIAlyZXR1cm4gY2xrX3JlZ2lzdGVyX2ZpeGVk X2ZhY3RvcihOVUxMLCBuYW1lLCBwYXJlbnQsCmRpZmYgLS1naXQgYS9hcmNoL2FybS9tYWNoLW1z bS9jbG9jay1wY29tLmMgYi9hcmNoL2FybS9tYWNoLW1zbS9jbG9jay1wY29tLmMKaW5kZXggOWE4 MDQ0OS4uMTQzNTJjNCAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vbWFjaC1tc20vY2xvY2stcGNvbS5j CisrKyBiL2FyY2gvYXJtL21hY2gtbXNtL2Nsb2NrLXBjb20uYwpAQCAtMTMyLDcgKzEzMiw3IEBA IHN0YXRpYyBpbnQgbXNtX2Nsb2NrX3Bjb21fcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAq cGRldikKIAogCWZvciAoaSA9IDA7IGkgPCBwZGF0YS0+bnVtX2xvb2t1cHM7IGkrKykgewogCQlj b25zdCBzdHJ1Y3QgY2xrX3Bjb21fZGVzYyAqZGVzYyA9ICZwZGF0YS0+bG9va3VwW2ldOwotCQlz dHJ1Y3QgY2xrICpjOworCQlzdHJ1Y3QgY2xrX2NvcmUgKmM7CiAJCXN0cnVjdCBjbGtfcGNvbSAq cDsKIAkJc3RydWN0IGNsa19odyAqaHc7CiAJCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CmRp ZmYgLS1naXQgYS9hcmNoL2FybS9tYWNoLW12Nzh4eDAvY29tbW9uLmMgYi9hcmNoL2FybS9tYWNo LW12Nzh4eDAvY29tbW9uLmMKaW5kZXggZTZhYzY3OS4uZmVlMjY0MyAxMDA2NDQKLS0tIGEvYXJj aC9hcm0vbWFjaC1tdjc4eHgwL2NvbW1vbi5jCisrKyBiL2FyY2gvYXJtL21hY2gtbXY3OHh4MC9j b21tb24uYwpAQCAtMTY0LDcgKzE2NCw3IEBAIHZvaWQgX19pbml0IG12Nzh4eDBfbWFwX2lvKHZv aWQpCiAvKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioKICAqIENMSyB0cmVlCiAgKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKi8KLXN0YXRpYyBzdHJ1Y3QgY2xrICp0Y2xrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSAq dGNsazsKIAogc3RhdGljIHZvaWQgX19pbml0IGNsa19pbml0KHZvaWQpCiB7CmRpZmYgLS1naXQg YS9hcmNoL2FybS9tYWNoLW9tYXAyL2JvYXJkLWNtLXQzNS5jIGIvYXJjaC9hcm0vbWFjaC1vbWFw Mi9ib2FyZC1jbS10MzUuYwppbmRleCAwMTgzNTNkLi4wZjQxNDI3IDEwMDY0NAotLS0gYS9hcmNo L2FybS9tYWNoLW9tYXAyL2JvYXJkLWNtLXQzNS5jCisrKyBiL2FyY2gvYXJtL21hY2gtb21hcDIv Ym9hcmQtY20tdDM1LmMKQEAgLTU1MSw3ICs1NTEsNyBAQCBzdGF0aWMgc3RydWN0IHJlZ3VsYXRv cl9jb25zdW1lcl9zdXBwbHkgY21fdDM1X2NhbWVyYV9zdXBwbGllc1tdID0gewogCiBzdGF0aWMg dm9pZCBfX2luaXQgY21fdDM1X2luaXRfY2FtZXJhKHZvaWQpCiB7Ci0Jc3RydWN0IGNsayAqY2xr OworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCiAJY2xrID0gY2xrX3JlZ2lzdGVyX2ZpeGVkX3Jh dGUoTlVMTCwgIm10OXQwMDEtY2xraW4iLCBOVUxMLCBDTEtfSVNfUk9PVCwKIAkJCQkgICAgICA0 ODAwMDAwMCk7CmRpZmYgLS1naXQgYS9hcmNoL2FybS9tYWNoLW9tYXAyL2NjbG9jazN4eHhfZGF0 YS5jIGIvYXJjaC9hcm0vbWFjaC1vbWFwMi9jY2xvY2szeHh4X2RhdGEuYwppbmRleCBlYjhjNzVl Li4xMTgwYWJlIDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNoLW9tYXAyL2NjbG9jazN4eHhfZGF0 YS5jCisrKyBiL2FyY2gvYXJtL21hY2gtb21hcDIvY2Nsb2NrM3h4eF9kYXRhLmMKQEAgLTE4LDcg KzE4LDYgQEAKICAqLwogCiAjaW5jbHVkZSA8bGludXgva2VybmVsLmg+Ci0jaW5jbHVkZSA8bGlu dXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByaXZhdGUuaD4KICNpbmNsdWRlIDxsaW51 eC9saXN0Lmg+CiAjaW5jbHVkZSA8bGludXgvaW8uaD4KQEAgLTEwNyw3ICsxMDYsNyBAQCBzdGF0 aWMgc3RydWN0IGRwbGxfZGF0YSBkcGxsM19kZCA9IHsKIAkubWF4X2RpdmlkZXIJPSBPTUFQM19N QVhfRFBMTF9ESVYsCiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayBkcGxsM19jazsKK3N0YXRpYyBz dHJ1Y3QgY2xrX2NvcmUgZHBsbDNfY2s7CiAKIHN0YXRpYyBjb25zdCBjaGFyICpkcGxsM19ja19w YXJlbnRfbmFtZXNbXSA9IHsKIAkic3lzX2NrIiwKQEAgLTEzNyw3ICsxMzYsNyBAQCBERUZJTkVf Q0xLX0RJVklERVIoZHBsbDNfbTJfY2ssICJkcGxsM19jayIsICZkcGxsM19jaywgMHgwLAogCQkg ICBPTUFQMzQzMF9DT1JFX0RQTExfQ0xLT1VUX0RJVl9XSURUSCwKIAkJICAgQ0xLX0RJVklERVJf T05FX0JBU0VELCBOVUxMKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgY29yZV9jazsKK3N0YXRpYyBz dHJ1Y3QgY2xrX2NvcmUgY29yZV9jazsKIAogc3RhdGljIGNvbnN0IGNoYXIgKmNvcmVfY2tfcGFy ZW50X25hbWVzW10gPSB7CiAJImRwbGwzX20yX2NrIiwKQEAgLTE1OCw3ICsxNTcsNyBAQCBERUZJ TkVfQ0xLX0RJVklERVIobDRfaWNrLCAibDNfaWNrIiwgJmwzX2ljaywgMHgwLAogCQkgICBPTUFQ MzQzMF9DTEtTRUxfTDRfU0hJRlQsIE9NQVAzNDMwX0NMS1NFTF9MNF9XSURUSCwKIAkJICAgQ0xL X0RJVklERVJfT05FX0JBU0VELCBOVUxMKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgc2VjdXJpdHlf bDRfaWNrMjsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgc2VjdXJpdHlfbDRfaWNrMjsKIAogc3Rh dGljIGNvbnN0IGNoYXIgKnNlY3VyaXR5X2w0X2ljazJfcGFyZW50X25hbWVzW10gPSB7CiAJImw0 X2ljayIsCkBAIC0xNjcsNyArMTY2LDcgQEAgc3RhdGljIGNvbnN0IGNoYXIgKnNlY3VyaXR5X2w0 X2ljazJfcGFyZW50X25hbWVzW10gPSB7CiBERUZJTkVfU1RSVUNUX0NMS19IV19PTUFQKHNlY3Vy aXR5X2w0X2ljazIsIE5VTEwpOwogREVGSU5FX1NUUlVDVF9DTEsoc2VjdXJpdHlfbDRfaWNrMiwg c2VjdXJpdHlfbDRfaWNrMl9wYXJlbnRfbmFtZXMsIGNvcmVfY2tfb3BzKTsKIAotc3RhdGljIHN0 cnVjdCBjbGsgYWVzMV9pY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIGFlczFfaWNrOwogCiBz dGF0aWMgY29uc3QgY2hhciAqYWVzMV9pY2tfcGFyZW50X25hbWVzW10gPSB7CiAJInNlY3VyaXR5 X2w0X2ljazIiLApAQCAtMTkwLDcgKzE4OSw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAg YWVzMV9pY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKGFlczFfaWNrLCBhZXMxX2lja19w YXJlbnRfbmFtZXMsIGFlczFfaWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGNvcmVfbDRf aWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBjb3JlX2w0X2ljazsKIAogc3RhdGljIGNvbnN0 IHN0cnVjdCBjbGtfb3BzIGNvcmVfbDRfaWNrX29wcyA9IHsKIAkuaW5pdAkJPSAmb21hcDJfaW5p dF9jbGtfY2xrZG0sCkBAIC0xOTksNyArMTk4LDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtf b3BzIGNvcmVfbDRfaWNrX29wcyA9IHsKIERFRklORV9TVFJVQ1RfQ0xLX0hXX09NQVAoY29yZV9s NF9pY2ssICJjb3JlX2w0X2Nsa2RtIik7CiBERUZJTkVfU1RSVUNUX0NMSyhjb3JlX2w0X2ljaywg c2VjdXJpdHlfbDRfaWNrMl9wYXJlbnRfbmFtZXMsIGNvcmVfbDRfaWNrX29wcyk7CiAKLXN0YXRp YyBzdHJ1Y3QgY2xrIGFlczJfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBhZXMyX2ljazsK IAogc3RhdGljIGNvbnN0IGNoYXIgKmFlczJfaWNrX3BhcmVudF9uYW1lc1tdID0gewogCSJjb3Jl X2w0X2ljayIsCkBAIC0yMjQsNyArMjIzLDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBh ZXMyX2lja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsoYWVzMl9pY2ssIGFlczJfaWNrX3Bh cmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgZHBsbDFfZmNr Oworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBkcGxsMV9mY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgZHBs bF9kYXRhIGRwbGwxX2RkID0gewogCS5tdWx0X2RpdjFfcmVnCT0gT01BUF9DTV9SRUdBRERSKE1Q VV9NT0QsIE9NQVAzNDMwX0NNX0NMS1NFTDFfUExMKSwKQEAgLTI0OCw3ICsyNDcsNyBAQCBzdGF0 aWMgc3RydWN0IGRwbGxfZGF0YSBkcGxsMV9kZCA9IHsKIAkubWF4X2RpdmlkZXIJPSBPTUFQM19N QVhfRFBMTF9ESVYsCiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayBkcGxsMV9jazsKK3N0YXRpYyBz dHJ1Y3QgY2xrX2NvcmUgZHBsbDFfY2s7CiAKIHN0YXRpYyBjb25zdCBzdHJ1Y3QgY2xrX29wcyBk cGxsMV9ja19vcHMgPSB7CiAJLmluaXQJCT0gJm9tYXAyX2luaXRfY2xrX2Nsa2RtLApAQCAtMjc5 LDcgKzI3OCw3IEBAIERFRklORV9DTEtfRElWSURFUihkcGxsMV94Mm0yX2NrLCAiZHBsbDFfeDJf Y2siLCAmZHBsbDFfeDJfY2ssIDB4MCwKIAkJICAgT01BUDM0MzBfTVBVX0RQTExfQ0xLT1VUX0RJ Vl9XSURUSCwKIAkJICAgQ0xLX0RJVklERVJfT05FX0JBU0VELCBOVUxMKTsKIAotc3RhdGljIHN0 cnVjdCBjbGsgbXB1X2NrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBtcHVfY2s7CiAKIHN0YXRp YyBjb25zdCBjaGFyICptcHVfY2tfcGFyZW50X25hbWVzW10gPSB7CiAJImRwbGwxX3gybTJfY2si LApAQCAtMjkzLDcgKzI5Miw3IEBAIERFRklORV9DTEtfRElWSURFUihhcm1fZmNrLCAibXB1X2Nr IiwgJm1wdV9jaywgMHgwLAogCQkgICBPTUFQMzQzMF9TVF9NUFVfQ0xLX1NISUZULCBPTUFQMzQz MF9TVF9NUFVfQ0xLX1dJRFRILAogCQkgICAweDAsIE5VTEwpOwogCi1zdGF0aWMgc3RydWN0IGNs ayBjYW1faWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBjYW1faWNrOwogCiBzdGF0aWMgc3Ry dWN0IGNsa19od19vbWFwIGNhbV9pY2tfaHcgPSB7CiAJLmh3ID0gewpAQCAtMzU4LDcgKzM1Nyw3 IEBAIHN0YXRpYyBzdHJ1Y3QgZHBsbF9kYXRhIGRwbGw0X2RkXzM2MzAgX19pbml0ZGF0YSA9IHsK IAkuZmxhZ3MJCT0gRFBMTF9KX1RZUEUKIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGRwbGw0X2Nr Oworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBkcGxsNF9jazsKIAogc3RhdGljIGNvbnN0IHN0cnVj dCBjbGtfb3BzIGRwbGw0X2NrX29wcyA9IHsKIAkuaW5pdAkJPSAmb21hcDJfaW5pdF9jbGtfY2xr ZG0sCkBAIC00MjIsNyArNDIxLDcgQEAgREVGSU5FX0NMS19ESVZJREVSKGRwbGw0X201X2NrLCAi ZHBsbDRfY2siLCAmZHBsbDRfY2ssIDB4MCwKIAkJICAgT01BUDM0MzBfQ0xLU0VMX0NBTV9TSElG VCwgT01BUDM2MzBfQ0xLU0VMX0NBTV9XSURUSCwKIAkJICAgQ0xLX0RJVklERVJfT05FX0JBU0VE LCBOVUxMKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgZHBsbDRfbTV4Ml9jazsKK3N0YXRpYyBzdHJ1 Y3QgY2xrX2NvcmUgZHBsbDRfbTV4Ml9jazsKIAogc3RhdGljIGNvbnN0IGNoYXIgKmRwbGw0X201 eDJfY2tfcGFyZW50X25hbWVzW10gPSB7CiAJImRwbGw0X201X2NrIiwKQEAgLTQ1OSw3ICs0NTgs NyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGRwbGw0X201eDJfY2tfaHcgPSB7CiBERUZJ TkVfU1RSVUNUX0NMS19GTEFHUyhkcGxsNF9tNXgyX2NrLCBkcGxsNF9tNXgyX2NrX3BhcmVudF9u YW1lcywKIAkJCWRwbGw0X201eDJfY2tfb3BzLCBDTEtfU0VUX1JBVEVfUEFSRU5UKTsKIAotc3Rh dGljIHN0cnVjdCBjbGsgZHBsbDRfbTV4Ml9ja18zNjMwID0geworc3RhdGljIHN0cnVjdCBjbGtf Y29yZSBkcGxsNF9tNXgyX2NrXzM2MzAgPSB7CiAJLm5hbWUJCT0gImRwbGw0X201eDJfY2siLAog CS5odwkJPSAmZHBsbDRfbTV4Ml9ja19ody5odywKIAkucGFyZW50X25hbWVzCT0gZHBsbDRfbTV4 Ml9ja19wYXJlbnRfbmFtZXMsCkBAIC00NjgsNyArNDY3LDcgQEAgc3RhdGljIHN0cnVjdCBjbGsg ZHBsbDRfbTV4Ml9ja18zNjMwID0gewogCS5mbGFncwkJPSBDTEtfU0VUX1JBVEVfUEFSRU5ULAog fTsKIAotc3RhdGljIHN0cnVjdCBjbGsgY2FtX21jbGs7CitzdGF0aWMgc3RydWN0IGNsa19jb3Jl IGNhbV9tY2xrOwogCiBzdGF0aWMgY29uc3QgY2hhciAqY2FtX21jbGtfcGFyZW50X25hbWVzW10g PSB7CiAJImRwbGw0X201eDJfY2siLApAQCAtNDgzLDcgKzQ4Miw3IEBAIHN0YXRpYyBzdHJ1Y3Qg Y2xrX2h3X29tYXAgY2FtX21jbGtfaHcgPSB7CiAJLmNsa2RtX25hbWUJPSAiY2FtX2Nsa2RtIiwK IH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGNhbV9tY2xrID0geworc3RhdGljIHN0cnVjdCBjbGtf Y29yZSBjYW1fbWNsayA9IHsKIAkubmFtZQkJPSAiY2FtX21jbGsiLAogCS5odwkJPSAmY2FtX21j bGtfaHcuaHcsCiAJLnBhcmVudF9uYW1lcwk9IGNhbV9tY2xrX3BhcmVudF9uYW1lcywKQEAgLTUx Miw3ICs1MTEsNyBAQCBERUZJTkVfQ0xLX0RJVklERVIoZHBsbDRfbTJfY2ssICJkcGxsNF9jayIs ICZkcGxsNF9jaywgMHgwLAogCQkgICBPTUFQMzQzMF9ESVZfOTZNX1NISUZULCBPTUFQMzYzMF9E SVZfOTZNX1dJRFRILAogCQkgICBDTEtfRElWSURFUl9PTkVfQkFTRUQsIE5VTEwpOwogCi1zdGF0 aWMgc3RydWN0IGNsayBkcGxsNF9tMngyX2NrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBkcGxs NF9tMngyX2NrOwogCiBzdGF0aWMgY29uc3QgY2hhciAqZHBsbDRfbTJ4Ml9ja19wYXJlbnRfbmFt ZXNbXSA9IHsKIAkiZHBsbDRfbTJfY2siLApAQCAtNTMxLDcgKzUzMCw3IEBAIHN0YXRpYyBzdHJ1 Y3QgY2xrX2h3X29tYXAgZHBsbDRfbTJ4Ml9ja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEso ZHBsbDRfbTJ4Ml9jaywgZHBsbDRfbTJ4Ml9ja19wYXJlbnRfbmFtZXMsIGRwbGw0X201eDJfY2tf b3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgZHBsbDRfbTJ4Ml9ja18zNjMwID0geworc3RhdGlj IHN0cnVjdCBjbGtfY29yZSBkcGxsNF9tMngyX2NrXzM2MzAgPSB7CiAJLm5hbWUJCT0gImRwbGw0 X20yeDJfY2siLAogCS5odwkJPSAmZHBsbDRfbTJ4Ml9ja19ody5odywKIAkucGFyZW50X25hbWVz CT0gZHBsbDRfbTJ4Ml9ja19wYXJlbnRfbmFtZXMsCkBAIC01MzksNyArNTM4LDcgQEAgc3RhdGlj IHN0cnVjdCBjbGsgZHBsbDRfbTJ4Ml9ja18zNjMwID0gewogCS5vcHMJCT0gJmRwbGw0X201eDJf Y2tfMzYzMF9vcHMsCiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayBvbWFwXzk2bV9hbHdvbl9mY2s7 CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIG9tYXBfOTZtX2Fsd29uX2ZjazsKIAogc3RhdGljIGNv bnN0IGNoYXIgKm9tYXBfOTZtX2Fsd29uX2Zja19wYXJlbnRfbmFtZXNbXSA9IHsKIAkiZHBsbDRf bTJ4Ml9jayIsCkBAIC01NDksNyArNTQ4LDcgQEAgREVGSU5FX1NUUlVDVF9DTEtfSFdfT01BUChv bWFwXzk2bV9hbHdvbl9mY2ssIE5VTEwpOwogREVGSU5FX1NUUlVDVF9DTEsob21hcF85Nm1fYWx3 b25fZmNrLCBvbWFwXzk2bV9hbHdvbl9mY2tfcGFyZW50X25hbWVzLAogCQkgIGNvcmVfY2tfb3Bz KTsKIAotc3RhdGljIHN0cnVjdCBjbGsgY21fOTZtX2ZjazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2Nv cmUgY21fOTZtX2ZjazsKIAogc3RhdGljIGNvbnN0IGNoYXIgKmNtXzk2bV9mY2tfcGFyZW50X25h bWVzW10gPSB7CiAJIm9tYXBfOTZtX2Fsd29uX2ZjayIsCkBAIC01NjgsNyArNTY3LDcgQEAgREVG SU5FX0NMS19ESVZJREVSX1RBQkxFKGRwbGw0X20zX2NrLCAiZHBsbDRfY2siLCAmZHBsbDRfY2ss IDB4MCwKIAkJICAgT01BUDM0MzBfQ0xLU0VMX1RWX1NISUZULCBPTUFQMzYzMF9DTEtTRUxfVFZf V0lEVEgsCiAJCSAgIDAsIGRwbGw0X214X2NrX2Rpdl90YWJsZSwgTlVMTCk7CiAKLXN0YXRpYyBz dHJ1Y3QgY2xrIGRwbGw0X20zeDJfY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIGRwbGw0X20z eDJfY2s7CiAKIHN0YXRpYyBjb25zdCBjaGFyICpkcGxsNF9tM3gyX2NrX3BhcmVudF9uYW1lc1td ID0gewogCSJkcGxsNF9tM19jayIsCkBAIC01ODcsNyArNTg2LDcgQEAgc3RhdGljIHN0cnVjdCBj bGtfaHdfb21hcCBkcGxsNF9tM3gyX2NrX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyhkcGxs NF9tM3gyX2NrLCBkcGxsNF9tM3gyX2NrX3BhcmVudF9uYW1lcywgZHBsbDRfbTV4Ml9ja19vcHMp OwogCi1zdGF0aWMgc3RydWN0IGNsayBkcGxsNF9tM3gyX2NrXzM2MzAgPSB7CitzdGF0aWMgc3Ry dWN0IGNsa19jb3JlIGRwbGw0X20zeDJfY2tfMzYzMCA9IHsKIAkubmFtZQkJPSAiZHBsbDRfbTN4 Ml9jayIsCiAJLmh3CQk9ICZkcGxsNF9tM3gyX2NrX2h3Lmh3LAogCS5wYXJlbnRfbmFtZXMJPSBk cGxsNF9tM3gyX2NrX3BhcmVudF9uYW1lcywKQEAgLTY1MSw3ICs2NTAsNyBAQCBzdGF0aWMgY29u c3QgY2hhciAqb21hcF80OG1fZmNrX3BhcmVudF9uYW1lc1tdID0gewogCSJjbV85Nm1fZmNrIiwg InN5c19hbHRjbGsiLAogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgb21hcF80OG1fZmNrOworc3Rh dGljIHN0cnVjdCBjbGtfY29yZSBvbWFwXzQ4bV9mY2s7CiAKIHN0YXRpYyBjb25zdCBzdHJ1Y3Qg Y2xrX29wcyBvbWFwXzQ4bV9mY2tfb3BzID0gewogCS5yZWNhbGNfcmF0ZQk9ICZvbWFwMl9jbGtz ZWxfcmVjYWxjLApAQCAtNjcyLDcgKzY3MSw3IEBAIERFRklORV9TVFJVQ1RfQ0xLKG9tYXBfNDht X2Zjaywgb21hcF80OG1fZmNrX3BhcmVudF9uYW1lcywgb21hcF80OG1fZmNrX29wcyk7CiAKIERF RklORV9DTEtfRklYRURfRkFDVE9SKG9tYXBfMTJtX2ZjaywgIm9tYXBfNDhtX2ZjayIsICZvbWFw XzQ4bV9mY2ssIDB4MCwgMSwgNCk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGNvcmVfMTJtX2ZjazsK K3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgY29yZV8xMm1fZmNrOwogCiBzdGF0aWMgY29uc3QgY2hh ciAqY29yZV8xMm1fZmNrX3BhcmVudF9uYW1lc1tdID0gewogCSJvbWFwXzEybV9mY2siLApAQCAt NjgxLDcgKzY4MCw3IEBAIHN0YXRpYyBjb25zdCBjaGFyICpjb3JlXzEybV9mY2tfcGFyZW50X25h bWVzW10gPSB7CiBERUZJTkVfU1RSVUNUX0NMS19IV19PTUFQKGNvcmVfMTJtX2ZjaywgImNvcmVf bDRfY2xrZG0iKTsKIERFRklORV9TVFJVQ1RfQ0xLKGNvcmVfMTJtX2ZjaywgY29yZV8xMm1fZmNr X3BhcmVudF9uYW1lcywgY29yZV9sNF9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgY29y ZV80OG1fZmNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBjb3JlXzQ4bV9mY2s7CiAKIHN0YXRp YyBjb25zdCBjaGFyICpjb3JlXzQ4bV9mY2tfcGFyZW50X25hbWVzW10gPSB7CiAJIm9tYXBfNDht X2ZjayIsCkBAIC02OTgsNyArNjk3LDcgQEAgREVGSU5FX0NMS19NVVgob21hcF85Nm1fZmNrLCBv bWFwXzk2bV9mY2tfcGFyZW50X25hbWVzLCBOVUxMLCAweDAsCiAJICAgICAgIE9NQVBfQ01fUkVH QUREUihQTExfTU9ELCBDTV9DTEtTRUwxKSwKIAkgICAgICAgT01BUDM0MzBfU09VUkNFXzk2TV9T SElGVCwgT01BUDM0MzBfU09VUkNFXzk2TV9XSURUSCwgMHgwLCBOVUxMKTsKIAotc3RhdGljIHN0 cnVjdCBjbGsgY29yZV85Nm1fZmNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBjb3JlXzk2bV9m Y2s7CiAKIHN0YXRpYyBjb25zdCBjaGFyICpjb3JlXzk2bV9mY2tfcGFyZW50X25hbWVzW10gPSB7 CiAJIm9tYXBfOTZtX2ZjayIsCkBAIC03MDcsNyArNzA2LDcgQEAgc3RhdGljIGNvbnN0IGNoYXIg KmNvcmVfOTZtX2Zja19wYXJlbnRfbmFtZXNbXSA9IHsKIERFRklORV9TVFJVQ1RfQ0xLX0hXX09N QVAoY29yZV85Nm1fZmNrLCAiY29yZV9sNF9jbGtkbSIpOwogREVGSU5FX1NUUlVDVF9DTEsoY29y ZV85Nm1fZmNrLCBjb3JlXzk2bV9mY2tfcGFyZW50X25hbWVzLCBjb3JlX2w0X2lja19vcHMpOwog Ci1zdGF0aWMgc3RydWN0IGNsayBjb3JlX2wzX2ljazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUg Y29yZV9sM19pY2s7CiAKIHN0YXRpYyBjb25zdCBjaGFyICpjb3JlX2wzX2lja19wYXJlbnRfbmFt ZXNbXSA9IHsKIAkibDNfaWNrIiwKQEAgLTcxOCw3ICs3MTcsNyBAQCBERUZJTkVfU1RSVUNUX0NM Syhjb3JlX2wzX2ljaywgY29yZV9sM19pY2tfcGFyZW50X25hbWVzLCBjb3JlX2w0X2lja19vcHMp OwogCiBERUZJTkVfQ0xLX0ZJWEVEX0ZBQ1RPUihkcGxsM19tMngyX2NrLCAiZHBsbDNfbTJfY2si LCAmZHBsbDNfbTJfY2ssIDB4MCwgMiwgMSk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGNvcmV4Ml9m Y2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIGNvcmV4Ml9mY2s7CiAKIHN0YXRpYyBjb25zdCBj aGFyICpjb3JleDJfZmNrX3BhcmVudF9uYW1lc1tdID0gewogCSJkcGxsM19tMngyX2NrIiwKQEAg LTcyNyw3ICs3MjYsNyBAQCBzdGF0aWMgY29uc3QgY2hhciAqY29yZXgyX2Zja19wYXJlbnRfbmFt ZXNbXSA9IHsKIERFRklORV9TVFJVQ1RfQ0xLX0hXX09NQVAoY29yZXgyX2ZjaywgTlVMTCk7CiBE RUZJTkVfU1RSVUNUX0NMSyhjb3JleDJfZmNrLCBjb3JleDJfZmNrX3BhcmVudF9uYW1lcywgY29y ZV9ja19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayBjcGVmdXNlX2ZjazsKK3N0YXRpYyBzdHJ1 Y3QgY2xrX2NvcmUgY3BlZnVzZV9mY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgY3Bl ZnVzZV9mY2tfaHcgPSB7CiAJLmh3ID0gewpAQCAtNzQwLDcgKzczOSw3IEBAIHN0YXRpYyBzdHJ1 Y3QgY2xrX2h3X29tYXAgY3BlZnVzZV9mY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKGNw ZWZ1c2VfZmNrLCBkcGxsM19ja19wYXJlbnRfbmFtZXMsIGFlczJfaWNrX29wcyk7CiAKLXN0YXRp YyBzdHJ1Y3QgY2xrIGNzaTJfOTZtX2ZjazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgY3NpMl85 Nm1fZmNrOwogCiBzdGF0aWMgY29uc3QgY2hhciAqY3NpMl85Nm1fZmNrX3BhcmVudF9uYW1lc1td ID0gewogCSJjb3JlXzk2bV9mY2siLApAQCAtNzU3LDcgKzc1Niw3IEBAIHN0YXRpYyBzdHJ1Y3Qg Y2xrX2h3X29tYXAgY3NpMl85Nm1fZmNrX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyhjc2ky Xzk2bV9mY2ssIGNzaTJfOTZtX2Zja19wYXJlbnRfbmFtZXMsIGFlczJfaWNrX29wcyk7CiAKLXN0 YXRpYyBzdHJ1Y3QgY2xrIGQyZF8yNm1fZmNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBkMmRf MjZtX2ZjazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBkMmRfMjZtX2Zja19odyA9IHsK IAkuaHcgPSB7CkBAIC03NzEsNyArNzcwLDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBk MmRfMjZtX2Zja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsoZDJkXzI2bV9mY2ssIGRwbGwz X2NrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgZGVz MV9pY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIGRlczFfaWNrOwogCiBzdGF0aWMgc3RydWN0 IGNsa19od19vbWFwIGRlczFfaWNrX2h3ID0gewogCS5odyA9IHsKQEAgLTc4NCw3ICs3ODMsNyBA QCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGRlczFfaWNrX2h3ID0gewogCiBERUZJTkVfU1RS VUNUX0NMSyhkZXMxX2ljaywgYWVzMV9pY2tfcGFyZW50X25hbWVzLCBhZXMxX2lja19vcHMpOwog Ci1zdGF0aWMgc3RydWN0IGNsayBkZXMyX2ljazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgZGVz Ml9pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgZGVzMl9pY2tfaHcgPSB7CiAJLmh3 ID0gewpAQCAtODAzLDcgKzgwMiw3IEBAIERFRklORV9DTEtfRElWSURFUihkcGxsMV9mY2ssICJj b3JlX2NrIiwgJmNvcmVfY2ssIDB4MCwKIAkJICAgT01BUDM0MzBfTVBVX0NMS19TUkNfU0hJRlQs IE9NQVAzNDMwX01QVV9DTEtfU1JDX1dJRFRILAogCQkgICBDTEtfRElWSURFUl9PTkVfQkFTRUQs IE5VTEwpOwogCi1zdGF0aWMgc3RydWN0IGNsayBkcGxsMl9mY2s7CitzdGF0aWMgc3RydWN0IGNs a19jb3JlIGRwbGwyX2ZjazsKIAogc3RhdGljIHN0cnVjdCBkcGxsX2RhdGEgZHBsbDJfZGQgPSB7 CiAJLm11bHRfZGl2MV9yZWcJPSBPTUFQX0NNX1JFR0FERFIoT01BUDM0MzBfSVZBMl9NT0QsIE9N QVAzNDMwX0NNX0NMS1NFTDFfUExMKSwKQEAgLTgyOCw3ICs4MjcsNyBAQCBzdGF0aWMgc3RydWN0 IGRwbGxfZGF0YSBkcGxsMl9kZCA9IHsKIAkubWF4X2RpdmlkZXIJPSBPTUFQM19NQVhfRFBMTF9E SVYsCiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayBkcGxsMl9jazsKK3N0YXRpYyBzdHJ1Y3QgY2xr X2NvcmUgZHBsbDJfY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgZHBsbDJfY2tfaHcg PSB7CiAJLmh3ID0gewpAQCAtODU3LDcgKzg1Niw3IEBAIERFRklORV9DTEtfRElWSURFUihkcGxs M19tM19jaywgImRwbGwzX2NrIiwgJmRwbGwzX2NrLCAweDAsCiAJCSAgIE9NQVAzNDMwX0RJVl9E UExMM19TSElGVCwgT01BUDM0MzBfRElWX0RQTEwzX1dJRFRILAogCQkgICBDTEtfRElWSURFUl9P TkVfQkFTRUQsIE5VTEwpOwogCi1zdGF0aWMgc3RydWN0IGNsayBkcGxsM19tM3gyX2NrOworc3Rh dGljIHN0cnVjdCBjbGtfY29yZSBkcGxsM19tM3gyX2NrOwogCiBzdGF0aWMgY29uc3QgY2hhciAq ZHBsbDNfbTN4Ml9ja19wYXJlbnRfbmFtZXNbXSA9IHsKIAkiZHBsbDNfbTNfY2siLApAQCAtODc2 LDcgKzg3NSw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgZHBsbDNfbTN4Ml9ja19odyA9 IHsKIAogREVGSU5FX1NUUlVDVF9DTEsoZHBsbDNfbTN4Ml9jaywgZHBsbDNfbTN4Ml9ja19wYXJl bnRfbmFtZXMsIGRwbGw0X201eDJfY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgZHBsbDNf bTN4Ml9ja18zNjMwID0geworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBkcGxsM19tM3gyX2NrXzM2 MzAgPSB7CiAJLm5hbWUJCT0gImRwbGwzX20zeDJfY2siLAogCS5odwkJPSAmZHBsbDNfbTN4Ml9j a19ody5odywKIAkucGFyZW50X25hbWVzCT0gZHBsbDNfbTN4Ml9ja19wYXJlbnRfbmFtZXMsCkBA IC04OTEsNyArODkwLDcgQEAgREVGSU5FX0NMS19ESVZJREVSX1RBQkxFKGRwbGw0X200X2NrLCAi ZHBsbDRfY2siLCAmZHBsbDRfY2ssIDB4MCwKIAkJICAgT01BUDM0MzBfQ0xLU0VMX0RTUzFfU0hJ RlQsIE9NQVAzNjMwX0NMS1NFTF9EU1MxX1dJRFRILAogCQkgICAwLCBkcGxsNF9teF9ja19kaXZf dGFibGUsIE5VTEwpOwogCi1zdGF0aWMgc3RydWN0IGNsayBkcGxsNF9tNHgyX2NrOworc3RhdGlj IHN0cnVjdCBjbGtfY29yZSBkcGxsNF9tNHgyX2NrOwogCiBzdGF0aWMgY29uc3QgY2hhciAqZHBs bDRfbTR4Ml9ja19wYXJlbnRfbmFtZXNbXSA9IHsKIAkiZHBsbDRfbTRfY2siLApAQCAtOTExLDcg KzkxMCw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgZHBsbDRfbTR4Ml9ja19odyA9IHsK IERFRklORV9TVFJVQ1RfQ0xLX0ZMQUdTKGRwbGw0X200eDJfY2ssIGRwbGw0X200eDJfY2tfcGFy ZW50X25hbWVzLAogCQlkcGxsNF9tNXgyX2NrX29wcywgQ0xLX1NFVF9SQVRFX1BBUkVOVCk7CiAK LXN0YXRpYyBzdHJ1Y3QgY2xrIGRwbGw0X200eDJfY2tfMzYzMCA9IHsKK3N0YXRpYyBzdHJ1Y3Qg Y2xrX2NvcmUgZHBsbDRfbTR4Ml9ja18zNjMwID0gewogCS5uYW1lCQk9ICJkcGxsNF9tNHgyX2Nr IiwKIAkuaHcJCT0gJmRwbGw0X200eDJfY2tfaHcuaHcsCiAJLnBhcmVudF9uYW1lcwk9IGRwbGw0 X200eDJfY2tfcGFyZW50X25hbWVzLApAQCAtOTI1LDcgKzkyNCw3IEBAIERFRklORV9DTEtfRElW SURFUihkcGxsNF9tNl9jaywgImRwbGw0X2NrIiwgJmRwbGw0X2NrLCAweDAsCiAJCSAgIE9NQVAz NDMwX0RJVl9EUExMNF9TSElGVCwgT01BUDM2MzBfRElWX0RQTEw0X1dJRFRILAogCQkgICBDTEtf RElWSURFUl9PTkVfQkFTRUQsIE5VTEwpOwogCi1zdGF0aWMgc3RydWN0IGNsayBkcGxsNF9tNngy X2NrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBkcGxsNF9tNngyX2NrOwogCiBzdGF0aWMgY29u c3QgY2hhciAqZHBsbDRfbTZ4Ml9ja19wYXJlbnRfbmFtZXNbXSA9IHsKIAkiZHBsbDRfbTZfY2si LApAQCAtOTQ0LDcgKzk0Myw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgZHBsbDRfbTZ4 Ml9ja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsoZHBsbDRfbTZ4Ml9jaywgZHBsbDRfbTZ4 Ml9ja19wYXJlbnRfbmFtZXMsIGRwbGw0X201eDJfY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBj bGsgZHBsbDRfbTZ4Ml9ja18zNjMwID0geworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBkcGxsNF9t NngyX2NrXzM2MzAgPSB7CiAJLm5hbWUJCT0gImRwbGw0X202eDJfY2siLAogCS5odwkJPSAmZHBs bDRfbTZ4Ml9ja19ody5odywKIAkucGFyZW50X25hbWVzCT0gZHBsbDRfbTZ4Ml9ja19wYXJlbnRf bmFtZXMsCkBAIC05NzYsNyArOTc1LDcgQEAgc3RhdGljIHN0cnVjdCBkcGxsX2RhdGEgZHBsbDVf ZGQgPSB7CiAJLm1heF9kaXZpZGVyCT0gT01BUDNfTUFYX0RQTExfRElWLAogfTsKIAotc3RhdGlj IHN0cnVjdCBjbGsgZHBsbDVfY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIGRwbGw1X2NrOwog CiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGRwbGw1X2NrX2h3ID0gewogCS5odyA9IHsKQEAg LTk5NCw3ICs5OTMsNyBAQCBERUZJTkVfQ0xLX0RJVklERVIoZHBsbDVfbTJfY2ssICJkcGxsNV9j ayIsICZkcGxsNV9jaywgMHgwLAogCQkgICBPTUFQMzQzMEVTMl9ESVZfMTIwTV9TSElGVCwgT01B UDM0MzBFUzJfRElWXzEyME1fV0lEVEgsCiAJCSAgIENMS19ESVZJREVSX09ORV9CQVNFRCwgTlVM TCk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGRzczFfYWx3b25fZmNrXzM0MzBlczE7CitzdGF0aWMg c3RydWN0IGNsa19jb3JlIGRzczFfYWx3b25fZmNrXzM0MzBlczE7CiAKIHN0YXRpYyBjb25zdCBj aGFyICpkc3MxX2Fsd29uX2Zja18zNDMwZXMxX3BhcmVudF9uYW1lc1tdID0gewogCSJkcGxsNF9t NHgyX2NrIiwKQEAgLTEwMTMsNyArMTAxMiw3IEBAIERFRklORV9TVFJVQ1RfQ0xLX0ZMQUdTKGRz czFfYWx3b25fZmNrXzM0MzBlczEsCiAJCWRzczFfYWx3b25fZmNrXzM0MzBlczFfcGFyZW50X25h bWVzLCBhZXMyX2lja19vcHMsCiAJCUNMS19TRVRfUkFURV9QQVJFTlQpOwogCi1zdGF0aWMgc3Ry dWN0IGNsayBkc3MxX2Fsd29uX2Zja18zNDMwZXMyOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBk c3MxX2Fsd29uX2Zja18zNDMwZXMyOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGRzczFf YWx3b25fZmNrXzM0MzBlczJfaHcgPSB7CiAJLmh3ID0gewpAQCAtMTAyOSw3ICsxMDI4LDcgQEAg REVGSU5FX1NUUlVDVF9DTEtfRkxBR1MoZHNzMV9hbHdvbl9mY2tfMzQzMGVzMiwKIAkJZHNzMV9h bHdvbl9mY2tfMzQzMGVzMV9wYXJlbnRfbmFtZXMsIGFlczJfaWNrX29wcywKIAkJQ0xLX1NFVF9S QVRFX1BBUkVOVCk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGRzczJfYWx3b25fZmNrOworc3RhdGlj IHN0cnVjdCBjbGtfY29yZSBkc3MyX2Fsd29uX2ZjazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdf b21hcCBkc3MyX2Fsd29uX2Zja19odyA9IHsKIAkuaHcgPSB7CkBAIC0xMDQyLDcgKzEwNDEsNyBA QCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGRzczJfYWx3b25fZmNrX2h3ID0gewogCiBERUZJ TkVfU1RSVUNUX0NMSyhkc3MyX2Fsd29uX2ZjaywgZHBsbDNfY2tfcGFyZW50X25hbWVzLCBhZXMy X2lja19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayBkc3NfOTZtX2ZjazsKK3N0YXRpYyBzdHJ1 Y3QgY2xrX2NvcmUgZHNzXzk2bV9mY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgZHNz Xzk2bV9mY2tfaHcgPSB7CiAJLmh3ID0gewpAQCAtMTA1NSw3ICsxMDU0LDcgQEAgc3RhdGljIHN0 cnVjdCBjbGtfaHdfb21hcCBkc3NfOTZtX2Zja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEso ZHNzXzk2bV9mY2ssIGNvcmVfOTZtX2Zja19wYXJlbnRfbmFtZXMsIGFlczJfaWNrX29wcyk7CiAK LXN0YXRpYyBzdHJ1Y3QgY2xrIGRzc19pY2tfMzQzMGVzMTsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2Nv cmUgZHNzX2lja18zNDMwZXMxOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGRzc19pY2tf MzQzMGVzMV9odyA9IHsKIAkuaHcgPSB7CkBAIC0xMDY5LDcgKzEwNjgsNyBAQCBzdGF0aWMgc3Ry dWN0IGNsa19od19vbWFwIGRzc19pY2tfMzQzMGVzMV9odyA9IHsKIAogREVGSU5FX1NUUlVDVF9D TEsoZHNzX2lja18zNDMwZXMxLCBzZWN1cml0eV9sNF9pY2syX3BhcmVudF9uYW1lcywgYWVzMl9p Y2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgZHNzX2lja18zNDMwZXMyOworc3RhdGljIHN0 cnVjdCBjbGtfY29yZSBkc3NfaWNrXzM0MzBlczI7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29t YXAgZHNzX2lja18zNDMwZXMyX2h3ID0gewogCS5odyA9IHsKQEAgLTEwODMsNyArMTA4Miw3IEBA IHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgZHNzX2lja18zNDMwZXMyX2h3ID0gewogCiBERUZJ TkVfU1RSVUNUX0NMSyhkc3NfaWNrXzM0MzBlczIsIHNlY3VyaXR5X2w0X2ljazJfcGFyZW50X25h bWVzLCBhZXMyX2lja19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayBkc3NfdHZfZmNrOworc3Rh dGljIHN0cnVjdCBjbGtfY29yZSBkc3NfdHZfZmNrOwogCiBzdGF0aWMgY29uc3QgY2hhciAqZHNz X3R2X2Zja19wYXJlbnRfbmFtZXNbXSA9IHsKIAkib21hcF81NG1fZmNrIiwKQEAgLTExMDAsNyAr MTA5OSw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgZHNzX3R2X2Zja19odyA9IHsKIAog REVGSU5FX1NUUlVDVF9DTEsoZHNzX3R2X2ZjaywgZHNzX3R2X2Zja19wYXJlbnRfbmFtZXMsIGFl czJfaWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGVtYWNfZmNrOworc3RhdGljIHN0cnVj dCBjbGtfY29yZSBlbWFjX2ZjazsKIAogc3RhdGljIGNvbnN0IGNoYXIgKmVtYWNfZmNrX3BhcmVu dF9uYW1lc1tdID0gewogCSJybWlpX2NrIiwKQEAgLTExMTYsNyArMTExNSw3IEBAIHN0YXRpYyBz dHJ1Y3QgY2xrX2h3X29tYXAgZW1hY19mY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKGVt YWNfZmNrLCBlbWFjX2Zja19wYXJlbnRfbmFtZXMsIGFlczFfaWNrX29wcyk7CiAKLXN0YXRpYyBz dHJ1Y3QgY2xrIGlwc3NfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBpcHNzX2ljazsKIAog c3RhdGljIGNvbnN0IGNoYXIgKmlwc3NfaWNrX3BhcmVudF9uYW1lc1tdID0gewogCSJjb3JlX2wz X2ljayIsCkBAIC0xMTM0LDcgKzExMzMsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGlw c3NfaWNrX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyhpcHNzX2ljaywgaXBzc19pY2tfcGFy ZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayBlbWFjX2ljazsK K3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgZW1hY19pY2s7CiAKIHN0YXRpYyBjb25zdCBjaGFyICpl bWFjX2lja19wYXJlbnRfbmFtZXNbXSA9IHsKIAkiaXBzc19pY2siLApAQCAtMTE1Miw3ICsxMTUx LDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBlbWFjX2lja19odyA9IHsKIAogREVGSU5F X1NUUlVDVF9DTEsoZW1hY19pY2ssIGVtYWNfaWNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3Bz KTsKIAotc3RhdGljIHN0cnVjdCBjbGsgZW11X2NvcmVfYWx3b25fY2s7CitzdGF0aWMgc3RydWN0 IGNsa19jb3JlIGVtdV9jb3JlX2Fsd29uX2NrOwogCiBzdGF0aWMgY29uc3QgY2hhciAqZW11X2Nv cmVfYWx3b25fY2tfcGFyZW50X25hbWVzW10gPSB7CiAJImRwbGwzX20zeDJfY2siLApAQCAtMTE2 Miw3ICsxMTYxLDcgQEAgREVGSU5FX1NUUlVDVF9DTEtfSFdfT01BUChlbXVfY29yZV9hbHdvbl9j aywgImRwbGwzX2Nsa2RtIik7CiBERUZJTkVfU1RSVUNUX0NMSyhlbXVfY29yZV9hbHdvbl9jaywg ZW11X2NvcmVfYWx3b25fY2tfcGFyZW50X25hbWVzLAogCQkgIGNvcmVfbDRfaWNrX29wcyk7CiAK LXN0YXRpYyBzdHJ1Y3QgY2xrIGVtdV9tcHVfYWx3b25fY2s7CitzdGF0aWMgc3RydWN0IGNsa19j b3JlIGVtdV9tcHVfYWx3b25fY2s7CiAKIHN0YXRpYyBjb25zdCBjaGFyICplbXVfbXB1X2Fsd29u X2NrX3BhcmVudF9uYW1lc1tdID0gewogCSJtcHVfY2siLApAQCAtMTE3MSw3ICsxMTcwLDcgQEAg c3RhdGljIGNvbnN0IGNoYXIgKmVtdV9tcHVfYWx3b25fY2tfcGFyZW50X25hbWVzW10gPSB7CiBE RUZJTkVfU1RSVUNUX0NMS19IV19PTUFQKGVtdV9tcHVfYWx3b25fY2ssIE5VTEwpOwogREVGSU5F X1NUUlVDVF9DTEsoZW11X21wdV9hbHdvbl9jaywgZW11X21wdV9hbHdvbl9ja19wYXJlbnRfbmFt ZXMsIGNvcmVfY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgZW11X3Blcl9hbHdvbl9jazsK K3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgZW11X3Blcl9hbHdvbl9jazsKIAogc3RhdGljIGNvbnN0 IGNoYXIgKmVtdV9wZXJfYWx3b25fY2tfcGFyZW50X25hbWVzW10gPSB7CiAJImRwbGw0X202eDJf Y2siLApAQCAtMTIyMiw3ICsxMjIxLDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIGVt dV9zcmNfY2tfb3BzID0gewogCS5kaXNhYmxlCT0gJm9tYXAyX2Nsa29wc19kaXNhYmxlX2Nsa2Rt LAogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgZW11X3NyY19jazsKK3N0YXRpYyBzdHJ1Y3QgY2xr X2NvcmUgZW11X3NyY19jazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBlbXVfc3JjX2Nr X2h3ID0gewogCS5odyA9IHsKQEAgLTEyNDEsNyArMTI0MCw3IEBAIERFRklORV9DTEtfRElWSURF UihhdGNsa19mY2ssICJlbXVfc3JjX2NrIiwgJmVtdV9zcmNfY2ssIDB4MCwKIAkJICAgT01BUDM0 MzBfQ0xLU0VMX0FUQ0xLX1NISUZULCBPTUFQMzQzMF9DTEtTRUxfQVRDTEtfV0lEVEgsCiAJCSAg IENMS19ESVZJREVSX09ORV9CQVNFRCwgTlVMTCk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGZhY19p Y2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIGZhY19pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xr X2h3X29tYXAgZmFjX2lja19odyA9IHsKIAkuaHcgPSB7CkBAIC0xMjU1LDcgKzEyNTQsNyBAQCBz dGF0aWMgc3RydWN0IGNsa19od19vbWFwIGZhY19pY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1Rf Q0xLKGZhY19pY2ssIGFlczJfaWNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3Rh dGljIHN0cnVjdCBjbGsgZnNob3N0dXNiX2ZjazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgZnNo b3N0dXNiX2ZjazsKIAogc3RhdGljIGNvbnN0IGNoYXIgKmZzaG9zdHVzYl9mY2tfcGFyZW50X25h bWVzW10gPSB7CiAJImNvcmVfNDhtX2ZjayIsCkBAIC0xMjczLDcgKzEyNzIsNyBAQCBzdGF0aWMg c3RydWN0IGNsa19od19vbWFwIGZzaG9zdHVzYl9mY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1Rf Q0xLKGZzaG9zdHVzYl9mY2ssIGZzaG9zdHVzYl9mY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19v cHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayBnZnhfbDNfY2s7CitzdGF0aWMgc3RydWN0IGNsa19j b3JlIGdmeF9sM19jazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBnZnhfbDNfY2tfaHcg PSB7CiAJLmh3ID0gewpAQCAtMTI5Miw3ICsxMjkxLDcgQEAgREVGSU5FX0NMS19ESVZJREVSKGdm eF9sM19mY2ssICJsM19pY2siLCAmbDNfaWNrLCAweDAsCiAJCSAgIE9NQVBfQ0xLU0VMX0dGWF9T SElGVCwgT01BUF9DTEtTRUxfR0ZYX1dJRFRILAogCQkgICBDTEtfRElWSURFUl9PTkVfQkFTRUQs IE5VTEwpOwogCi1zdGF0aWMgc3RydWN0IGNsayBnZnhfY2cxX2NrOworc3RhdGljIHN0cnVjdCBj bGtfY29yZSBnZnhfY2cxX2NrOwogCiBzdGF0aWMgY29uc3QgY2hhciAqZ2Z4X2NnMV9ja19wYXJl bnRfbmFtZXNbXSA9IHsKIAkiZ2Z4X2wzX2ZjayIsCkBAIC0xMzEwLDcgKzEzMDksNyBAQCBzdGF0 aWMgc3RydWN0IGNsa19od19vbWFwIGdmeF9jZzFfY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1Rf Q0xLKGdmeF9jZzFfY2ssIGdmeF9jZzFfY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwog Ci1zdGF0aWMgc3RydWN0IGNsayBnZnhfY2cyX2NrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBn ZnhfY2cyX2NrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGdmeF9jZzJfY2tfaHcgPSB7 CiAJLmh3ID0gewpAQCAtMTMyNCw3ICsxMzIzLDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21h cCBnZnhfY2cyX2NrX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyhnZnhfY2cyX2NrLCBnZnhf Y2cxX2NrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsg Z2Z4X2wzX2ljazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgZ2Z4X2wzX2ljazsKIAogc3RhdGlj IGNvbnN0IGNoYXIgKmdmeF9sM19pY2tfcGFyZW50X25hbWVzW10gPSB7CiAJImdmeF9sM19jayIs CkBAIC0xMzMzLDcgKzEzMzIsNyBAQCBzdGF0aWMgY29uc3QgY2hhciAqZ2Z4X2wzX2lja19wYXJl bnRfbmFtZXNbXSA9IHsKIERFRklORV9TVFJVQ1RfQ0xLX0hXX09NQVAoZ2Z4X2wzX2ljaywgImdm eF8zNDMwZXMxX2Nsa2RtIik7CiBERUZJTkVfU1RSVUNUX0NMSyhnZnhfbDNfaWNrLCBnZnhfbDNf aWNrX3BhcmVudF9uYW1lcywgY29yZV9sNF9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsg d2t1cF8zMmtfZmNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSB3a3VwXzMya19mY2s7CiAKIHN0 YXRpYyBjb25zdCBjaGFyICp3a3VwXzMya19mY2tfcGFyZW50X25hbWVzW10gPSB7CiAJIm9tYXBf MzJrX2ZjayIsCkBAIC0xMzQyLDcgKzEzNDEsNyBAQCBzdGF0aWMgY29uc3QgY2hhciAqd2t1cF8z MmtfZmNrX3BhcmVudF9uYW1lc1tdID0gewogREVGSU5FX1NUUlVDVF9DTEtfSFdfT01BUCh3a3Vw XzMya19mY2ssICJ3a3VwX2Nsa2RtIik7CiBERUZJTkVfU1RSVUNUX0NMSyh3a3VwXzMya19mY2ss IHdrdXBfMzJrX2Zja19wYXJlbnRfbmFtZXMsIGNvcmVfbDRfaWNrX29wcyk7CiAKLXN0YXRpYyBz dHJ1Y3QgY2xrIGdwaW8xX2RiY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIGdwaW8xX2RiY2s7 CiAKIHN0YXRpYyBjb25zdCBjaGFyICpncGlvMV9kYmNrX3BhcmVudF9uYW1lc1tdID0gewogCSJ3 a3VwXzMya19mY2siLApAQCAtMTM1OSwxMiArMTM1OCwxMiBAQCBzdGF0aWMgc3RydWN0IGNsa19o d19vbWFwIGdwaW8xX2RiY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKGdwaW8xX2RiY2ss IGdwaW8xX2RiY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwogCi1zdGF0aWMgc3RydWN0 IGNsayB3a3VwX2w0X2ljazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgd2t1cF9sNF9pY2s7CiAK IERFRklORV9TVFJVQ1RfQ0xLX0hXX09NQVAod2t1cF9sNF9pY2ssICJ3a3VwX2Nsa2RtIik7CiBE RUZJTkVfU1RSVUNUX0NMSyh3a3VwX2w0X2ljaywgZHBsbDNfY2tfcGFyZW50X25hbWVzLCBjb3Jl X2w0X2lja19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayBncGlvMV9pY2s7CitzdGF0aWMgc3Ry dWN0IGNsa19jb3JlIGdwaW8xX2ljazsKIAogc3RhdGljIGNvbnN0IGNoYXIgKmdwaW8xX2lja19w YXJlbnRfbmFtZXNbXSA9IHsKIAkid2t1cF9sNF9pY2siLApAQCAtMTM4MiwxMyArMTM4MSwxMyBA QCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGdwaW8xX2lja19odyA9IHsKIAogREVGSU5FX1NU UlVDVF9DTEsoZ3BpbzFfaWNrLCBncGlvMV9pY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19vcHMp OwogCi1zdGF0aWMgc3RydWN0IGNsayBwZXJfMzJrX2Fsd29uX2ZjazsKK3N0YXRpYyBzdHJ1Y3Qg Y2xrX2NvcmUgcGVyXzMya19hbHdvbl9mY2s7CiAKIERFRklORV9TVFJVQ1RfQ0xLX0hXX09NQVAo cGVyXzMya19hbHdvbl9mY2ssICJwZXJfY2xrZG0iKTsKIERFRklORV9TVFJVQ1RfQ0xLKHBlcl8z MmtfYWx3b25fZmNrLCB3a3VwXzMya19mY2tfcGFyZW50X25hbWVzLAogCQkgIGNvcmVfbDRfaWNr X29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGdwaW8yX2RiY2s7CitzdGF0aWMgc3RydWN0IGNs a19jb3JlIGdwaW8yX2RiY2s7CiAKIHN0YXRpYyBjb25zdCBjaGFyICpncGlvMl9kYmNrX3BhcmVu dF9uYW1lc1tdID0gewogCSJwZXJfMzJrX2Fsd29uX2ZjayIsCkBAIC0xNDA1LDEyICsxNDA0LDEy IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgZ3BpbzJfZGJja19odyA9IHsKIAogREVGSU5F X1NUUlVDVF9DTEsoZ3BpbzJfZGJjaywgZ3BpbzJfZGJja19wYXJlbnRfbmFtZXMsIGFlczJfaWNr X29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIHBlcl9sNF9pY2s7CitzdGF0aWMgc3RydWN0IGNs a19jb3JlIHBlcl9sNF9pY2s7CiAKIERFRklORV9TVFJVQ1RfQ0xLX0hXX09NQVAocGVyX2w0X2lj aywgInBlcl9jbGtkbSIpOwogREVGSU5FX1NUUlVDVF9DTEsocGVyX2w0X2ljaywgc2VjdXJpdHlf bDRfaWNrMl9wYXJlbnRfbmFtZXMsIGNvcmVfbDRfaWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3Qg Y2xrIGdwaW8yX2ljazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgZ3BpbzJfaWNrOwogCiBzdGF0 aWMgY29uc3QgY2hhciAqZ3BpbzJfaWNrX3BhcmVudF9uYW1lc1tdID0gewogCSJwZXJfbDRfaWNr IiwKQEAgLTE0MjgsNyArMTQyNyw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgZ3BpbzJf aWNrX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyhncGlvMl9pY2ssIGdwaW8yX2lja19wYXJl bnRfbmFtZXMsIGFlczJfaWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGdwaW8zX2RiY2s7 CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIGdwaW8zX2RiY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xr X2h3X29tYXAgZ3BpbzNfZGJja19odyA9IHsKIAkuaHcgPSB7CkBAIC0xNDQxLDcgKzE0NDAsNyBA QCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGdwaW8zX2RiY2tfaHcgPSB7CiAKIERFRklORV9T VFJVQ1RfQ0xLKGdwaW8zX2RiY2ssIGdwaW8yX2RiY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19v cHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayBncGlvM19pY2s7CitzdGF0aWMgc3RydWN0IGNsa19j b3JlIGdwaW8zX2ljazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBncGlvM19pY2tfaHcg PSB7CiAJLmh3ID0gewpAQCAtMTQ1NSw3ICsxNDU0LDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdf b21hcCBncGlvM19pY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKGdwaW8zX2ljaywgZ3Bp bzJfaWNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsg Z3BpbzRfZGJjazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgZ3BpbzRfZGJjazsKIAogc3RhdGlj IHN0cnVjdCBjbGtfaHdfb21hcCBncGlvNF9kYmNrX2h3ID0gewogCS5odyA9IHsKQEAgLTE0Njgs NyArMTQ2Nyw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgZ3BpbzRfZGJja19odyA9IHsK IAogREVGSU5FX1NUUlVDVF9DTEsoZ3BpbzRfZGJjaywgZ3BpbzJfZGJja19wYXJlbnRfbmFtZXMs IGFlczJfaWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGdwaW80X2ljazsKK3N0YXRpYyBz dHJ1Y3QgY2xrX2NvcmUgZ3BpbzRfaWNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGdw aW80X2lja19odyA9IHsKIAkuaHcgPSB7CkBAIC0xNDgyLDcgKzE0ODEsNyBAQCBzdGF0aWMgc3Ry dWN0IGNsa19od19vbWFwIGdwaW80X2lja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsoZ3Bp bzRfaWNrLCBncGlvMl9pY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwogCi1zdGF0aWMg c3RydWN0IGNsayBncGlvNV9kYmNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBncGlvNV9kYmNr OwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGdwaW81X2RiY2tfaHcgPSB7CiAJLmh3ID0g ewpAQCAtMTQ5NSw3ICsxNDk0LDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBncGlvNV9k YmNrX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyhncGlvNV9kYmNrLCBncGlvMl9kYmNrX3Bh cmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgZ3BpbzVfaWNr Oworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBncGlvNV9pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xr X2h3X29tYXAgZ3BpbzVfaWNrX2h3ID0gewogCS5odyA9IHsKQEAgLTE1MDksNyArMTUwOCw3IEBA IHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgZ3BpbzVfaWNrX2h3ID0gewogCiBERUZJTkVfU1RS VUNUX0NMSyhncGlvNV9pY2ssIGdwaW8yX2lja19wYXJlbnRfbmFtZXMsIGFlczJfaWNrX29wcyk7 CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGdwaW82X2RiY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3Jl IGdwaW82X2RiY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgZ3BpbzZfZGJja19odyA9 IHsKIAkuaHcgPSB7CkBAIC0xNTIyLDcgKzE1MjEsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19v bWFwIGdwaW82X2RiY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKGdwaW82X2RiY2ssIGdw aW8yX2RiY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNs ayBncGlvNl9pY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIGdwaW82X2ljazsKIAogc3RhdGlj IHN0cnVjdCBjbGtfaHdfb21hcCBncGlvNl9pY2tfaHcgPSB7CiAJLmh3ID0gewpAQCAtMTUzNiw3 ICsxNTM1LDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBncGlvNl9pY2tfaHcgPSB7CiAK IERFRklORV9TVFJVQ1RfQ0xLKGdwaW82X2ljaywgZ3BpbzJfaWNrX3BhcmVudF9uYW1lcywgYWVz Ml9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgZ3BtY19mY2s7CitzdGF0aWMgc3RydWN0 IGNsa19jb3JlIGdwbWNfZmNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGdwbWNfZmNr X2h3ID0gewogCS5odyA9IHsKQEAgLTE1NjUsNyArMTU2NCw3IEBAIERFRklORV9DTEtfT01BUF9N VVhfR0FURShncHQxMF9mY2ssICJjb3JlX2w0X2Nsa2RtIiwgb21hcDM0M3hfZ3B0X2Nsa3NlbCwK IAkJCSBPTUFQMzQzMF9FTl9HUFQxMF9TSElGVCwgJmNsa2h3b3BzX3dhaXQsCiAJCQkgZ3B0MTBf ZmNrX3BhcmVudF9uYW1lcywgY2xrb3V0Ml9zcmNfY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBj bGsgZ3B0MTBfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBncHQxMF9pY2s7CiAKIHN0YXRp YyBzdHJ1Y3QgY2xrX2h3X29tYXAgZ3B0MTBfaWNrX2h3ID0gewogCS5odyA9IHsKQEAgLTE1ODYs NyArMTU4NSw3IEBAIERFRklORV9DTEtfT01BUF9NVVhfR0FURShncHQxMV9mY2ssICJjb3JlX2w0 X2Nsa2RtIiwgb21hcDM0M3hfZ3B0X2Nsa3NlbCwKIAkJCSBPTUFQMzQzMF9FTl9HUFQxMV9TSElG VCwgJmNsa2h3b3BzX3dhaXQsCiAJCQkgZ3B0MTBfZmNrX3BhcmVudF9uYW1lcywgY2xrb3V0Ml9z cmNfY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgZ3B0MTFfaWNrOworc3RhdGljIHN0cnVj dCBjbGtfY29yZSBncHQxMV9pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgZ3B0MTFf aWNrX2h3ID0gewogCS5odyA9IHsKQEAgLTE2MDAsNyArMTU5OSw3IEBAIHN0YXRpYyBzdHJ1Y3Qg Y2xrX2h3X29tYXAgZ3B0MTFfaWNrX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyhncHQxMV9p Y2ssIGFlczJfaWNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVj dCBjbGsgZ3B0MTJfZmNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBncHQxMl9mY2s7CiAKIHN0 YXRpYyBjb25zdCBjaGFyICpncHQxMl9mY2tfcGFyZW50X25hbWVzW10gPSB7CiAJInNlY3VyZV8z MmtfZmNrIiwKQEAgLTE2MDksNyArMTYwOCw3IEBAIHN0YXRpYyBjb25zdCBjaGFyICpncHQxMl9m Y2tfcGFyZW50X25hbWVzW10gPSB7CiBERUZJTkVfU1RSVUNUX0NMS19IV19PTUFQKGdwdDEyX2Zj aywgIndrdXBfY2xrZG0iKTsKIERFRklORV9TVFJVQ1RfQ0xLKGdwdDEyX2ZjaywgZ3B0MTJfZmNr X3BhcmVudF9uYW1lcywgY29yZV9sNF9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgZ3B0 MTJfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBncHQxMl9pY2s7CiAKIHN0YXRpYyBzdHJ1 Y3QgY2xrX2h3X29tYXAgZ3B0MTJfaWNrX2h3ID0gewogCS5odyA9IHsKQEAgLTE2MzAsNyArMTYy OSw3IEBAIERFRklORV9DTEtfT01BUF9NVVhfR0FURShncHQxX2ZjaywgIndrdXBfY2xrZG0iLCBv bWFwMzQzeF9ncHRfY2xrc2VsLAogCQkJIE9NQVAzNDMwX0VOX0dQVDFfU0hJRlQsICZjbGtod29w c193YWl0LAogCQkJIGdwdDEwX2Zja19wYXJlbnRfbmFtZXMsIGNsa291dDJfc3JjX2NrX29wcyk7 CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGdwdDFfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBn cHQxX2ljazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBncHQxX2lja19odyA9IHsKIAku aHcgPSB7CkBAIC0xNjUxLDcgKzE2NTAsNyBAQCBERUZJTkVfQ0xLX09NQVBfTVVYX0dBVEUoZ3B0 Ml9mY2ssICJwZXJfY2xrZG0iLCBvbWFwMzQzeF9ncHRfY2xrc2VsLAogCQkJIE9NQVAzNDMwX0VO X0dQVDJfU0hJRlQsICZjbGtod29wc193YWl0LAogCQkJIGdwdDEwX2Zja19wYXJlbnRfbmFtZXMs IGNsa291dDJfc3JjX2NrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGdwdDJfaWNrOworc3Rh dGljIHN0cnVjdCBjbGtfY29yZSBncHQyX2ljazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21h cCBncHQyX2lja19odyA9IHsKIAkuaHcgPSB7CkBAIC0xNjcyLDcgKzE2NzEsNyBAQCBERUZJTkVf Q0xLX09NQVBfTVVYX0dBVEUoZ3B0M19mY2ssICJwZXJfY2xrZG0iLCBvbWFwMzQzeF9ncHRfY2xr c2VsLAogCQkJIE9NQVAzNDMwX0VOX0dQVDNfU0hJRlQsICZjbGtod29wc193YWl0LAogCQkJIGdw dDEwX2Zja19wYXJlbnRfbmFtZXMsIGNsa291dDJfc3JjX2NrX29wcyk7CiAKLXN0YXRpYyBzdHJ1 Y3QgY2xrIGdwdDNfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBncHQzX2ljazsKIAogc3Rh dGljIHN0cnVjdCBjbGtfaHdfb21hcCBncHQzX2lja19odyA9IHsKIAkuaHcgPSB7CkBAIC0xNjkz LDcgKzE2OTIsNyBAQCBERUZJTkVfQ0xLX09NQVBfTVVYX0dBVEUoZ3B0NF9mY2ssICJwZXJfY2xr ZG0iLCBvbWFwMzQzeF9ncHRfY2xrc2VsLAogCQkJIE9NQVAzNDMwX0VOX0dQVDRfU0hJRlQsICZj bGtod29wc193YWl0LAogCQkJIGdwdDEwX2Zja19wYXJlbnRfbmFtZXMsIGNsa291dDJfc3JjX2Nr X29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGdwdDRfaWNrOworc3RhdGljIHN0cnVjdCBjbGtf Y29yZSBncHQ0X2ljazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBncHQ0X2lja19odyA9 IHsKIAkuaHcgPSB7CkBAIC0xNzE0LDcgKzE3MTMsNyBAQCBERUZJTkVfQ0xLX09NQVBfTVVYX0dB VEUoZ3B0NV9mY2ssICJwZXJfY2xrZG0iLCBvbWFwMzQzeF9ncHRfY2xrc2VsLAogCQkJIE9NQVAz NDMwX0VOX0dQVDVfU0hJRlQsICZjbGtod29wc193YWl0LAogCQkJIGdwdDEwX2Zja19wYXJlbnRf bmFtZXMsIGNsa291dDJfc3JjX2NrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGdwdDVfaWNr Oworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBncHQ1X2ljazsKIAogc3RhdGljIHN0cnVjdCBjbGtf aHdfb21hcCBncHQ1X2lja19odyA9IHsKIAkuaHcgPSB7CkBAIC0xNzM1LDcgKzE3MzQsNyBAQCBE RUZJTkVfQ0xLX09NQVBfTVVYX0dBVEUoZ3B0Nl9mY2ssICJwZXJfY2xrZG0iLCBvbWFwMzQzeF9n cHRfY2xrc2VsLAogCQkJIE9NQVAzNDMwX0VOX0dQVDZfU0hJRlQsICZjbGtod29wc193YWl0LAog CQkJIGdwdDEwX2Zja19wYXJlbnRfbmFtZXMsIGNsa291dDJfc3JjX2NrX29wcyk7CiAKLXN0YXRp YyBzdHJ1Y3QgY2xrIGdwdDZfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBncHQ2X2ljazsK IAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBncHQ2X2lja19odyA9IHsKIAkuaHcgPSB7CkBA IC0xNzU2LDcgKzE3NTUsNyBAQCBERUZJTkVfQ0xLX09NQVBfTVVYX0dBVEUoZ3B0N19mY2ssICJw ZXJfY2xrZG0iLCBvbWFwMzQzeF9ncHRfY2xrc2VsLAogCQkJIE9NQVAzNDMwX0VOX0dQVDdfU0hJ RlQsICZjbGtod29wc193YWl0LAogCQkJIGdwdDEwX2Zja19wYXJlbnRfbmFtZXMsIGNsa291dDJf c3JjX2NrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGdwdDdfaWNrOworc3RhdGljIHN0cnVj dCBjbGtfY29yZSBncHQ3X2ljazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBncHQ3X2lj a19odyA9IHsKIAkuaHcgPSB7CkBAIC0xNzc3LDcgKzE3NzYsNyBAQCBERUZJTkVfQ0xLX09NQVBf TVVYX0dBVEUoZ3B0OF9mY2ssICJwZXJfY2xrZG0iLCBvbWFwMzQzeF9ncHRfY2xrc2VsLAogCQkJ IE9NQVAzNDMwX0VOX0dQVDhfU0hJRlQsICZjbGtod29wc193YWl0LAogCQkJIGdwdDEwX2Zja19w YXJlbnRfbmFtZXMsIGNsa291dDJfc3JjX2NrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGdw dDhfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBncHQ4X2ljazsKIAogc3RhdGljIHN0cnVj dCBjbGtfaHdfb21hcCBncHQ4X2lja19odyA9IHsKIAkuaHcgPSB7CkBAIC0xNzk4LDcgKzE3OTcs NyBAQCBERUZJTkVfQ0xLX09NQVBfTVVYX0dBVEUoZ3B0OV9mY2ssICJwZXJfY2xrZG0iLCBvbWFw MzQzeF9ncHRfY2xrc2VsLAogCQkJIE9NQVAzNDMwX0VOX0dQVDlfU0hJRlQsICZjbGtod29wc193 YWl0LAogCQkJIGdwdDEwX2Zja19wYXJlbnRfbmFtZXMsIGNsa291dDJfc3JjX2NrX29wcyk7CiAK LXN0YXRpYyBzdHJ1Y3QgY2xrIGdwdDlfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBncHQ5 X2ljazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBncHQ5X2lja19odyA9IHsKIAkuaHcg PSB7CkBAIC0xODEyLDcgKzE4MTEsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGdwdDlf aWNrX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyhncHQ5X2ljaywgZ3BpbzJfaWNrX3BhcmVu dF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgaGRxX2ZjazsKK3N0 YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgaGRxX2ZjazsKIAogc3RhdGljIGNvbnN0IGNoYXIgKmhkcV9m Y2tfcGFyZW50X25hbWVzW10gPSB7CiAJImNvcmVfMTJtX2ZjayIsCkBAIC0xODMwLDcgKzE4Mjks NyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGhkcV9mY2tfaHcgPSB7CiAKIERFRklORV9T VFJVQ1RfQ0xLKGhkcV9mY2ssIGhkcV9mY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwog Ci1zdGF0aWMgc3RydWN0IGNsayBoZHFfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBoZHFf aWNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGhkcV9pY2tfaHcgPSB7CiAJLmh3ID0g ewpAQCAtMTg0NCw3ICsxODQzLDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBoZHFfaWNr X2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyhoZHFfaWNrLCBhZXMyX2lja19wYXJlbnRfbmFt ZXMsIGFlczJfaWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGhlY2NfY2s7CitzdGF0aWMg c3RydWN0IGNsa19jb3JlIGhlY2NfY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgaGVj Y19ja19odyA9IHsKIAkuaHcgPSB7CkBAIC0xODU4LDcgKzE4NTcsNyBAQCBzdGF0aWMgc3RydWN0 IGNsa19od19vbWFwIGhlY2NfY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKGhlY2NfY2ss IGRwbGwzX2NrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBj bGsgaHNvdGd1c2JfZmNrX2FtMzV4eDsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgaHNvdGd1c2Jf ZmNrX2FtMzV4eDsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBoc290Z3VzYl9mY2tfYW0z NXh4X2h3ID0gewogCS5odyA9IHsKQEAgLTE4NzEsNyArMTg3MCw3IEBAIHN0YXRpYyBzdHJ1Y3Qg Y2xrX2h3X29tYXAgaHNvdGd1c2JfZmNrX2FtMzV4eF9odyA9IHsKIAogREVGSU5FX1NUUlVDVF9D TEsoaHNvdGd1c2JfZmNrX2FtMzV4eCwgZHBsbDNfY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19v cHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayBoc290Z3VzYl9pY2tfMzQzMGVzMTsKK3N0YXRpYyBz dHJ1Y3QgY2xrX2NvcmUgaHNvdGd1c2JfaWNrXzM0MzBlczE7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xr X2h3X29tYXAgaHNvdGd1c2JfaWNrXzM0MzBlczFfaHcgPSB7CiAJLmh3ID0gewpAQCAtMTg4NSw3 ICsxODg0LDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBoc290Z3VzYl9pY2tfMzQzMGVz MV9odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsoaHNvdGd1c2JfaWNrXzM0MzBlczEsIGlwc3Nf aWNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgaHNv dGd1c2JfaWNrXzM0MzBlczI7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIGhzb3RndXNiX2lja18z NDMwZXMyOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGhzb3RndXNiX2lja18zNDMwZXMy X2h3ID0gewogCS5odyA9IHsKQEAgLTE4OTksNyArMTg5OCw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xr X2h3X29tYXAgaHNvdGd1c2JfaWNrXzM0MzBlczJfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xL KGhzb3RndXNiX2lja18zNDMwZXMyLCBpcHNzX2lja19wYXJlbnRfbmFtZXMsIGFlczJfaWNrX29w cyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIGhzb3RndXNiX2lja19hbTM1eHg7CitzdGF0aWMgc3Ry dWN0IGNsa19jb3JlIGhzb3RndXNiX2lja19hbTM1eHg7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3 X29tYXAgaHNvdGd1c2JfaWNrX2FtMzV4eF9odyA9IHsKIAkuaHcgPSB7CkBAIC0xOTEzLDcgKzE5 MTIsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIGhzb3RndXNiX2lja19hbTM1eHhfaHcg PSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKGhzb3RndXNiX2lja19hbTM1eHgsIGVtYWNfaWNrX3Bh cmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgaTJjMV9mY2s7 CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIGkyYzFfZmNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19o d19vbWFwIGkyYzFfZmNrX2h3ID0gewogCS5odyA9IHsKQEAgLTE5MjcsNyArMTkyNiw3IEBAIHN0 YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgaTJjMV9mY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1Rf Q0xLKGkyYzFfZmNrLCBjc2kyXzk2bV9mY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwog Ci1zdGF0aWMgc3RydWN0IGNsayBpMmMxX2ljazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgaTJj MV9pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgaTJjMV9pY2tfaHcgPSB7CiAJLmh3 ID0gewpAQCAtMTk0MSw3ICsxOTQwLDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBpMmMx X2lja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsoaTJjMV9pY2ssIGFlczJfaWNrX3BhcmVu dF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgaTJjMl9mY2s7Citz dGF0aWMgc3RydWN0IGNsa19jb3JlIGkyYzJfZmNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19v bWFwIGkyYzJfZmNrX2h3ID0gewogCS5odyA9IHsKQEAgLTE5NTUsNyArMTk1NCw3IEBAIHN0YXRp YyBzdHJ1Y3QgY2xrX2h3X29tYXAgaTJjMl9mY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xL KGkyYzJfZmNrLCBjc2kyXzk2bV9mY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwogCi1z dGF0aWMgc3RydWN0IGNsayBpMmMyX2ljazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgaTJjMl9p Y2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgaTJjMl9pY2tfaHcgPSB7CiAJLmh3ID0g ewpAQCAtMTk2OSw3ICsxOTY4LDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBpMmMyX2lj a19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsoaTJjMl9pY2ssIGFlczJfaWNrX3BhcmVudF9u YW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgaTJjM19mY2s7CitzdGF0 aWMgc3RydWN0IGNsa19jb3JlIGkyYzNfZmNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFw IGkyYzNfZmNrX2h3ID0gewogCS5odyA9IHsKQEAgLTE5ODMsNyArMTk4Miw3IEBAIHN0YXRpYyBz dHJ1Y3QgY2xrX2h3X29tYXAgaTJjM19mY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKGky YzNfZmNrLCBjc2kyXzk2bV9mY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwogCi1zdGF0 aWMgc3RydWN0IGNsayBpMmMzX2ljazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgaTJjM19pY2s7 CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgaTJjM19pY2tfaHcgPSB7CiAJLmh3ID0gewpA QCAtMTk5Nyw3ICsxOTk2LDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBpMmMzX2lja19o dyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsoaTJjM19pY2ssIGFlczJfaWNrX3BhcmVudF9uYW1l cywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgaWNyX2ljazsKK3N0YXRpYyBz dHJ1Y3QgY2xrX2NvcmUgaWNyX2ljazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBpY3Jf aWNrX2h3ID0gewogCS5odyA9IHsKQEAgLTIwMTEsNyArMjAxMCw3IEBAIHN0YXRpYyBzdHJ1Y3Qg Y2xrX2h3X29tYXAgaWNyX2lja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsoaWNyX2ljaywg YWVzMl9pY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNs ayBpdmEyX2NrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBpdmEyX2NrOwogCiBzdGF0aWMgY29u c3QgY2hhciAqaXZhMl9ja19wYXJlbnRfbmFtZXNbXSA9IHsKIAkiZHBsbDJfbTJfY2siLApAQCAt MjAyOSw3ICsyMDI4LDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBpdmEyX2NrX2h3ID0g ewogCiBERUZJTkVfU1RSVUNUX0NMSyhpdmEyX2NrLCBpdmEyX2NrX3BhcmVudF9uYW1lcywgYWVz Ml9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgbWFkMmRfaWNrOworc3RhdGljIHN0cnVj dCBjbGtfY29yZSBtYWQyZF9pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgbWFkMmRf aWNrX2h3ID0gewogCS5odyA9IHsKQEAgLTIwNDMsNyArMjA0Miw3IEBAIHN0YXRpYyBzdHJ1Y3Qg Y2xrX2h3X29tYXAgbWFkMmRfaWNrX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyhtYWQyZF9p Y2ssIGNvcmVfbDNfaWNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0 cnVjdCBjbGsgbWFpbGJveGVzX2ljazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgbWFpbGJveGVz X2ljazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBtYWlsYm94ZXNfaWNrX2h3ID0gewog CS5odyA9IHsKQEAgLTIwODQsNyArMjA4Myw3IEBAIERFRklORV9DTEtfT01BUF9NVVhfR0FURSht Y2JzcDFfZmNrLCAiY29yZV9sNF9jbGtkbSIsIG1jYnNwXzE1X2Nsa3NlbCwKIAkJCSBPTUFQMzQz MF9FTl9NQ0JTUDFfU0hJRlQsICZjbGtod29wc193YWl0LAogCQkJIG1jYnNwMV9mY2tfcGFyZW50 X25hbWVzLCBjbGtvdXQyX3NyY19ja19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayBtY2JzcDFf aWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBtY2JzcDFfaWNrOwogCiBzdGF0aWMgc3RydWN0 IGNsa19od19vbWFwIG1jYnNwMV9pY2tfaHcgPSB7CiAJLmh3ID0gewpAQCAtMjA5OCw3ICsyMDk3 LDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBtY2JzcDFfaWNrX2h3ID0gewogCiBERUZJ TkVfU1RSVUNUX0NMSyhtY2JzcDFfaWNrLCBhZXMyX2lja19wYXJlbnRfbmFtZXMsIGFlczJfaWNr X29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIHBlcl85Nm1fZmNrOworc3RhdGljIHN0cnVjdCBj bGtfY29yZSBwZXJfOTZtX2ZjazsKIAogREVGSU5FX1NUUlVDVF9DTEtfSFdfT01BUChwZXJfOTZt X2ZjaywgInBlcl9jbGtkbSIpOwogREVGSU5FX1NUUlVDVF9DTEsocGVyXzk2bV9mY2ssIGNtXzk2 bV9mY2tfcGFyZW50X25hbWVzLCBjb3JlX2w0X2lja19vcHMpOwpAQCAtMjEyMCw3ICsyMTE5LDcg QEAgREVGSU5FX0NMS19PTUFQX01VWF9HQVRFKG1jYnNwMl9mY2ssICJwZXJfY2xrZG0iLCBtY2Jz cF8yMzRfY2xrc2VsLAogCQkJIE9NQVAzNDMwX0VOX01DQlNQMl9TSElGVCwgJmNsa2h3b3BzX3dh aXQsCiAJCQkgbWNic3AyX2Zja19wYXJlbnRfbmFtZXMsIGNsa291dDJfc3JjX2NrX29wcyk7CiAK LXN0YXRpYyBzdHJ1Y3QgY2xrIG1jYnNwMl9pY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIG1j YnNwMl9pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgbWNic3AyX2lja19odyA9IHsK IAkuaHcgPSB7CkBAIC0yMTQxLDcgKzIxNDAsNyBAQCBERUZJTkVfQ0xLX09NQVBfTVVYX0dBVEUo bWNic3AzX2ZjaywgInBlcl9jbGtkbSIsIG1jYnNwXzIzNF9jbGtzZWwsCiAJCQkgT01BUDM0MzBf RU5fTUNCU1AzX1NISUZULCAmY2xraHdvcHNfd2FpdCwKIAkJCSBtY2JzcDJfZmNrX3BhcmVudF9u YW1lcywgY2xrb3V0Ml9zcmNfY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgbWNic3AzX2lj azsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgbWNic3AzX2ljazsKIAogc3RhdGljIHN0cnVjdCBj bGtfaHdfb21hcCBtY2JzcDNfaWNrX2h3ID0gewogCS5odyA9IHsKQEAgLTIxNjIsNyArMjE2MSw3 IEBAIERFRklORV9DTEtfT01BUF9NVVhfR0FURShtY2JzcDRfZmNrLCAicGVyX2Nsa2RtIiwgbWNi c3BfMjM0X2Nsa3NlbCwKIAkJCSBPTUFQMzQzMF9FTl9NQ0JTUDRfU0hJRlQsICZjbGtod29wc193 YWl0LAogCQkJIG1jYnNwMl9mY2tfcGFyZW50X25hbWVzLCBjbGtvdXQyX3NyY19ja19vcHMpOwog Ci1zdGF0aWMgc3RydWN0IGNsayBtY2JzcDRfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBt Y2JzcDRfaWNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIG1jYnNwNF9pY2tfaHcgPSB7 CiAJLmh3ID0gewpAQCAtMjE4Myw3ICsyMTgyLDcgQEAgREVGSU5FX0NMS19PTUFQX01VWF9HQVRF KG1jYnNwNV9mY2ssICJjb3JlX2w0X2Nsa2RtIiwgbWNic3BfMTVfY2xrc2VsLAogCQkJIE9NQVAz NDMwX0VOX01DQlNQNV9TSElGVCwgJmNsa2h3b3BzX3dhaXQsCiAJCQkgbWNic3AxX2Zja19wYXJl bnRfbmFtZXMsIGNsa291dDJfc3JjX2NrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIG1jYnNw NV9pY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIG1jYnNwNV9pY2s7CiAKIHN0YXRpYyBzdHJ1 Y3QgY2xrX2h3X29tYXAgbWNic3A1X2lja19odyA9IHsKIAkuaHcgPSB7CkBAIC0yMTk3LDcgKzIx OTYsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIG1jYnNwNV9pY2tfaHcgPSB7CiAKIERF RklORV9TVFJVQ1RfQ0xLKG1jYnNwNV9pY2ssIGFlczJfaWNrX3BhcmVudF9uYW1lcywgYWVzMl9p Y2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgbWNzcGkxX2ZjazsKK3N0YXRpYyBzdHJ1Y3Qg Y2xrX2NvcmUgbWNzcGkxX2ZjazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBtY3NwaTFf ZmNrX2h3ID0gewogCS5odyA9IHsKQEAgLTIyMTEsNyArMjIxMCw3IEBAIHN0YXRpYyBzdHJ1Y3Qg Y2xrX2h3X29tYXAgbWNzcGkxX2Zja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsobWNzcGkx X2ZjaywgZnNob3N0dXNiX2Zja19wYXJlbnRfbmFtZXMsIGFlczJfaWNrX29wcyk7CiAKLXN0YXRp YyBzdHJ1Y3QgY2xrIG1jc3BpMV9pY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIG1jc3BpMV9p Y2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgbWNzcGkxX2lja19odyA9IHsKIAkuaHcg PSB7CkBAIC0yMjI1LDcgKzIyMjQsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIG1jc3Bp MV9pY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKG1jc3BpMV9pY2ssIGFlczJfaWNrX3Bh cmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgbWNzcGkyX2Zj azsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgbWNzcGkyX2ZjazsKIAogc3RhdGljIHN0cnVjdCBj bGtfaHdfb21hcCBtY3NwaTJfZmNrX2h3ID0gewogCS5odyA9IHsKQEAgLTIyMzksNyArMjIzOCw3 IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgbWNzcGkyX2Zja19odyA9IHsKIAogREVGSU5F X1NUUlVDVF9DTEsobWNzcGkyX2ZjaywgZnNob3N0dXNiX2Zja19wYXJlbnRfbmFtZXMsIGFlczJf aWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIG1jc3BpMl9pY2s7CitzdGF0aWMgc3RydWN0 IGNsa19jb3JlIG1jc3BpMl9pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgbWNzcGky X2lja19odyA9IHsKIAkuaHcgPSB7CkBAIC0yMjUzLDcgKzIyNTIsNyBAQCBzdGF0aWMgc3RydWN0 IGNsa19od19vbWFwIG1jc3BpMl9pY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKG1jc3Bp Ml9pY2ssIGFlczJfaWNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0 cnVjdCBjbGsgbWNzcGkzX2ZjazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgbWNzcGkzX2ZjazsK IAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBtY3NwaTNfZmNrX2h3ID0gewogCS5odyA9IHsK QEAgLTIyNjcsNyArMjI2Niw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgbWNzcGkzX2Zj a19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsobWNzcGkzX2ZjaywgZnNob3N0dXNiX2Zja19w YXJlbnRfbmFtZXMsIGFlczJfaWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIG1jc3BpM19p Y2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIG1jc3BpM19pY2s7CiAKIHN0YXRpYyBzdHJ1Y3Qg Y2xrX2h3X29tYXAgbWNzcGkzX2lja19odyA9IHsKIAkuaHcgPSB7CkBAIC0yMjgxLDcgKzIyODAs NyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIG1jc3BpM19pY2tfaHcgPSB7CiAKIERFRklO RV9TVFJVQ1RfQ0xLKG1jc3BpM19pY2ssIGFlczJfaWNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tf b3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgbWNzcGk0X2ZjazsKK3N0YXRpYyBzdHJ1Y3QgY2xr X2NvcmUgbWNzcGk0X2ZjazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBtY3NwaTRfZmNr X2h3ID0gewogCS5odyA9IHsKQEAgLTIyOTUsNyArMjI5NCw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xr X2h3X29tYXAgbWNzcGk0X2Zja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsobWNzcGk0X2Zj aywgZnNob3N0dXNiX2Zja19wYXJlbnRfbmFtZXMsIGFlczJfaWNrX29wcyk7CiAKLXN0YXRpYyBz dHJ1Y3QgY2xrIG1jc3BpNF9pY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIG1jc3BpNF9pY2s7 CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgbWNzcGk0X2lja19odyA9IHsKIAkuaHcgPSB7 CkBAIC0yMzA5LDcgKzIzMDgsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIG1jc3BpNF9p Y2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKG1jc3BpNF9pY2ssIGFlczJfaWNrX3BhcmVu dF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgbW1jaHMxX2ZjazsK K3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgbW1jaHMxX2ZjazsKIAogc3RhdGljIHN0cnVjdCBjbGtf aHdfb21hcCBtbWNoczFfZmNrX2h3ID0gewogCS5odyA9IHsKQEAgLTIzMjMsNyArMjMyMiw3IEBA IHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgbW1jaHMxX2Zja19odyA9IHsKIAogREVGSU5FX1NU UlVDVF9DTEsobW1jaHMxX2ZjaywgY3NpMl85Nm1fZmNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tf b3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgbW1jaHMxX2ljazsKK3N0YXRpYyBzdHJ1Y3QgY2xr X2NvcmUgbW1jaHMxX2ljazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBtbWNoczFfaWNr X2h3ID0gewogCS5odyA9IHsKQEAgLTIzMzcsNyArMjMzNiw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xr X2h3X29tYXAgbW1jaHMxX2lja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsobW1jaHMxX2lj aywgYWVzMl9pY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwogCi1zdGF0aWMgc3RydWN0 IGNsayBtbWNoczJfZmNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBtbWNoczJfZmNrOwogCiBz dGF0aWMgc3RydWN0IGNsa19od19vbWFwIG1tY2hzMl9mY2tfaHcgPSB7CiAJLmh3ID0gewpAQCAt MjM1MSw3ICsyMzUwLDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBtbWNoczJfZmNrX2h3 ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyhtbWNoczJfZmNrLCBjc2kyXzk2bV9mY2tfcGFyZW50 X25hbWVzLCBhZXMyX2lja19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayBtbWNoczJfaWNrOwor c3RhdGljIHN0cnVjdCBjbGtfY29yZSBtbWNoczJfaWNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19o d19vbWFwIG1tY2hzMl9pY2tfaHcgPSB7CiAJLmh3ID0gewpAQCAtMjM2NSw3ICsyMzY0LDcgQEAg c3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBtbWNoczJfaWNrX2h3ID0gewogCiBERUZJTkVfU1RS VUNUX0NMSyhtbWNoczJfaWNrLCBhZXMyX2lja19wYXJlbnRfbmFtZXMsIGFlczJfaWNrX29wcyk7 CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIG1tY2hzM19mY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3Jl IG1tY2hzM19mY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgbW1jaHMzX2Zja19odyA9 IHsKIAkuaHcgPSB7CkBAIC0yMzc5LDcgKzIzNzgsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19v bWFwIG1tY2hzM19mY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKG1tY2hzM19mY2ssIGNz aTJfOTZtX2Zja19wYXJlbnRfbmFtZXMsIGFlczJfaWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3Qg Y2xrIG1tY2hzM19pY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIG1tY2hzM19pY2s7CiAKIHN0 YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgbW1jaHMzX2lja19odyA9IHsKIAkuaHcgPSB7CkBAIC0y MzkzLDcgKzIzOTIsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIG1tY2hzM19pY2tfaHcg PSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKG1tY2hzM19pY2ssIGFlczJfaWNrX3BhcmVudF9uYW1l cywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgbW9kZW1fZmNrOworc3RhdGlj IHN0cnVjdCBjbGtfY29yZSBtb2RlbV9mY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAg bW9kZW1fZmNrX2h3ID0gewogCS5odyA9IHsKQEAgLTI0MDcsNyArMjQwNiw3IEBAIHN0YXRpYyBz dHJ1Y3QgY2xrX2h3X29tYXAgbW9kZW1fZmNrX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyht b2RlbV9mY2ssIGRwbGwzX2NrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGlj IHN0cnVjdCBjbGsgbXNwcm9fZmNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBtc3Byb19mY2s7 CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgbXNwcm9fZmNrX2h3ID0gewogCS5odyA9IHsK QEAgLTI0MjEsNyArMjQyMCw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgbXNwcm9fZmNr X2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyhtc3Byb19mY2ssIGNzaTJfOTZtX2Zja19wYXJl bnRfbmFtZXMsIGFlczJfaWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIG1zcHJvX2ljazsK K3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgbXNwcm9faWNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19o d19vbWFwIG1zcHJvX2lja19odyA9IHsKIAkuaHcgPSB7CkBAIC0yNDM1LDEzICsyNDM0LDEzIEBA IHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgbXNwcm9faWNrX2h3ID0gewogCiBERUZJTkVfU1RS VUNUX0NMSyhtc3Byb19pY2ssIGFlczJfaWNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsK IAotc3RhdGljIHN0cnVjdCBjbGsgb21hcF8xOTJtX2Fsd29uX2ZjazsKK3N0YXRpYyBzdHJ1Y3Qg Y2xrX2NvcmUgb21hcF8xOTJtX2Fsd29uX2ZjazsKIAogREVGSU5FX1NUUlVDVF9DTEtfSFdfT01B UChvbWFwXzE5Mm1fYWx3b25fZmNrLCBOVUxMKTsKIERFRklORV9TVFJVQ1RfQ0xLKG9tYXBfMTky bV9hbHdvbl9mY2ssIG9tYXBfOTZtX2Fsd29uX2Zja19wYXJlbnRfbmFtZXMsCiAJCSAgY29yZV9j a19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayBvbWFwXzMya3N5bmNfaWNrOworc3RhdGljIHN0 cnVjdCBjbGtfY29yZSBvbWFwXzMya3N5bmNfaWNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19v bWFwIG9tYXBfMzJrc3luY19pY2tfaHcgPSB7CiAJLmh3ID0gewpAQCAtMjQ2Niw3ICsyNDY1LDcg QEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtzZWwgb21hcF85Nm1fYWx3b25fZmNrX2Nsa3NlbFtd ID0gewogCXsgLnBhcmVudCA9IE5VTEwgfQogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgb21hcF85 Nm1fYWx3b25fZmNrXzM2MzA7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIG9tYXBfOTZtX2Fsd29u X2Zja18zNjMwOwogCiBzdGF0aWMgY29uc3QgY2hhciAqb21hcF85Nm1fYWx3b25fZmNrXzM2MzBf cGFyZW50X25hbWVzW10gPSB7CiAJIm9tYXBfMTkybV9hbHdvbl9mY2siLApAQCAtMjQ4Nyw3ICsy NDg2LDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBvbWFwXzk2bV9hbHdvbl9mY2tfMzYz MF9odyA9IHsKIAkuY2xrc2VsX21hc2sJPSBPTUFQMzYzMF9DTEtTRUxfOTZNX01BU0ssCiB9Owog Ci1zdGF0aWMgc3RydWN0IGNsayBvbWFwXzk2bV9hbHdvbl9mY2tfMzYzMCA9IHsKK3N0YXRpYyBz dHJ1Y3QgY2xrX2NvcmUgb21hcF85Nm1fYWx3b25fZmNrXzM2MzAgPSB7CiAJLm5hbWUJPSAib21h cF85Nm1fYWx3b25fZmNrIiwKIAkuaHcJPSAmb21hcF85Nm1fYWx3b25fZmNrXzM2MzBfaHcuaHcs CiAJLnBhcmVudF9uYW1lcwk9IG9tYXBfOTZtX2Fsd29uX2Zja18zNjMwX3BhcmVudF9uYW1lcywK QEAgLTI0OTUsNyArMjQ5NCw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrIG9tYXBfOTZtX2Fsd29uX2Zj a18zNjMwID0gewogCS5vcHMJPSAmb21hcF85Nm1fYWx3b25fZmNrXzM2MzBfb3BzLAogfTsKIAot c3RhdGljIHN0cnVjdCBjbGsgb21hcGN0cmxfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBv bWFwY3RybF9pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgb21hcGN0cmxfaWNrX2h3 ID0gewogCS5odyA9IHsKQEAgLTI1MjAsMTcgKzI1MTksMTcgQEAgREVGSU5FX0NMS19ESVZJREVS KHBjbGt4Ml9mY2ssICJlbXVfc3JjX2NrIiwgJmVtdV9zcmNfY2ssIDB4MCwKIAkJICAgT01BUDM0 MzBfQ0xLU0VMX1BDTEtYMl9TSElGVCwgT01BUDM0MzBfQ0xLU0VMX1BDTEtYMl9XSURUSCwKIAkJ ICAgQ0xLX0RJVklERVJfT05FX0JBU0VELCBOVUxMKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgcGVy XzQ4bV9mY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIHBlcl80OG1fZmNrOwogCiBERUZJTkVf U1RSVUNUX0NMS19IV19PTUFQKHBlcl80OG1fZmNrLCAicGVyX2Nsa2RtIik7CiBERUZJTkVfU1RS VUNUX0NMSyhwZXJfNDhtX2ZjaywgY29yZV80OG1fZmNrX3BhcmVudF9uYW1lcywgY29yZV9sNF9p Y2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgc2VjdXJpdHlfbDNfaWNrOworc3RhdGljIHN0 cnVjdCBjbGtfY29yZSBzZWN1cml0eV9sM19pY2s7CiAKIERFRklORV9TVFJVQ1RfQ0xLX0hXX09N QVAoc2VjdXJpdHlfbDNfaWNrLCBOVUxMKTsKIERFRklORV9TVFJVQ1RfQ0xLKHNlY3VyaXR5X2wz X2ljaywgY29yZV9sM19pY2tfcGFyZW50X25hbWVzLCBjb3JlX2NrX29wcyk7CiAKLXN0YXRpYyBz dHJ1Y3QgY2xrIHBrYV9pY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIHBrYV9pY2s7CiAKIHN0 YXRpYyBjb25zdCBjaGFyICpwa2FfaWNrX3BhcmVudF9uYW1lc1tdID0gewogCSJzZWN1cml0eV9s M19pY2siLApAQCAtMjU1Miw3ICsyNTUxLDcgQEAgREVGSU5FX0NMS19ESVZJREVSKHJtX2ljaywg Imw0X2ljayIsICZsNF9pY2ssIDB4MCwKIAkJICAgT01BUDM0MzBfQ0xLU0VMX1JNX1NISUZULCBP TUFQMzQzMF9DTEtTRUxfUk1fV0lEVEgsCiAJCSAgIENMS19ESVZJREVSX09ORV9CQVNFRCwgTlVM TCk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIHJuZ19pY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3Jl IHJuZ19pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgcm5nX2lja19odyA9IHsKIAku aHcgPSB7CkBAIC0yNTY1LDcgKzI1NjQsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIHJu Z19pY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKHJuZ19pY2ssIGFlczFfaWNrX3BhcmVu dF9uYW1lcywgYWVzMV9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgc2FkMmRfaWNrOwor c3RhdGljIHN0cnVjdCBjbGtfY29yZSBzYWQyZF9pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3 X29tYXAgc2FkMmRfaWNrX2h3ID0gewogCS5odyA9IHsKQEAgLTI1NzksNyArMjU3OCw3IEBAIHN0 YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgc2FkMmRfaWNrX2h3ID0gewogCiBERUZJTkVfU1RSVUNU X0NMSyhzYWQyZF9pY2ssIGNvcmVfbDNfaWNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsK IAotc3RhdGljIHN0cnVjdCBjbGsgc2RyY19pY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIHNk cmNfaWNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIHNkcmNfaWNrX2h3ID0gewogCS5o dyA9IHsKQEAgLTI2MzAsNyArMjYyOSw3IEBAIHN0YXRpYyBjb25zdCBjaGFyICpzZ3hfZmNrX3Bh cmVudF9uYW1lc1tdID0gewogCSJjb3JlX2NrIiwgImNtXzk2bV9mY2siLCAib21hcF8xOTJtX2Fs d29uX2ZjayIsICJjb3JleDJfZmNrIiwKIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIHNneF9mY2s7 CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIHNneF9mY2s7CiAKIHN0YXRpYyBjb25zdCBzdHJ1Y3Qg Y2xrX29wcyBzZ3hfZmNrX29wcyA9IHsKIAkuaW5pdAkJPSAmb21hcDJfaW5pdF9jbGtfY2xrZG0s CkBAIC0yNjUxLDcgKzI2NTAsNyBAQCBERUZJTkVfQ0xLX09NQVBfTVVYX0dBVEUoc2d4X2Zjaywg InNneF9jbGtkbSIsIHNneF9jbGtzZWwsCiAJCQkgT01BUDM0MzBFUzJfQ01fRkNMS0VOX1NHWF9F Tl9TR1hfU0hJRlQsCiAJCQkgJmNsa2h3b3BzX3dhaXQsIHNneF9mY2tfcGFyZW50X25hbWVzLCBz Z3hfZmNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIHNneF9pY2s7CitzdGF0aWMgc3RydWN0 IGNsa19jb3JlIHNneF9pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgc2d4X2lja19o dyA9IHsKIAkuaHcgPSB7CkBAIC0yNjY1LDcgKzI2NjQsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19o d19vbWFwIHNneF9pY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKHNneF9pY2ssIGNvcmVf bDNfaWNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsg c2hhMTFfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBzaGExMV9pY2s7CiAKIHN0YXRpYyBz dHJ1Y3QgY2xrX2h3X29tYXAgc2hhMTFfaWNrX2h3ID0gewogCS5odyA9IHsKQEAgLTI2NzgsNyAr MjY3Nyw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgc2hhMTFfaWNrX2h3ID0gewogCiBE RUZJTkVfU1RSVUNUX0NMSyhzaGExMV9pY2ssIGFlczFfaWNrX3BhcmVudF9uYW1lcywgYWVzMV9p Y2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgc2hhMTJfaWNrOworc3RhdGljIHN0cnVjdCBj bGtfY29yZSBzaGExMl9pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgc2hhMTJfaWNr X2h3ID0gewogCS5odyA9IHsKQEAgLTI2OTIsNyArMjY5MSw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xr X2h3X29tYXAgc2hhMTJfaWNrX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyhzaGExMl9pY2ss IGFlczJfaWNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBj bGsgc3IxX2ZjazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgc3IxX2ZjazsKIAogc3RhdGljIHN0 cnVjdCBjbGtfaHdfb21hcCBzcjFfZmNrX2h3ID0gewogCS5odyA9IHsKQEAgLTI3MDYsNyArMjcw NSw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgc3IxX2Zja19odyA9IHsKIAogREVGSU5F X1NUUlVDVF9DTEsoc3IxX2ZjaywgZHBsbDNfY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19vcHMp OwogCi1zdGF0aWMgc3RydWN0IGNsayBzcjJfZmNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSBz cjJfZmNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIHNyMl9mY2tfaHcgPSB7CiAJLmh3 ID0gewpAQCAtMjcyMCwxNyArMjcxOSwxNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIHNy Ml9mY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKHNyMl9mY2ssIGRwbGwzX2NrX3BhcmVu dF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgc3JfbDRfaWNrOwor c3RhdGljIHN0cnVjdCBjbGtfY29yZSBzcl9sNF9pY2s7CiAKIERFRklORV9TVFJVQ1RfQ0xLX0hX X09NQVAoc3JfbDRfaWNrLCAiY29yZV9sNF9jbGtkbSIpOwogREVGSU5FX1NUUlVDVF9DTEsoc3Jf bDRfaWNrLCBzZWN1cml0eV9sNF9pY2syX3BhcmVudF9uYW1lcywgY29yZV9sNF9pY2tfb3BzKTsK IAotc3RhdGljIHN0cnVjdCBjbGsgc3NpX2w0X2ljazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUg c3NpX2w0X2ljazsKIAogREVGSU5FX1NUUlVDVF9DTEtfSFdfT01BUChzc2lfbDRfaWNrLCAiY29y ZV9sNF9jbGtkbSIpOwogREVGSU5FX1NUUlVDVF9DTEsoc3NpX2w0X2ljaywgc2VjdXJpdHlfbDRf aWNrMl9wYXJlbnRfbmFtZXMsIGNvcmVfbDRfaWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xr IHNzaV9pY2tfMzQzMGVzMTsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgc3NpX2lja18zNDMwZXMx OwogCiBzdGF0aWMgY29uc3QgY2hhciAqc3NpX2lja18zNDMwZXMxX3BhcmVudF9uYW1lc1tdID0g ewogCSJzc2lfbDRfaWNrIiwKQEAgLTI3NDgsNyArMjc0Nyw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xr X2h3X29tYXAgc3NpX2lja18zNDMwZXMxX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyhzc2lf aWNrXzM0MzBlczEsIHNzaV9pY2tfMzQzMGVzMV9wYXJlbnRfbmFtZXMsIGFlczJfaWNrX29wcyk7 CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIHNzaV9pY2tfMzQzMGVzMjsKK3N0YXRpYyBzdHJ1Y3QgY2xr X2NvcmUgc3NpX2lja18zNDMwZXMyOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIHNzaV9p Y2tfMzQzMGVzMl9odyA9IHsKIAkuaHcgPSB7CkBAIC0yODEzLDcgKzI4MTIsNyBAQCBERUZJTkVf Q0xLX0ZJWEVEX0ZBQ1RPUihzc2lfc3N0X2Zja18zNDMwZXMxLCAic3NpX3Nzcl9mY2tfMzQzMGVz MSIsCiBERUZJTkVfQ0xLX0ZJWEVEX0ZBQ1RPUihzc2lfc3N0X2Zja18zNDMwZXMyLCAic3NpX3Nz cl9mY2tfMzQzMGVzMiIsCiAJCQkmc3NpX3Nzcl9mY2tfMzQzMGVzMiwgMHgwLCAxLCAyKTsKIAot c3RhdGljIHN0cnVjdCBjbGsgc3lzX2Nsa291dDE7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIHN5 c19jbGtvdXQxOwogCiBzdGF0aWMgY29uc3QgY2hhciAqc3lzX2Nsa291dDFfcGFyZW50X25hbWVz W10gPSB7CiAJIm9zY19zeXNfY2siLApAQCAtMjg0Myw3ICsyODQyLDcgQEAgREVGSU5FX0NMS19E SVZJREVSKHRyYWNlY2xrX2ZjaywgInRyYWNlY2xrX3NyY19mY2siLCAmdHJhY2VjbGtfc3JjX2Zj aywgMHgwLAogCQkgICBPTUFQMzQzMF9DTEtTRUxfVFJBQ0VDTEtfU0hJRlQsCiAJCSAgIE9NQVAz NDMwX0NMS1NFTF9UUkFDRUNMS19XSURUSCwgQ0xLX0RJVklERVJfT05FX0JBU0VELCBOVUxMKTsK IAotc3RhdGljIHN0cnVjdCBjbGsgdHNfZmNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSB0c19m Y2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgdHNfZmNrX2h3ID0gewogCS5odyA9IHsK QEAgLTI4NTYsNyArMjg1NSw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgdHNfZmNrX2h3 ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyh0c19mY2ssIHdrdXBfMzJrX2Zja19wYXJlbnRfbmFt ZXMsIGFlczJfaWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIHVhcnQxX2ZjazsKK3N0YXRp YyBzdHJ1Y3QgY2xrX2NvcmUgdWFydDFfZmNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFw IHVhcnQxX2Zja19odyA9IHsKIAkuaHcgPSB7CkBAIC0yODcwLDcgKzI4NjksNyBAQCBzdGF0aWMg c3RydWN0IGNsa19od19vbWFwIHVhcnQxX2Zja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEso dWFydDFfZmNrLCBmc2hvc3R1c2JfZmNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAot c3RhdGljIHN0cnVjdCBjbGsgdWFydDFfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSB1YXJ0 MV9pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgdWFydDFfaWNrX2h3ID0gewogCS5o dyA9IHsKQEAgLTI4ODQsNyArMjg4Myw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgdWFy dDFfaWNrX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyh1YXJ0MV9pY2ssIGFlczJfaWNrX3Bh cmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgdWFydDJfZmNr Oworc3RhdGljIHN0cnVjdCBjbGtfY29yZSB1YXJ0Ml9mY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xr X2h3X29tYXAgdWFydDJfZmNrX2h3ID0gewogCS5odyA9IHsKQEAgLTI4OTgsNyArMjg5Nyw3IEBA IHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgdWFydDJfZmNrX2h3ID0gewogCiBERUZJTkVfU1RS VUNUX0NMSyh1YXJ0Ml9mY2ssIGZzaG9zdHVzYl9mY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19v cHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayB1YXJ0Ml9pY2s7CitzdGF0aWMgc3RydWN0IGNsa19j b3JlIHVhcnQyX2ljazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCB1YXJ0Ml9pY2tfaHcg PSB7CiAJLmh3ID0gewpAQCAtMjkxMiw3ICsyOTExLDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdf b21hcCB1YXJ0Ml9pY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKHVhcnQyX2ljaywgYWVz Ml9pY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayB1 YXJ0M19mY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIHVhcnQzX2ZjazsKIAogc3RhdGljIGNv bnN0IGNoYXIgKnVhcnQzX2Zja19wYXJlbnRfbmFtZXNbXSA9IHsKIAkicGVyXzQ4bV9mY2siLApA QCAtMjkzMCw3ICsyOTI5LDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCB1YXJ0M19mY2tf aHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKHVhcnQzX2ZjaywgdWFydDNfZmNrX3BhcmVudF9u YW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgdWFydDNfaWNrOworc3Rh dGljIHN0cnVjdCBjbGtfY29yZSB1YXJ0M19pY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29t YXAgdWFydDNfaWNrX2h3ID0gewogCS5odyA9IHsKQEAgLTI5NDQsNyArMjk0Myw3IEBAIHN0YXRp YyBzdHJ1Y3QgY2xrX2h3X29tYXAgdWFydDNfaWNrX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NM Syh1YXJ0M19pY2ssIGdwaW8yX2lja19wYXJlbnRfbmFtZXMsIGFlczJfaWNrX29wcyk7CiAKLXN0 YXRpYyBzdHJ1Y3QgY2xrIHVhcnQ0X2ZjazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgdWFydDRf ZmNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIHVhcnQ0X2Zja19odyA9IHsKIAkuaHcg PSB7CkBAIC0yOTU4LDcgKzI5NTcsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIHVhcnQ0 X2Zja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsodWFydDRfZmNrLCB1YXJ0M19mY2tfcGFy ZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayB1YXJ0NF9mY2tf YW0zNXh4Oworc3RhdGljIHN0cnVjdCBjbGtfY29yZSB1YXJ0NF9mY2tfYW0zNXh4OwogCiBzdGF0 aWMgc3RydWN0IGNsa19od19vbWFwIHVhcnQ0X2Zja19hbTM1eHhfaHcgPSB7CiAJLmh3ID0gewpA QCAtMjk3Miw3ICsyOTcxLDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCB1YXJ0NF9mY2tf YW0zNXh4X2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyh1YXJ0NF9mY2tfYW0zNXh4LCBmc2hv c3R1c2JfZmNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBj bGsgdWFydDRfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSB1YXJ0NF9pY2s7CiAKIHN0YXRp YyBzdHJ1Y3QgY2xrX2h3X29tYXAgdWFydDRfaWNrX2h3ID0gewogCS5odyA9IHsKQEAgLTI5ODYs NyArMjk4NSw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgdWFydDRfaWNrX2h3ID0gewog CiBERUZJTkVfU1RSVUNUX0NMSyh1YXJ0NF9pY2ssIGdwaW8yX2lja19wYXJlbnRfbmFtZXMsIGFl czJfaWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIHVhcnQ0X2lja19hbTM1eHg7CitzdGF0 aWMgc3RydWN0IGNsa19jb3JlIHVhcnQ0X2lja19hbTM1eHg7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xr X2h3X29tYXAgdWFydDRfaWNrX2FtMzV4eF9odyA9IHsKIAkuaHcgPSB7CkBAIC0zMDIzLDcgKzMw MjIsNyBAQCBERUZJTkVfQ0xLX09NQVBfTVVYX0dBVEUodXNiX2w0X2ljaywgImNvcmVfbDRfY2xr ZG0iLCB1c2JfbDRfY2xrc2VsLAogCQkJICZjbGtod29wc19pY2xrX3dhaXQsIHVzYl9sNF9pY2tf cGFyZW50X25hbWVzLAogCQkJIHNzaV9zc3JfZmNrXzM0MzBlczFfb3BzKTsKIAotc3RhdGljIHN0 cnVjdCBjbGsgdXNiaG9zdF8xMjBtX2ZjazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgdXNiaG9z dF8xMjBtX2ZjazsKIAogc3RhdGljIGNvbnN0IGNoYXIgKnVzYmhvc3RfMTIwbV9mY2tfcGFyZW50 X25hbWVzW10gPSB7CiAJImRwbGw1X20yX2NrIiwKQEAgLTMwNDEsNyArMzA0MCw3IEBAIHN0YXRp YyBzdHJ1Y3QgY2xrX2h3X29tYXAgdXNiaG9zdF8xMjBtX2Zja19odyA9IHsKIERFRklORV9TVFJV Q1RfQ0xLKHVzYmhvc3RfMTIwbV9mY2ssIHVzYmhvc3RfMTIwbV9mY2tfcGFyZW50X25hbWVzLAog CQkgIGFlczJfaWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrIHVzYmhvc3RfNDhtX2ZjazsK K3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgdXNiaG9zdF80OG1fZmNrOwogCiBzdGF0aWMgc3RydWN0 IGNsa19od19vbWFwIHVzYmhvc3RfNDhtX2Zja19odyA9IHsKIAkuaHcgPSB7CkBAIC0zMDU1LDcg KzMwNTQsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIHVzYmhvc3RfNDhtX2Zja19odyA9 IHsKIAogREVGSU5FX1NUUlVDVF9DTEsodXNiaG9zdF80OG1fZmNrLCBjb3JlXzQ4bV9mY2tfcGFy ZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayB1c2Job3N0X2lj azsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgdXNiaG9zdF9pY2s7CiAKIHN0YXRpYyBzdHJ1Y3Qg Y2xrX2h3X29tYXAgdXNiaG9zdF9pY2tfaHcgPSB7CiAJLmh3ID0gewpAQCAtMzA2OSw3ICszMDY4 LDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCB1c2Job3N0X2lja19odyA9IHsKIAogREVG SU5FX1NUUlVDVF9DTEsodXNiaG9zdF9pY2ssIHNlY3VyaXR5X2w0X2ljazJfcGFyZW50X25hbWVz LCBhZXMyX2lja19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayB1c2J0bGxfZmNrOworc3RhdGlj IHN0cnVjdCBjbGtfY29yZSB1c2J0bGxfZmNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFw IHVzYnRsbF9mY2tfaHcgPSB7CiAJLmh3ID0gewpAQCAtMzA4Myw3ICszMDgyLDcgQEAgc3RhdGlj IHN0cnVjdCBjbGtfaHdfb21hcCB1c2J0bGxfZmNrX2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NM Syh1c2J0bGxfZmNrLCB1c2Job3N0XzEyMG1fZmNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3Bz KTsKIAotc3RhdGljIHN0cnVjdCBjbGsgdXNidGxsX2ljazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2Nv cmUgdXNidGxsX2ljazsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCB1c2J0bGxfaWNrX2h3 ID0gewogCS5odyA9IHsKQEAgLTMxMjQsNyArMzEyMyw3IEBAIHN0YXRpYyBjb25zdCBjaGFyICp1 c2ltX2Zja19wYXJlbnRfbmFtZXNbXSA9IHsKIAkib21hcF85Nm1fZmNrIiwgImRwbGw1X20yX2Nr IiwgInN5c19jayIsCiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayB1c2ltX2ZjazsKK3N0YXRpYyBz dHJ1Y3QgY2xrX2NvcmUgdXNpbV9mY2s7CiAKIHN0YXRpYyBjb25zdCBzdHJ1Y3QgY2xrX29wcyB1 c2ltX2Zja19vcHMgPSB7CiAJLmVuYWJsZQkJPSAmb21hcDJfZGZsdF9jbGtfZW5hYmxlLApAQCAt MzE0Miw3ICszMTQxLDcgQEAgREVGSU5FX0NMS19PTUFQX01VWF9HQVRFKHVzaW1fZmNrLCBOVUxM LCB1c2ltX2Nsa3NlbCwKIAkJCSBPTUFQMzQzMEVTMl9FTl9VU0lNT0NQX1NISUZULCAmY2xraHdv cHNfd2FpdCwKIAkJCSB1c2ltX2Zja19wYXJlbnRfbmFtZXMsIHVzaW1fZmNrX29wcyk7CiAKLXN0 YXRpYyBzdHJ1Y3QgY2xrIHVzaW1faWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSB1c2ltX2lj azsKIAogc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCB1c2ltX2lja19odyA9IHsKIAkuaHcgPSB7 CkBAIC0zMTU2LDcgKzMxNTUsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIHVzaW1faWNr X2h3ID0gewogCiBERUZJTkVfU1RSVUNUX0NMSyh1c2ltX2ljaywgZ3BpbzFfaWNrX3BhcmVudF9u YW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgdnBmZV9mY2s7CitzdGF0 aWMgc3RydWN0IGNsa19jb3JlIHZwZmVfZmNrOwogCiBzdGF0aWMgY29uc3QgY2hhciAqdnBmZV9m Y2tfcGFyZW50X25hbWVzW10gPSB7CiAJInBjbGtfY2siLApAQCAtMzE3Miw3ICszMTcxLDcgQEAg c3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCB2cGZlX2Zja19odyA9IHsKIAogREVGSU5FX1NUUlVD VF9DTEsodnBmZV9mY2ssIHZwZmVfZmNrX3BhcmVudF9uYW1lcywgYWVzMV9pY2tfb3BzKTsKIAot c3RhdGljIHN0cnVjdCBjbGsgdnBmZV9pY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIHZwZmVf aWNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIHZwZmVfaWNrX2h3ID0gewogCS5odyA9 IHsKQEAgLTMxODYsMTIgKzMxODUsMTIgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCB2cGZl X2lja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsodnBmZV9pY2ssIGVtYWNfaWNrX3BhcmVu dF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgd2R0MV9mY2s7Citz dGF0aWMgc3RydWN0IGNsa19jb3JlIHdkdDFfZmNrOwogCiBERUZJTkVfU1RSVUNUX0NMS19IV19P TUFQKHdkdDFfZmNrLCAid2t1cF9jbGtkbSIpOwogREVGSU5FX1NUUlVDVF9DTEsod2R0MV9mY2ss IGdwdDEyX2Zja19wYXJlbnRfbmFtZXMsIGNvcmVfbDRfaWNrX29wcyk7CiAKLXN0YXRpYyBzdHJ1 Y3QgY2xrIHdkdDFfaWNrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSB3ZHQxX2ljazsKIAogc3Rh dGljIHN0cnVjdCBjbGtfaHdfb21hcCB3ZHQxX2lja19odyA9IHsKIAkuaHcgPSB7CkBAIC0zMjA1 LDcgKzMyMDQsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIHdkdDFfaWNrX2h3ID0gewog CiBERUZJTkVfU1RSVUNUX0NMSyh3ZHQxX2ljaywgZ3BpbzFfaWNrX3BhcmVudF9uYW1lcywgYWVz Ml9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgd2R0Ml9mY2s7CitzdGF0aWMgc3RydWN0 IGNsa19jb3JlIHdkdDJfZmNrOwogCiBzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIHdkdDJfZmNr X2h3ID0gewogCS5odyA9IHsKQEAgLTMyMTksNyArMzIxOCw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xr X2h3X29tYXAgd2R0Ml9mY2tfaHcgPSB7CiAKIERFRklORV9TVFJVQ1RfQ0xLKHdkdDJfZmNrLCBn cGlvMV9kYmNrX3BhcmVudF9uYW1lcywgYWVzMl9pY2tfb3BzKTsKIAotc3RhdGljIHN0cnVjdCBj bGsgd2R0Ml9pY2s7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlIHdkdDJfaWNrOwogCiBzdGF0aWMg c3RydWN0IGNsa19od19vbWFwIHdkdDJfaWNrX2h3ID0gewogCS5odyA9IHsKQEAgLTMyMzMsNyAr MzIzMiw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgd2R0Ml9pY2tfaHcgPSB7CiAKIERF RklORV9TVFJVQ1RfQ0xLKHdkdDJfaWNrLCBncGlvMV9pY2tfcGFyZW50X25hbWVzLCBhZXMyX2lj a19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayB3ZHQzX2ZjazsKK3N0YXRpYyBzdHJ1Y3QgY2xr X2NvcmUgd2R0M19mY2s7CiAKIHN0YXRpYyBzdHJ1Y3QgY2xrX2h3X29tYXAgd2R0M19mY2tfaHcg PSB7CiAJLmh3ID0gewpAQCAtMzI0Nyw3ICszMjQ2LDcgQEAgc3RhdGljIHN0cnVjdCBjbGtfaHdf b21hcCB3ZHQzX2Zja19odyA9IHsKIAogREVGSU5FX1NUUlVDVF9DTEsod2R0M19mY2ssIGdwaW8y X2RiY2tfcGFyZW50X25hbWVzLCBhZXMyX2lja19vcHMpOwogCi1zdGF0aWMgc3RydWN0IGNsayB3 ZHQzX2ljazsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgd2R0M19pY2s7CiAKIHN0YXRpYyBzdHJ1 Y3QgY2xrX2h3X29tYXAgd2R0M19pY2tfaHcgPSB7CiAJLmh3ID0gewpAQCAtMzY2MSwxMCArMzY2 MCwxMCBAQCBpbnQgX19pbml0IG9tYXAzeHh4X2Nsa19pbml0KHZvaWQpCiAJCQkJICAgICBBUlJB WV9TSVpFKGVuYWJsZV9pbml0X2Nsa3MpKTsKIAogCXByX2luZm8oIkNsb2NraW5nIHJhdGUgKENy eXN0YWwvQ29yZS9NUFUpOiAlbGQuJTAxbGQvJWxkLyVsZCBNSHpcbiIsCi0JCShjbGtfZ2V0X3Jh dGUoJm9zY19zeXNfY2spIC8gMTAwMDAwMCksCi0JCShjbGtfZ2V0X3JhdGUoJm9zY19zeXNfY2sp IC8gMTAwMDAwKSAlIDEwLAotCQkoY2xrX2dldF9yYXRlKCZjb3JlX2NrKSAvIDEwMDAwMDApLAot CQkoY2xrX2dldF9yYXRlKCZhcm1fZmNrKSAvIDEwMDAwMDApKTsKKwkJKGNsa19wcm92aWRlcl9n ZXRfcmF0ZSgmb3NjX3N5c19jaykgLyAxMDAwMDAwKSwKKwkJKGNsa19wcm92aWRlcl9nZXRfcmF0 ZSgmb3NjX3N5c19jaykgLyAxMDAwMDApICUgMTAsCisJCShjbGtfcHJvdmlkZXJfZ2V0X3JhdGUo JmNvcmVfY2spIC8gMTAwMDAwMCksCisJCShjbGtfcHJvdmlkZXJfZ2V0X3JhdGUoJmFybV9mY2sp IC8gMTAwMDAwMCkpOwogCiAJLyoKIAkgKiBMb2NrIERQTEw1IC0tIGhlcmUgb25seSB1bnRpbCBv dGhlciBkZXZpY2UgaW5pdCBjb2RlIGNhbgpAQCAtMzY3NCw4ICszNjczLDggQEAgaW50IF9faW5p dCBvbWFwM3h4eF9jbGtfaW5pdCh2b2lkKQogCQlvbWFwM19jbGtfbG9ja19kcGxsNSgpOwogCiAJ LyogQXZvaWQgc2xlZXBpbmcgZHVyaW5nIG9tYXAzX2NvcmVfZHBsbF9tMl9zZXRfcmF0ZSgpICov Ci0Jc2RyY19pY2tfcCA9IGNsa19nZXQoTlVMTCwgInNkcmNfaWNrIik7Ci0JYXJtX2Zja19wID0g Y2xrX2dldChOVUxMLCAiYXJtX2ZjayIpOworCXNkcmNfaWNrX3AgPSBjbGtfcHJvdmlkZXJfZ2V0 KE5VTEwsICJzZHJjX2ljayIpOworCWFybV9mY2tfcCA9IGNsa19wcm92aWRlcl9nZXQoTlVMTCwg ImFybV9mY2siKTsKIAogCXJldHVybiAwOwogfQpkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vbWFjaC1v bWFwMi9jbGt0Mnh4eF9kcGxsLmMgYi9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsa3QyeHh4X2RwbGwu YwppbmRleCA4MjU3MmUyLi5kN2JiYmI2IDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNoLW9tYXAy L2Nsa3QyeHh4X2RwbGwuYworKysgYi9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsa3QyeHh4X2RwbGwu YwpAQCAtMTEsNyArMTEsNiBAQAogCiAjaW5jbHVkZSA8bGludXgva2VybmVsLmg+CiAjaW5jbHVk ZSA8bGludXgvZXJybm8uaD4KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51 eC9pby5oPgogCiAjaW5jbHVkZSAiY2xvY2suaCIKQEAgLTIyLDcgKzIxLDcgQEAKIAogLyoqCiAg KiBfYWxsb3dfaWRsZSAtIGVuYWJsZSBEUExMIGF1dG9pZGxlIGJpdHMKLSAqIEBjbGs6IHN0cnVj dCBjbGsgKiBvZiB0aGUgRFBMTCB0byBvcGVyYXRlIG9uCisgKiBAY2xrOiBzdHJ1Y3QgY2xrX2Nv cmUgKiBvZiB0aGUgRFBMTCB0byBvcGVyYXRlIG9uCiAgKgogICogRW5hYmxlIERQTEwgYXV0b21h dGljIGlkbGUgY29udHJvbC4gIFRoZSBEUExMIHdpbGwgZW50ZXIgbG93LXBvd2VyCiAgKiBzdG9w IHdoZW4gaXRzIGRvd25zdHJlYW0gY2xvY2tzIGFyZSBnYXRlZC4gIE5vIHJldHVybiB2YWx1ZS4K QEAgLTM5LDcgKzM4LDcgQEAgc3RhdGljIHZvaWQgX2FsbG93X2lkbGUoc3RydWN0IGNsa19od19v bWFwICpjbGspCiAKIC8qKgogICogX2RlbnlfaWRsZSAtIHByZXZlbnQgRFBMTCBmcm9tIGF1dG9t YXRpY2FsbHkgaWRsaW5nCi0gKiBAY2xrOiBzdHJ1Y3QgY2xrICogb2YgdGhlIERQTEwgdG8gb3Bl cmF0ZSBvbgorICogQGNsazogc3RydWN0IGNsa19jb3JlICogb2YgdGhlIERQTEwgdG8gb3BlcmF0 ZSBvbgogICoKICAqIERpc2FibGUgRFBMTCBhdXRvbWF0aWMgaWRsZSBjb250cm9sLiAgTm8gcmV0 dXJuIHZhbHVlLgogICovCmRpZmYgLS1naXQgYS9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsa3QyeHh4 X2RwbGxjb3JlLmMgYi9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsa3QyeHh4X2RwbGxjb3JlLmMKaW5k ZXggNTljZjMxMC4uOWE2MGNlMiAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vbWFjaC1vbWFwMi9jbGt0 Mnh4eF9kcGxsY29yZS5jCisrKyBiL2FyY2gvYXJtL21hY2gtb21hcDIvY2xrdDJ4eHhfZHBsbGNv cmUuYwpAQCAtMjIsNyArMjIsNiBAQAogCiAjaW5jbHVkZSA8bGludXgva2VybmVsLmg+CiAjaW5j bHVkZSA8bGludXgvZXJybm8uaD4KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxs aW51eC9pby5oPgogCiAjaW5jbHVkZSAiY2xvY2suaCIKQEAgLTQ4LDcgKzQ3LDcgQEAgc3RhdGlj IHN0cnVjdCBjbGtfaHdfb21hcCAqZHBsbF9jb3JlX2NrOwogICogUmV0dXJucyB0aGUgQ09SRV9D TEsgcmF0ZS4gIENPUkVfQ0xLIGNhbiBoYXZlIG9uZSBvZiB0aHJlZSByYXRlCiAgKiBzb3VyY2Vz IG9uIE9NQVAyeHh4OiB0aGUgRFBMTCBDTEtPVVQgcmF0ZSwgRFBMTCBDTEtPVVRYMiwgb3IgMzJL SHoKICAqICh0aGUgbGF0dGVyIGlzIHVudXN1YWwpLiAgVGhpcyBjdXJyZW50bHkgc2hvdWxkIGJl IGNhbGxlZCB3aXRoCi0gKiBzdHJ1Y3QgY2xrICpkcGxsX2NrLCB3aGljaCBpcyBhIGNvbXBvc2l0 ZSBjbG9jayBvZiBkcGxsX2NrIGFuZAorICogc3RydWN0IGNsa19jb3JlICpkcGxsX2NrLCB3aGlj aCBpcyBhIGNvbXBvc2l0ZSBjbG9jayBvZiBkcGxsX2NrIGFuZAogICogY29yZV9jay4KICAqLwog dW5zaWduZWQgbG9uZyBvbWFwMnh4eF9jbGtfZ2V0X2NvcmVfcmF0ZSh2b2lkKQpAQCAtMTc5LDcg KzE3OCw3IEBAIGludCBvbWFwMl9yZXByb2dyYW1fZHBsbGNvcmUoc3RydWN0IGNsa19odyAqaHcs IHVuc2lnbmVkIGxvbmcgcmF0ZSwKIAogLyoqCiAgKiBvbWFwMnh4eF9jbGt0X2RwbGxjb3JlX2lu aXQgLSBjbGsgaW5pdCBmdW5jdGlvbiBmb3IgZHBsbF9jawotICogQGNsazogc3RydWN0IGNsayAq ZHBsbF9jaworICogQGNsazogc3RydWN0IGNsa19jb3JlICpkcGxsX2NrCiAgKgogICogU3RvcmUg YSBsb2NhbCBjb3B5IG9mIEBjbGsgaW4gZHBsbF9jb3JlX2NrIHNvIG90aGVyIGNvZGUgY2FuIHF1 ZXJ5CiAgKiB0aGUgY29yZSByYXRlIHdpdGhvdXQgaGF2aW5nIHRvIGNsa19nZXQoKSwgd2hpY2gg Y2FuIHNsZWVwLiAgTXVzdApkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vbWFjaC1vbWFwMi9jbGt0Mnh4 eF92aXJ0X3ByY21fc2V0LmMgYi9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsa3QyeHh4X3ZpcnRfcHJj bV9zZXQuYwppbmRleCA4NWUwYjBjMC4uZDYyMWE0YyAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vbWFj aC1vbWFwMi9jbGt0Mnh4eF92aXJ0X3ByY21fc2V0LmMKKysrIGIvYXJjaC9hcm0vbWFjaC1vbWFw Mi9jbGt0Mnh4eF92aXJ0X3ByY21fc2V0LmMKQEAgLTI4LDcgKzI4LDYgQEAKIAogI2luY2x1ZGUg PGxpbnV4L2tlcm5lbC5oPgogI2luY2x1ZGUgPGxpbnV4L2Vycm5vLmg+Ci0jaW5jbHVkZSA8bGlu dXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvaW8uaD4KICNpbmNsdWRlIDxsaW51eC9jcHVmcmVx Lmg+CiAjaW5jbHVkZSA8bGludXgvc2xhYi5oPgpAQCAtMTk4LDE0ICsxOTcsMTQgQEAgdm9pZCBv bWFwMnh4eF9jbGt0X3Zwc19jaGVja19ib290bG9hZGVyX3JhdGVzKHZvaWQpCiAgKi8KIHZvaWQg b21hcDJ4eHhfY2xrdF92cHNfbGF0ZV9pbml0KHZvaWQpCiB7Ci0Jc3RydWN0IGNsayAqYzsKKwlz dHJ1Y3QgY2xrX2NvcmUgKmM7CiAKLQljID0gY2xrX2dldChOVUxMLCAic3lzX2NrIik7CisJYyA9 IGNsa19wcm92aWRlcl9nZXQoTlVMTCwgInN5c19jayIpOwogCWlmIChJU19FUlIoYykpIHsKIAkJ V0FSTigxLCAiY291bGQgbm90IGxvY2F0ZSBzeXNfY2tcbiIpOwogCX0gZWxzZSB7Ci0JCXN5c19j a19yYXRlID0gY2xrX2dldF9yYXRlKGMpOwotCQljbGtfcHV0KGMpOworCQlzeXNfY2tfcmF0ZSA9 IGNsa19wcm92aWRlcl9nZXRfcmF0ZShjKTsKKwkJX19jbGtfcHV0KGMpOwogCX0KIH0KIApAQCAt MjMwLDcgKzIyOSw3IEBAIHZvaWQgb21hcDJ4eHhfY2xrdF92cHNfaW5pdCh2b2lkKQogewogCXN0 cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQgPSB7IE5VTEwgfTsKIAlzdHJ1Y3QgY2xrX2h3X29tYXAg Kmh3ID0gTlVMTDsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJ Y29uc3QgY2hhciAqcGFyZW50X25hbWUgPSAibXB1X2NrIjsKIAlzdHJ1Y3QgY2xrX2xvb2t1cCAq bG9va3VwID0gTlVMTDsKIApkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vbWFjaC1vbWFwMi9jbGt0MzR4 eF9kcGxsM20yLmMgYi9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsa3QzNHh4X2RwbGwzbTIuYwppbmRl eCBlYjY5YWNmLi4xNmZmNGVkIDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsa3Qz NHh4X2RwbGwzbTIuYworKysgYi9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsa3QzNHh4X2RwbGwzbTIu YwpAQCAtMTgsNyArMTgsNiBAQAogCiAjaW5jbHVkZSA8bGludXgva2VybmVsLmg+CiAjaW5jbHVk ZSA8bGludXgvZXJybm8uaD4KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51 eC9pby5oPgogCiAjaW5jbHVkZSAiY2xvY2suaCIKQEAgLTM4LDcgKzM3LDcgQEAKIAogLyoqCiAg KiBvbWFwM19jb3JlX2RwbGxfbTJfc2V0X3JhdGUgLSBzZXQgQ09SRSBEUExMIE0yIGRpdmlkZXIK LSAqIEBjbGs6IHN0cnVjdCBjbGsgKiBvZiBEUExMIHRvIHNldAorICogQGNsazogc3RydWN0IGNs a19jb3JlICogb2YgRFBMTCB0byBzZXQKICAqIEByYXRlOiByb3VuZGVkIHRhcmdldCByYXRlCiAg KgogICogUHJvZ3JhbSB0aGUgRFBMTCBNMiBkaXZpZGVyIHdpdGggdGhlIHJvdW5kZWQgdGFyZ2V0 IHJhdGUuICBSZXR1cm5zCmRpZmYgLS1naXQgYS9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsa3RfY2xr c2VsLmMgYi9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsa3RfY2xrc2VsLmMKaW5kZXggN2VlMjYxMC4u YjQ3OTZiMyAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vbWFjaC1vbWFwMi9jbGt0X2Nsa3NlbC5jCisr KyBiL2FyY2gvYXJtL21hY2gtb21hcDIvY2xrdF9jbGtzZWwuYwpAQCAtNTEsMTUgKzUxLDE1IEBA CiAKIC8qKgogICogX2dldF9jbGtzZWxfYnlfcGFyZW50KCkgLSByZXR1cm4gY2xrc2VsIHN0cnVj dCBmb3IgYSBnaXZlbiBjbGsgJiBwYXJlbnQKLSAqIEBjbGs6IE9NQVAgc3RydWN0IGNsayBwdHIg dG8gaW5zcGVjdAotICogQHNyY19jbGs6IE9NQVAgc3RydWN0IGNsayBwdHIgb2YgdGhlIHBhcmVu dCBjbGsgdG8gc2VhcmNoIGZvcgorICogQGNsazogT01BUCBzdHJ1Y3QgY2xrX2NvcmUgcHRyIHRv IGluc3BlY3QKKyAqIEBzcmNfY2xrOiBPTUFQIHN0cnVjdCBjbGtfY29yZSBwdHIgb2YgdGhlIHBh cmVudCBjbGsgdG8gc2VhcmNoIGZvcgogICoKICAqIFNjYW4gdGhlIHN0cnVjdCBjbGtzZWwgYXJy YXkgYXNzb2NpYXRlZCB3aXRoIHRoZSBjbG9jayB0byBmaW5kCiAgKiB0aGUgZWxlbWVudCBhc3Nv Y2lhdGVkIHdpdGggdGhlIHN1cHBsaWVkIHBhcmVudCBjbG9jayBhZGRyZXNzLgogICogUmV0dXJu cyBhIHBvaW50ZXIgdG8gdGhlIHN0cnVjdCBjbGtzZWwgb24gc3VjY2VzcyBvciBOVUxMIG9uIGVy cm9yLgogICovCiBzdGF0aWMgY29uc3Qgc3RydWN0IGNsa3NlbCAqX2dldF9jbGtzZWxfYnlfcGFy ZW50KHN0cnVjdCBjbGtfaHdfb21hcCAqY2xrLAotCQkJCQkJICBzdHJ1Y3QgY2xrICpzcmNfY2xr KQorCQkJCQkJICBzdHJ1Y3QgY2xrX2NvcmUgKnNyY19jbGspCiB7CiAJY29uc3Qgc3RydWN0IGNs a3NlbCAqY2xrczsKIApAQCAtODIsNyArODIsNyBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGNsa3Nl bCAqX2dldF9jbGtzZWxfYnlfcGFyZW50KHN0cnVjdCBjbGtfaHdfb21hcCAqY2xrLAogCiAvKioK ICAqIF93cml0ZV9jbGtzZWxfcmVnKCkgLSBwcm9ncmFtIGEgY2xvY2sncyBjbGtzZWwgcmVnaXN0 ZXIgaW4gaGFyZHdhcmUKLSAqIEBjbGs6IHN0cnVjdCBjbGsgKiB0byBwcm9ncmFtCisgKiBAY2xr OiBzdHJ1Y3QgY2xrX2NvcmUgKiB0byBwcm9ncmFtCiAgKiBAdjogY2xrc2VsIGJpdGZpZWxkIHZh bHVlIHRvIHByb2dyYW0gKHdpdGggTFNCIGF0IGJpdCAwKQogICoKICAqIFNoaWZ0IHRoZSBjbGtz ZWwgcmVnaXN0ZXIgYml0ZmllbGQgdmFsdWUgQHYgdG8gaXRzIGFwcHJvcHJpYXRlCkBAIC0xMDcs MTAgKzEwNywxMCBAQCBzdGF0aWMgdm9pZCBfd3JpdGVfY2xrc2VsX3JlZyhzdHJ1Y3QgY2xrX2h3 X29tYXAgKmNsaywgdTMyIGZpZWxkX3ZhbCkKIAogLyoqCiAgKiBfY2xrc2VsX3RvX2Rpdmlzb3Io KSAtIHR1cm4gY2xrc2VsIGZpZWxkIHZhbHVlIGludG8gaW50ZWdlciBkaXZpZGVyCi0gKiBAY2xr OiBPTUFQIHN0cnVjdCBjbGsgdG8gdXNlCisgKiBAY2xrOiBPTUFQIHN0cnVjdCBjbGtfY29yZSB0 byB1c2UKICAqIEBmaWVsZF92YWw6IHJlZ2lzdGVyIGZpZWxkIHZhbHVlIHRvIGZpbmQKICAqCi0g KiBHaXZlbiBhIHN0cnVjdCBjbGsgb2YgYSByYXRlLXNlbGVjdGFibGUgY2xrc2VsIGNsb2NrLCBh bmQgYSByZWdpc3RlciBmaWVsZAorICogR2l2ZW4gYSBzdHJ1Y3QgY2xrX2NvcmUgb2YgYSByYXRl LXNlbGVjdGFibGUgY2xrc2VsIGNsb2NrLCBhbmQgYSByZWdpc3RlciBmaWVsZAogICogdmFsdWUg dG8gc2VhcmNoIGZvciwgZmluZCB0aGUgY29ycmVzcG9uZGluZyBjbG9jayBkaXZpc29yLiAgVGhl IHJlZ2lzdGVyCiAgKiBmaWVsZCB2YWx1ZSBzaG91bGQgYmUgcHJlLW1hc2tlZCBhbmQgc2hpZnRl ZCBkb3duIHNvIHRoZSBMU0IgaXMgYXQgYml0IDAKICAqIGJlZm9yZSBjYWxsaW5nLiAgUmV0dXJu cyAwIG9uIGVycm9yIG9yIHJldHVybnMgdGhlIGFjdHVhbCBpbnRlZ2VyIGRpdmlzb3IKQEAgLTEy MCw3ICsxMjAsNyBAQCBzdGF0aWMgdTMyIF9jbGtzZWxfdG9fZGl2aXNvcihzdHJ1Y3QgY2xrX2h3 X29tYXAgKmNsaywgdTMyIGZpZWxkX3ZhbCkKIHsKIAljb25zdCBzdHJ1Y3QgY2xrc2VsICpjbGtz OwogCWNvbnN0IHN0cnVjdCBjbGtzZWxfcmF0ZSAqY2xrcjsKLQlzdHJ1Y3QgY2xrICpwYXJlbnQ7 CisJc3RydWN0IGNsa19jb3JlICpwYXJlbnQ7CiAKIAlwYXJlbnQgPSBfX2Nsa19nZXRfcGFyZW50 KGNsay0+aHcuY2xrKTsKIApAQCAtMTQ5LDEwICsxNDksMTAgQEAgc3RhdGljIHUzMiBfY2xrc2Vs X3RvX2Rpdmlzb3Ioc3RydWN0IGNsa19od19vbWFwICpjbGssIHUzMiBmaWVsZF92YWwpCiAKIC8q KgogICogX2Rpdmlzb3JfdG9fY2xrc2VsKCkgLSB0dXJuIGNsa3NlbCBpbnRlZ2VyIGRpdmlzb3Ig aW50byBhIGZpZWxkIHZhbHVlCi0gKiBAY2xrOiBPTUFQIHN0cnVjdCBjbGsgdG8gdXNlCisgKiBA Y2xrOiBPTUFQIHN0cnVjdCBjbGtfY29yZSB0byB1c2UKICAqIEBkaXY6IGludGVnZXIgZGl2aXNv ciB0byBzZWFyY2ggZm9yCiAgKgotICogR2l2ZW4gYSBzdHJ1Y3QgY2xrIG9mIGEgcmF0ZS1zZWxl Y3RhYmxlIGNsa3NlbCBjbG9jaywgYW5kIGEgY2xvY2sKKyAqIEdpdmVuIGEgc3RydWN0IGNsa19j b3JlIG9mIGEgcmF0ZS1zZWxlY3RhYmxlIGNsa3NlbCBjbG9jaywgYW5kIGEgY2xvY2sKICAqIGRp dmlzb3IsIGZpbmQgdGhlIGNvcnJlc3BvbmRpbmcgcmVnaXN0ZXIgZmllbGQgdmFsdWUuICBSZXR1 cm5zIHRoZQogICogcmVnaXN0ZXIgZmllbGQgdmFsdWUgX2JlZm9yZV8gbGVmdC1zaGlmdGluZyAo aS5lLiwgTFNCIGlzIGF0IGJpdAogICogMCk7IG9yIHJldHVybnMgMHhGRkZGRkZGRiAofjApIHVw b24gZXJyb3IuCkBAIC0xNjEsNyArMTYxLDcgQEAgc3RhdGljIHUzMiBfZGl2aXNvcl90b19jbGtz ZWwoc3RydWN0IGNsa19od19vbWFwICpjbGssIHUzMiBkaXYpCiB7CiAJY29uc3Qgc3RydWN0IGNs a3NlbCAqY2xrczsKIAljb25zdCBzdHJ1Y3QgY2xrc2VsX3JhdGUgKmNsa3I7Ci0Jc3RydWN0IGNs ayAqcGFyZW50OworCXN0cnVjdCBjbGtfY29yZSAqcGFyZW50OwogCiAJLyogc2hvdWxkIG5ldmVy IGhhcHBlbiAqLwogCVdBUk5fT04oZGl2ID09IDApOwpAQCAtMTkxLDcgKzE5MSw3IEBAIHN0YXRp YyB1MzIgX2Rpdmlzb3JfdG9fY2xrc2VsKHN0cnVjdCBjbGtfaHdfb21hcCAqY2xrLCB1MzIgZGl2 KQogCiAvKioKICAqIF9yZWFkX2Rpdmlzb3IoKSAtIGdldCBjdXJyZW50IGRpdmlzb3IgYXBwbGll ZCB0byBwYXJlbnQgY2xvY2sgKGZyb20gaGR3cikKLSAqIEBjbGs6IE9NQVAgc3RydWN0IGNsayB0 byB1c2UuCisgKiBAY2xrOiBPTUFQIHN0cnVjdCBjbGtfY29yZSB0byB1c2UuCiAgKgogICogUmVh ZCB0aGUgY3VycmVudCBkaXZpc29yIHJlZ2lzdGVyIHZhbHVlIGZvciBAY2xrIHRoYXQgaXMgcHJv Z3JhbW1lZAogICogaW50byB0aGUgaGFyZHdhcmUsIGNvbnZlcnQgaXQgaW50byB0aGUgYWN0dWFs IGRpdmlzb3IgdmFsdWUsIGFuZApAQCAtMjE1LDcgKzIxNSw3IEBAIHN0YXRpYyB1MzIgX3JlYWRf ZGl2aXNvcihzdHJ1Y3QgY2xrX2h3X29tYXAgKmNsaykKIAogLyoqCiAgKiBvbWFwMl9jbGtzZWxf cm91bmRfcmF0ZV9kaXYoKSAtIGZpbmQgZGl2aXNvciBmb3IgdGhlIGdpdmVuIGNsb2NrIGFuZCBy YXRlCi0gKiBAY2xrOiBPTUFQIHN0cnVjdCBjbGsgdG8gdXNlCisgKiBAY2xrOiBPTUFQIHN0cnVj dCBjbGtfY29yZSB0byB1c2UKICAqIEB0YXJnZXRfcmF0ZTogZGVzaXJlZCBjbG9jayByYXRlCiAg KiBAbmV3X2RpdjogcHRyIHRvIHdoZXJlIHdlIHNob3VsZCBzdG9yZSB0aGUgZGl2aXNvcgogICoK QEAgLTIzMyw3ICsyMzMsNyBAQCB1MzIgb21hcDJfY2xrc2VsX3JvdW5kX3JhdGVfZGl2KHN0cnVj dCBjbGtfaHdfb21hcCAqY2xrLAogCWNvbnN0IHN0cnVjdCBjbGtzZWwgKmNsa3M7CiAJY29uc3Qg c3RydWN0IGNsa3NlbF9yYXRlICpjbGtyOwogCXUzMiBsYXN0X2RpdiA9IDA7Ci0Jc3RydWN0IGNs ayAqcGFyZW50OworCXN0cnVjdCBjbGtfY29yZSAqcGFyZW50OwogCXVuc2lnbmVkIGxvbmcgcGFy ZW50X3JhdGU7CiAJY29uc3QgY2hhciAqY2xrX25hbWU7CiAKQEAgLTI4Niw3ICsyODYsNyBAQCB1 MzIgb21hcDJfY2xrc2VsX3JvdW5kX3JhdGVfZGl2KHN0cnVjdCBjbGtfaHdfb21hcCAqY2xrLAog CiAvKgogICogQ2xvY2t0eXBlIGludGVyZmFjZSBmdW5jdGlvbnMgdG8gdGhlIE9NQVAgY2xvY2sg Y29kZQotICogKGkuZS4sIHRob3NlIHVzZWQgaW4gc3RydWN0IGNsayBmaWVsZCBmdW5jdGlvbiBw b2ludGVycywgZXRjLikKKyAqIChpLmUuLCB0aG9zZSB1c2VkIGluIHN0cnVjdCBjbGtfY29yZSBm aWVsZCBmdW5jdGlvbiBwb2ludGVycywgZXRjLikKICAqLwogCiAvKioKQEAgLTMwOSw3ICszMDks NyBAQCB1OCBvbWFwMl9jbGtzZWxfZmluZF9wYXJlbnRfaW5kZXgoc3RydWN0IGNsa19odyAqaHcp CiAJY29uc3Qgc3RydWN0IGNsa3NlbCAqY2xrczsKIAljb25zdCBzdHJ1Y3QgY2xrc2VsX3JhdGUg KmNsa3I7CiAJdTMyIHIsIGZvdW5kID0gMDsKLQlzdHJ1Y3QgY2xrICpwYXJlbnQ7CisJc3RydWN0 IGNsa19jb3JlICpwYXJlbnQ7CiAJY29uc3QgY2hhciAqY2xrX25hbWU7CiAJaW50IHJldCA9IDAs IGYgPSAwOwogCkBAIC0zNDUsMTEgKzM0NSwxMSBAQCB1OCBvbWFwMl9jbGtzZWxfZmluZF9wYXJl bnRfaW5kZXgoc3RydWN0IGNsa19odyAqaHcpCiAKIAogLyoqCi0gKiBvbWFwMl9jbGtzZWxfcmVj YWxjKCkgLSBmdW5jdGlvbiBwdHIgdG8gcGFzcyB2aWEgc3RydWN0IGNsayAucmVjYWxjIGZpZWxk Ci0gKiBAY2xrOiBzdHJ1Y3QgY2xrICoKKyAqIG9tYXAyX2Nsa3NlbF9yZWNhbGMoKSAtIGZ1bmN0 aW9uIHB0ciB0byBwYXNzIHZpYSBzdHJ1Y3QgY2xrX2NvcmUgLnJlY2FsYyBmaWVsZAorICogQGNs azogc3RydWN0IGNsa19jb3JlICoKICAqCiAgKiBUaGlzIGZ1bmN0aW9uIGlzIGludGVuZGVkIHRv IGJlIGNhbGxlZCBvbmx5IGJ5IHRoZSBjbG9jayBmcmFtZXdvcmsuCi0gKiBFYWNoIGNsa3NlbCBj bG9jayBzaG91bGQgaGF2ZSBpdHMgc3RydWN0IGNsayAucmVjYWxjIGZpZWxkIHNldCB0byB0aGlz CisgKiBFYWNoIGNsa3NlbCBjbG9jayBzaG91bGQgaGF2ZSBpdHMgc3RydWN0IGNsa19jb3JlIC5y ZWNhbGMgZmllbGQgc2V0IHRvIHRoaXMKICAqIGZ1bmN0aW9uLiAgUmV0dXJucyB0aGUgY2xvY2sn cyBjdXJyZW50IHJhdGUsIGJhc2VkIG9uIGl0cyBwYXJlbnQncyByYXRlCiAgKiBhbmQgaXRzIGN1 cnJlbnQgZGl2aXNvciBzZXR0aW5nIGluIHRoZSBoYXJkd2FyZS4KICAqLwpAQCAtMzc2LDcgKzM3 Niw3IEBAIHVuc2lnbmVkIGxvbmcgb21hcDJfY2xrc2VsX3JlY2FsYyhzdHJ1Y3QgY2xrX2h3ICpo dywgdW5zaWduZWQgbG9uZyBwYXJlbnRfcmF0ZSkKIAogLyoqCiAgKiBvbWFwMl9jbGtzZWxfcm91 bmRfcmF0ZSgpIC0gZmluZCByb3VuZGVkIHJhdGUgZm9yIHRoZSBnaXZlbiBjbG9jayBhbmQgcmF0 ZQotICogQGNsazogT01BUCBzdHJ1Y3QgY2xrIHRvIHVzZQorICogQGNsazogT01BUCBzdHJ1Y3Qg Y2xrX2NvcmUgdG8gdXNlCiAgKiBAdGFyZ2V0X3JhdGU6IGRlc2lyZWQgY2xvY2sgcmF0ZQogICoK ICAqIFRoaXMgZnVuY3Rpb24gaXMgaW50ZW5kZWQgdG8gYmUgY2FsbGVkIG9ubHkgYnkgdGhlIGNs b2NrIGZyYW1ld29yay4KQEAgLTM5Niw3ICszOTYsNyBAQCBsb25nIG9tYXAyX2Nsa3NlbF9yb3Vu ZF9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25lZCBsb25nIHRhcmdldF9yYXRlLAogCiAv KioKICAqIG9tYXAyX2Nsa3NlbF9zZXRfcmF0ZSgpIC0gcHJvZ3JhbSBjbG9jayByYXRlIGluIGhh cmR3YXJlCi0gKiBAY2xrOiBzdHJ1Y3QgY2xrICogdG8gcHJvZ3JhbSByYXRlCisgKiBAY2xrOiBz dHJ1Y3QgY2xrX2NvcmUgKiB0byBwcm9ncmFtIHJhdGUKICAqIEByYXRlOiB0YXJnZXQgcmF0ZSB0 byBwcm9ncmFtCiAgKgogICogVGhpcyBmdW5jdGlvbiBpcyBpbnRlbmRlZCB0byBiZSBjYWxsZWQg b25seSBieSB0aGUgY2xvY2sgZnJhbWV3b3JrLgpAQCAtNDM1LDcgKzQzNSw3IEBAIGludCBvbWFw Ml9jbGtzZWxfc2V0X3JhdGUoc3RydWN0IGNsa19odyAqaHcsIHVuc2lnbmVkIGxvbmcgcmF0ZSwK IH0KIAogLyoKLSAqIENsa3NlbCBwYXJlbnQgc2V0dGluZyBmdW5jdGlvbiAtIG5vdCBwYXNzZWQg aW4gc3RydWN0IGNsayBmdW5jdGlvbgorICogQ2xrc2VsIHBhcmVudCBzZXR0aW5nIGZ1bmN0aW9u IC0gbm90IHBhc3NlZCBpbiBzdHJ1Y3QgY2xrX2NvcmUgZnVuY3Rpb24KICAqIHBvaW50ZXIgLSBp bnN0ZWFkLCB0aGUgT01BUCBjbG9jayBjb2RlIGN1cnJlbnRseSBhc3N1bWVzIHRoYXQgYW55CiAg KiBwYXJlbnQtc2V0dGluZyBjbG9jayBpcyBhIGNsa3NlbCBjbG9jaywgYW5kIGNhbGxzCiAgKiBv bWFwMl9jbGtzZWxfc2V0X3BhcmVudCgpIGJ5IGRlZmF1bHQKQEAgLTQ0Myw4ICs0NDMsOCBAQCBp bnQgb21hcDJfY2xrc2VsX3NldF9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25lZCBsb25n IHJhdGUsCiAKIC8qKgogICogb21hcDJfY2xrc2VsX3NldF9wYXJlbnQoKSAtIGNoYW5nZSBhIGNs b2NrJ3MgcGFyZW50IGNsb2NrCi0gKiBAY2xrOiBzdHJ1Y3QgY2xrICogb2YgdGhlIGNoaWxkIGNs b2NrCi0gKiBAbmV3X3BhcmVudDogc3RydWN0IGNsayAqIG9mIHRoZSBuZXcgcGFyZW50IGNsb2Nr CisgKiBAY2xrOiBzdHJ1Y3QgY2xrX2NvcmUgKiBvZiB0aGUgY2hpbGQgY2xvY2sKKyAqIEBuZXdf cGFyZW50OiBzdHJ1Y3QgY2xrX2NvcmUgKiBvZiB0aGUgbmV3IHBhcmVudCBjbG9jawogICoKICAq IFRoaXMgZnVuY3Rpb24gaXMgaW50ZW5kZWQgdG8gYmUgY2FsbGVkIG9ubHkgYnkgdGhlIGNsb2Nr IGZyYW1ld29yay4KICAqIENoYW5nZSB0aGUgcGFyZW50IGNsb2NrIG9mIGNsb2NrIEBjbGsgdG8g QG5ld19wYXJlbnQuICBUaGlzIGlzCmRpZmYgLS1naXQgYS9hcmNoL2FybS9tYWNoLW9tYXAyL2Ns a3RfZHBsbC5jIGIvYXJjaC9hcm0vbWFjaC1vbWFwMi9jbGt0X2RwbGwuYwppbmRleCBmMjUxYTE0 Li4zNmYyNjNkIDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsa3RfZHBsbC5jCisr KyBiL2FyY2gvYXJtL21hY2gtb21hcDIvY2xrdF9kcGxsLmMKQEAgLTU2LDcgKzU2LDcgQEAKIAog LyoKICAqIF9kcGxsX3Rlc3RfZmludCAtIHRlc3Qgd2hldGhlciBhbiBGaW50IHZhbHVlIGlzIHZh bGlkIGZvciB0aGUgRFBMTAotICogQGNsazogRFBMTCBzdHJ1Y3QgY2xrIHRvIHRlc3QKKyAqIEBj bGs6IERQTEwgc3RydWN0IGNsa19jb3JlIHRvIHRlc3QKICAqIEBuOiBkaXZpZGVyIHZhbHVlIChO KSB0byB0ZXN0CiAgKgogICogVGVzdHMgd2hldGhlciBhIHBhcnRpY3VsYXIgZGl2aWRlciBAbiB3 aWxsIHJlc3VsdCBpbiBhIHZhbGlkIERQTEwKQEAgLTIxNSw3ICsyMTUsNyBAQCB1OCBvbWFwMl9p bml0X2RwbGxfcGFyZW50KHN0cnVjdCBjbGtfaHcgKmh3KQogCXYgJj0gZGQtPmVuYWJsZV9tYXNr OwogCXYgPj49IF9fZmZzKGRkLT5lbmFibGVfbWFzayk7CiAKLQkvKiBSZXBhcmVudCB0aGUgc3Ry dWN0IGNsayBpbiBjYXNlIHRoZSBkcGxsIGlzIGluIGJ5cGFzcyAqLworCS8qIFJlcGFyZW50IHRo ZSBzdHJ1Y3QgY2xrX2NvcmUgaW4gY2FzZSB0aGUgZHBsbCBpcyBpbiBieXBhc3MgKi8KIAlpZiAo X29tYXAyX2RwbGxfaXNfaW5fYnlwYXNzKHYpKQogCQlyZXR1cm4gMTsKIApAQCAtMjI0LDcgKzIy NCw3IEBAIHU4IG9tYXAyX2luaXRfZHBsbF9wYXJlbnQoc3RydWN0IGNsa19odyAqaHcpCiAKIC8q KgogICogb21hcDJfZ2V0X2RwbGxfcmF0ZSAtIHJldHVybnMgdGhlIGN1cnJlbnQgRFBMTCBDTEtP VVQgcmF0ZQotICogQGNsazogc3RydWN0IGNsayAqIG9mIGEgRFBMTAorICogQGNsazogc3RydWN0 IGNsa19jb3JlICogb2YgYSBEUExMCiAgKgogICogRFBMTHMgY2FuIGJlIGxvY2tlZCBvciBieXBh c3NlZCAtIGJhc2ljYWxseSwgZW5hYmxlZCBvciBkaXNhYmxlZC4KICAqIFdoZW4gbG9ja2VkLCB0 aGUgRFBMTCBvdXRwdXQgZGVwZW5kcyBvbiB0aGUgTSBhbmQgTiB2YWx1ZXMuICBXaGVuCkBAIC0y NzAsNyArMjcwLDcgQEAgdW5zaWduZWQgbG9uZyBvbWFwMl9nZXRfZHBsbF9yYXRlKHN0cnVjdCBj bGtfaHdfb21hcCAqY2xrKQogCiAvKioKICAqIG9tYXAyX2RwbGxfcm91bmRfcmF0ZSAtIHJvdW5k IGEgdGFyZ2V0IHJhdGUgZm9yIGFuIE9NQVAgRFBMTAotICogQGNsazogc3RydWN0IGNsayAqIGZv ciBhIERQTEwKKyAqIEBjbGs6IHN0cnVjdCBjbGtfY29yZSAqIGZvciBhIERQTEwKICAqIEB0YXJn ZXRfcmF0ZTogZGVzaXJlZCBEUExMIGNsb2NrIHJhdGUKICAqCiAgKiBHaXZlbiBhIERQTEwgYW5k IGEgZGVzaXJlZCB0YXJnZXQgcmF0ZSwgcm91bmQgdGhlIHRhcmdldCByYXRlIHRvIGEKZGlmZiAt LWdpdCBhL2FyY2gvYXJtL21hY2gtb21hcDIvY2xvY2suYyBiL2FyY2gvYXJtL21hY2gtb21hcDIv Y2xvY2suYwppbmRleCA1MDA1MzBkLi5hYjM0MWU0IDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNo LW9tYXAyL2Nsb2NrLmMKKysrIGIvYXJjaC9hcm0vbWFjaC1vbWFwMi9jbG9jay5jCkBAIC0xNDIs NyArMTQyLDcgQEAgc3RhdGljIGludCBfd2FpdF9pZGxlc3RfZ2VuZXJpYyhzdHJ1Y3QgY2xrX2h3 X29tYXAgKmNsaywgdm9pZCBfX2lvbWVtICpyZWcsCiAKIC8qKgogICogX29tYXAyX21vZHVsZV93 YWl0X3JlYWR5IC0gd2FpdCBmb3IgYW4gT01BUCBtb2R1bGUgdG8gbGVhdmUgSURMRQotICogQGNs azogc3RydWN0IGNsayAqIGJlbG9uZ2luZyB0byB0aGUgbW9kdWxlCisgKiBAY2xrOiBzdHJ1Y3Qg Y2xrX2NvcmUgKiBiZWxvbmdpbmcgdG8gdGhlIG1vZHVsZQogICoKICAqIElmIHRoZSBuZWNlc3Nh cnkgY2xvY2tzIGZvciB0aGUgT01BUCBoYXJkd2FyZSBJUCBibG9jayB0aGF0CiAgKiBjb3JyZXNw b25kcyB0byBjbG9jayBAY2xrIGFyZSBlbmFibGVkLCB0aGVuIHdhaXQgZm9yIHRoZSBtb2R1bGUg dG8KQEAgLTE4MSw3ICsxODEsNyBAQCBzdGF0aWMgdm9pZCBfb21hcDJfbW9kdWxlX3dhaXRfcmVh ZHkoc3RydWN0IGNsa19od19vbWFwICpjbGspCiAgKiBvbWFwMl9pbml0X2Nsa19jbGtkbSAtIGxv b2sgdXAgYSBjbG9ja2RvbWFpbiBuYW1lLCBzdG9yZSBwb2ludGVyIGluIGNsawogICogQGNsazog T01BUCBjbG9jayBzdHJ1Y3QgcHRyIHRvIHVzZQogICoKLSAqIENvbnZlcnQgYSBjbG9ja2RvbWFp biBuYW1lIHN0b3JlZCBpbiBhIHN0cnVjdCBjbGsgJ2NsaycgaW50byBhCisgKiBDb252ZXJ0IGEg Y2xvY2tkb21haW4gbmFtZSBzdG9yZWQgaW4gYSBzdHJ1Y3QgY2xrX2NvcmUgJ2NsaycgaW50byBh CiAgKiBjbG9ja2RvbWFpbiBwb2ludGVyLCBhbmQgc2F2ZSBpdCBpbnRvIHRoZSBzdHJ1Y3QgY2xr LiAgSW50ZW5kZWQgdG8gYmUKICAqIGNhbGxlZCBkdXJpbmcgY2xrX3JlZ2lzdGVyKCkuICBObyBy ZXR1cm4gdmFsdWUuCiAgKi8KQEAgLTIyMiw3ICsyMjIsNyBAQCB2b2lkIF9faW5pdCBvbWFwMl9j bGtfZGlzYWJsZV9jbGtkbV9jb250cm9sKHZvaWQpCiAKIC8qKgogICogb21hcDJfY2xrX2RmbHRf ZmluZF9jb21wYW5pb24gLSBmaW5kIGNvbXBhbmlvbiBjbG9jayB0byBAY2xrCi0gKiBAY2xrOiBz dHJ1Y3QgY2xrICogdG8gZmluZCB0aGUgY29tcGFuaW9uIGNsb2NrIG9mCisgKiBAY2xrOiBzdHJ1 Y3QgY2xrX2NvcmUgKiB0byBmaW5kIHRoZSBjb21wYW5pb24gY2xvY2sgb2YKICAqIEBvdGhlcl9y ZWc6IHZvaWQgX19pb21lbSAqKiB0byByZXR1cm4gdGhlIGNvbXBhbmlvbiBjbG9jayBDTV8qQ0xL RU4gdmEgaW4KICAqIEBvdGhlcl9iaXQ6IHU4ICoqIHRvIHJldHVybiB0aGUgY29tcGFuaW9uIGNs b2NrIGJpdCBzaGlmdCBpbgogICoKQEAgLTI1OCw3ICsyNTgsNyBAQCB2b2lkIG9tYXAyX2Nsa19k Zmx0X2ZpbmRfY29tcGFuaW9uKHN0cnVjdCBjbGtfaHdfb21hcCAqY2xrLAogCiAvKioKICAqIG9t YXAyX2Nsa19kZmx0X2ZpbmRfaWRsZXN0IC0gZmluZCBDTV9JRExFU1QgcmVnIHZhLCBiaXQgc2hp ZnQgZm9yIEBjbGsKLSAqIEBjbGs6IHN0cnVjdCBjbGsgKiB0byBmaW5kIElETEVTVCBpbmZvIGZv cgorICogQGNsazogc3RydWN0IGNsa19jb3JlICogdG8gZmluZCBJRExFU1QgaW5mbyBmb3IKICAq IEBpZGxlc3RfcmVnOiB2b2lkIF9faW9tZW0gKiogdG8gcmV0dXJuIHRoZSBDTV9JRExFU1QgdmEg aW4KICAqIEBpZGxlc3RfYml0OiB1OCAqIHRvIHJldHVybiB0aGUgQ01fSURMRVNUIGJpdCBzaGlm dCBpbgogICogQGlkbGVzdF92YWw6IHU4ICogdG8gcmV0dXJuIHRoZSBpZGxlIHN0YXR1cyBpbmRp Y2F0b3IKQEAgLTUwMiwxNCArNTAyLDE0IEBAIF9fc2V0dXAoIm1wdXJhdGU9Iiwgb21hcF9jbGtf c2V0dXApOwogCiAvKioKICAqIG9tYXAyX2luaXRfY2xrX2h3X29tYXBfY2xvY2tzIC0gaW5pdGlh bGl6ZSBhbiBPTUFQIGNsb2NrCi0gKiBAY2xrOiBzdHJ1Y3QgY2xrICogdG8gaW5pdGlhbGl6ZQor ICogQGNsazogc3RydWN0IGNsa19jb3JlICogdG8gaW5pdGlhbGl6ZQogICoKICAqIEFkZCBhbiBP TUFQIGNsb2NrIEBjbGsgdG8gdGhlIGludGVybmFsIGxpc3Qgb2YgT01BUCBjbG9ja3MuICBVc2Vk CiAgKiB0ZW1wb3JhcmlseSBmb3IgYXV0b2lkbGUgaGFuZGxpbmcsIHVudGlsIHRoaXMgc3VwcG9y dCBjYW4gYmUKICAqIGludGVncmF0ZWQgaW50byB0aGUgY29tbW9uIGNsb2NrIGZyYW1ld29yayBj b2RlIGluIHNvbWUgd2F5LiAgTm8KICAqIHJldHVybiB2YWx1ZS4KICAqLwotdm9pZCBvbWFwMl9p bml0X2Nsa19od19vbWFwX2Nsb2NrcyhzdHJ1Y3QgY2xrICpjbGspCit2b2lkIG9tYXAyX2luaXRf Y2xrX2h3X29tYXBfY2xvY2tzKHN0cnVjdCBjbGtfY29yZSAqY2xrKQogewogCXN0cnVjdCBjbGtf aHdfb21hcCAqYzsKIApAQCAtNTY2LDExICs1NjYsMTEgQEAgaW50IG9tYXAyX2Nsa19kaXNhYmxl X2F1dG9pZGxlX2FsbCh2b2lkKQogCiAvKioKICAqIG9tYXAyX2Nsa19kZW55X2lkbGUgLSBkaXNh YmxlIGF1dG9pZGxlIG9uIGFuIE9NQVAgY2xvY2sKLSAqIEBjbGs6IHN0cnVjdCBjbGsgKiB0byBk aXNhYmxlIGF1dG9pZGxlIGZvcgorICogQGNsazogc3RydWN0IGNsa19jb3JlICogdG8gZGlzYWJs ZSBhdXRvaWRsZSBmb3IKICAqCiAgKiBEaXNhYmxlIGF1dG9pZGxlIG9uIGFuIE9NQVAgY2xvY2su CiAgKi8KLWludCBvbWFwMl9jbGtfZGVueV9pZGxlKHN0cnVjdCBjbGsgKmNsaykKK2ludCBvbWFw Ml9jbGtfZGVueV9pZGxlKHN0cnVjdCBjbGtfY29yZSAqY2xrKQogewogCXN0cnVjdCBjbGtfaHdf b21hcCAqYzsKIApAQCAtNTg1LDExICs1ODUsMTEgQEAgaW50IG9tYXAyX2Nsa19kZW55X2lkbGUo c3RydWN0IGNsayAqY2xrKQogCiAvKioKICAqIG9tYXAyX2Nsa19hbGxvd19pZGxlIC0gZW5hYmxl IGF1dG9pZGxlIG9uIGFuIE9NQVAgY2xvY2sKLSAqIEBjbGs6IHN0cnVjdCBjbGsgKiB0byBlbmFi bGUgYXV0b2lkbGUgZm9yCisgKiBAY2xrOiBzdHJ1Y3QgY2xrX2NvcmUgKiB0byBlbmFibGUgYXV0 b2lkbGUgZm9yCiAgKgogICogRW5hYmxlIGF1dG9pZGxlIG9uIGFuIE9NQVAgY2xvY2suCiAgKi8K LWludCBvbWFwMl9jbGtfYWxsb3dfaWRsZShzdHJ1Y3QgY2xrICpjbGspCitpbnQgb21hcDJfY2xr X2FsbG93X2lkbGUoc3RydWN0IGNsa19jb3JlICpjbGspCiB7CiAJc3RydWN0IGNsa19od19vbWFw ICpjOwogCkBAIC02MTQsMTIgKzYxNCwxMiBAQCBpbnQgb21hcDJfY2xrX2FsbG93X2lkbGUoc3Ry dWN0IGNsayAqY2xrKQogICovCiB2b2lkIG9tYXAyX2Nsa19lbmFibGVfaW5pdF9jbG9ja3MoY29u c3QgY2hhciAqKmNsa19uYW1lcywgdTggbnVtX2Nsb2NrcykKIHsKLQlzdHJ1Y3QgY2xrICppbml0 X2NsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmluaXRfY2xrOwogCWludCBpOwogCiAJZm9yIChpID0g MDsgaSA8IG51bV9jbG9ja3M7IGkrKykgewotCQlpbml0X2NsayA9IGNsa19nZXQoTlVMTCwgY2xr X25hbWVzW2ldKTsKLQkJY2xrX3ByZXBhcmVfZW5hYmxlKGluaXRfY2xrKTsKKwkJaW5pdF9jbGsg PSBjbGtfcHJvdmlkZXJfZ2V0KE5VTEwsIGNsa19uYW1lc1tpXSk7CisJCWNsa19wcm92aWRlcl9w cmVwYXJlX2VuYWJsZShpbml0X2Nsayk7CiAJfQogfQogCkBAIC02NTUsMzEgKzY1NSwzMSBAQCB2 b2lkIF9faW5pdCBvbWFwX2Nsb2Nrc19yZWdpc3RlcihzdHJ1Y3Qgb21hcF9jbGsgb2Nsa3NbXSwg aW50IGNudCkKICAqIHRoZSBPUFAgbGF5ZXIuICBYWFggVGhpcyBpcyBpbnRlbmRlZCB0byBiZSBo YW5kbGVkIGJ5IHRoZSBPUFAgbGF5ZXIKICAqIGNvZGUgaW4gdGhlIG5lYXIgZnV0dXJlIGFuZCBz aG91bGQgYmUgcmVtb3ZlZCBmcm9tIHRoZSBjbG9jayBjb2RlLgogICogUmV0dXJucyAtRUlOVkFM IGlmICdtcHVyYXRlJyBpcyB6ZXJvIG9yIGlmIGNsa19zZXRfcmF0ZSgpIHJlamVjdHMKLSAqIHRo ZSByYXRlLCAtRU5PRU5UIGlmIHRoZSBzdHJ1Y3QgY2xrIHJlZmVycmVkIHRvIGJ5IEBtcHVyYXRl X2NrX25hbWUKKyAqIHRoZSByYXRlLCAtRU5PRU5UIGlmIHRoZSBzdHJ1Y3QgY2xrX2NvcmUgcmVm ZXJyZWQgdG8gYnkgQG1wdXJhdGVfY2tfbmFtZQogICogY2Fubm90IGJlIGZvdW5kLCBvciAwIHVw b24gc3VjY2Vzcy4KICAqLwogaW50IF9faW5pdCBvbWFwMl9jbGtfc3dpdGNoX21wdXJhdGVfYXRf Ym9vdChjb25zdCBjaGFyICptcHVyYXRlX2NrX25hbWUpCiB7Ci0Jc3RydWN0IGNsayAqbXB1cmF0 ZV9jazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKm1wdXJhdGVfY2s7CiAJaW50IHI7CiAKIAlpZiAoIW1w dXJhdGUpCiAJCXJldHVybiAtRUlOVkFMOwogCi0JbXB1cmF0ZV9jayA9IGNsa19nZXQoTlVMTCwg bXB1cmF0ZV9ja19uYW1lKTsKKwltcHVyYXRlX2NrID0gY2xrX3Byb3ZpZGVyX2dldChOVUxMLCBt cHVyYXRlX2NrX25hbWUpOwogCWlmIChXQVJOKElTX0VSUihtcHVyYXRlX2NrKSwgIkZhaWxlZCB0 byBnZXQgJXMuXG4iLCBtcHVyYXRlX2NrX25hbWUpKQogCQlyZXR1cm4gLUVOT0VOVDsKIAotCXIg PSBjbGtfc2V0X3JhdGUobXB1cmF0ZV9jaywgbXB1cmF0ZSk7CisJciA9IGNsa19wcm92aWRlcl9z ZXRfcmF0ZShtcHVyYXRlX2NrLCBtcHVyYXRlKTsKIAlpZiAociA8IDApIHsKIAkJV0FSTigxLCAi Y2xvY2s6ICVzOiB1bmFibGUgdG8gc2V0IE1QVSByYXRlIHRvICVkOiAlZFxuIiwKIAkJICAgICBt cHVyYXRlX2NrX25hbWUsIG1wdXJhdGUsIHIpOwotCQljbGtfcHV0KG1wdXJhdGVfY2spOworCQlf X2Nsa19wdXQobXB1cmF0ZV9jayk7CiAJCXJldHVybiAtRUlOVkFMOwogCX0KIAogCWNhbGlicmF0 ZV9kZWxheSgpOwotCWNsa19wdXQobXB1cmF0ZV9jayk7CisJX19jbGtfcHV0KG1wdXJhdGVfY2sp OwogCiAJcmV0dXJuIDA7CiB9CkBAIC03MDAsMjcgKzcwMCwyNyBAQCB2b2lkIF9faW5pdCBvbWFw Ml9jbGtfcHJpbnRfbmV3X3JhdGVzKGNvbnN0IGNoYXIgKmhmY2xraW5fY2tfbmFtZSwKIAkJCQkg ICAgICBjb25zdCBjaGFyICpjb3JlX2NrX25hbWUsCiAJCQkJICAgICAgY29uc3QgY2hhciAqbXB1 X2NrX25hbWUpCiB7Ci0Jc3RydWN0IGNsayAqaGZjbGtpbl9jaywgKmNvcmVfY2ssICptcHVfY2s7 CisJc3RydWN0IGNsa19jb3JlICpoZmNsa2luX2NrLCAqY29yZV9jaywgKm1wdV9jazsKIAl1bnNp Z25lZCBsb25nIGhmY2xraW5fcmF0ZTsKIAotCW1wdV9jayA9IGNsa19nZXQoTlVMTCwgbXB1X2Nr X25hbWUpOworCW1wdV9jayA9IGNsa19wcm92aWRlcl9nZXQoTlVMTCwgbXB1X2NrX25hbWUpOwog CWlmIChXQVJOKElTX0VSUihtcHVfY2spLCAiY2xvY2s6IGZhaWxlZCB0byBnZXQgJXMuXG4iLCBt cHVfY2tfbmFtZSkpCiAJCXJldHVybjsKIAotCWNvcmVfY2sgPSBjbGtfZ2V0KE5VTEwsIGNvcmVf Y2tfbmFtZSk7CisJY29yZV9jayA9IGNsa19wcm92aWRlcl9nZXQoTlVMTCwgY29yZV9ja19uYW1l KTsKIAlpZiAoV0FSTihJU19FUlIoY29yZV9jayksICJjbG9jazogZmFpbGVkIHRvIGdldCAlcy5c biIsIGNvcmVfY2tfbmFtZSkpCiAJCXJldHVybjsKIAotCWhmY2xraW5fY2sgPSBjbGtfZ2V0KE5V TEwsIGhmY2xraW5fY2tfbmFtZSk7CisJaGZjbGtpbl9jayA9IGNsa19wcm92aWRlcl9nZXQoTlVM TCwgaGZjbGtpbl9ja19uYW1lKTsKIAlpZiAoV0FSTihJU19FUlIoaGZjbGtpbl9jayksICJGYWls ZWQgdG8gZ2V0ICVzLlxuIiwgaGZjbGtpbl9ja19uYW1lKSkKIAkJcmV0dXJuOwogCi0JaGZjbGtp bl9yYXRlID0gY2xrX2dldF9yYXRlKGhmY2xraW5fY2spOworCWhmY2xraW5fcmF0ZSA9IGNsa19w cm92aWRlcl9nZXRfcmF0ZShoZmNsa2luX2NrKTsKIAogCXByX2luZm8oIlN3aXRjaGVkIHRvIG5l dyBjbG9ja2luZyByYXRlIChDcnlzdGFsL0NvcmUvTVBVKTogJWxkLiUwMWxkLyVsZC8lbGQgTUh6 XG4iLAogCQkoaGZjbGtpbl9yYXRlIC8gMTAwMDAwMCksICgoaGZjbGtpbl9yYXRlIC8gMTAwMDAw KSAlIDEwKSwKLQkJKGNsa19nZXRfcmF0ZShjb3JlX2NrKSAvIDEwMDAwMDApLAotCQkoY2xrX2dl dF9yYXRlKG1wdV9jaykgLyAxMDAwMDAwKSk7CisJCShjbGtfcHJvdmlkZXJfZ2V0X3JhdGUoY29y ZV9jaykgLyAxMDAwMDAwKSwKKwkJKGNsa19wcm92aWRlcl9nZXRfcmF0ZShtcHVfY2spIC8gMTAw MDAwMCkpOwogfQogCiAvKioKZGlmZiAtLWdpdCBhL2FyY2gvYXJtL21hY2gtb21hcDIvY2xvY2su aCBiL2FyY2gvYXJtL21hY2gtb21hcDIvY2xvY2suaAppbmRleCA0NTkyYTI3Li43MDY4Njg0IDEw MDY0NAotLS0gYS9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsb2NrLmgKKysrIGIvYXJjaC9hcm0vbWFj aC1vbWFwMi9jbG9jay5oCkBAIC00MCw3ICs0MCw3IEBAIHN0cnVjdCBvbWFwX2NsayB7CiBzdHJ1 Y3QgY2xvY2tkb21haW47CiAKICNkZWZpbmUgREVGSU5FX1NUUlVDVF9DTEsoX25hbWUsIF9wYXJl bnRfYXJyYXlfbmFtZSwgX2Nsa29wc19uYW1lKQlcCi0Jc3RhdGljIHN0cnVjdCBjbGsgX25hbWUg PSB7CQkJCVwKKwlzdGF0aWMgc3RydWN0IGNsa19jb3JlIF9uYW1lID0gewkJCQlcCiAJCS5uYW1l ID0gI19uYW1lLAkJCQkJXAogCQkuaHcgPSAmX25hbWUjI19ody5odywJCQkJXAogCQkucGFyZW50 X25hbWVzID0gX3BhcmVudF9hcnJheV9uYW1lLAkJXApAQCAtNTAsNyArNTAsNyBAQCBzdHJ1Y3Qg Y2xvY2tkb21haW47CiAKICNkZWZpbmUgREVGSU5FX1NUUlVDVF9DTEtfRkxBR1MoX25hbWUsIF9w YXJlbnRfYXJyYXlfbmFtZSwJXAogCQkJCV9jbGtvcHNfbmFtZSwgX2ZsYWdzKQkJXAotCXN0YXRp YyBzdHJ1Y3QgY2xrIF9uYW1lID0gewkJCQlcCisJc3RhdGljIHN0cnVjdCBjbGtfY29yZSBfbmFt ZSA9IHsJCQkJXAogCQkubmFtZSA9ICNfbmFtZSwJCQkJCVwKIAkJLmh3ID0gJl9uYW1lIyNfaHcu aHcsCQkJCVwKIAkJLnBhcmVudF9uYW1lcyA9IF9wYXJlbnRfYXJyYXlfbmFtZSwJCVwKQEAgLTcw LDcgKzcwLDcgQEAgc3RydWN0IGNsb2NrZG9tYWluOwogI2RlZmluZSBERUZJTkVfQ0xLX09NQVBf TVVYKF9uYW1lLCBfY2xrZG1fbmFtZSwgX2Nsa3NlbCwJXAogCQkJICAgIF9jbGtzZWxfcmVnLCBf Y2xrc2VsX21hc2ssCQlcCiAJCQkgICAgX3BhcmVudF9uYW1lcywgX29wcykJCVwKLQlzdGF0aWMg c3RydWN0IGNsayBfbmFtZTsJCQkJXAorCXN0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgX25hbWU7CQkJ CVwKIAlzdGF0aWMgc3RydWN0IGNsa19od19vbWFwIF9uYW1lIyNfaHcgPSB7CQlcCiAJCS5odyA9 IHsJCQkJCQlcCiAJCQkuY2xrID0gJl9uYW1lLAkJCQlcCkBAIC04Niw3ICs4Niw3IEBAIHN0cnVj dCBjbG9ja2RvbWFpbjsKIAkJCQkgX2Nsa3NlbF9yZWcsIF9jbGtzZWxfbWFzaywJXAogCQkJCSBf ZW5hYmxlX3JlZywgX2VuYWJsZV9iaXQsCVwKIAkJCQkgX2h3b3BzLCBfcGFyZW50X25hbWVzLCBf b3BzKQlcCi0Jc3RhdGljIHN0cnVjdCBjbGsgX25hbWU7CQkJCVwKKwlzdGF0aWMgc3RydWN0IGNs a19jb3JlIF9uYW1lOwkJCQlcCiAJc3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCBfbmFtZSMjX2h3 ID0gewkJXAogCQkuaHcgPSB7CQkJCQkJXAogCQkJLmNsayA9ICZfbmFtZSwJCQkJXApAQCAtMTQy LDE0ICsxNDIsMTQgQEAgc3RydWN0IGNsa3NlbF9yYXRlIHsKIAogLyoqCiAgKiBzdHJ1Y3QgY2xr c2VsIC0gYXZhaWxhYmxlIHBhcmVudCBjbG9ja3MsIGFuZCBhIHBvaW50ZXIgdG8gdGhlaXIgZGl2 aXNvcnMKLSAqIEBwYXJlbnQ6IHN0cnVjdCBjbGsgKiB0byBhIHBvc3NpYmxlIHBhcmVudCBjbG9j aworICogQHBhcmVudDogc3RydWN0IGNsa19jb3JlICogdG8gYSBwb3NzaWJsZSBwYXJlbnQgY2xv Y2sKICAqIEByYXRlczogYXZhaWxhYmxlIGRpdmlzb3JzIGZvciB0aGlzIHBhcmVudCBjbG9jawog ICoKICAqIEEgc3RydWN0IGNsa3NlbCBpcyBhbHdheXMgYXNzb2NpYXRlZCB3aXRoIG9uZSBvciBt b3JlIHN0cnVjdCBjbGtzCiAgKiBhbmQgb25lIG9yIG1vcmUgc3RydWN0IGNsa3NlbF9yYXRlcy4K ICAqLwogc3RydWN0IGNsa3NlbCB7Ci0Jc3RydWN0IGNsawkJICpwYXJlbnQ7CisJc3RydWN0IGNs a19jb3JlCQkgKnBhcmVudDsKIAljb25zdCBzdHJ1Y3QgY2xrc2VsX3JhdGUgKnJhdGVzOwogfTsK IApAQCAtMjA4LDggKzIwOCw4IEBAIHZvaWQgb21hcDJfY2xrX2RmbHRfZmluZF9pZGxlc3Qoc3Ry dWN0IGNsa19od19vbWFwICpjbGssCiAJCQkJdm9pZCBfX2lvbWVtICoqaWRsZXN0X3JlZywKIAkJ CQl1OCAqaWRsZXN0X2JpdCwgdTggKmlkbGVzdF92YWwpOwogaW50IG9tYXAyX2Nsa19lbmFibGVf YXV0b2lkbGVfYWxsKHZvaWQpOwotaW50IG9tYXAyX2Nsa19hbGxvd19pZGxlKHN0cnVjdCBjbGsg KmNsayk7Ci1pbnQgb21hcDJfY2xrX2RlbnlfaWRsZShzdHJ1Y3QgY2xrICpjbGspOworaW50IG9t YXAyX2Nsa19hbGxvd19pZGxlKHN0cnVjdCBjbGtfY29yZSAqY2xrKTsKK2ludCBvbWFwMl9jbGtf ZGVueV9pZGxlKHN0cnVjdCBjbGtfY29yZSAqY2xrKTsKIGludCBvbWFwMl9jbGtfc3dpdGNoX21w dXJhdGVfYXRfYm9vdChjb25zdCBjaGFyICptcHVyYXRlX2NrX25hbWUpOwogdm9pZCBvbWFwMl9j bGtfcHJpbnRfbmV3X3JhdGVzKGNvbnN0IGNoYXIgKmhmY2xraW5fY2tfbmFtZSwKIAkJCSAgICAg ICBjb25zdCBjaGFyICpjb3JlX2NrX25hbWUsCkBAIC0yNDcsNyArMjQ3LDcgQEAgZXh0ZXJuIGNv bnN0IHN0cnVjdCBjbGtzZWxfcmF0ZSBncHRfMzJrX3JhdGVzW107CiBleHRlcm4gY29uc3Qgc3Ry dWN0IGNsa3NlbF9yYXRlIGdwdF9zeXNfcmF0ZXNbXTsKIGV4dGVybiBjb25zdCBzdHJ1Y3QgY2xr c2VsX3JhdGUgZ2Z4X2wzX3JhdGVzW107CiBleHRlcm4gY29uc3Qgc3RydWN0IGNsa3NlbF9yYXRl IGRzcF9pY2tfcmF0ZXNbXTsKLWV4dGVybiBzdHJ1Y3QgY2xrIGR1bW15X2NrOworZXh0ZXJuIHN0 cnVjdCBjbGtfY29yZSBkdW1teV9jazsKIAogZXh0ZXJuIGNvbnN0IHN0cnVjdCBjbGtfaHdfb21h cF9vcHMgY2xraHdvcHNfaWNsa193YWl0OwogZXh0ZXJuIGNvbnN0IHN0cnVjdCBjbGtfaHdfb21h cF9vcHMgY2xraHdvcHNfd2FpdDsKZGlmZiAtLWdpdCBhL2FyY2gvYXJtL21hY2gtb21hcDIvY2xv Y2szeHh4LmMgYi9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsb2NrM3h4eC5jCmluZGV4IDBiMDJiNDEu LjhkMWI4NDMgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL21hY2gtb21hcDIvY2xvY2szeHh4LmMKKysr IGIvYXJjaC9hcm0vbWFjaC1vbWFwMi9jbG9jazN4eHguYwpAQCAtMTgsNyArMTgsNiBAQAogCiAj aW5jbHVkZSA8bGludXgva2VybmVsLmg+CiAjaW5jbHVkZSA8bGludXgvZXJybm8uaD4KLSNpbmNs dWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9pby5oPgogCiAjaW5jbHVkZSAic29j LmgiCkBAIC0zNyw3ICszNiw3IEBACiAjZGVmaW5lIERQTEw1X0ZSRVFfRk9SX1VTQkhPU1QJCTEy MDAwMDAwMAogCiAvKiBuZWVkZWQgYnkgb21hcDNfY29yZV9kcGxsX20yX3NldF9yYXRlKCkgKi8K LXN0cnVjdCBjbGsgKnNkcmNfaWNrX3AsICphcm1fZmNrX3A7CitzdHJ1Y3QgY2xrX2NvcmUgKnNk cmNfaWNrX3AsICphcm1fZmNrX3A7CiBpbnQgb21hcDNfZHBsbDRfc2V0X3JhdGUoc3RydWN0IGNs a19odyAqaHcsIHVuc2lnbmVkIGxvbmcgcmF0ZSwKIAkJCQl1bnNpZ25lZCBsb25nIHBhcmVudF9y YXRlKQogewpAQCAtNTYsMjAgKzU1LDIwIEBAIGludCBvbWFwM19kcGxsNF9zZXRfcmF0ZShzdHJ1 Y3QgY2xrX2h3ICpodywgdW5zaWduZWQgbG9uZyByYXRlLAogCiB2b2lkIF9faW5pdCBvbWFwM19j bGtfbG9ja19kcGxsNSh2b2lkKQogewotCXN0cnVjdCBjbGsgKmRwbGw1X2NsazsKLQlzdHJ1Y3Qg Y2xrICpkcGxsNV9tMl9jbGs7CisJc3RydWN0IGNsa19jb3JlICpkcGxsNV9jbGs7CisJc3RydWN0 IGNsa19jb3JlICpkcGxsNV9tMl9jbGs7CiAKLQlkcGxsNV9jbGsgPSBjbGtfZ2V0KE5VTEwsICJk cGxsNV9jayIpOwotCWNsa19zZXRfcmF0ZShkcGxsNV9jbGssIERQTEw1X0ZSRVFfRk9SX1VTQkhP U1QpOwotCWNsa19wcmVwYXJlX2VuYWJsZShkcGxsNV9jbGspOworCWRwbGw1X2NsayA9IGNsa19w cm92aWRlcl9nZXQoTlVMTCwgImRwbGw1X2NrIik7CisJY2xrX3Byb3ZpZGVyX3NldF9yYXRlKGRw bGw1X2NsaywgRFBMTDVfRlJFUV9GT1JfVVNCSE9TVCk7CisJY2xrX3Byb3ZpZGVyX3ByZXBhcmVf ZW5hYmxlKGRwbGw1X2Nsayk7CiAKIAkvKiBQcm9ncmFtIGRwbGw1X20yX2NsayBkaXZpZGVyIGZv ciBubyBkaXZpc2lvbiAqLwotCWRwbGw1X20yX2NsayA9IGNsa19nZXQoTlVMTCwgImRwbGw1X20y X2NrIik7Ci0JY2xrX3ByZXBhcmVfZW5hYmxlKGRwbGw1X20yX2Nsayk7Ci0JY2xrX3NldF9yYXRl KGRwbGw1X20yX2NsaywgRFBMTDVfRlJFUV9GT1JfVVNCSE9TVCk7CisJZHBsbDVfbTJfY2xrID0g Y2xrX3Byb3ZpZGVyX2dldChOVUxMLCAiZHBsbDVfbTJfY2siKTsKKwljbGtfcHJvdmlkZXJfcHJl cGFyZV9lbmFibGUoZHBsbDVfbTJfY2xrKTsKKwljbGtfcHJvdmlkZXJfc2V0X3JhdGUoZHBsbDVf bTJfY2xrLCBEUExMNV9GUkVRX0ZPUl9VU0JIT1NUKTsKIAotCWNsa19kaXNhYmxlX3VucHJlcGFy ZShkcGxsNV9tMl9jbGspOwotCWNsa19kaXNhYmxlX3VucHJlcGFyZShkcGxsNV9jbGspOworCWNs a19wcm92aWRlcl9kaXNhYmxlX3VucHJlcGFyZShkcGxsNV9tMl9jbGspOworCWNsa19wcm92aWRl cl9kaXNhYmxlX3VucHJlcGFyZShkcGxsNV9jbGspOwogCXJldHVybjsKIH0KIApkaWZmIC0tZ2l0 IGEvYXJjaC9hcm0vbWFjaC1vbWFwMi9jbG9jazN4eHguaCBiL2FyY2gvYXJtL21hY2gtb21hcDIv Y2xvY2szeHh4LmgKaW5kZXggNzhkOWY1Ni4uMDYzZmJmMSAxMDA2NDQKLS0tIGEvYXJjaC9hcm0v bWFjaC1vbWFwMi9jbG9jazN4eHguaAorKysgYi9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsb2NrM3h4 eC5oCkBAIC0xMiw4ICsxMiw4IEBAIGludCBvbWFwM3h4eF9jbGtfaW5pdCh2b2lkKTsKIGludCBv bWFwM19jb3JlX2RwbGxfbTJfc2V0X3JhdGUoc3RydWN0IGNsa19odyAqY2xrLCB1bnNpZ25lZCBs b25nIHJhdGUsCiAJCQkJCXVuc2lnbmVkIGxvbmcgcGFyZW50X3JhdGUpOwogCi1leHRlcm4gc3Ry dWN0IGNsayAqc2RyY19pY2tfcDsKLWV4dGVybiBzdHJ1Y3QgY2xrICphcm1fZmNrX3A7CitleHRl cm4gc3RydWN0IGNsa19jb3JlICpzZHJjX2lja19wOworZXh0ZXJuIHN0cnVjdCBjbGtfY29yZSAq YXJtX2Zja19wOwogCiBleHRlcm4gY29uc3Qgc3RydWN0IGNsa29wcyBjbGtvcHNfbm9uY29yZV9k cGxsX29wczsKIApkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vbWFjaC1vbWFwMi9jbG9ja19jb21tb25f ZGF0YS5jIGIvYXJjaC9hcm0vbWFjaC1vbWFwMi9jbG9ja19jb21tb25fZGF0YS5jCmluZGV4IGVm NGQyMWIuLjMxZTNlNzkgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL21hY2gtb21hcDIvY2xvY2tfY29t bW9uX2RhdGEuYworKysgYi9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsb2NrX2NvbW1vbl9kYXRhLmMK QEAgLTExOSw3ICsxMTksNyBAQCBjb25zdCBzdHJ1Y3QgY2xrc2VsX3JhdGUgZGl2MzFfMXRvMzFf cmF0ZXNbXSA9IHsKIAogc3RhdGljIHN0cnVjdCBjbGtfb3BzIGR1bW15X2NrX29wcyA9IHt9Owog Ci1zdHJ1Y3QgY2xrIGR1bW15X2NrID0geworc3RydWN0IGNsa19jb3JlIGR1bW15X2NrID0gewog CS5uYW1lID0gImR1bW15X2NsayIsCiAJLm9wcyA9ICZkdW1teV9ja19vcHMsCiAJLmZsYWdzID0g Q0xLX0lTX0JBU0lDLApkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vbWFjaC1vbWFwMi9jbG9ja2RvbWFp bi5jIGIvYXJjaC9hcm0vbWFjaC1vbWFwMi9jbG9ja2RvbWFpbi5jCmluZGV4IDJkYTNiNWUuLmRk ODkwOTUgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL21hY2gtb21hcDIvY2xvY2tkb21haW4uYworKysg Yi9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsb2NrZG9tYWluLmMKQEAgLTE5LDcgKzE5LDYgQEAKICNp bmNsdWRlIDxsaW51eC9lcnJuby5oPgogI2luY2x1ZGUgPGxpbnV4L3N0cmluZy5oPgogI2luY2x1 ZGUgPGxpbnV4L2RlbGF5Lmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8bGlu dXgvbGltaXRzLmg+CiAjaW5jbHVkZSA8bGludXgvZXJyLmg+CiAjaW5jbHVkZSA8bGludXgvY2xr LXByb3ZpZGVyLmg+CkBAIC0xMTQxLDcgKzExNDAsNyBAQCBzdGF0aWMgaW50IF9jbGtkbV9jbGtf aHdtb2RfZW5hYmxlKHN0cnVjdCBjbG9ja2RvbWFpbiAqY2xrZG0pCiAvKioKICAqIGNsa2RtX2Ns a19lbmFibGUgLSBhZGQgYW4gZW5hYmxlZCBkb3duc3RyZWFtIGNsb2NrIHRvIHRoaXMgY2xrZG0K ICAqIEBjbGtkbTogc3RydWN0IGNsb2NrZG9tYWluICoKLSAqIEBjbGs6IHN0cnVjdCBjbGsgKiBv ZiB0aGUgZW5hYmxlZCBkb3duc3RyZWFtIGNsb2NrCisgKiBAY2xrOiBzdHJ1Y3QgY2xrX2NvcmUg KiBvZiB0aGUgZW5hYmxlZCBkb3duc3RyZWFtIGNsb2NrCiAgKgogICogSW5jcmVtZW50IHRoZSB1 c2Vjb3VudCBvZiB0aGUgY2xvY2tkb21haW4gQGNsa2RtIGFuZCBlbnN1cmUgdGhhdCBpdAogICog aXMgYXdha2UgYmVmb3JlIEBjbGsgaXMgZW5hYmxlZC4gIEludGVuZGVkIHRvIGJlIGNhbGxlZCBi eQpAQCAtMTE1Miw3ICsxMTUxLDcgQEAgc3RhdGljIGludCBfY2xrZG1fY2xrX2h3bW9kX2VuYWJs ZShzdHJ1Y3QgY2xvY2tkb21haW4gKmNsa2RtKQogICogYnkgb24tY2hpcCBwcm9jZXNzb3JzLiAg UmV0dXJucyAtRUlOVkFMIGlmIHBhc3NlZCBudWxsIHBvaW50ZXJzOwogICogcmV0dXJucyAwIHVw b24gc3VjY2VzcyBvciBpZiB0aGUgY2xvY2tkb21haW4gaXMgaW4gaHdzdXAgaWRsZSBtb2RlLgog ICovCi1pbnQgY2xrZG1fY2xrX2VuYWJsZShzdHJ1Y3QgY2xvY2tkb21haW4gKmNsa2RtLCBzdHJ1 Y3QgY2xrICpjbGspCitpbnQgY2xrZG1fY2xrX2VuYWJsZShzdHJ1Y3QgY2xvY2tkb21haW4gKmNs a2RtLCBzdHJ1Y3QgY2xrX2NvcmUgKmNsaykKIHsKIAkvKgogCSAqIFhYWCBSZXdyaXRlIHRoaXMg Y29kZSB0byBtYWludGFpbiBhIGxpc3Qgb2YgZW5hYmxlZApAQCAtMTE2OCw3ICsxMTY3LDcgQEAg aW50IGNsa2RtX2Nsa19lbmFibGUoc3RydWN0IGNsb2NrZG9tYWluICpjbGtkbSwgc3RydWN0IGNs ayAqY2xrKQogLyoqCiAgKiBjbGtkbV9jbGtfZGlzYWJsZSAtIHJlbW92ZSBhbiBlbmFibGVkIGRv d25zdHJlYW0gY2xvY2sgZnJvbSB0aGlzIGNsa2RtCiAgKiBAY2xrZG06IHN0cnVjdCBjbG9ja2Rv bWFpbiAqCi0gKiBAY2xrOiBzdHJ1Y3QgY2xrICogb2YgdGhlIGRpc2FibGVkIGRvd25zdHJlYW0g Y2xvY2sKKyAqIEBjbGs6IHN0cnVjdCBjbGtfY29yZSAqIG9mIHRoZSBkaXNhYmxlZCBkb3duc3Ry ZWFtIGNsb2NrCiAgKgogICogRGVjcmVtZW50IHRoZSB1c2Vjb3VudCBvZiB0aGlzIGNsb2NrZG9t YWluIEBjbGtkbSB3aGVuIEBjbGsgaXMKICAqIGRpc2FibGVkLiAgSW50ZW5kZWQgdG8gYmUgY2Fs bGVkIGJ5IGNsa19kaXNhYmxlKCkgY29kZS4gIElmIHRoZQpAQCAtMTE3OCw3ICsxMTc3LDcgQEAg aW50IGNsa2RtX2Nsa19lbmFibGUoc3RydWN0IGNsb2NrZG9tYWluICpjbGtkbSwgc3RydWN0IGNs ayAqY2xrKQogICogcG9pbnRlcnM7IC1FUkFOR0UgaWYgdGhlIEBjbGtkbSB1c2Vjb3VudCB1bmRl cmZsb3dzOyBvciByZXR1cm5zIDAKICAqIHVwb24gc3VjY2VzcyBvciBpZiB0aGUgY2xvY2tkb21h aW4gaXMgaW4gaHdzdXAgaWRsZSBtb2RlLgogICovCi1pbnQgY2xrZG1fY2xrX2Rpc2FibGUoc3Ry dWN0IGNsb2NrZG9tYWluICpjbGtkbSwgc3RydWN0IGNsayAqY2xrKQoraW50IGNsa2RtX2Nsa19k aXNhYmxlKHN0cnVjdCBjbG9ja2RvbWFpbiAqY2xrZG0sIHN0cnVjdCBjbGtfY29yZSAqY2xrKQog ewogCWlmICghY2xrZG0gfHwgIWNsayB8fCAhYXJjaF9jbGtkbSB8fCAhYXJjaF9jbGtkbS0+Y2xr ZG1fY2xrX2Rpc2FibGUpCiAJCXJldHVybiAtRUlOVkFMOwpkaWZmIC0tZ2l0IGEvYXJjaC9hcm0v bWFjaC1vbWFwMi9jbG9ja2RvbWFpbi5oIGIvYXJjaC9hcm0vbWFjaC1vbWFwMi9jbG9ja2RvbWFp bi5oCmluZGV4IDgyYzM3YjEuLmYxYTJjYWQgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL21hY2gtb21h cDIvY2xvY2tkb21haW4uaAorKysgYi9hcmNoL2FybS9tYWNoLW9tYXAyL2Nsb2NrZG9tYWluLmgK QEAgLTIwNyw4ICsyMDcsOCBAQCBpbnQgY2xrZG1fd2FrZXVwKHN0cnVjdCBjbG9ja2RvbWFpbiAq Y2xrZG0pOwogaW50IGNsa2RtX3NsZWVwX25vbG9jayhzdHJ1Y3QgY2xvY2tkb21haW4gKmNsa2Rt KTsKIGludCBjbGtkbV9zbGVlcChzdHJ1Y3QgY2xvY2tkb21haW4gKmNsa2RtKTsKIAotaW50IGNs a2RtX2Nsa19lbmFibGUoc3RydWN0IGNsb2NrZG9tYWluICpjbGtkbSwgc3RydWN0IGNsayAqY2xr KTsKLWludCBjbGtkbV9jbGtfZGlzYWJsZShzdHJ1Y3QgY2xvY2tkb21haW4gKmNsa2RtLCBzdHJ1 Y3QgY2xrICpjbGspOworaW50IGNsa2RtX2Nsa19lbmFibGUoc3RydWN0IGNsb2NrZG9tYWluICpj bGtkbSwgc3RydWN0IGNsa19jb3JlICpjbGspOworaW50IGNsa2RtX2Nsa19kaXNhYmxlKHN0cnVj dCBjbG9ja2RvbWFpbiAqY2xrZG0sIHN0cnVjdCBjbGtfY29yZSAqY2xrKTsKIGludCBjbGtkbV9o d21vZF9lbmFibGUoc3RydWN0IGNsb2NrZG9tYWluICpjbGtkbSwgc3RydWN0IG9tYXBfaHdtb2Qg Km9oKTsKIGludCBjbGtkbV9od21vZF9kaXNhYmxlKHN0cnVjdCBjbG9ja2RvbWFpbiAqY2xrZG0s IHN0cnVjdCBvbWFwX2h3bW9kICpvaCk7CiAKZGlmZiAtLWdpdCBhL2FyY2gvYXJtL21hY2gtb21h cDIvZGlzcGxheS5jIGIvYXJjaC9hcm0vbWFjaC1vbWFwMi9kaXNwbGF5LmMKaW5kZXggMGY5ZTQ3 OS4uZmYxZjZjMSAxMDA2NDQKLS0tIGEvYXJjaC9hcm0vbWFjaC1vbWFwMi9kaXNwbGF5LmMKKysr IGIvYXJjaC9hcm0vbWFjaC1vbWFwMi9kaXNwbGF5LmMKQEAgLTIwLDcgKzIwLDYgQEAKICNpbmNs dWRlIDxsaW51eC9pbml0Lmg+CiAjaW5jbHVkZSA8bGludXgvcGxhdGZvcm1fZGV2aWNlLmg+CiAj aW5jbHVkZSA8bGludXgvaW8uaD4KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxs aW51eC9jbGstcHJvdmlkZXIuaD4KICNpbmNsdWRlIDxsaW51eC9lcnIuaD4KICNpbmNsdWRlIDxs aW51eC9kZWxheS5oPgpAQCAtNTI0LDcgKzUyMyw3IEBAIGludCBvbWFwX2Rzc19yZXNldChzdHJ1 Y3Qgb21hcF9od21vZCAqb2gpCiAKIAlmb3IgKGkgPSBvaC0+b3B0X2Nsa3NfY250LCBvYyA9IG9o LT5vcHRfY2xrczsgaSA+IDA7IGktLSwgb2MrKykKIAkJaWYgKG9jLT5fY2xrKQotCQkJY2xrX3By ZXBhcmVfZW5hYmxlKG9jLT5fY2xrKTsKKwkJCWNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShv Yy0+X2Nsayk7CiAKIAlkaXNwY19kaXNhYmxlX291dHB1dHMoKTsKIApAQCAtNTUxLDcgKzU1MCw3 IEBAIGludCBvbWFwX2Rzc19yZXNldChzdHJ1Y3Qgb21hcF9od21vZCAqb2gpCiAKIAlmb3IgKGkg PSBvaC0+b3B0X2Nsa3NfY250LCBvYyA9IG9oLT5vcHRfY2xrczsgaSA+IDA7IGktLSwgb2MrKykK IAkJaWYgKG9jLT5fY2xrKQotCQkJY2xrX2Rpc2FibGVfdW5wcmVwYXJlKG9jLT5fY2xrKTsKKwkJ CWNsa19wcm92aWRlcl9kaXNhYmxlX3VucHJlcGFyZShvYy0+X2Nsayk7CiAKIAlyID0gKGMgPT0g TUFYX01PRFVMRV9TT0ZUUkVTRVRfV0FJVCkgPyAtRVRJTUVET1VUIDogMDsKIApkaWZmIC0tZ2l0 IGEvYXJjaC9hcm0vbWFjaC1vbWFwMi9kcGxsM3h4eC5jIGIvYXJjaC9hcm0vbWFjaC1vbWFwMi9k cGxsM3h4eC5jCmluZGV4IGFjM2Q3ODkuLjM5YzM4NjEgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL21h Y2gtb21hcDIvZHBsbDN4eHguYworKysgYi9hcmNoL2FybS9tYWNoLW9tYXAyL2RwbGwzeHh4LmMK QEAgLTIzLDcgKzIzLDYgQEAKICNpbmNsdWRlIDxsaW51eC9saXN0Lmg+CiAjaW5jbHVkZSA8bGlu dXgvZXJybm8uaD4KICNpbmNsdWRlIDxsaW51eC9kZWxheS5oPgotI2luY2x1ZGUgPGxpbnV4L2Ns ay5oPgogI2luY2x1ZGUgPGxpbnV4L2lvLmg+CiAjaW5jbHVkZSA8bGludXgvYml0b3BzLmg+CiAj aW5jbHVkZSA8bGludXgvY2xrZGV2Lmg+CkBAIC0yODgsNyArMjg3LDcgQEAgc3RhdGljIHZvaWQg X2xvb2t1cF9zZGRpdihzdHJ1Y3QgY2xrX2h3X29tYXAgKmNsaywgdTggKnNkX2RpdiwgdTE2IG0s IHU4IG4pCiAKIC8qCiAgKiBfb21hcDNfbm9uY29yZV9kcGxsX3Byb2dyYW0gLSBzZXQgbm9uLWNv cmUgRFBMTCBNLE4gdmFsdWVzIGRpcmVjdGx5Ci0gKiBAY2xrOglzdHJ1Y3QgY2xrICogb2YgRFBM TCB0byBzZXQKKyAqIEBjbGs6CXN0cnVjdCBjbGtfY29yZSAqIG9mIERQTEwgdG8gc2V0CiAgKiBA ZnJlcXNlbDoJRlJFUVNFTCB2YWx1ZSB0byBzZXQKICAqCiAgKiBQcm9ncmFtIHRoZSBEUExMIHdp dGggdGhlIGxhc3QgTSwgTiB2YWx1ZXMgY2FsY3VsYXRlZCwgYW5kIHdhaXQgZm9yCkBAIC00MTAs NyArNDA5LDcgQEAgaW50IG9tYXAzX25vbmNvcmVfZHBsbF9lbmFibGUoc3RydWN0IGNsa19odyAq aHcpCiAJc3RydWN0IGNsa19od19vbWFwICpjbGsgPSB0b19jbGtfaHdfb21hcChodyk7CiAJaW50 IHI7CiAJc3RydWN0IGRwbGxfZGF0YSAqZGQ7Ci0Jc3RydWN0IGNsayAqcGFyZW50OworCXN0cnVj dCBjbGtfY29yZSAqcGFyZW50OwogCiAJZGQgPSBjbGstPmRwbGxfZGF0YTsKIAlpZiAoIWRkKQpA QCAtNDYxLDcgKzQ2MCw3IEBAIHZvaWQgb21hcDNfbm9uY29yZV9kcGxsX2Rpc2FibGUoc3RydWN0 IGNsa19odyAqaHcpCiAKIC8qKgogICogb21hcDNfbm9uY29yZV9kcGxsX3NldF9yYXRlIC0gc2V0 IG5vbi1jb3JlIERQTEwgcmF0ZQotICogQGNsazogc3RydWN0IGNsayAqIG9mIERQTEwgdG8gc2V0 CisgKiBAY2xrOiBzdHJ1Y3QgY2xrX2NvcmUgKiBvZiBEUExMIHRvIHNldAogICogQHJhdGU6IHJv dW5kZWQgdGFyZ2V0IHJhdGUKICAqCiAgKiBTZXQgdGhlIERQTEwgQ0xLT1VUIHRvIHRoZSB0YXJn ZXQgcmF0ZS4gIElmIHRoZSBEUExMIGNhbiBlbnRlcgpAQCAtNDc0LDcgKzQ3Myw3IEBAIGludCBv bWFwM19ub25jb3JlX2RwbGxfc2V0X3JhdGUoc3RydWN0IGNsa19odyAqaHcsIHVuc2lnbmVkIGxv bmcgcmF0ZSwKIAkJCQkJdW5zaWduZWQgbG9uZyBwYXJlbnRfcmF0ZSkKIHsKIAlzdHJ1Y3QgY2xr X2h3X29tYXAgKmNsayA9IHRvX2Nsa19od19vbWFwKGh3KTsKLQlzdHJ1Y3QgY2xrICpuZXdfcGFy ZW50ID0gTlVMTDsKKwlzdHJ1Y3QgY2xrX2NvcmUgKm5ld19wYXJlbnQgPSBOVUxMOwogCXVuc2ln bmVkIGxvbmcgcnJhdGU7CiAJdTE2IGZyZXFzZWwgPSAwOwogCXN0cnVjdCBkcGxsX2RhdGEgKmRk OwpAQCAtNDkzLDE1ICs0OTIsMTUgQEAgaW50IG9tYXAzX25vbmNvcmVfZHBsbF9zZXRfcmF0ZShz dHJ1Y3QgY2xrX2h3ICpodywgdW5zaWduZWQgbG9uZyByYXRlLAogCQkJIF9fZnVuY19fLCBfX2Ns a19nZXRfbmFtZShody0+Y2xrKSk7CiAKIAkJX19jbGtfcHJlcGFyZShkZC0+Y2xrX2J5cGFzcyk7 Ci0JCWNsa19lbmFibGUoZGQtPmNsa19ieXBhc3MpOworCQljbGtfcHJvdmlkZXJfZW5hYmxlKGRk LT5jbGtfYnlwYXNzKTsKIAkJcmV0ID0gX29tYXAzX25vbmNvcmVfZHBsbF9ieXBhc3MoY2xrKTsK IAkJaWYgKCFyZXQpCiAJCQluZXdfcGFyZW50ID0gZGQtPmNsa19ieXBhc3M7Ci0JCWNsa19kaXNh YmxlKGRkLT5jbGtfYnlwYXNzKTsKKwkJY2xrX3Byb3ZpZGVyX2Rpc2FibGUoZGQtPmNsa19ieXBh c3MpOwogCQlfX2Nsa191bnByZXBhcmUoZGQtPmNsa19ieXBhc3MpOwogCX0gZWxzZSB7CiAJCV9f Y2xrX3ByZXBhcmUoZGQtPmNsa19yZWYpOwotCQljbGtfZW5hYmxlKGRkLT5jbGtfcmVmKTsKKwkJ Y2xrX3Byb3ZpZGVyX2VuYWJsZShkZC0+Y2xrX3JlZik7CiAKIAkJLyogWFhYIHRoaXMgY2hlY2sg aXMgcHJvYmFibHkgcG9pbnRsZXNzIGluIHRoZSBDQ0YgY29udGV4dCAqLwogCQlpZiAoZGQtPmxh c3Rfcm91bmRlZF9yYXRlICE9IHJhdGUpIHsKQEAgLTUzMCw3ICs1MjksNyBAQCBpbnQgb21hcDNf bm9uY29yZV9kcGxsX3NldF9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25lZCBsb25nIHJh dGUsCiAJCXJldCA9IG9tYXAzX25vbmNvcmVfZHBsbF9wcm9ncmFtKGNsaywgZnJlcXNlbCk7CiAJ CWlmICghcmV0KQogCQkJbmV3X3BhcmVudCA9IGRkLT5jbGtfcmVmOwotCQljbGtfZGlzYWJsZShk ZC0+Y2xrX3JlZik7CisJCWNsa19wcm92aWRlcl9kaXNhYmxlKGRkLT5jbGtfcmVmKTsKIAkJX19j bGtfdW5wcmVwYXJlKGRkLT5jbGtfcmVmKTsKIAl9CiAJLyoKQEAgLTU0MCw3ICs1MzksNyBAQCBp bnQgb21hcDNfbm9uY29yZV9kcGxsX3NldF9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25l ZCBsb25nIHJhdGUsCiAJKiBzdHVmZiBpcyBpbmhlcml0ZWQgZm9yIGZyZWUKIAkqLwogCi0JaWYg KCFyZXQgJiYgY2xrX2dldF9wYXJlbnQoaHctPmNsaykgIT0gbmV3X3BhcmVudCkKKwlpZiAoIXJl dCAmJiBjbGtfcHJvdmlkZXJfZ2V0X3BhcmVudChody0+Y2xrKSAhPSBuZXdfcGFyZW50KQogCQlf X2Nsa19yZXBhcmVudChody0+Y2xrLCBuZXdfcGFyZW50KTsKIAogCXJldHVybiAwOwpAQCAtNTUw LDEwICs1NDksMTAgQEAgaW50IG9tYXAzX25vbmNvcmVfZHBsbF9zZXRfcmF0ZShzdHJ1Y3QgY2xr X2h3ICpodywgdW5zaWduZWQgbG9uZyByYXRlLAogCiAvKioKICAqIG9tYXAzX2RwbGxfYXV0b2lk bGVfcmVhZCAtIHJlYWQgYSBEUExMJ3MgYXV0b2lkbGUgYml0cwotICogQGNsazogc3RydWN0IGNs ayAqIG9mIHRoZSBEUExMIHRvIHJlYWQKKyAqIEBjbGs6IHN0cnVjdCBjbGtfY29yZSAqIG9mIHRo ZSBEUExMIHRvIHJlYWQKICAqCiAgKiBSZXR1cm4gdGhlIERQTEwncyBhdXRvaWRsZSBiaXRzLCBz aGlmdGVkIGRvd24gdG8gYml0IDAuICBSZXR1cm5zCi0gKiAtRUlOVkFMIGlmIHBhc3NlZCBhIG51 bGwgcG9pbnRlciBvciBpZiB0aGUgc3RydWN0IGNsayBkb2VzIG5vdAorICogLUVJTlZBTCBpZiBw YXNzZWQgYSBudWxsIHBvaW50ZXIgb3IgaWYgdGhlIHN0cnVjdCBjbGtfY29yZSBkb2VzIG5vdAog ICogYXBwZWFyIHRvIHJlZmVyIHRvIGEgRFBMTC4KICAqLwogdTMyIG9tYXAzX2RwbGxfYXV0b2lk bGVfcmVhZChzdHJ1Y3QgY2xrX2h3X29tYXAgKmNsaykKQEAgLTU3OCw3ICs1NzcsNyBAQCB1MzIg b21hcDNfZHBsbF9hdXRvaWRsZV9yZWFkKHN0cnVjdCBjbGtfaHdfb21hcCAqY2xrKQogCiAvKioK ICAqIG9tYXAzX2RwbGxfYWxsb3dfaWRsZSAtIGVuYWJsZSBEUExMIGF1dG9pZGxlIGJpdHMKLSAq IEBjbGs6IHN0cnVjdCBjbGsgKiBvZiB0aGUgRFBMTCB0byBvcGVyYXRlIG9uCisgKiBAY2xrOiBz dHJ1Y3QgY2xrX2NvcmUgKiBvZiB0aGUgRFBMTCB0byBvcGVyYXRlIG9uCiAgKgogICogRW5hYmxl IERQTEwgYXV0b21hdGljIGlkbGUgY29udHJvbC4gIFRoaXMgYXV0b21hdGljIGlkbGUgbW9kZQog ICogc3dpdGNoaW5nIHRha2VzIGVmZmVjdCBvbmx5IHdoZW4gdGhlIERQTEwgaXMgbG9ja2VkLCBh dCBsZWFzdCBvbgpAQCAtNjEyLDcgKzYxMSw3IEBAIHZvaWQgb21hcDNfZHBsbF9hbGxvd19pZGxl KHN0cnVjdCBjbGtfaHdfb21hcCAqY2xrKQogCiAvKioKICAqIG9tYXAzX2RwbGxfZGVueV9pZGxl IC0gcHJldmVudCBEUExMIGZyb20gYXV0b21hdGljYWxseSBpZGxpbmcKLSAqIEBjbGs6IHN0cnVj dCBjbGsgKiBvZiB0aGUgRFBMTCB0byBvcGVyYXRlIG9uCisgKiBAY2xrOiBzdHJ1Y3QgY2xrX2Nv cmUgKiBvZiB0aGUgRFBMTCB0byBvcGVyYXRlIG9uCiAgKgogICogRGlzYWJsZSBEUExMIGF1dG9t YXRpYyBpZGxlIGNvbnRyb2wuICBObyByZXR1cm4gdmFsdWUuCiAgKi8KQEAgLTY0Miw3ICs2NDEs NyBAQCB2b2lkIG9tYXAzX2RwbGxfZGVueV9pZGxlKHN0cnVjdCBjbGtfaHdfb21hcCAqY2xrKQog c3RhdGljIHN0cnVjdCBjbGtfaHdfb21hcCAqb21hcDNfZmluZF9jbGtvdXR4Ml9kcGxsKHN0cnVj dCBjbGtfaHcgKmh3KQogewogCXN0cnVjdCBjbGtfaHdfb21hcCAqcGNsayA9IE5VTEw7Ci0Jc3Ry dWN0IGNsayAqcGFyZW50OworCXN0cnVjdCBjbGtfY29yZSAqcGFyZW50OwogCiAJLyogV2FsayB1 cCB0aGUgcGFyZW50cyBvZiBjbGssIGxvb2tpbmcgZm9yIGEgRFBMTCAqLwogCWRvIHsKZGlmZiAt LWdpdCBhL2FyY2gvYXJtL21hY2gtb21hcDIvZHBsbDQ0eHguYyBiL2FyY2gvYXJtL21hY2gtb21h cDIvZHBsbDQ0eHguYwppbmRleCA0NjEzZjFlLi43MjZiMjU0IDEwMDY0NAotLS0gYS9hcmNoL2Fy bS9tYWNoLW9tYXAyL2RwbGw0NHh4LmMKKysrIGIvYXJjaC9hcm0vbWFjaC1vbWFwMi9kcGxsNDR4 eC5jCkBAIC0xMSw3ICsxMSw2IEBACiAKICNpbmNsdWRlIDxsaW51eC9rZXJuZWwuaD4KICNpbmNs dWRlIDxsaW51eC9lcnJuby5oPgotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxp bnV4L2lvLmg+CiAjaW5jbHVkZSA8bGludXgvYml0b3BzLmg+CiAKQEAgLTEyNCw3ICsxMjMsNyBA QCBzdGF0aWMgdm9pZCBvbWFwNF9kcGxsX2xwbW9kZV9yZWNhbGMoc3RydWN0IGRwbGxfZGF0YSAq ZGQpCiAKIC8qKgogICogb21hcDRfZHBsbF9yZWdtNHhlbl9yZWNhbGMgLSBjb21wdXRlIERQTEwg cmF0ZSwgY29uc2lkZXJpbmcgUkVHTTRYRU4gYml0Ci0gKiBAY2xrOiBzdHJ1Y3QgY2xrICogb2Yg dGhlIERQTEwgdG8gY29tcHV0ZSB0aGUgcmF0ZSBmb3IKKyAqIEBjbGs6IHN0cnVjdCBjbGtfY29y ZSAqIG9mIHRoZSBEUExMIHRvIGNvbXB1dGUgdGhlIHJhdGUgZm9yCiAgKgogICogQ29tcHV0ZSB0 aGUgb3V0cHV0IHJhdGUgZm9yIHRoZSBPTUFQNCBEUExMIHJlcHJlc2VudGVkIGJ5IEBjbGsuCiAg KiBUYWtlcyB0aGUgUkVHTTRYRU4gYml0IGludG8gY29uc2lkZXJhdGlvbiwgd2hpY2ggaXMgbmVl ZGVkIGZvciB0aGUKQEAgLTE1Niw3ICsxNTUsNyBAQCB1bnNpZ25lZCBsb25nIG9tYXA0X2RwbGxf cmVnbTR4ZW5fcmVjYWxjKHN0cnVjdCBjbGtfaHcgKmh3LAogCiAvKioKICAqIG9tYXA0X2RwbGxf cmVnbTR4ZW5fcm91bmRfcmF0ZSAtIHJvdW5kIERQTEwgcmF0ZSwgY29uc2lkZXJpbmcgUkVHTTRY RU4gYml0Ci0gKiBAY2xrOiBzdHJ1Y3QgY2xrICogb2YgdGhlIERQTEwgdG8gcm91bmQgYSByYXRl IGZvcgorICogQGNsazogc3RydWN0IGNsa19jb3JlICogb2YgdGhlIERQTEwgdG8gcm91bmQgYSBy YXRlIGZvcgogICogQHRhcmdldF9yYXRlOiB0aGUgZGVzaXJlZCByYXRlIG9mIHRoZSBEUExMCiAg KgogICogQ29tcHV0ZSB0aGUgcmF0ZSB0aGF0IHdvdWxkIGJlIHByb2dyYW1tZWQgaW50byB0aGUg RFBMTCBoYXJkd2FyZQpkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vbWFjaC1vbWFwMi9tY2JzcC5jIGIv YXJjaC9hcm0vbWFjaC1vbWFwMi9tY2JzcC5jCmluZGV4IGI0YWMzYWYuLjE0MjRjOTAgMTAwNjQ0 Ci0tLSBhL2FyY2gvYXJtL21hY2gtb21hcDIvbWNic3AuYworKysgYi9hcmNoL2FybS9tYWNoLW9t YXAyL21jYnNwLmMKQEAgLTEyLDcgKzEyLDYgQEAKICAqLwogI2luY2x1ZGUgPGxpbnV4L21vZHVs ZS5oPgogI2luY2x1ZGUgPGxpbnV4L2luaXQuaD4KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNp bmNsdWRlIDxsaW51eC9lcnIuaD4KICNpbmNsdWRlIDxsaW51eC9pby5oPgogI2luY2x1ZGUgPGxp bnV4L29mLmg+CkBAIC0zNCw3ICszMyw3IEBACiAjaW5jbHVkZSAiY20zeHh4LmgiCiAjaW5jbHVk ZSAiY20tcmVnYml0cy0zNHh4LmgiCiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICptY2JzcF9pY2xrc1s1 XTsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKm1jYnNwX2ljbGtzWzVdOwogCiBzdGF0aWMgaW50 IG9tYXAzX2VuYWJsZV9zdF9jbG9jayh1bnNpZ25lZCBpbnQgaWQsIGJvb2wgZW5hYmxlKQogewpA QCAtOTgsNyArOTcsNyBAQCBzdGF0aWMgaW50IF9faW5pdCBvbWFwX2luaXRfbWNic3Aoc3RydWN0 IG9tYXBfaHdtb2QgKm9oLCB2b2lkICp1bnVzZWQpCiAJCShzdHJ1Y3Qgb21hcF9tY2JzcF9kZXZf YXR0ciAqKShvaC0+ZGV2X2F0dHIpKS0+c2lkZXRvbmUpOwogCQlwZGF0YS0+ZW5hYmxlX3N0X2Ns b2NrID0gb21hcDNfZW5hYmxlX3N0X2Nsb2NrOwogCQlzcHJpbnRmKGNsa19uYW1lLCAibWNic3Al ZF9pY2siLCBpZCk7Ci0JCW1jYnNwX2ljbGtzW2lkXSA9IGNsa19nZXQoTlVMTCwgY2xrX25hbWUp OworCQltY2JzcF9pY2xrc1tpZF0gPSBjbGtfcHJvdmlkZXJfZ2V0KE5VTEwsIGNsa19uYW1lKTsK IAkJY291bnQrKzsKIAl9CiAJcGRldiA9IG9tYXBfZGV2aWNlX2J1aWxkX3NzKG5hbWUsIGlkLCBv aF9kZXZpY2UsIGNvdW50LCBwZGF0YSwKZGlmZiAtLWdpdCBhL2FyY2gvYXJtL21hY2gtb21hcDIv b21hcF9kZXZpY2UuYyBiL2FyY2gvYXJtL21hY2gtb21hcDIvb21hcF9kZXZpY2UuYwppbmRleCBm MTM4YTYyLi5jNTM4NmE0IDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNoLW9tYXAyL29tYXBfZGV2 aWNlLmMKKysrIGIvYXJjaC9hcm0vbWFjaC1vbWFwMi9vbWFwX2RldmljZS5jCkBAIC0zMCw3ICsz MCw2IEBACiAjaW5jbHVkZSA8bGludXgvc2xhYi5oPgogI2luY2x1ZGUgPGxpbnV4L2Vyci5oPgog I2luY2x1ZGUgPGxpbnV4L2lvLmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8 bGludXgvY2xrZGV2Lmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5jbHVk ZSA8bGludXgvcG1fcnVudGltZS5oPgpAQCAtNDcsNyArNDYsNyBAQAogc3RhdGljIHZvaWQgX2Fk ZF9jbGtkZXYoc3RydWN0IG9tYXBfZGV2aWNlICpvZCwgY29uc3QgY2hhciAqY2xrX2FsaWFzLAog CQkgICAgICAgY29uc3QgY2hhciAqY2xrX25hbWUpCiB7Ci0Jc3RydWN0IGNsayAqcjsKKwlzdHJ1 Y3QgY2xrX2NvcmUgKnI7CiAJc3RydWN0IGNsa19sb29rdXAgKmw7CiAKIAlpZiAoIWNsa19hbGlh cyB8fCAhY2xrX25hbWUpCkBAIC01NSwxNSArNTQsMTUgQEAgc3RhdGljIHZvaWQgX2FkZF9jbGtk ZXYoc3RydWN0IG9tYXBfZGV2aWNlICpvZCwgY29uc3QgY2hhciAqY2xrX2FsaWFzLAogCiAJZGV2 X2RiZygmb2QtPnBkZXYtPmRldiwgIkNyZWF0aW5nICVzIC0+ICVzXG4iLCBjbGtfYWxpYXMsIGNs a19uYW1lKTsKIAotCXIgPSBjbGtfZ2V0X3N5cyhkZXZfbmFtZSgmb2QtPnBkZXYtPmRldiksIGNs a19hbGlhcyk7CisJciA9IGNsa19wcm92aWRlcl9nZXRfc3lzKGRldl9uYW1lKCZvZC0+cGRldi0+ ZGV2KSwgY2xrX2FsaWFzKTsKIAlpZiAoIUlTX0VSUihyKSkgewogCQlkZXZfZGJnKCZvZC0+cGRl di0+ZGV2LAogCQkJICJhbGlhcyAlcyBhbHJlYWR5IGV4aXN0c1xuIiwgY2xrX2FsaWFzKTsKLQkJ Y2xrX3B1dChyKTsKKwkJX19jbGtfcHV0KHIpOwogCQlyZXR1cm47CiAJfQogCi0JciA9IGNsa19n ZXQoTlVMTCwgY2xrX25hbWUpOworCXIgPSBjbGtfcHJvdmlkZXJfZ2V0KE5VTEwsIGNsa19uYW1l KTsKIAlpZiAoSVNfRVJSKHIpKSB7CiAJCWRldl9lcnIoJm9kLT5wZGV2LT5kZXYsCiAJCQkiY2xr X2dldCBmb3IgJXMgZmFpbGVkXG4iLCBjbGtfbmFtZSk7CmRpZmYgLS1naXQgYS9hcmNoL2FybS9t YWNoLW9tYXAyL29tYXBfaHdtb2QuYyBiL2FyY2gvYXJtL21hY2gtb21hcDIvb21hcF9od21vZC5j CmluZGV4IDhmZDg3YTMuLmM2MWIzOTIgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL21hY2gtb21hcDIv b21hcF9od21vZC5jCisrKyBiL2FyY2gvYXJtL21hY2gtb21hcDIvb21hcF9od21vZC5jCkBAIC03 NTMsNyArNzUzLDcgQEAgc3RhdGljIGludCBfZGVsX2luaXRpYXRvcl9kZXAoc3RydWN0IG9tYXBf aHdtb2QgKm9oLCBzdHJ1Y3Qgb21hcF9od21vZCAqaW5pdF9vaCkKIH0KIAogLyoqCi0gKiBfaW5p dF9tYWluX2NsayAtIGdldCBhIHN0cnVjdCBjbGsgKiBmb3IgdGhlIHRoZSBod21vZCdzIG1haW4g ZnVuY3Rpb25hbCBjbGsKKyAqIF9pbml0X21haW5fY2xrIC0gZ2V0IGEgc3RydWN0IGNsa19jb3Jl ICogZm9yIHRoZSB0aGUgaHdtb2QncyBtYWluIGZ1bmN0aW9uYWwgY2xrCiAgKiBAb2g6IHN0cnVj dCBvbWFwX2h3bW9kICoKICAqCiAgKiBDYWxsZWQgZnJvbSBfaW5pdF9jbG9ja3MoKS4gIFBvcHVs YXRlcyB0aGUgQG9oIF9jbGsgKG1haW4KQEAgLTc2Nyw3ICs3NjcsNyBAQCBzdGF0aWMgaW50IF9p bml0X21haW5fY2xrKHN0cnVjdCBvbWFwX2h3bW9kICpvaCkKIAlpZiAoIW9oLT5tYWluX2NsaykK IAkJcmV0dXJuIDA7CiAKLQlvaC0+X2NsayA9IGNsa19nZXQoTlVMTCwgb2gtPm1haW5fY2xrKTsK KwlvaC0+X2NsayA9IGNsa19wcm92aWRlcl9nZXQoTlVMTCwgb2gtPm1haW5fY2xrKTsKIAlpZiAo SVNfRVJSKG9oLT5fY2xrKSkgewogCQlwcl93YXJuaW5nKCJvbWFwX2h3bW9kOiAlczogY2Fubm90 IGNsa19nZXQgbWFpbl9jbGsgJXNcbiIsCiAJCQkgICBvaC0+bmFtZSwgb2gtPm1haW5fY2xrKTsK QEAgLTc4MSw3ICs3ODEsNyBAQCBzdGF0aWMgaW50IF9pbml0X21haW5fY2xrKHN0cnVjdCBvbWFw X2h3bW9kICpvaCkKIAkgKiBzb21lIHBvaW50IHdoZXJlIHN1YnN5c3RlbXMgbGlrZSBpMmMgYW5k IHBtaWMgYmVjb21lCiAJICogYXZhaWxhYmxlLgogCSAqLwotCWNsa19wcmVwYXJlKG9oLT5fY2xr KTsKKwljbGtfcHJvdmlkZXJfcHJlcGFyZShvaC0+X2Nsayk7CiAKIAlpZiAoIV9nZXRfY2xrZG0o b2gpKQogCQlwcl9kZWJ1Zygib21hcF9od21vZDogJXM6IG1pc3NpbmcgY2xvY2tkb21haW4gZm9y ICVzLlxuIiwKQEAgLTc5MSw3ICs3OTEsNyBAQCBzdGF0aWMgaW50IF9pbml0X21haW5fY2xrKHN0 cnVjdCBvbWFwX2h3bW9kICpvaCkKIH0KIAogLyoqCi0gKiBfaW5pdF9pbnRlcmZhY2VfY2xrcyAt IGdldCBhIHN0cnVjdCBjbGsgKiBmb3IgdGhlIHRoZSBod21vZCdzIGludGVyZmFjZSBjbGtzCisg KiBfaW5pdF9pbnRlcmZhY2VfY2xrcyAtIGdldCBhIHN0cnVjdCBjbGtfY29yZSAqIGZvciB0aGUg dGhlIGh3bW9kJ3MgaW50ZXJmYWNlIGNsa3MKICAqIEBvaDogc3RydWN0IG9tYXBfaHdtb2QgKgog ICoKICAqIENhbGxlZCBmcm9tIF9pbml0X2Nsb2NrcygpLiAgUG9wdWxhdGVzIHRoZSBAb2ggT0NQ IHNsYXZlIGludGVyZmFjZQpAQCAtODAxLDcgKzgwMSw3IEBAIHN0YXRpYyBpbnQgX2luaXRfaW50 ZXJmYWNlX2Nsa3Moc3RydWN0IG9tYXBfaHdtb2QgKm9oKQogewogCXN0cnVjdCBvbWFwX2h3bW9k X29jcF9pZiAqb3M7CiAJc3RydWN0IGxpc3RfaGVhZCAqcDsKLQlzdHJ1Y3QgY2xrICpjOworCXN0 cnVjdCBjbGtfY29yZSAqYzsKIAlpbnQgaSA9IDA7CiAJaW50IHJldCA9IDA7CiAKQEAgLTgxMiw3 ICs4MTIsNyBAQCBzdGF0aWMgaW50IF9pbml0X2ludGVyZmFjZV9jbGtzKHN0cnVjdCBvbWFwX2h3 bW9kICpvaCkKIAkJaWYgKCFvcy0+Y2xrKQogCQkJY29udGludWU7CiAKLQkJYyA9IGNsa19nZXQo TlVMTCwgb3MtPmNsayk7CisJCWMgPSBjbGtfcHJvdmlkZXJfZ2V0KE5VTEwsIG9zLT5jbGspOwog CQlpZiAoSVNfRVJSKGMpKSB7CiAJCQlwcl93YXJuaW5nKCJvbWFwX2h3bW9kOiAlczogY2Fubm90 IGNsa19nZXQgaW50ZXJmYWNlX2NsayAlc1xuIiwKIAkJCQkgICBvaC0+bmFtZSwgb3MtPmNsayk7 CkBAIC04MjgsMTQgKzgyOCwxNCBAQCBzdGF0aWMgaW50IF9pbml0X2ludGVyZmFjZV9jbGtzKHN0 cnVjdCBvbWFwX2h3bW9kICpvaCkKIAkJICogc29tZSBwb2ludCB3aGVyZSBzdWJzeXN0ZW1zIGxp a2UgaTJjIGFuZCBwbWljIGJlY29tZQogCQkgKiBhdmFpbGFibGUuCiAJCSAqLwotCQljbGtfcHJl cGFyZShvcy0+X2Nsayk7CisJCWNsa19wcm92aWRlcl9wcmVwYXJlKG9zLT5fY2xrKTsKIAl9CiAK IAlyZXR1cm4gcmV0OwogfQogCiAvKioKLSAqIF9pbml0X29wdF9jbGsgLSBnZXQgYSBzdHJ1Y3Qg Y2xrICogZm9yIHRoZSB0aGUgaHdtb2QncyBvcHRpb25hbCBjbG9ja3MKKyAqIF9pbml0X29wdF9j bGsgLSBnZXQgYSBzdHJ1Y3QgY2xrX2NvcmUgKiBmb3IgdGhlIHRoZSBod21vZCdzIG9wdGlvbmFs IGNsb2NrcwogICogQG9oOiBzdHJ1Y3Qgb21hcF9od21vZCAqCiAgKgogICogQ2FsbGVkIGZyb20g X2luaXRfY2xvY2tzKCkuICBQb3B1bGF0ZXMgdGhlIEBvaCBvbWFwX2h3bW9kX29wdF9jbGsKQEAg LTg0NCwxMiArODQ0LDEyIEBAIHN0YXRpYyBpbnQgX2luaXRfaW50ZXJmYWNlX2Nsa3Moc3RydWN0 IG9tYXBfaHdtb2QgKm9oKQogc3RhdGljIGludCBfaW5pdF9vcHRfY2xrcyhzdHJ1Y3Qgb21hcF9o d21vZCAqb2gpCiB7CiAJc3RydWN0IG9tYXBfaHdtb2Rfb3B0X2NsayAqb2M7Ci0Jc3RydWN0IGNs ayAqYzsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmM7CiAJaW50IGk7CiAJaW50IHJldCA9IDA7CiAKIAlm b3IgKGkgPSBvaC0+b3B0X2Nsa3NfY250LCBvYyA9IG9oLT5vcHRfY2xrczsgaSA+IDA7IGktLSwg b2MrKykgewotCQljID0gY2xrX2dldChOVUxMLCBvYy0+Y2xrKTsKKwkJYyA9IGNsa19wcm92aWRl cl9nZXQoTlVMTCwgb2MtPmNsayk7CiAJCWlmIChJU19FUlIoYykpIHsKIAkJCXByX3dhcm5pbmco Im9tYXBfaHdtb2Q6ICVzOiBjYW5ub3QgY2xrX2dldCBvcHRfY2xrICVzXG4iLAogCQkJCSAgIG9o LT5uYW1lLCBvYy0+Y2xrKTsKQEAgLTg2NSw3ICs4NjUsNyBAQCBzdGF0aWMgaW50IF9pbml0X29w dF9jbGtzKHN0cnVjdCBvbWFwX2h3bW9kICpvaCkKIAkJICogc29tZSBwb2ludCB3aGVyZSBzdWJz eXN0ZW1zIGxpa2UgaTJjIGFuZCBwbWljIGJlY29tZQogCQkgKiBhdmFpbGFibGUuCiAJCSAqLwot CQljbGtfcHJlcGFyZShvYy0+X2Nsayk7CisJCWNsa19wcm92aWRlcl9wcmVwYXJlKG9jLT5fY2xr KTsKIAl9CiAKIAlyZXR1cm4gcmV0OwpAQCAtODg3LDcgKzg4Nyw3IEBAIHN0YXRpYyBpbnQgX2Vu YWJsZV9jbG9ja3Moc3RydWN0IG9tYXBfaHdtb2QgKm9oKQogCXByX2RlYnVnKCJvbWFwX2h3bW9k OiAlczogZW5hYmxpbmcgY2xvY2tzXG4iLCBvaC0+bmFtZSk7CiAKIAlpZiAob2gtPl9jbGspCi0J CWNsa19lbmFibGUob2gtPl9jbGspOworCQljbGtfcHJvdmlkZXJfZW5hYmxlKG9oLT5fY2xrKTsK IAogCXAgPSBvaC0+c2xhdmVfcG9ydHMubmV4dDsKIApAQCAtODk1LDcgKzg5NSw3IEBAIHN0YXRp YyBpbnQgX2VuYWJsZV9jbG9ja3Moc3RydWN0IG9tYXBfaHdtb2QgKm9oKQogCQlvcyA9IF9mZXRj aF9uZXh0X29jcF9pZigmcCwgJmkpOwogCiAJCWlmIChvcy0+X2NsayAmJiAob3MtPmZsYWdzICYg T0NQSUZfU1dTVVBfSURMRSkpCi0JCQljbGtfZW5hYmxlKG9zLT5fY2xrKTsKKwkJCWNsa19wcm92 aWRlcl9lbmFibGUob3MtPl9jbGspOwogCX0KIAogCS8qIFRoZSBvcHQgY2xvY2tzIGFyZSBjb250 cm9sbGVkIGJ5IHRoZSBkZXZpY2UgZHJpdmVyLiAqLwpAQCAtOTE4LDcgKzkxOCw3IEBAIHN0YXRp YyBpbnQgX2Rpc2FibGVfY2xvY2tzKHN0cnVjdCBvbWFwX2h3bW9kICpvaCkKIAlwcl9kZWJ1Zygi b21hcF9od21vZDogJXM6IGRpc2FibGluZyBjbG9ja3NcbiIsIG9oLT5uYW1lKTsKIAogCWlmIChv aC0+X2NsaykKLQkJY2xrX2Rpc2FibGUob2gtPl9jbGspOworCQljbGtfcHJvdmlkZXJfZGlzYWJs ZShvaC0+X2Nsayk7CiAKIAlwID0gb2gtPnNsYXZlX3BvcnRzLm5leHQ7CiAKQEAgLTkyNiw3ICs5 MjYsNyBAQCBzdGF0aWMgaW50IF9kaXNhYmxlX2Nsb2NrcyhzdHJ1Y3Qgb21hcF9od21vZCAqb2gp CiAJCW9zID0gX2ZldGNoX25leHRfb2NwX2lmKCZwLCAmaSk7CiAKIAkJaWYgKG9zLT5fY2xrICYm IChvcy0+ZmxhZ3MgJiBPQ1BJRl9TV1NVUF9JRExFKSkKLQkJCWNsa19kaXNhYmxlKG9zLT5fY2xr KTsKKwkJCWNsa19wcm92aWRlcl9kaXNhYmxlKG9zLT5fY2xrKTsKIAl9CiAKIAkvKiBUaGUgb3B0 IGNsb2NrcyBhcmUgY29udHJvbGxlZCBieSB0aGUgZGV2aWNlIGRyaXZlci4gKi8KQEAgLTk0NSw3 ICs5NDUsNyBAQCBzdGF0aWMgdm9pZCBfZW5hYmxlX29wdGlvbmFsX2Nsb2NrcyhzdHJ1Y3Qgb21h cF9od21vZCAqb2gpCiAJCWlmIChvYy0+X2NsaykgewogCQkJcHJfZGVidWcoIm9tYXBfaHdtb2Q6 IGVuYWJsZSAlczolc1xuIiwgb2MtPnJvbGUsCiAJCQkJIF9fY2xrX2dldF9uYW1lKG9jLT5fY2xr KSk7Ci0JCQljbGtfZW5hYmxlKG9jLT5fY2xrKTsKKwkJCWNsa19wcm92aWRlcl9lbmFibGUob2Mt Pl9jbGspOwogCQl9CiB9CiAKQEAgLTk2MCw3ICs5NjAsNyBAQCBzdGF0aWMgdm9pZCBfZGlzYWJs ZV9vcHRpb25hbF9jbG9ja3Moc3RydWN0IG9tYXBfaHdtb2QgKm9oKQogCQlpZiAob2MtPl9jbGsp IHsKIAkJCXByX2RlYnVnKCJvbWFwX2h3bW9kOiBkaXNhYmxlICVzOiVzXG4iLCBvYy0+cm9sZSwK IAkJCQkgX19jbGtfZ2V0X25hbWUob2MtPl9jbGspKTsKLQkJCWNsa19kaXNhYmxlKG9jLT5fY2xr KTsKKwkJCWNsa19wcm92aWRlcl9kaXNhYmxlKG9jLT5fY2xrKTsKIAkJfQogfQogCkBAIC0yNTg5 LDcgKzI1ODksNyBAQCBzdGF0aWMgdm9pZCBfX2luaXQgX3NldHVwX2ljbGtfYXV0b2lkbGUoc3Ry dWN0IG9tYXBfaHdtb2QgKm9oKQogCQkJLyogWFhYIG9tYXBfaWNsa19kZW55X2lkbGUoYyk7ICov CiAJCX0gZWxzZSB7CiAJCQkvKiBYWFggb21hcF9pY2xrX2FsbG93X2lkbGUoYyk7ICovCi0JCQlj bGtfZW5hYmxlKG9zLT5fY2xrKTsKKwkJCWNsa19wcm92aWRlcl9lbmFibGUob3MtPl9jbGspOwog CQl9CiAJfQogCkBAIC0zMzk2LDcgKzMzOTYsNyBAQCBzdGF0aWMgdm9pZCBfX2luaXQgX2Vuc3Vy ZV9tcHVfaHdtb2RfaXNfc2V0dXAoc3RydWN0IG9tYXBfaHdtb2QgKm9oKQogICogSW5pdGlhbGl6 ZSBhbmQgc2V0IHVwIGEgc2luZ2xlIGh3bW9kLiAgSW50ZW5kZWQgdG8gYmUgdXNlZCBmb3IgYQog ICogc21hbGwgbnVtYmVyIG9mIGVhcmx5IGRldmljZXMsIHN1Y2ggYXMgdGhlIHRpbWVyIElQIGJs b2NrcyB1c2VkIGZvcgogICogdGhlIHNjaGVkdWxlciBjbG9jay4gIE11c3QgYmUgY2FsbGVkIGFm dGVyIG9tYXAyX2Nsa19pbml0KCkuCi0gKiBSZXNvbHZlcyB0aGUgc3RydWN0IGNsayBuYW1lcyB0 byBzdHJ1Y3QgY2xrIHBvaW50ZXJzIGZvciBlYWNoCisgKiBSZXNvbHZlcyB0aGUgc3RydWN0IGNs a19jb3JlIG5hbWVzIHRvIHN0cnVjdCBjbGtfY29yZSBwb2ludGVycyBmb3IgZWFjaAogICogcmVn aXN0ZXJlZCBvbWFwX2h3bW9kLiAgQWxzbyBjYWxscyBfc2V0dXAoKSBvbiBlYWNoIGh3bW9kLiAg UmV0dXJucwogICogLUVJTlZBTCB1cG9uIGVycm9yIG9yIDAgdXBvbiBzdWNjZXNzLgogICovCkBA IC0zNDI1LDcgKzM0MjUsNyBAQCBpbnQgX19pbml0IG9tYXBfaHdtb2Rfc2V0dXBfb25lKGNvbnN0 IGNoYXIgKm9oX25hbWUpCiAgKgogICogSW5pdGlhbGl6ZSBhbmQgc2V0IHVwIGFsbCBJUCBibG9j a3MgcmVnaXN0ZXJlZCB3aXRoIHRoZSBod21vZCBjb2RlLgogICogTXVzdCBiZSBjYWxsZWQgYWZ0 ZXIgb21hcDJfY2xrX2luaXQoKS4gIFJlc29sdmVzIHRoZSBzdHJ1Y3QgY2xrCi0gKiBuYW1lcyB0 byBzdHJ1Y3QgY2xrIHBvaW50ZXJzIGZvciBlYWNoIHJlZ2lzdGVyZWQgb21hcF9od21vZC4gIEFs c28KKyAqIG5hbWVzIHRvIHN0cnVjdCBjbGtfY29yZSBwb2ludGVycyBmb3IgZWFjaCByZWdpc3Rl cmVkIG9tYXBfaHdtb2QuICBBbHNvCiAgKiBjYWxscyBfc2V0dXAoKSBvbiBlYWNoIGh3bW9kLiAg UmV0dXJucyAwIHVwb24gc3VjY2Vzcy4KICAqLwogc3RhdGljIGludCBfX2luaXQgb21hcF9od21v ZF9zZXR1cF9hbGwodm9pZCkKQEAgLTM3OTIsNyArMzc5Miw3IEBAIGludCBvbWFwX2h3bW9kX2dl dF9yZXNvdXJjZV9ieW5hbWUoc3RydWN0IG9tYXBfaHdtb2QgKm9oLCB1bnNpZ25lZCBpbnQgdHlw ZSwKICAqLwogc3RydWN0IHBvd2VyZG9tYWluICpvbWFwX2h3bW9kX2dldF9wd3JkbShzdHJ1Y3Qg b21hcF9od21vZCAqb2gpCiB7Ci0Jc3RydWN0IGNsayAqYzsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmM7 CiAJc3RydWN0IG9tYXBfaHdtb2Rfb2NwX2lmICpvaTsKIAlzdHJ1Y3QgY2xvY2tkb21haW4gKmNs a2RtOwogCXN0cnVjdCBjbGtfaHdfb21hcCAqY2xrOwpkaWZmIC0tZ2l0IGEvYXJjaC9hcm0vbWFj aC1vbWFwMi9vbWFwX2h3bW9kLmggYi9hcmNoL2FybS9tYWNoLW9tYXAyL29tYXBfaHdtb2QuaApp bmRleCAwZjk3ZDYzLi40NmZmZDA2IDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNoLW9tYXAyL29t YXBfaHdtb2QuaAorKysgYi9hcmNoL2FybS9tYWNoLW9tYXAyL29tYXBfaHdtb2QuaApAQCAtMjA3 LDcgKzIwNyw3IEBAIHN0cnVjdCBvbWFwX2h3bW9kX3JzdF9pbmZvIHsKICAqIHN0cnVjdCBvbWFw X2h3bW9kX29wdF9jbGsgLSBvcHRpb25hbCBjbG9ja3MgdXNlZCBieSB0aGlzIGh3bW9kCiAgKiBA cm9sZTogInN5cyIsICIzMmsiLCAidHYiLCBldGMgLS0gZm9yIHVzZSBpbiBjbGtfZ2V0KCkKICAq IEBjbGs6IG9wdCBjbG9jazogT01BUCBjbG9jayBuYW1lCi0gKiBAX2NsazogcG9pbnRlciB0byB0 aGUgc3RydWN0IGNsayAoZmlsbGVkIGluIGF0IHJ1bnRpbWUpCisgKiBAX2NsazogcG9pbnRlciB0 byB0aGUgc3RydWN0IGNsa19jb3JlIChmaWxsZWQgaW4gYXQgcnVudGltZSkKICAqCiAgKiBUaGUg bW9kdWxlJ3MgaW50ZXJmYWNlIGNsb2NrIGFuZCBtYWluIGZ1bmN0aW9uYWwgY2xvY2sgc2hvdWxk IG5vdAogICogYmUgYWRkZWQgYXMgb3B0aW9uYWwgY2xvY2tzLgpAQCAtMjE1LDcgKzIxNSw3IEBA IHN0cnVjdCBvbWFwX2h3bW9kX3JzdF9pbmZvIHsKIHN0cnVjdCBvbWFwX2h3bW9kX29wdF9jbGsg ewogCWNvbnN0IGNoYXIJKnJvbGU7CiAJY29uc3QgY2hhcgkqY2xrOwotCXN0cnVjdCBjbGsJKl9j bGs7CisJc3RydWN0IGNsa19jb3JlCSpfY2xrOwogfTsKIAogCkBAIC0yODksNyArMjg5LDcgQEAg c3RydWN0IG9tYXBfaHdtb2RfYWRkcl9zcGFjZSB7CiAgKiBAc2xhdmU6IHN0cnVjdCBvbWFwX2h3 bW9kIHRoYXQgcmVzcG9uZHMgdG8gT0NQIHRyYW5zYWN0aW9ucyBvbiB0aGlzIGxpbmsKICAqIEBh ZGRyOiBhZGRyZXNzIHNwYWNlIGFzc29jaWF0ZWQgd2l0aCB0aGlzIGxpbmsKICAqIEBjbGs6IGlu dGVyZmFjZSBjbG9jazogT01BUCBjbG9jayBuYW1lCi0gKiBAX2NsazogcG9pbnRlciB0byB0aGUg aW50ZXJmYWNlIHN0cnVjdCBjbGsgKGZpbGxlZCBpbiBhdCBydW50aW1lKQorICogQF9jbGs6IHBv aW50ZXIgdG8gdGhlIGludGVyZmFjZSBzdHJ1Y3QgY2xrX2NvcmUgKGZpbGxlZCBpbiBhdCBydW50 aW1lKQogICogQGZ3OiBpbnRlcmZhY2UgZmlyZXdhbGwgZGF0YQogICogQHdpZHRoOiBPQ1AgZGF0 YSB3aWR0aAogICogQHVzZXI6IGluaXRpYXRvcnMgdXNpbmcgdGhpcyBpbnRlcmZhY2UgKHNlZSBP Q1BfVVNFUl8qIG1hY3JvcyBhYm92ZSkKQEAgLTMwNiw3ICszMDYsNyBAQCBzdHJ1Y3Qgb21hcF9o d21vZF9vY3BfaWYgewogCXN0cnVjdCBvbWFwX2h3bW9kCQkqc2xhdmU7CiAJc3RydWN0IG9tYXBf aHdtb2RfYWRkcl9zcGFjZQkqYWRkcjsKIAljb25zdCBjaGFyCQkJKmNsazsKLQlzdHJ1Y3QgY2xr CQkJKl9jbGs7CisJc3RydWN0IGNsa19jb3JlCQkJKl9jbGs7CiAJdW5pb24gewogCQlzdHJ1Y3Qg b21hcF9od21vZF9vbWFwMl9maXJld2FsbCBvbWFwMjsKIAl9CQkJCWZ3OwpAQCAtNjExLDcgKzYx MSw3IEBAIHN0cnVjdCBvbWFwX2h3bW9kX2xpbmsgewogICogQHNkbWFfcmVxczogcHRyIHRvIGFu IGFycmF5IG9mIFN5c3RlbSBETUEgcmVxdWVzdCBJRHMKICAqIEBwcmNtOiBQUkNNIGRhdGEgcGVy dGFpbmluZyB0byB0aGlzIGh3bW9kCiAgKiBAbWFpbl9jbGs6IG1haW4gY2xvY2s6IE9NQVAgY2xv Y2sgbmFtZQotICogQF9jbGs6IHBvaW50ZXIgdG8gdGhlIG1haW4gc3RydWN0IGNsayAoZmlsbGVk IGluIGF0IHJ1bnRpbWUpCisgKiBAX2NsazogcG9pbnRlciB0byB0aGUgbWFpbiBzdHJ1Y3QgY2xr X2NvcmUgKGZpbGxlZCBpbiBhdCBydW50aW1lKQogICogQG9wdF9jbGtzOiBvdGhlciBkZXZpY2Ug Y2xvY2tzIHRoYXQgZHJpdmVycyBjYW4gcmVxdWVzdCAoMC4uKikKICAqIEB2b2x0ZG06IHBvaW50 ZXIgdG8gdm9sdGFnZSBkb21haW4gKGZpbGxlZCBpbiBhdCBydW50aW1lKQogICogQGRldl9hdHRy OiBhcmJpdHJhcnkgZGV2aWNlIGF0dHJpYnV0ZXMgdGhhdCBjYW4gYmUgcGFzc2VkIHRvIHRoZSBk cml2ZXIKQEAgLTY1Myw3ICs2NTMsNyBAQCBzdHJ1Y3Qgb21hcF9od21vZCB7CiAJCXN0cnVjdCBv bWFwX2h3bW9kX29tYXA0X3ByY20gb21hcDQ7CiAJfQkJCQlwcmNtOwogCWNvbnN0IGNoYXIJCQkq bWFpbl9jbGs7Ci0Jc3RydWN0IGNsawkJCSpfY2xrOworCXN0cnVjdCBjbGtfY29yZQkJCSpfY2xr OwogCXN0cnVjdCBvbWFwX2h3bW9kX29wdF9jbGsJKm9wdF9jbGtzOwogCWNoYXIJCQkJKmNsa2Rt X25hbWU7CiAJc3RydWN0IGNsb2NrZG9tYWluCQkqY2xrZG07CmRpZmYgLS1naXQgYS9hcmNoL2Fy bS9tYWNoLW9tYXAyL3BtMjR4eC5jIGIvYXJjaC9hcm0vbWFjaC1vbWFwMi9wbTI0eHguYwppbmRl eCBmZTAxYzVhLi41NmU1ZTc3IDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNoLW9tYXAyL3BtMjR4 eC5jCisrKyBiL2FyY2gvYXJtL21hY2gtb21hcDIvcG0yNHh4LmMKQEAgLTYwLDcgKzYwLDcgQEAg c3RhdGljIHZvaWQgKCpvbWFwMl9zcmFtX3N1c3BlbmQpKHUzMiBkbGxjdHJsLCB2b2lkIF9faW9t ZW0gKnNkcmNfZGxsYV9jdHJsLAogc3RhdGljIHN0cnVjdCBwb3dlcmRvbWFpbiAqbXB1X3B3cmRt LCAqY29yZV9wd3JkbTsKIHN0YXRpYyBzdHJ1Y3QgY2xvY2tkb21haW4gKmRzcF9jbGtkbSwgKm1w dV9jbGtkbSwgKndrdXBfY2xrZG0sICpnZnhfY2xrZG07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICpv c2NfY2ssICplbXVsX2NrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqb3NjX2NrLCAqZW11bF9j azsKIAogc3RhdGljIGludCBvbWFwMl9lbnRlcl9mdWxsX3JldGVudGlvbih2b2lkKQogewpAQCAt NzEsNyArNzEsNyBAQCBzdGF0aWMgaW50IG9tYXAyX2VudGVyX2Z1bGxfcmV0ZW50aW9uKHZvaWQp CiAJICogb3NjaWxsYXRvciBpdHNlbGYgaXQgd2lsbCBiZSBkaXNhYmxlZCBpZi93aGVuIHdlIGVu dGVyIHJldGVudGlvbgogCSAqIG1vZGUuCiAJICovCi0JY2xrX2Rpc2FibGUob3NjX2NrKTsKKwlj bGtfcHJvdmlkZXJfZGlzYWJsZShvc2NfY2spOwogCiAJLyogQ2xlYXIgb2xkIHdha2UtdXAgZXZl bnRzICovCiAJLyogUkVWSVNJVDogVGhlc2Ugd3JpdGUgdG8gcmVzZXJ2ZWQgYml0cz8gKi8KQEAg LTEwMSw3ICsxMDEsNyBAQCBzdGF0aWMgaW50IG9tYXAyX2VudGVyX2Z1bGxfcmV0ZW50aW9uKHZv aWQpCiBub19zbGVlcDoKIAlvbWFwMl9ncGlvX3Jlc3VtZV9hZnRlcl9pZGxlKCk7CiAKLQljbGtf ZW5hYmxlKG9zY19jayk7CisJY2xrX3Byb3ZpZGVyX2VuYWJsZShvc2NfY2spOwogCiAJLyogY2xl YXIgQ09SRSB3YWtlLXVwIGV2ZW50cyAqLwogCW9tYXAyeHh4X3BybV9jbGVhcl9tb2RfaXJxcyhD T1JFX01PRCwgUE1fV0tTVDEsIH4wKTsKQEAgLTI4NywxNyArMjg3LDE3IEBAIGludCBfX2luaXQg b21hcDJfcG1faW5pdCh2b2lkKQogCQlwcl9lcnIoIlBNOiBnZnhfY2xrZG0gbm90IGZvdW5kXG4i KTsKIAogCi0Jb3NjX2NrID0gY2xrX2dldChOVUxMLCAib3NjX2NrIik7CisJb3NjX2NrID0gY2xr X3Byb3ZpZGVyX2dldChOVUxMLCAib3NjX2NrIik7CiAJaWYgKElTX0VSUihvc2NfY2spKSB7CiAJ CXByaW50ayhLRVJOX0VSUiAiY291bGQgbm90IGdldCBvc2NfY2tcbiIpOwogCQlyZXR1cm4gLUVO T0RFVjsKIAl9CiAKIAlpZiAoY3B1X2lzX29tYXAyNDJ4KCkpIHsKLQkJZW11bF9jayA9IGNsa19n ZXQoTlVMTCwgImVtdWxfY2siKTsKKwkJZW11bF9jayA9IGNsa19wcm92aWRlcl9nZXQoTlVMTCwg ImVtdWxfY2siKTsKIAkJaWYgKElTX0VSUihlbXVsX2NrKSkgewogCQkJcHJpbnRrKEtFUk5fRVJS ICJjb3VsZCBub3QgZ2V0IGVtdWxfY2tcbiIpOwotCQkJY2xrX3B1dChvc2NfY2spOworCQkJX19j bGtfcHV0KG9zY19jayk7CiAJCQlyZXR1cm4gLUVOT0RFVjsKIAkJfQogCX0KZGlmZiAtLWdpdCBh L2FyY2gvYXJtL21hY2gtb3Jpb241eC9jb21tb24uYyBiL2FyY2gvYXJtL21hY2gtb3Jpb241eC9j b21tb24uYwppbmRleCA2YmJiN2I1Li42YmUyZDJkIDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNo LW9yaW9uNXgvY29tbW9uLmMKKysrIGIvYXJjaC9hcm0vbWFjaC1vcmlvbjV4L2NvbW1vbi5jCkBA IC02Miw3ICs2Miw3IEBAIHZvaWQgX19pbml0IG9yaW9uNXhfbWFwX2lvKHZvaWQpCiAvKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioKICAqIENMSyB0cmVlCiAgKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKi8KLXN0YXRp YyBzdHJ1Y3QgY2xrICp0Y2xrOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqdGNsazsKIAogdm9p ZCBfX2luaXQgY2xrX2luaXQodm9pZCkKIHsKZGlmZiAtLWdpdCBhL2FyY2gvYXJtL21hY2gtc2ht b2JpbGUvY2xvY2suYyBiL2FyY2gvYXJtL21hY2gtc2htb2JpbGUvY2xvY2suYwppbmRleCBlZDQx NWRjLi44MjdmNzQ2IDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNoLXNobW9iaWxlL2Nsb2NrLmMK KysrIGIvYXJjaC9hcm0vbWFjaC1zaG1vYmlsZS9jbG9jay5jCkBAIC0yMyw3ICsyMyw2IEBACiAj aW5jbHVkZSA8bGludXgvaW5pdC5oPgogCiAjaWZkZWYgQ09ORklHX0NPTU1PTl9DTEsKLSNpbmNs dWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIuaD4KICNpbmNs dWRlIDxsaW51eC9jbGtkZXYuaD4KICNpbmNsdWRlICJjbG9jay5oIgpAQCAtMzIsMTcgKzMxLDE3 IEBAIHZvaWQgX19pbml0IHNobW9iaWxlX2Nsa193b3JrYXJvdW5kKGNvbnN0IHN0cnVjdCBjbGtf bmFtZSAqY2xrcywKIAkJCQkgICAgaW50IG5yX2Nsa3MsIGJvb2wgZW5hYmxlKQogewogCWNvbnN0 IHN0cnVjdCBjbGtfbmFtZSAqY2xrbjsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19j b3JlICpjbGs7CiAJdW5zaWduZWQgaW50IGk7CiAKIAlmb3IgKGkgPSAwOyBpIDwgbnJfY2xrczsg KytpKSB7CiAJCWNsa24gPSBjbGtzICsgaTsKLQkJY2xrID0gY2xrX2dldChOVUxMLCBjbGtuLT5j bGspOworCQljbGsgPSBjbGtfcHJvdmlkZXJfZ2V0KE5VTEwsIGNsa24tPmNsayk7CiAJCWlmICgh SVNfRVJSKGNsaykpIHsKIAkJCWNsa19yZWdpc3Rlcl9jbGtkZXYoY2xrLCBjbGtuLT5jb25faWQs IGNsa24tPmRldl9pZCk7CiAJCQlpZiAoZW5hYmxlKQotCQkJCWNsa19wcmVwYXJlX2VuYWJsZShj bGspOwotCQkJY2xrX3B1dChjbGspOworCQkJCWNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShj bGspOworCQkJX19jbGtfcHV0KGNsayk7CiAJCX0KIAl9CiB9CmRpZmYgLS1naXQgYS9hcmNoL2Fy bS9tYWNoLXZleHByZXNzL3NwYy5jIGIvYXJjaC9hcm0vbWFjaC12ZXhwcmVzcy9zcGMuYwppbmRl eCBmNjExNThjLi5lNDk3ZGY2IDEwMDY0NAotLS0gYS9hcmNoL2FybS9tYWNoLXZleHByZXNzL3Nw Yy5jCisrKyBiL2FyY2gvYXJtL21hY2gtdmV4cHJlc3Mvc3BjLmMKQEAgLTUyOSw3ICs1MjksNyBA QCBzdGF0aWMgc3RydWN0IGNsa19vcHMgY2xrX3NwY19vcHMgPSB7CiAJLnNldF9yYXRlID0gc3Bj X3NldF9yYXRlLAogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKnZlX3NwY19jbGtfcmVnaXN0ZXIo c3RydWN0IGRldmljZSAqY3B1X2RldikKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKnZlX3NwY19j bGtfcmVnaXN0ZXIoc3RydWN0IGRldmljZSAqY3B1X2RldikKIHsKIAlzdHJ1Y3QgY2xrX2luaXRf ZGF0YSBpbml0OwogCXN0cnVjdCBjbGtfc3BjICpzcGM7CkBAIC01NTYsNyArNTU2LDcgQEAgc3Rh dGljIHN0cnVjdCBjbGsgKnZlX3NwY19jbGtfcmVnaXN0ZXIoc3RydWN0IGRldmljZSAqY3B1X2Rl dikKIHN0YXRpYyBpbnQgX19pbml0IHZlX3NwY19jbGtfaW5pdCh2b2lkKQogewogCWludCBjcHU7 Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCiAJaWYgKCFpbmZv KQogCQlyZXR1cm4gMDsgLyogQ29udGludWUgb25seSBpZiBTUEMgaXMgaW5pdGlhbGlzZWQgKi8K ZGlmZiAtLWdpdCBhL2FyY2gvYXJtL3BsYXQtb3Jpb24vY29tbW9uLmMgYi9hcmNoL2FybS9wbGF0 LW9yaW9uL2NvbW1vbi5jCmluZGV4IDk2MWI1OTMuLmFiZjYzY2UgMTAwNjQ0Ci0tLSBhL2FyY2gv YXJtL3BsYXQtb3Jpb24vY29tbW9uLmMKKysrIGIvYXJjaC9hcm0vcGxhdC1vcmlvbi9jb21tb24u YwpAQCAtMTQsNyArMTQsNiBAQAogI2luY2x1ZGUgPGxpbnV4L2RtYS1tYXBwaW5nLmg+CiAjaW5j bHVkZSA8bGludXgvc2VyaWFsXzgyNTAuaD4KICNpbmNsdWRlIDxsaW51eC9hdGFfcGxhdGZvcm0u aD4KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIu aD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNpbmNsdWRlIDxsaW51eC9tdjY0M3h4X2V0 aC5oPgpAQCAtMjcsNyArMjYsNyBAQAogCiAvKiBDcmVhdGUgYSBjbGtkZXYgZW50cnkgZm9yIGEg Z2l2ZW4gZGV2aWNlL2NsayAqLwogdm9pZCBfX2luaXQgb3Jpb25fY2xrZGV2X2FkZChjb25zdCBj aGFyICpjb25faWQsIGNvbnN0IGNoYXIgKmRldl9pZCwKLQkJCSAgICAgc3RydWN0IGNsayAqY2xr KQorCQkJICAgICBzdHJ1Y3QgY2xrX2NvcmUgKmNsaykKIHsKIAlzdHJ1Y3QgY2xrX2xvb2t1cCAq Y2w7CiAKQEAgLTQwLDcgKzM5LDcgQEAgdm9pZCBfX2luaXQgb3Jpb25fY2xrZGV2X2FkZChjb25z dCBjaGFyICpjb25faWQsIGNvbnN0IGNoYXIgKmRldl9pZCwKICAgIEtpcmt3b29kIGhhcyBnYXRl ZCBjbG9ja3MgZm9yIHNvbWUgb2YgaXRzIHBlcmlwaGVyYWxzLCBzbyBjcmVhdGVzCiAgICBpdHMg b3duIGNsa2RldiBlbnRyaWVzLiBGb3IgYWxsIHRoZSBvdGhlciBvcmlvbiBkZXZpY2VzLCBjcmVh dGUKICAgIGNsa2RldiBlbnRyaWVzIHRvIHRoZSB0Y2xrLiAqLwotdm9pZCBfX2luaXQgb3Jpb25f Y2xrZGV2X2luaXQoc3RydWN0IGNsayAqdGNsaykKK3ZvaWQgX19pbml0IG9yaW9uX2Nsa2Rldl9p bml0KHN0cnVjdCBjbGtfY29yZSAqdGNsaykKIHsKIAlvcmlvbl9jbGtkZXZfYWRkKE5VTEwsICJv cmlvbl9zcGkuMCIsIHRjbGspOwogCW9yaW9uX2Nsa2Rldl9hZGQoTlVMTCwgIm9yaW9uX3NwaS4x IiwgdGNsayk7CkBAIC03OCwxMCArNzcsMTAgQEAgc3RhdGljIHZvaWQgZmlsbF9yZXNvdXJjZXMo c3RydWN0IHBsYXRmb3JtX2RldmljZSAqZGV2aWNlLAogLyoqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqCiAg KiBVQVJUCiAgKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioqKioq KioqKioqKioqKioqKioqKioqKioqKioqKioqKi8KLXN0YXRpYyB1bnNpZ25lZCBsb25nIF9faW5p dCB1YXJ0X2dldF9jbGtfcmF0ZShzdHJ1Y3QgY2xrICpjbGspCitzdGF0aWMgdW5zaWduZWQgbG9u ZyBfX2luaXQgdWFydF9nZXRfY2xrX3JhdGUoc3RydWN0IGNsa19jb3JlICpjbGspCiB7Ci0JY2xr X3ByZXBhcmVfZW5hYmxlKGNsayk7Ci0JcmV0dXJuIGNsa19nZXRfcmF0ZShjbGspOworCWNsa19w cm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGspOworCXJldHVybiBjbGtfcHJvdmlkZXJfZ2V0X3Jh dGUoY2xrKTsKIH0KIAogc3RhdGljIHZvaWQgX19pbml0IHVhcnRfY29tcGxldGUoCkBAIC05MSw3 ICs5MCw3IEBAIHN0YXRpYyB2b2lkIF9faW5pdCB1YXJ0X2NvbXBsZXRlKAogCXZvaWQgX19pb21l bSAqbWVtYmFzZSwKIAlyZXNvdXJjZV9zaXplX3QgbWFwYmFzZSwKIAl1bnNpZ25lZCBpbnQgaXJx LAotCXN0cnVjdCBjbGsgKmNsaykKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsaykKIHsKIAlkYXRhLT5t YXBiYXNlID0gbWFwYmFzZTsKIAlkYXRhLT5tZW1iYXNlID0gbWVtYmFzZTsKQEAgLTEyNSw3ICsx MjQsNyBAQCBzdGF0aWMgc3RydWN0IHBsYXRmb3JtX2RldmljZSBvcmlvbl91YXJ0MCA9IHsKIHZv aWQgX19pbml0IG9yaW9uX3VhcnQwX2luaXQodm9pZCBfX2lvbWVtICptZW1iYXNlLAogCQkJICAg ICByZXNvdXJjZV9zaXplX3QgbWFwYmFzZSwKIAkJCSAgICAgdW5zaWduZWQgaW50IGlycSwKLQkJ CSAgICAgc3RydWN0IGNsayAqY2xrKQorCQkJICAgICBzdHJ1Y3QgY2xrX2NvcmUgKmNsaykKIHsK IAl1YXJ0X2NvbXBsZXRlKCZvcmlvbl91YXJ0MCwgb3Jpb25fdWFydDBfZGF0YSwgb3Jpb25fdWFy dDBfcmVzb3VyY2VzLAogCQkgICAgICBtZW1iYXNlLCBtYXBiYXNlLCBpcnEsIGNsayk7CkBAIC0x NTMsNyArMTUyLDcgQEAgc3RhdGljIHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2Ugb3Jpb25fdWFydDEg PSB7CiB2b2lkIF9faW5pdCBvcmlvbl91YXJ0MV9pbml0KHZvaWQgX19pb21lbSAqbWVtYmFzZSwK IAkJCSAgICAgcmVzb3VyY2Vfc2l6ZV90IG1hcGJhc2UsCiAJCQkgICAgIHVuc2lnbmVkIGludCBp cnEsCi0JCQkgICAgIHN0cnVjdCBjbGsgKmNsaykKKwkJCSAgICAgc3RydWN0IGNsa19jb3JlICpj bGspCiB7CiAJdWFydF9jb21wbGV0ZSgmb3Jpb25fdWFydDEsIG9yaW9uX3VhcnQxX2RhdGEsIG9y aW9uX3VhcnQxX3Jlc291cmNlcywKIAkJICAgICAgbWVtYmFzZSwgbWFwYmFzZSwgaXJxLCBjbGsp OwpAQCAtMTgxLDcgKzE4MCw3IEBAIHN0YXRpYyBzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlIG9yaW9u X3VhcnQyID0gewogdm9pZCBfX2luaXQgb3Jpb25fdWFydDJfaW5pdCh2b2lkIF9faW9tZW0gKm1l bWJhc2UsCiAJCQkgICAgIHJlc291cmNlX3NpemVfdCBtYXBiYXNlLAogCQkJICAgICB1bnNpZ25l ZCBpbnQgaXJxLAotCQkJICAgICBzdHJ1Y3QgY2xrICpjbGspCisJCQkgICAgIHN0cnVjdCBjbGtf Y29yZSAqY2xrKQogewogCXVhcnRfY29tcGxldGUoJm9yaW9uX3VhcnQyLCBvcmlvbl91YXJ0Ml9k YXRhLCBvcmlvbl91YXJ0Ml9yZXNvdXJjZXMsCiAJCSAgICAgIG1lbWJhc2UsIG1hcGJhc2UsIGly cSwgY2xrKTsKQEAgLTIwOSw3ICsyMDgsNyBAQCBzdGF0aWMgc3RydWN0IHBsYXRmb3JtX2Rldmlj ZSBvcmlvbl91YXJ0MyA9IHsKIHZvaWQgX19pbml0IG9yaW9uX3VhcnQzX2luaXQodm9pZCBfX2lv bWVtICptZW1iYXNlLAogCQkJICAgICByZXNvdXJjZV9zaXplX3QgbWFwYmFzZSwKIAkJCSAgICAg dW5zaWduZWQgaW50IGlycSwKLQkJCSAgICAgc3RydWN0IGNsayAqY2xrKQorCQkJICAgICBzdHJ1 Y3QgY2xrX2NvcmUgKmNsaykKIHsKIAl1YXJ0X2NvbXBsZXRlKCZvcmlvbl91YXJ0Mywgb3Jpb25f dWFydDNfZGF0YSwgb3Jpb25fdWFydDNfcmVzb3VyY2VzLAogCQkgICAgICBtZW1iYXNlLCBtYXBi YXNlLCBpcnEsIGNsayk7CmRpZmYgLS1naXQgYS9hcmNoL2FybS9wbGF0LW9yaW9uL2luY2x1ZGUv cGxhdC9jb21tb24uaCBiL2FyY2gvYXJtL3BsYXQtb3Jpb24vaW5jbHVkZS9wbGF0L2NvbW1vbi5o CmluZGV4IGQ5YTI0ZjYuLjQ0ZjFiYmUgMTAwNjQ0Ci0tLSBhL2FyY2gvYXJtL3BsYXQtb3Jpb24v aW5jbHVkZS9wbGF0L2NvbW1vbi5oCisrKyBiL2FyY2gvYXJtL3BsYXQtb3Jpb24vaW5jbHVkZS9w bGF0L2NvbW1vbi5oCkBAIC0xOCwyMiArMTgsMjIgQEAgc3RydWN0IG12X3NhdGFfcGxhdGZvcm1f ZGF0YTsKIHZvaWQgX19pbml0IG9yaW9uX3VhcnQwX2luaXQodm9pZCBfX2lvbWVtICptZW1iYXNl LAogCQkJICAgICByZXNvdXJjZV9zaXplX3QgbWFwYmFzZSwKIAkJCSAgICAgdW5zaWduZWQgaW50 IGlycSwKLQkJCSAgICAgc3RydWN0IGNsayAqY2xrKTsKKwkJCSAgICAgc3RydWN0IGNsa19jb3Jl ICpjbGspOwogCiB2b2lkIF9faW5pdCBvcmlvbl91YXJ0MV9pbml0KHZvaWQgX19pb21lbSAqbWVt YmFzZSwKIAkJCSAgICAgcmVzb3VyY2Vfc2l6ZV90IG1hcGJhc2UsCiAJCQkgICAgIHVuc2lnbmVk IGludCBpcnEsCi0JCQkgICAgIHN0cnVjdCBjbGsgKmNsayk7CisJCQkgICAgIHN0cnVjdCBjbGtf Y29yZSAqY2xrKTsKIAogdm9pZCBfX2luaXQgb3Jpb25fdWFydDJfaW5pdCh2b2lkIF9faW9tZW0g Km1lbWJhc2UsCiAJCQkgICAgIHJlc291cmNlX3NpemVfdCBtYXBiYXNlLAogCQkJICAgICB1bnNp Z25lZCBpbnQgaXJxLAotCQkJICAgICBzdHJ1Y3QgY2xrICpjbGspOworCQkJICAgICBzdHJ1Y3Qg Y2xrX2NvcmUgKmNsayk7CiAKIHZvaWQgX19pbml0IG9yaW9uX3VhcnQzX2luaXQodm9pZCBfX2lv bWVtICptZW1iYXNlLAogCQkJICAgICByZXNvdXJjZV9zaXplX3QgbWFwYmFzZSwKIAkJCSAgICAg dW5zaWduZWQgaW50IGlycSwKLQkJCSAgICAgc3RydWN0IGNsayAqY2xrKTsKKwkJCSAgICAgc3Ry dWN0IGNsa19jb3JlICpjbGspOwogCiB2b2lkIF9faW5pdCBvcmlvbl9ydGNfaW5pdCh1bnNpZ25l ZCBsb25nIG1hcGJhc2UsCiAJCQkgICB1bnNpZ25lZCBsb25nIGlycSk7CkBAIC0xMDcsNyArMTA3 LDcgQEAgdm9pZCBfX2luaXQgb3Jpb25fY3J5cHRvX2luaXQodW5zaWduZWQgbG9uZyBtYXBiYXNl LAogCQkJICAgICAgdW5zaWduZWQgbG9uZyBpcnEpOwogCiB2b2lkIF9faW5pdCBvcmlvbl9jbGtk ZXZfYWRkKGNvbnN0IGNoYXIgKmNvbl9pZCwgY29uc3QgY2hhciAqZGV2X2lkLAotCQkJICAgICBz dHJ1Y3QgY2xrICpjbGspOworCQkJICAgICBzdHJ1Y3QgY2xrX2NvcmUgKmNsayk7CiAKLXZvaWQg X19pbml0IG9yaW9uX2Nsa2Rldl9pbml0KHN0cnVjdCBjbGsgKnRjbGspOwordm9pZCBfX2luaXQg b3Jpb25fY2xrZGV2X2luaXQoc3RydWN0IGNsa19jb3JlICp0Y2xrKTsKICNlbmRpZgpkaWZmIC0t Z2l0IGEvYXJjaC9wb3dlcnBjL3BsYXRmb3Jtcy81MTJ4L2Nsb2NrLWNvbW1vbmNsay5jIGIvYXJj aC9wb3dlcnBjL3BsYXRmb3Jtcy81MTJ4L2Nsb2NrLWNvbW1vbmNsay5jCmluZGV4IDZlYjYxNGEu LjgxYWZlODMgMTAwNjQ0Ci0tLSBhL2FyY2gvcG93ZXJwYy9wbGF0Zm9ybXMvNTEyeC9jbG9jay1j b21tb25jbGsuYworKysgYi9hcmNoL3Bvd2VycGMvcGxhdGZvcm1zLzUxMngvY2xvY2stY29tbW9u Y2xrLmMKQEAgLTcwLDcgKzcwLDcgQEAgZW51bSB7CiB9OwogCiAvKiBkYXRhIHJlcXVpcmVkIGZv ciB0aGUgT0YgY2xvY2sgcHJvdmlkZXIgcmVnaXN0cmF0aW9uICovCi1zdGF0aWMgc3RydWN0IGNs ayAqY2xrc1tNUEM1MTJ4X0NMS19MQVNUX1BSSVZBVEVdOworc3RhdGljIHN0cnVjdCBjbGtfY29y ZSAqY2xrc1tNUEM1MTJ4X0NMS19MQVNUX1BSSVZBVEVdOwogc3RhdGljIHN0cnVjdCBjbGtfb25l Y2VsbF9kYXRhIGNsa19kYXRhOwogCiAvKiBDQ00gcmVnaXN0ZXIgYWNjZXNzICovCkBAIC0yMTgs MTIgKzIxOCwxMiBAQCBzdGF0aWMgYm9vbCBzb2NfaGFzX21jbGtfbXV4MF9jYW5pbih2b2lkKQog LyogY29tbW9uIGNsayBBUEkgd3JhcHBlcnMge3t7ICovCiAKIC8qIGNvbnZlbmllbmNlIHdyYXBw ZXJzIGFyb3VuZCB0aGUgY29tbW9uIGNsayBBUEkgKi8KLXN0YXRpYyBpbmxpbmUgc3RydWN0IGNs ayAqbXBjNTEyeF9jbGtfZml4ZWQoY29uc3QgY2hhciAqbmFtZSwgaW50IHJhdGUpCitzdGF0aWMg aW5saW5lIHN0cnVjdCBjbGtfY29yZSAqbXBjNTEyeF9jbGtfZml4ZWQoY29uc3QgY2hhciAqbmFt ZSwgaW50IHJhdGUpCiB7CiAJcmV0dXJuIGNsa19yZWdpc3Rlcl9maXhlZF9yYXRlKE5VTEwsIG5h bWUsIE5VTEwsIENMS19JU19ST09ULCByYXRlKTsKIH0KIAotc3RhdGljIGlubGluZSBzdHJ1Y3Qg Y2xrICptcGM1MTJ4X2Nsa19mYWN0b3IoCitzdGF0aWMgaW5saW5lIHN0cnVjdCBjbGtfY29yZSAq bXBjNTEyeF9jbGtfZmFjdG9yKAogCWNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVu dF9uYW1lLAogCWludCBtdWwsIGludCBkaXYpCiB7CkBAIC0yMzQsNyArMjM0LDcgQEAgc3RhdGlj IGlubGluZSBzdHJ1Y3QgY2xrICptcGM1MTJ4X2Nsa19mYWN0b3IoCiAJCQkJCSBtdWwsIGRpdik7 CiB9CiAKLXN0YXRpYyBpbmxpbmUgc3RydWN0IGNsayAqbXBjNTEyeF9jbGtfZGl2aWRlcigKK3N0 YXRpYyBpbmxpbmUgc3RydWN0IGNsa19jb3JlICptcGM1MTJ4X2Nsa19kaXZpZGVyKAogCWNvbnN0 IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLCB1OCBjbGtmbGFncywKIAl1MzIg X19pb21lbSAqcmVnLCB1OCBwb3MsIHU4IGxlbiwgaW50IGRpdmZsYWdzKQogewpAQCAtMjQyLDcg KzI0Miw3IEBAIHN0YXRpYyBpbmxpbmUgc3RydWN0IGNsayAqbXBjNTEyeF9jbGtfZGl2aWRlcigK IAkJCQkgICAgcmVnLCBwb3MsIGxlbiwgZGl2ZmxhZ3MsICZjbGtsb2NrKTsKIH0KIAotc3RhdGlj IGlubGluZSBzdHJ1Y3QgY2xrICptcGM1MTJ4X2Nsa19kaXZ0YWJsZSgKK3N0YXRpYyBpbmxpbmUg c3RydWN0IGNsa19jb3JlICptcGM1MTJ4X2Nsa19kaXZ0YWJsZSgKIAljb25zdCBjaGFyICpuYW1l LCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAl1MzIgX19pb21lbSAqcmVnLCB1OCBwb3MsIHU4 IGxlbiwKIAljb25zdCBzdHJ1Y3QgY2xrX2Rpdl90YWJsZSAqZGl2dGFiKQpAQCAtMjU1LDcgKzI1 NSw3IEBAIHN0YXRpYyBpbmxpbmUgc3RydWN0IGNsayAqbXBjNTEyeF9jbGtfZGl2dGFibGUoCiAJ CQkJCSAgZGl2dGFiLCAmY2xrbG9jayk7CiB9CiAKLXN0YXRpYyBpbmxpbmUgc3RydWN0IGNsayAq bXBjNTEyeF9jbGtfZ2F0ZWQoCitzdGF0aWMgaW5saW5lIHN0cnVjdCBjbGtfY29yZSAqbXBjNTEy eF9jbGtfZ2F0ZWQoCiAJY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUs CiAJdTMyIF9faW9tZW0gKnJlZywgdTggcG9zKQogewpAQCAtMjY2LDcgKzI2Niw3IEBAIHN0YXRp YyBpbmxpbmUgc3RydWN0IGNsayAqbXBjNTEyeF9jbGtfZ2F0ZWQoCiAJCQkJIHJlZywgcG9zLCAw LCAmY2xrbG9jayk7CiB9CiAKLXN0YXRpYyBpbmxpbmUgc3RydWN0IGNsayAqbXBjNTEyeF9jbGtf bXV4ZWQoY29uc3QgY2hhciAqbmFtZSwKK3N0YXRpYyBpbmxpbmUgc3RydWN0IGNsa19jb3JlICpt cGM1MTJ4X2Nsa19tdXhlZChjb25zdCBjaGFyICpuYW1lLAogCWNvbnN0IGNoYXIgKipwYXJlbnRf bmFtZXMsIGludCBwYXJlbnRfY291bnQsCiAJdTMyIF9faW9tZW0gKnJlZywgdTggcG9zLCB1OCBs ZW4pCiB7CkBAIC00MjIsNyArNDIyLDcgQEAgc3RhdGljIHZvaWQgbXBjNTEyeF9jbGtfc2V0dXBf cmVmX2Nsb2NrKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnAsIGludCBidXNfZnJlcSwKIAkJCQkJaW50 ICpzeXNfbXVsLCBpbnQgKnN5c19kaXYsCiAJCQkJCWludCAqaXBzX2RpdikKIHsKLQlzdHJ1Y3Qg Y2xrICpvc2NfY2xrOworCXN0cnVjdCBjbGtfY29yZSAqb3NjX2NsazsKIAlpbnQgY2FsY19mcmVx OwogCiAJLyogZmV0Y2ggbXVsL2RpdiBmYWN0b3JzIGZyb20gdGhlIGhhcmR3YXJlICovCkBAIC00 MzIsNyArNDMyLDcgQEAgc3RhdGljIHZvaWQgbXBjNTEyeF9jbGtfc2V0dXBfcmVmX2Nsb2NrKHN0 cnVjdCBkZXZpY2Vfbm9kZSAqbnAsIGludCBidXNfZnJlcSwKIAkqaXBzX2RpdiA9IGdldF9iaXRf ZmllbGQoJmNsa3JlZ3MtPnNjZnIxLCAyMywgMyk7CiAKIAkvKiBsb29rdXAgdGhlIG9zY2lsbGF0 b3IgY2xvY2sgZm9yIGl0cyByYXRlICovCi0Jb3NjX2NsayA9IG9mX2Nsa19nZXRfYnlfbmFtZShu cCwgIm9zYyIpOworCW9zY19jbGsgPSBvZl9jbGtfcHJvdmlkZXJfZ2V0X2J5X25hbWUobnAsICJv c2MiKTsKIAogCS8qCiAJICogZWl0aGVyIGRlc2NlbmQgZnJvbSBPU0MgdG8gUkVGIChhbmQgaW4g YnlwYXNzaW5nIHZlcmlmeSB0aGUKQEAgLTQ0NCw3ICs0NDQsNyBAQCBzdGF0aWMgdm9pZCBtcGM1 MTJ4X2Nsa19zZXR1cF9yZWZfY2xvY2soc3RydWN0IGRldmljZV9ub2RlICpucCwgaW50IGJ1c19m cmVxLAogCSAqLwogCWlmICghSVNfRVJSKG9zY19jbGspKSB7CiAJCWNsa3NbTVBDNTEyeF9DTEtf UkVGXSA9IG1wYzUxMnhfY2xrX2ZhY3RvcigicmVmIiwgIm9zYyIsIDEsIDEpOwotCQljYWxjX2Zy ZXEgPSBjbGtfZ2V0X3JhdGUoY2xrc1tNUEM1MTJ4X0NMS19SRUZdKTsKKwkJY2FsY19mcmVxID0g Y2xrX3Byb3ZpZGVyX2dldF9yYXRlKGNsa3NbTVBDNTEyeF9DTEtfUkVGXSk7CiAJCWNhbGNfZnJl cSAqPSAqc3lzX211bDsKIAkJY2FsY19mcmVxIC89ICpzeXNfZGl2OwogCQljYWxjX2ZyZXEgLz0g MjsKQEAgLTY0Nyw4ICs2NDcsOCBAQCBzdGF0aWMgdm9pZCBtcGM1MTJ4X2Nsa19zZXR1cF9tY2xr KHN0cnVjdCBtY2xrX3NldHVwX2RhdGEgKmVudHJ5LCBzaXplX3QgaWR4KQogCSAqIC0gTUNMSyAw IGVuYWJsZWQKIAkgKiAtIE1DTEsgMSBmcm9tIE1DTEsgRElWCiAJICovCi0JZGl2ID0gY2xrX2dl dF9yYXRlKGNsa3NbTVBDNTEyeF9DTEtfU1lTXSk7Ci0JZGl2IC89IGNsa19nZXRfcmF0ZShjbGtz W01QQzUxMnhfQ0xLX0lQU10pOworCWRpdiA9IGNsa19wcm92aWRlcl9nZXRfcmF0ZShjbGtzW01Q QzUxMnhfQ0xLX1NZU10pOworCWRpdiAvPSBjbGtfcHJvdmlkZXJfZ2V0X3JhdGUoY2xrc1tNUEM1 MTJ4X0NMS19JUFNdKTsKIAlvdXRfYmUzMihtY2NyX3JlZywgKDAgPDwgMTYpKTsKIAlvdXRfYmUz MihtY2NyX3JlZywgKDAgPDwgMTYpIHwgKChkaXYgLSAxKSA8PCAxNykpOwogCW91dF9iZTMyKG1j Y3JfcmVnLCAoMSA8PCAxNikgfCAoKGRpdiAtIDEpIDw8IDE3KSk7CkBAIC05MjUsMTIgKzkyNSwx MiBAQCBzdGF0aWMgdm9pZCBtcGM1MTJ4X2Nsa19zZXR1cF9jbG9ja190cmVlKHN0cnVjdCBkZXZp Y2Vfbm9kZSAqbnAsIGludCBidXNmcmVxKQogCSAqIGNsYWltZWQgYnkgYW55IHBlcmlwaGVyYWwg ZHJpdmVyLCB0byBub3QgaGF2ZSB0aGUgY2xvY2sKIAkgKiBzdWJzeXN0ZW0gZGlzYWJsZSB0aGVt IGxhdGUgYXQgc3RhcnR1cAogCSAqLwotCWNsa19wcmVwYXJlX2VuYWJsZShjbGtzW01QQzUxMnhf Q0xLX0RVTU1ZXSk7Ci0JY2xrX3ByZXBhcmVfZW5hYmxlKGNsa3NbTVBDNTEyeF9DTEtfRTMwMF0p OwkvKiBQb3dlclBDIENQVSAqLwotCWNsa19wcmVwYXJlX2VuYWJsZShjbGtzW01QQzUxMnhfQ0xL X0REUl0pOwkvKiBEUkFNICovCi0JY2xrX3ByZXBhcmVfZW5hYmxlKGNsa3NbTVBDNTEyeF9DTEtf TUVNXSk7CS8qIFNSQU0gKi8KLQljbGtfcHJlcGFyZV9lbmFibGUoY2xrc1tNUEM1MTJ4X0NMS19J UFNdKTsJLyogU29DIHBlcmlwaCAqLwotCWNsa19wcmVwYXJlX2VuYWJsZShjbGtzW01QQzUxMnhf Q0xLX0xQQ10pOwkvKiBib290IG1lZGlhICovCisJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxl KGNsa3NbTVBDNTEyeF9DTEtfRFVNTVldKTsKKwljbGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUo Y2xrc1tNUEM1MTJ4X0NMS19FMzAwXSk7CS8qIFBvd2VyUEMgQ1BVICovCisJY2xrX3Byb3ZpZGVy X3ByZXBhcmVfZW5hYmxlKGNsa3NbTVBDNTEyeF9DTEtfRERSXSk7CS8qIERSQU0gKi8KKwljbGtf cHJvdmlkZXJfcHJlcGFyZV9lbmFibGUoY2xrc1tNUEM1MTJ4X0NMS19NRU1dKTsJLyogU1JBTSAq LworCWNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtzW01QQzUxMnhfQ0xLX0lQU10pOwkv KiBTb0MgcGVyaXBoICovCisJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsa3NbTVBDNTEy eF9DTEtfTFBDXSk7CS8qIGJvb3QgbWVkaWEgKi8KIH0KIAogLyoKQEAgLTk2OSw5ICs5NjksOSBA QCBzdGF0aWMgdm9pZCBtcGM1MTIxX2Nsa19wcm92aWRlX21pZ3JhdGlvbl9zdXBwb3J0KHZvaWQp CiAJICogaGFzIGF0dGFjaGVkIHRvIGJyaWRnZXMsIG90aGVyd2lzZSB0aGUgUENJIGNsb2NrIHJl bWFpbnMKIAkgKiB1bnVzZWQgYW5kIHNvIGl0IGdldHMgZGlzYWJsZWQKIAkgKi8KLQljbGtfcHJl cGFyZV9lbmFibGUoY2xrc1tNUEM1MTJ4X0NMS19QU0MzX01DTEtdKTsvKiBzZXJpYWwgY29uc29s ZSAqLworCWNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtzW01QQzUxMnhfQ0xLX1BTQzNf TUNMS10pOy8qIHNlcmlhbCBjb25zb2xlICovCiAJaWYgKG9mX2ZpbmRfY29tcGF0aWJsZV9ub2Rl KE5VTEwsICJwY2kiLCAiZnNsLG1wYzUxMjEtcGNpIikpCi0JCWNsa19wcmVwYXJlX2VuYWJsZShj bGtzW01QQzUxMnhfQ0xLX1BDSV0pOworCQljbGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUoY2xr c1tNUEM1MTJ4X0NMS19QQ0ldKTsKIH0KIAogLyoKQEAgLTk4OCw4ICs5ODgsOCBAQCBzdGF0aWMg dm9pZCBtcGM1MTIxX2Nsa19wcm92aWRlX21pZ3JhdGlvbl9zdXBwb3J0KHZvaWQpCiB9IHdoaWxl ICgwKQogCiAjZGVmaW5lIE5PREVfQ0hLKGNsa25hbWUsIGNsa2l0ZW0sIHJlZ25vZGUsIHJlZ2Zs YWcpIGRvIHsgXAotCXN0cnVjdCBjbGsgKmNsazsgXAotCWNsayA9IG9mX2Nsa19nZXRfYnlfbmFt ZShucCwgY2xrbmFtZSk7IFwKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsgXAorCWNsayA9IG9mX2Ns a19wcm92aWRlcl9nZXRfYnlfbmFtZShucCwgY2xrbmFtZSk7IFwKIAlpZiAoSVNfRVJSKGNsaykp IHsgXAogCQljbGsgPSBjbGtpdGVtOyBcCiAJCWNsa19yZWdpc3Rlcl9jbGtkZXYoY2xrLCBjbGtu YW1lLCBkZXZuYW1lKTsgXApAQCAtOTk5LDcgKzk5OSw3IEBAIHN0YXRpYyB2b2lkIG1wYzUxMjFf Y2xrX3Byb3ZpZGVfbWlncmF0aW9uX3N1cHBvcnQodm9pZCkKIAkJcHJfZGVidWcoImNsb2NrIGFs aWFzIG5hbWUgJyVzJyBmb3IgZGV2ICclcycgcG9pbnRlciAlcFxuIiwgXAogCQkJIGNsa25hbWUs IGRldm5hbWUsIGNsayk7IFwKIAl9IGVsc2UgeyBcCi0JCWNsa19wdXQoY2xrKTsgXAorCQlfX2Ns a19wdXQoY2xrKTsgXAogCX0gXAogfSB3aGlsZSAoMCkKIApAQCAtMTA5MCw3ICsxMDkwLDcgQEAg c3RhdGljIHZvaWQgbXBjNTEyMV9jbGtfcHJvdmlkZV9iYWNrd2FyZHNfY29tcGF0KHZvaWQpCiAJ ICogd29ya2Fyb3VuZCBvYnNvbGV0ZQogCSAqLwogCWlmIChkaWRfcmVnaXN0ZXIgJiBESURfUkVH X0kyQykKLQkJY2xrX3ByZXBhcmVfZW5hYmxlKGNsa3NbTVBDNTEyeF9DTEtfSTJDXSk7CisJCWNs a19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtzW01QQzUxMnhfQ0xLX0kyQ10pOwogCiAJRk9S X05PREVTKCJmc2wsbXBjNTEyMS1kaXUiKSB7CiAJCU5PREVfUFJFUDsKZGlmZiAtLWdpdCBhL2Ry aXZlcnMvY2xrL2F0OTEvY2xrLW1haW4uYyBiL2RyaXZlcnMvY2xrL2F0OTEvY2xrLW1haW4uYwpp bmRleCA1OWZhM2NjLi4xMWJjZGIxIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9hdDkxL2Nsay1t YWluLmMKKysrIGIvZHJpdmVycy9jbGsvYXQ5MS9jbGstbWFpbi5jCkBAIC0xMzgsNyArMTM4LDcg QEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIG1haW5fb3NjX29wcyA9IHsKIAkuaXNfcHJl cGFyZWQgPSBjbGtfbWFpbl9vc2NfaXNfcHJlcGFyZWQsCiB9OwogCi1zdGF0aWMgc3RydWN0IGNs ayAqIF9faW5pdAorc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqIF9faW5pdAogYXQ5MV9jbGtfcmVn aXN0ZXJfbWFpbl9vc2Moc3RydWN0IGF0OTFfcG1jICpwbWMsCiAJCQkgICB1bnNpZ25lZCBpbnQg aXJxLAogCQkJICAgY29uc3QgY2hhciAqbmFtZSwKQEAgLTE0Nyw3ICsxNDcsNyBAQCBhdDkxX2Ns a19yZWdpc3Rlcl9tYWluX29zYyhzdHJ1Y3QgYXQ5MV9wbWMgKnBtYywKIHsKIAlpbnQgcmV0Owog CXN0cnVjdCBjbGtfbWFpbl9vc2MgKm9zYzsKLQlzdHJ1Y3QgY2xrICpjbGsgPSBOVUxMOworCXN0 cnVjdCBjbGtfY29yZSAqY2xrID0gTlVMTDsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0Owog CiAJaWYgKCFwbWMgfHwgIWlycSB8fCAhbmFtZSB8fCAhcGFyZW50X25hbWUpCkBAIC0xOTIsNyAr MTkyLDcgQEAgYXQ5MV9jbGtfcmVnaXN0ZXJfbWFpbl9vc2Moc3RydWN0IGF0OTFfcG1jICpwbWMs CiB2b2lkIF9faW5pdCBvZl9hdDkxcm05MjAwX2Nsa19tYWluX29zY19zZXR1cChzdHJ1Y3QgZGV2 aWNlX25vZGUgKm5wLAogCQkJCQkgICAgIHN0cnVjdCBhdDkxX3BtYyAqcG1jKQogewotCXN0cnVj dCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAl1bnNpZ25lZCBpbnQgaXJxOwog CWNvbnN0IGNoYXIgKm5hbWUgPSBucC0+bmFtZTsKIAljb25zdCBjaGFyICpwYXJlbnRfbmFtZTsK QEAgLTI5MSw3ICsyOTEsNyBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGNsa19vcHMgbWFpbl9yY19v c2Nfb3BzID0gewogCS5yZWNhbGNfYWNjdXJhY3kgPSBjbGtfbWFpbl9yY19vc2NfcmVjYWxjX2Fj Y3VyYWN5LAogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKiBfX2luaXQKK3N0YXRpYyBzdHJ1Y3Qg Y2xrX2NvcmUgKiBfX2luaXQKIGF0OTFfY2xrX3JlZ2lzdGVyX21haW5fcmNfb3NjKHN0cnVjdCBh dDkxX3BtYyAqcG1jLAogCQkJICAgICAgdW5zaWduZWQgaW50IGlycSwKIAkJCSAgICAgIGNvbnN0 IGNoYXIgKm5hbWUsCkBAIC0yOTksNyArMjk5LDcgQEAgYXQ5MV9jbGtfcmVnaXN0ZXJfbWFpbl9y Y19vc2Moc3RydWN0IGF0OTFfcG1jICpwbWMsCiB7CiAJaW50IHJldDsKIAlzdHJ1Y3QgY2xrX21h aW5fcmNfb3NjICpvc2M7Ci0Jc3RydWN0IGNsayAqY2xrID0gTlVMTDsKKwlzdHJ1Y3QgY2xrX2Nv cmUgKmNsayA9IE5VTEw7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAogCWlmICghcG1j IHx8ICFpcnEgfHwgIW5hbWUgfHwgIWZyZXF1ZW5jeSkKQEAgLTM0MCw3ICszNDAsNyBAQCBhdDkx X2Nsa19yZWdpc3Rlcl9tYWluX3JjX29zYyhzdHJ1Y3QgYXQ5MV9wbWMgKnBtYywKIHZvaWQgX19p bml0IG9mX2F0OTFzYW05eDVfY2xrX21haW5fcmNfb3NjX3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9k ZSAqbnAsCiAJCQkJCQlzdHJ1Y3QgYXQ5MV9wbWMgKnBtYykKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7 CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJdW5zaWduZWQgaW50IGlycTsKIAl1MzIgZnJlcXVl bmN5ID0gMDsKIAl1MzIgYWNjdXJhY3kgPSAwOwpAQCAtNDI0LDEzICs0MjQsMTMgQEAgc3RhdGlj IGNvbnN0IHN0cnVjdCBjbGtfb3BzIHJtOTIwMF9tYWluX29wcyA9IHsKIAkucmVjYWxjX3JhdGUg PSBjbGtfcm05MjAwX21haW5fcmVjYWxjX3JhdGUsCiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayAq IF9faW5pdAorc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqIF9faW5pdAogYXQ5MV9jbGtfcmVnaXN0 ZXJfcm05MjAwX21haW4oc3RydWN0IGF0OTFfcG1jICpwbWMsCiAJCQkgICAgICBjb25zdCBjaGFy ICpuYW1lLAogCQkJICAgICAgY29uc3QgY2hhciAqcGFyZW50X25hbWUpCiB7CiAJc3RydWN0IGNs a19ybTkyMDBfbWFpbiAqY2xrbWFpbjsKLQlzdHJ1Y3QgY2xrICpjbGsgPSBOVUxMOworCXN0cnVj dCBjbGtfY29yZSAqY2xrID0gTlVMTDsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwogCiAJ aWYgKCFwbWMgfHwgIW5hbWUpCkBAIC00NjIsNyArNDYyLDcgQEAgYXQ5MV9jbGtfcmVnaXN0ZXJf cm05MjAwX21haW4oc3RydWN0IGF0OTFfcG1jICpwbWMsCiB2b2lkIF9faW5pdCBvZl9hdDkxcm05 MjAwX2Nsa19tYWluX3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnAsCiAJCQkJCSBzdHJ1Y3Qg YXQ5MV9wbWMgKnBtYykKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpj bGs7CiAJY29uc3QgY2hhciAqcGFyZW50X25hbWU7CiAJY29uc3QgY2hhciAqbmFtZSA9IG5wLT5u YW1lOwogCkBAIC01NTUsNyArNTU1LDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIHNh bTl4NV9tYWluX29wcyA9IHsKIAkuZ2V0X3BhcmVudCA9IGNsa19zYW05eDVfbWFpbl9nZXRfcGFy ZW50LAogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKiBfX2luaXQKK3N0YXRpYyBzdHJ1Y3QgY2xr X2NvcmUgKiBfX2luaXQKIGF0OTFfY2xrX3JlZ2lzdGVyX3NhbTl4NV9tYWluKHN0cnVjdCBhdDkx X3BtYyAqcG1jLAogCQkJICAgICAgdW5zaWduZWQgaW50IGlycSwKIAkJCSAgICAgIGNvbnN0IGNo YXIgKm5hbWUsCkBAIC01NjQsNyArNTY0LDcgQEAgYXQ5MV9jbGtfcmVnaXN0ZXJfc2FtOXg1X21h aW4oc3RydWN0IGF0OTFfcG1jICpwbWMsCiB7CiAJaW50IHJldDsKIAlzdHJ1Y3QgY2xrX3NhbTl4 NV9tYWluICpjbGttYWluOwotCXN0cnVjdCBjbGsgKmNsayA9IE5VTEw7CisJc3RydWN0IGNsa19j b3JlICpjbGsgPSBOVUxMOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAlpZiAoIXBt YyB8fCAhaXJxIHx8ICFuYW1lKQpAQCAtNjA3LDcgKzYwNyw3IEBAIGF0OTFfY2xrX3JlZ2lzdGVy X3NhbTl4NV9tYWluKHN0cnVjdCBhdDkxX3BtYyAqcG1jLAogdm9pZCBfX2luaXQgb2ZfYXQ5MXNh bTl4NV9jbGtfbWFpbl9zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wLAogCQkJCQkgc3RydWN0 IGF0OTFfcG1jICpwbWMpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAq Y2xrOwogCWNvbnN0IGNoYXIgKnBhcmVudF9uYW1lc1syXTsKIAlpbnQgbnVtX3BhcmVudHM7CiAJ dW5zaWduZWQgaW50IGlycTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL2F0OTEvY2xrLW1hc3Rl ci5jIGIvZHJpdmVycy9jbGsvYXQ5MS9jbGstbWFzdGVyLmMKaW5kZXggYzFhZjgwYi4uOTVhZTFi NiAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvYXQ5MS9jbGstbWFzdGVyLmMKKysrIGIvZHJpdmVy cy9jbGsvYXQ5MS9jbGstbWFzdGVyLmMKQEAgLTEzMSw3ICsxMzEsNyBAQCBzdGF0aWMgY29uc3Qg c3RydWN0IGNsa19vcHMgbWFzdGVyX29wcyA9IHsKIAkuZ2V0X3BhcmVudCA9IGNsa19tYXN0ZXJf Z2V0X3BhcmVudCwKIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICogX19pbml0CitzdGF0aWMgc3Ry dWN0IGNsa19jb3JlICogX19pbml0CiBhdDkxX2Nsa19yZWdpc3Rlcl9tYXN0ZXIoc3RydWN0IGF0 OTFfcG1jICpwbWMsIHVuc2lnbmVkIGludCBpcnEsCiAJCWNvbnN0IGNoYXIgKm5hbWUsIGludCBu dW1fcGFyZW50cywKIAkJY29uc3QgY2hhciAqKnBhcmVudF9uYW1lcywKQEAgLTE0MCw3ICsxNDAs NyBAQCBhdDkxX2Nsa19yZWdpc3Rlcl9tYXN0ZXIoc3RydWN0IGF0OTFfcG1jICpwbWMsIHVuc2ln bmVkIGludCBpcnEsCiB7CiAJaW50IHJldDsKIAlzdHJ1Y3QgY2xrX21hc3RlciAqbWFzdGVyOwot CXN0cnVjdCBjbGsgKmNsayA9IE5VTEw7CisJc3RydWN0IGNsa19jb3JlICpjbGsgPSBOVUxMOwog CXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAlpZiAoIXBtYyB8fCAhaXJxIHx8ICFuYW1l IHx8ICFudW1fcGFyZW50cyB8fCAhcGFyZW50X25hbWVzKQpAQCAtMjE2LDcgKzIxNiw3IEBAIHN0 YXRpYyB2b2lkIF9faW5pdAogb2ZfYXQ5MV9jbGtfbWFzdGVyX3NldHVwKHN0cnVjdCBkZXZpY2Vf bm9kZSAqbnAsIHN0cnVjdCBhdDkxX3BtYyAqcG1jLAogCQkJIGNvbnN0IHN0cnVjdCBjbGtfbWFz dGVyX2xheW91dCAqbGF5b3V0KQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2Nv cmUgKmNsazsKIAlpbnQgbnVtX3BhcmVudHM7CiAJaW50IGk7CiAJdW5zaWduZWQgaW50IGlycTsK ZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL2F0OTEvY2xrLXBlcmlwaGVyYWwuYyBiL2RyaXZlcnMv Y2xrL2F0OTEvY2xrLXBlcmlwaGVyYWwuYwppbmRleCA1OTdmZWQ0Li5jZGY4ZThhIDEwMDY0NAot LS0gYS9kcml2ZXJzL2Nsay9hdDkxL2Nsay1wZXJpcGhlcmFsLmMKKysrIGIvZHJpdmVycy9jbGsv YXQ5MS9jbGstcGVyaXBoZXJhbC5jCkBAIC0xMDAsMTIgKzEwMCwxMiBAQCBzdGF0aWMgY29uc3Qg c3RydWN0IGNsa19vcHMgcGVyaXBoZXJhbF9vcHMgPSB7CiAJLmlzX2VuYWJsZWQgPSBjbGtfcGVy aXBoZXJhbF9pc19lbmFibGVkLAogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKiBfX2luaXQKK3N0 YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKiBfX2luaXQKIGF0OTFfY2xrX3JlZ2lzdGVyX3BlcmlwaGVy YWwoc3RydWN0IGF0OTFfcG1jICpwbWMsIGNvbnN0IGNoYXIgKm5hbWUsCiAJCQkgICAgIGNvbnN0 IGNoYXIgKnBhcmVudF9uYW1lLCB1MzIgaWQpCiB7CiAJc3RydWN0IGNsa19wZXJpcGhlcmFsICpw ZXJpcGg7Ci0Jc3RydWN0IGNsayAqY2xrID0gTlVMTDsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsayA9 IE5VTEw7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAogCWlmICghcG1jIHx8ICFuYW1l IHx8ICFwYXJlbnRfbmFtZSB8fCBpZCA+IFBFUklQSEVSQUxfSURfTUFYKQpAQCAtMTM0LDcgKzEz NCw3IEBAIGF0OTFfY2xrX3JlZ2lzdGVyX3BlcmlwaGVyYWwoc3RydWN0IGF0OTFfcG1jICpwbWMs IGNvbnN0IGNoYXIgKm5hbWUsCiAKIHN0YXRpYyB2b2lkIGNsa19zYW05eDVfcGVyaXBoZXJhbF9h dXRvZGl2KHN0cnVjdCBjbGtfc2FtOXg1X3BlcmlwaGVyYWwgKnBlcmlwaCkKIHsKLQlzdHJ1Y3Qg Y2xrICpwYXJlbnQ7CisJc3RydWN0IGNsa19jb3JlICpwYXJlbnQ7CiAJdW5zaWduZWQgbG9uZyBw YXJlbnRfcmF0ZTsKIAlpbnQgc2hpZnQgPSAwOwogCkBAIC0zMDksMTMgKzMwOSwxMyBAQCBzdGF0 aWMgY29uc3Qgc3RydWN0IGNsa19vcHMgc2FtOXg1X3BlcmlwaGVyYWxfb3BzID0gewogCS5zZXRf cmF0ZSA9IGNsa19zYW05eDVfcGVyaXBoZXJhbF9zZXRfcmF0ZSwKIH07CiAKLXN0YXRpYyBzdHJ1 Y3QgY2xrICogX19pbml0CitzdGF0aWMgc3RydWN0IGNsa19jb3JlICogX19pbml0CiBhdDkxX2Ns a19yZWdpc3Rlcl9zYW05eDVfcGVyaXBoZXJhbChzdHJ1Y3QgYXQ5MV9wbWMgKnBtYywgY29uc3Qg Y2hhciAqbmFtZSwKIAkJCQkgICAgY29uc3QgY2hhciAqcGFyZW50X25hbWUsIHUzMiBpZCwKIAkJ CQkgICAgY29uc3Qgc3RydWN0IGNsa19yYW5nZSAqcmFuZ2UpCiB7CiAJc3RydWN0IGNsa19zYW05 eDVfcGVyaXBoZXJhbCAqcGVyaXBoOwotCXN0cnVjdCBjbGsgKmNsayA9IE5VTEw7CisJc3RydWN0 IGNsa19jb3JlICpjbGsgPSBOVUxMOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAlp ZiAoIXBtYyB8fCAhbmFtZSB8fCAhcGFyZW50X25hbWUpCkBAIC0zNTIsNyArMzUyLDcgQEAgb2Zf YXQ5MV9jbGtfcGVyaXBoX3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnAsIHN0cnVjdCBhdDkx X3BtYyAqcG1jLCB1OCB0eXBlKQogewogCWludCBudW07CiAJdTMyIGlkOwotCXN0cnVjdCBjbGsg KmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAljb25zdCBjaGFyICpwYXJlbnRfbmFtZTsK IAljb25zdCBjaGFyICpuYW1lOwogCXN0cnVjdCBkZXZpY2Vfbm9kZSAqcGVyaXBoY2xrbnA7CmRp ZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9hdDkxL2Nsay1wbGwuYyBiL2RyaXZlcnMvY2xrL2F0OTEv Y2xrLXBsbC5jCmluZGV4IDZlYzc5ZGIuLjZhMWI5MDAgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xr L2F0OTEvY2xrLXBsbC5jCisrKyBiL2RyaXZlcnMvY2xrL2F0OTEvY2xrLXBsbC5jCkBAIC0yOTks MTQgKzI5OSwxNCBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGNsa19vcHMgcGxsX29wcyA9IHsKIAku c2V0X3JhdGUgPSBjbGtfcGxsX3NldF9yYXRlLAogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKiBf X2luaXQKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKiBfX2luaXQKIGF0OTFfY2xrX3JlZ2lzdGVy X3BsbChzdHJ1Y3QgYXQ5MV9wbWMgKnBtYywgdW5zaWduZWQgaW50IGlycSwgY29uc3QgY2hhciAq bmFtZSwKIAkJICAgICAgY29uc3QgY2hhciAqcGFyZW50X25hbWUsIHU4IGlkLAogCQkgICAgICBj b25zdCBzdHJ1Y3QgY2xrX3BsbF9sYXlvdXQgKmxheW91dCwKIAkJICAgICAgY29uc3Qgc3RydWN0 IGNsa19wbGxfY2hhcmFjdGVyaXN0aWNzICpjaGFyYWN0ZXJpc3RpY3MpCiB7CiAJc3RydWN0IGNs a19wbGwgKnBsbDsKLQlzdHJ1Y3QgY2xrICpjbGsgPSBOVUxMOworCXN0cnVjdCBjbGtfY29yZSAq Y2xrID0gTlVMTDsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwogCWludCByZXQ7CiAJaW50 IG9mZnNldCA9IFBMTF9SRUcoaWQpOwpAQCAtNDc2LDcgKzQ3Niw3IEBAIG9mX2F0OTFfY2xrX3Bs bF9zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wLCBzdHJ1Y3QgYXQ5MV9wbWMgKnBtYywKIHsK IAl1MzIgaWQ7CiAJdW5zaWduZWQgaW50IGlycTsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0 IGNsa19jb3JlICpjbGs7CiAJY29uc3QgY2hhciAqcGFyZW50X25hbWU7CiAJY29uc3QgY2hhciAq bmFtZSA9IG5wLT5uYW1lOwogCXN0cnVjdCBjbGtfcGxsX2NoYXJhY3RlcmlzdGljcyAqY2hhcmFj dGVyaXN0aWNzOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvYXQ5MS9jbGstcGxsZGl2LmMgYi9k cml2ZXJzL2Nsay9hdDkxL2Nsay1wbGxkaXYuYwppbmRleCBlYTIyNjU2Li5mODIwNGQ4IDEwMDY0 NAotLS0gYS9kcml2ZXJzL2Nsay9hdDkxL2Nsay1wbGxkaXYuYworKysgYi9kcml2ZXJzL2Nsay9h dDkxL2Nsay1wbGxkaXYuYwpAQCAtNzksMTIgKzc5LDEyIEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3Qg Y2xrX29wcyBwbGxkaXZfb3BzID0gewogCS5zZXRfcmF0ZSA9IGNsa19wbGxkaXZfc2V0X3JhdGUs CiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayAqIF9faW5pdAorc3RhdGljIHN0cnVjdCBjbGtfY29y ZSAqIF9faW5pdAogYXQ5MV9jbGtfcmVnaXN0ZXJfcGxsZGl2KHN0cnVjdCBhdDkxX3BtYyAqcG1j LCBjb25zdCBjaGFyICpuYW1lLAogCQkJIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lKQogewogCXN0 cnVjdCBjbGtfcGxsZGl2ICpwbGxkaXY7Ci0Jc3RydWN0IGNsayAqY2xrID0gTlVMTDsKKwlzdHJ1 Y3QgY2xrX2NvcmUgKmNsayA9IE5VTEw7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAog CXBsbGRpdiA9IGt6YWxsb2Moc2l6ZW9mKCpwbGxkaXYpLCBHRlBfS0VSTkVMKTsKQEAgLTExMSw3 ICsxMTEsNyBAQCBhdDkxX2Nsa19yZWdpc3Rlcl9wbGxkaXYoc3RydWN0IGF0OTFfcG1jICpwbWMs IGNvbnN0IGNoYXIgKm5hbWUsCiBzdGF0aWMgdm9pZCBfX2luaXQKIG9mX2F0OTFfY2xrX3BsbGRp dl9zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wLCBzdHJ1Y3QgYXQ5MV9wbWMgKnBtYykKIHsK LQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJY29uc3QgY2hhciAq cGFyZW50X25hbWU7CiAJY29uc3QgY2hhciAqbmFtZSA9IG5wLT5uYW1lOwogCmRpZmYgLS1naXQg YS9kcml2ZXJzL2Nsay9hdDkxL2Nsay1wcm9ncmFtbWFibGUuYyBiL2RyaXZlcnMvY2xrL2F0OTEv Y2xrLXByb2dyYW1tYWJsZS5jCmluZGV4IDYyZTI1MDkuLmI3MmU5OGMgMTAwNjQ0Ci0tLSBhL2Ry aXZlcnMvY2xrL2F0OTEvY2xrLXByb2dyYW1tYWJsZS5jCisrKyBiL2RyaXZlcnMvY2xrL2F0OTEv Y2xrLXByb2dyYW1tYWJsZS5jCkBAIC01Nyw5ICs1Nyw5IEBAIHN0YXRpYyB1bnNpZ25lZCBsb25n IGNsa19wcm9ncmFtbWFibGVfcmVjYWxjX3JhdGUoc3RydWN0IGNsa19odyAqaHcsCiBzdGF0aWMg bG9uZyBjbGtfcHJvZ3JhbW1hYmxlX2RldGVybWluZV9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LAog CQkJCQkgICAgdW5zaWduZWQgbG9uZyByYXRlLAogCQkJCQkgICAgdW5zaWduZWQgbG9uZyAqYmVz dF9wYXJlbnRfcmF0ZSwKLQkJCQkJICAgIHN0cnVjdCBjbGsgKipiZXN0X3BhcmVudF9jbGspCisJ CQkJCSAgICBzdHJ1Y3QgY2xrX2NvcmUgKipiZXN0X3BhcmVudF9jbGspCiB7Ci0Jc3RydWN0IGNs ayAqcGFyZW50ID0gTlVMTDsKKwlzdHJ1Y3QgY2xrX2NvcmUgKnBhcmVudCA9IE5VTEw7CiAJbG9u ZyBiZXN0X3JhdGUgPSAtRUlOVkFMOwogCXVuc2lnbmVkIGxvbmcgcGFyZW50X3JhdGU7CiAJdW5z aWduZWQgbG9uZyB0bXBfcmF0ZTsKQEAgLTE2OSwxNCArMTY5LDE0IEBAIHN0YXRpYyBjb25zdCBz dHJ1Y3QgY2xrX29wcyBwcm9ncmFtbWFibGVfb3BzID0gewogCS5zZXRfcmF0ZSA9IGNsa19wcm9n cmFtbWFibGVfc2V0X3JhdGUsCiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayAqIF9faW5pdAorc3Rh dGljIHN0cnVjdCBjbGtfY29yZSAqIF9faW5pdAogYXQ5MV9jbGtfcmVnaXN0ZXJfcHJvZ3JhbW1h YmxlKHN0cnVjdCBhdDkxX3BtYyAqcG1jLAogCQkJICAgICAgIGNvbnN0IGNoYXIgKm5hbWUsIGNv bnN0IGNoYXIgKipwYXJlbnRfbmFtZXMsCiAJCQkgICAgICAgdTggbnVtX3BhcmVudHMsIHU4IGlk LAogCQkJICAgICAgIGNvbnN0IHN0cnVjdCBjbGtfcHJvZ3JhbW1hYmxlX2xheW91dCAqbGF5b3V0 KQogewogCXN0cnVjdCBjbGtfcHJvZ3JhbW1hYmxlICpwcm9nOwotCXN0cnVjdCBjbGsgKmNsayA9 IE5VTEw7CisJc3RydWN0IGNsa19jb3JlICpjbGsgPSBOVUxMOwogCXN0cnVjdCBjbGtfaW5pdF9k YXRhIGluaXQ7CiAKIAlpZiAoaWQgPiBQUk9HX0lEX01BWCkKQEAgLTIyOSw3ICsyMjksNyBAQCBv Zl9hdDkxX2Nsa19wcm9nX3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnAsIHN0cnVjdCBhdDkx X3BtYyAqcG1jLAogCWludCBudW07CiAJdTMyIGlkOwogCWludCBpOwotCXN0cnVjdCBjbGsgKmNs azsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlpbnQgbnVtX3BhcmVudHM7CiAJY29uc3QgY2hh ciAqcGFyZW50X25hbWVzW1BST0dfU09VUkNFX01BWF07CiAJY29uc3QgY2hhciAqbmFtZTsKZGlm ZiAtLWdpdCBhL2RyaXZlcnMvY2xrL2F0OTEvY2xrLXNsb3cuYyBiL2RyaXZlcnMvY2xrL2F0OTEv Y2xrLXNsb3cuYwppbmRleCAwMzAwYzQ2Li5kNTBmZTAyIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Ns ay9hdDkxL2Nsay1zbG93LmMKKysrIGIvZHJpdmVycy9jbGsvYXQ5MS9jbGstc2xvdy5jCkBAIC0x MTcsNyArMTE3LDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIHNsb3dfb3NjX29wcyA9 IHsKIAkuaXNfcHJlcGFyZWQgPSBjbGtfc2xvd19vc2NfaXNfcHJlcGFyZWQsCiB9OwogCi1zdGF0 aWMgc3RydWN0IGNsayAqIF9faW5pdAorc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqIF9faW5pdAog YXQ5MV9jbGtfcmVnaXN0ZXJfc2xvd19vc2Modm9pZCBfX2lvbWVtICpzY2tjciwKIAkJCSAgIGNv bnN0IGNoYXIgKm5hbWUsCiAJCQkgICBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKQEAgLTEyNSw3 ICsxMjUsNyBAQCBhdDkxX2Nsa19yZWdpc3Rlcl9zbG93X29zYyh2b2lkIF9faW9tZW0gKnNja2Ny LAogCQkJICAgYm9vbCBieXBhc3MpCiB7CiAJc3RydWN0IGNsa19zbG93X29zYyAqb3NjOwotCXN0 cnVjdCBjbGsgKmNsayA9IE5VTEw7CisJc3RydWN0IGNsa19jb3JlICpjbGsgPSBOVUxMOwogCXN0 cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAlpZiAoIXNja2NyIHx8ICFuYW1lIHx8ICFwYXJl bnRfbmFtZSkKQEAgLTE1OSw3ICsxNTksNyBAQCBhdDkxX2Nsa19yZWdpc3Rlcl9zbG93X29zYyh2 b2lkIF9faW9tZW0gKnNja2NyLAogdm9pZCBfX2luaXQgb2ZfYXQ5MXNhbTl4NV9jbGtfc2xvd19v c2Nfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpucCwKIAkJCQkJICAgICB2b2lkIF9faW9tZW0g KnNja2NyKQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlj b25zdCBjaGFyICpwYXJlbnRfbmFtZTsKIAljb25zdCBjaGFyICpuYW1lID0gbnAtPm5hbWU7CiAJ dTMyIHN0YXJ0dXA7CkBAIC0yMjksNyArMjI5LDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtf b3BzIHNsb3dfcmNfb3NjX29wcyA9IHsKIAkucmVjYWxjX2FjY3VyYWN5ID0gY2xrX3Nsb3dfcmNf b3NjX3JlY2FsY19hY2N1cmFjeSwKIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICogX19pbml0Citz dGF0aWMgc3RydWN0IGNsa19jb3JlICogX19pbml0CiBhdDkxX2Nsa19yZWdpc3Rlcl9zbG93X3Jj X29zYyh2b2lkIF9faW9tZW0gKnNja2NyLAogCQkJICAgICAgY29uc3QgY2hhciAqbmFtZSwKIAkJ CSAgICAgIHVuc2lnbmVkIGxvbmcgZnJlcXVlbmN5LApAQCAtMjM3LDcgKzIzNyw3IEBAIGF0OTFf Y2xrX3JlZ2lzdGVyX3Nsb3dfcmNfb3NjKHZvaWQgX19pb21lbSAqc2NrY3IsCiAJCQkgICAgICB1 bnNpZ25lZCBsb25nIHN0YXJ0dXApCiB7CiAJc3RydWN0IGNsa19zbG93X3JjX29zYyAqb3NjOwot CXN0cnVjdCBjbGsgKmNsayA9IE5VTEw7CisJc3RydWN0IGNsa19jb3JlICpjbGsgPSBOVUxMOwog CXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAlpZiAoIXNja2NyIHx8ICFuYW1lKQpAQCAt MjY5LDcgKzI2OSw3IEBAIGF0OTFfY2xrX3JlZ2lzdGVyX3Nsb3dfcmNfb3NjKHZvaWQgX19pb21l bSAqc2NrY3IsCiB2b2lkIF9faW5pdCBvZl9hdDkxc2FtOXg1X2Nsa19zbG93X3JjX29zY19zZXR1 cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wLAogCQkJCQkJdm9pZCBfX2lvbWVtICpzY2tjcikKIHsK LQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJdTMyIGZyZXF1ZW5j eSA9IDA7CiAJdTMyIGFjY3VyYWN5ID0gMDsKIAl1MzIgc3RhcnR1cCA9IDA7CkBAIC0zMjcsMTQg KzMyNywxNCBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGNsa19vcHMgc2FtOXg1X3Nsb3dfb3BzID0g ewogCS5nZXRfcGFyZW50ID0gY2xrX3NhbTl4NV9zbG93X2dldF9wYXJlbnQsCiB9OwogCi1zdGF0 aWMgc3RydWN0IGNsayAqIF9faW5pdAorc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqIF9faW5pdAog YXQ5MV9jbGtfcmVnaXN0ZXJfc2FtOXg1X3Nsb3codm9pZCBfX2lvbWVtICpzY2tjciwKIAkJCSAg ICAgIGNvbnN0IGNoYXIgKm5hbWUsCiAJCQkgICAgICBjb25zdCBjaGFyICoqcGFyZW50X25hbWVz LAogCQkJICAgICAgaW50IG51bV9wYXJlbnRzKQogewogCXN0cnVjdCBjbGtfc2FtOXg1X3Nsb3cg KnNsb3djazsKLQlzdHJ1Y3QgY2xrICpjbGsgPSBOVUxMOworCXN0cnVjdCBjbGtfY29yZSAqY2xr ID0gTlVMTDsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwogCiAJaWYgKCFzY2tjciB8fCAh bmFtZSB8fCAhcGFyZW50X25hbWVzIHx8ICFudW1fcGFyZW50cykKQEAgLTM2NCw3ICszNjQsNyBA QCBhdDkxX2Nsa19yZWdpc3Rlcl9zYW05eDVfc2xvdyh2b2lkIF9faW9tZW0gKnNja2NyLAogdm9p ZCBfX2luaXQgb2ZfYXQ5MXNhbTl4NV9jbGtfc2xvd19zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUg Km5wLAogCQkJCQkgdm9pZCBfX2lvbWVtICpzY2tjcikKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJ c3RydWN0IGNsa19jb3JlICpjbGs7CiAJY29uc3QgY2hhciAqcGFyZW50X25hbWVzWzJdOwogCWlu dCBudW1fcGFyZW50czsKIAljb25zdCBjaGFyICpuYW1lID0gbnAtPm5hbWU7CkBAIC00MDEsMTQg KzQwMSwxNCBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGNsa19vcHMgc2FtOTI2MF9zbG93X29wcyA9 IHsKIAkuZ2V0X3BhcmVudCA9IGNsa19zYW05MjYwX3Nsb3dfZ2V0X3BhcmVudCwKIH07CiAKLXN0 YXRpYyBzdHJ1Y3QgY2xrICogX19pbml0CitzdGF0aWMgc3RydWN0IGNsa19jb3JlICogX19pbml0 CiBhdDkxX2Nsa19yZWdpc3Rlcl9zYW05MjYwX3Nsb3coc3RydWN0IGF0OTFfcG1jICpwbWMsCiAJ CQkgICAgICAgY29uc3QgY2hhciAqbmFtZSwKIAkJCSAgICAgICBjb25zdCBjaGFyICoqcGFyZW50 X25hbWVzLAogCQkJICAgICAgIGludCBudW1fcGFyZW50cykKIHsKIAlzdHJ1Y3QgY2xrX3NhbTky NjBfc2xvdyAqc2xvd2NrOwotCXN0cnVjdCBjbGsgKmNsayA9IE5VTEw7CisJc3RydWN0IGNsa19j b3JlICpjbGsgPSBOVUxMOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAlpZiAoIXBt YyB8fCAhbmFtZSkKQEAgLTQ0MCw3ICs0NDAsNyBAQCBhdDkxX2Nsa19yZWdpc3Rlcl9zYW05MjYw X3Nsb3coc3RydWN0IGF0OTFfcG1jICpwbWMsCiB2b2lkIF9faW5pdCBvZl9hdDkxc2FtOTI2MF9j bGtfc2xvd19zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wLAogCQkJCQkgIHN0cnVjdCBhdDkx X3BtYyAqcG1jKQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsK IAljb25zdCBjaGFyICpwYXJlbnRfbmFtZXNbMl07CiAJaW50IG51bV9wYXJlbnRzOwogCWNvbnN0 IGNoYXIgKm5hbWUgPSBucC0+bmFtZTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL2F0OTEvY2xr LXNtZC5jIGIvZHJpdmVycy9jbGsvYXQ5MS9jbGstc21kLmMKaW5kZXggMTQ0ZDQ3ZS4uODgyMGI4 NCAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvYXQ5MS9jbGstc21kLmMKKysrIGIvZHJpdmVycy9j bGsvYXQ5MS9jbGstc21kLmMKQEAgLTExMywxMiArMTEzLDEyIEBAIHN0YXRpYyBjb25zdCBzdHJ1 Y3QgY2xrX29wcyBhdDkxc2FtOXg1X3NtZF9vcHMgPSB7CiAJLnNldF9yYXRlID0gYXQ5MXNhbTl4 NV9jbGtfc21kX3NldF9yYXRlLAogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKiBfX2luaXQKK3N0 YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKiBfX2luaXQKIGF0OTFzYW05eDVfY2xrX3JlZ2lzdGVyX3Nt ZChzdHJ1Y3QgYXQ5MV9wbWMgKnBtYywgY29uc3QgY2hhciAqbmFtZSwKIAkJCSAgICBjb25zdCBj aGFyICoqcGFyZW50X25hbWVzLCB1OCBudW1fcGFyZW50cykKIHsKIAlzdHJ1Y3QgYXQ5MXNhbTl4 NV9jbGtfc21kICpzbWQ7Ci0Jc3RydWN0IGNsayAqY2xrID0gTlVMTDsKKwlzdHJ1Y3QgY2xrX2Nv cmUgKmNsayA9IE5VTEw7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAogCXNtZCA9IGt6 YWxsb2Moc2l6ZW9mKCpzbWQpLCBHRlBfS0VSTkVMKTsKQEAgLTE0NCw3ICsxNDQsNyBAQCBhdDkx c2FtOXg1X2Nsa19yZWdpc3Rlcl9zbWQoc3RydWN0IGF0OTFfcG1jICpwbWMsIGNvbnN0IGNoYXIg Km5hbWUsCiB2b2lkIF9faW5pdCBvZl9hdDkxc2FtOXg1X2Nsa19zbWRfc2V0dXAoc3RydWN0IGRl dmljZV9ub2RlICpucCwKIAkJCQkJc3RydWN0IGF0OTFfcG1jICpwbWMpCiB7Ci0Jc3RydWN0IGNs ayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCWludCBpOwogCWludCBudW1fcGFyZW50 czsKIAljb25zdCBjaGFyICpwYXJlbnRfbmFtZXNbU01EX1NPVVJDRV9NQVhdOwpkaWZmIC0tZ2l0 IGEvZHJpdmVycy9jbGsvYXQ5MS9jbGstc3lzdGVtLmMgYi9kcml2ZXJzL2Nsay9hdDkxL2Nsay1z eXN0ZW0uYwppbmRleCA4Yzk2MzA3Li43NzBkOWJmIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9h dDkxL2Nsay1zeXN0ZW0uYworKysgYi9kcml2ZXJzL2Nsay9hdDkxL2Nsay1zeXN0ZW0uYwpAQCAt OTksMTIgKzk5LDEyIEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgY2xrX29wcyBzeXN0ZW1fb3BzID0g ewogCS5pc19wcmVwYXJlZCA9IGNsa19zeXN0ZW1faXNfcHJlcGFyZWQsCiB9OwogCi1zdGF0aWMg c3RydWN0IGNsayAqIF9faW5pdAorc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqIF9faW5pdAogYXQ5 MV9jbGtfcmVnaXN0ZXJfc3lzdGVtKHN0cnVjdCBhdDkxX3BtYyAqcG1jLCBjb25zdCBjaGFyICpu YW1lLAogCQkJIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLCB1OCBpZCwgaW50IGlycSkKIHsKIAlz dHJ1Y3QgY2xrX3N5c3RlbSAqc3lzOwotCXN0cnVjdCBjbGsgKmNsayA9IE5VTEw7CisJc3RydWN0 IGNsa19jb3JlICpjbGsgPSBOVUxMOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAJaW50 IHJldDsKIApAQCAtMTUzLDcgKzE1Myw3IEBAIG9mX2F0OTFfY2xrX3N5c19zZXR1cChzdHJ1Y3Qg ZGV2aWNlX25vZGUgKm5wLCBzdHJ1Y3QgYXQ5MV9wbWMgKnBtYykKIAlpbnQgbnVtOwogCWludCBp cnEgPSAwOwogCXUzMiBpZDsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpj bGs7CiAJY29uc3QgY2hhciAqbmFtZTsKIAlzdHJ1Y3QgZGV2aWNlX25vZGUgKnN5c2Nsa25wOwog CWNvbnN0IGNoYXIgKnBhcmVudF9uYW1lOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvYXQ5MS9j bGstdXNiLmMgYi9kcml2ZXJzL2Nsay9hdDkxL2Nsay11c2IuYwppbmRleCAyNGI1YjAyLi45NGI1 ODcxIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9hdDkxL2Nsay11c2IuYworKysgYi9kcml2ZXJz L2Nsay9hdDkxL2Nsay11c2IuYwpAQCAtMTYyLDEyICsxNjIsMTIgQEAgc3RhdGljIGNvbnN0IHN0 cnVjdCBjbGtfb3BzIGF0OTFzYW05bjEyX3VzYl9vcHMgPSB7CiAJLnNldF9yYXRlID0gYXQ5MXNh bTl4NV9jbGtfdXNiX3NldF9yYXRlLAogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKiBfX2luaXQK K3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKiBfX2luaXQKIGF0OTFzYW05eDVfY2xrX3JlZ2lzdGVy X3VzYihzdHJ1Y3QgYXQ5MV9wbWMgKnBtYywgY29uc3QgY2hhciAqbmFtZSwKIAkJCSAgICBjb25z dCBjaGFyICoqcGFyZW50X25hbWVzLCB1OCBudW1fcGFyZW50cykKIHsKIAlzdHJ1Y3QgYXQ5MXNh bTl4NV9jbGtfdXNiICp1c2I7Ci0Jc3RydWN0IGNsayAqY2xrID0gTlVMTDsKKwlzdHJ1Y3QgY2xr X2NvcmUgKmNsayA9IE5VTEw7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAogCXVzYiA9 IGt6YWxsb2Moc2l6ZW9mKCp1c2IpLCBHRlBfS0VSTkVMKTsKQEAgLTE5MCwxMiArMTkwLDEyIEBA IGF0OTFzYW05eDVfY2xrX3JlZ2lzdGVyX3VzYihzdHJ1Y3QgYXQ5MV9wbWMgKnBtYywgY29uc3Qg Y2hhciAqbmFtZSwKIAlyZXR1cm4gY2xrOwogfQogCi1zdGF0aWMgc3RydWN0IGNsayAqIF9faW5p dAorc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqIF9faW5pdAogYXQ5MXNhbTluMTJfY2xrX3JlZ2lz dGVyX3VzYihzdHJ1Y3QgYXQ5MV9wbWMgKnBtYywgY29uc3QgY2hhciAqbmFtZSwKIAkJCSAgICAg Y29uc3QgY2hhciAqcGFyZW50X25hbWUpCiB7CiAJc3RydWN0IGF0OTFzYW05eDVfY2xrX3VzYiAq dXNiOwotCXN0cnVjdCBjbGsgKmNsayA9IE5VTEw7CisJc3RydWN0IGNsa19jb3JlICpjbGsgPSBO VUxMOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAl1c2IgPSBremFsbG9jKHNpemVv ZigqdXNiKSwgR0ZQX0tFUk5FTCk7CkBAIC0yMzgsNyArMjM4LDcgQEAgc3RhdGljIGxvbmcgYXQ5 MXJtOTIwMF9jbGtfdXNiX3JvdW5kX3JhdGUoc3RydWN0IGNsa19odyAqaHcsIHVuc2lnbmVkIGxv bmcgcmF0ZSwKIAkJCQkJICB1bnNpZ25lZCBsb25nICpwYXJlbnRfcmF0ZSkKIHsKIAlzdHJ1Y3Qg YXQ5MXJtOTIwMF9jbGtfdXNiICp1c2IgPSB0b19hdDkxcm05MjAwX2Nsa191c2IoaHcpOwotCXN0 cnVjdCBjbGsgKnBhcmVudCA9IF9fY2xrX2dldF9wYXJlbnQoaHctPmNsayk7CisJc3RydWN0IGNs a19jb3JlICpwYXJlbnQgPSBfX2Nsa19nZXRfcGFyZW50KGh3LT5jbGspOwogCXVuc2lnbmVkIGxv bmcgYmVzdHJhdGUgPSAwOwogCWludCBiZXN0ZGlmZiA9IC0xOwogCXVuc2lnbmVkIGxvbmcgdG1w cmF0ZTsKQEAgLTMwNSwxMiArMzA1LDEyIEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgY2xrX29wcyBh dDkxcm05MjAwX3VzYl9vcHMgPSB7CiAJLnNldF9yYXRlID0gYXQ5MXJtOTIwMF9jbGtfdXNiX3Nl dF9yYXRlLAogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKiBfX2luaXQKK3N0YXRpYyBzdHJ1Y3Qg Y2xrX2NvcmUgKiBfX2luaXQKIGF0OTFybTkyMDBfY2xrX3JlZ2lzdGVyX3VzYihzdHJ1Y3QgYXQ5 MV9wbWMgKnBtYywgY29uc3QgY2hhciAqbmFtZSwKIAkJCSAgICBjb25zdCBjaGFyICpwYXJlbnRf bmFtZSwgY29uc3QgdTMyICpkaXZpc29ycykKIHsKIAlzdHJ1Y3QgYXQ5MXJtOTIwMF9jbGtfdXNi ICp1c2I7Ci0Jc3RydWN0IGNsayAqY2xrID0gTlVMTDsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsayA9 IE5VTEw7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAogCXVzYiA9IGt6YWxsb2Moc2l6 ZW9mKCp1c2IpLCBHRlBfS0VSTkVMKTsKQEAgLTMzNyw3ICszMzcsNyBAQCBhdDkxcm05MjAwX2Ns a19yZWdpc3Rlcl91c2Ioc3RydWN0IGF0OTFfcG1jICpwbWMsIGNvbnN0IGNoYXIgKm5hbWUsCiB2 b2lkIF9faW5pdCBvZl9hdDkxc2FtOXg1X2Nsa191c2Jfc2V0dXAoc3RydWN0IGRldmljZV9ub2Rl ICpucCwKIAkJCQkJc3RydWN0IGF0OTFfcG1jICpwbWMpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOwor CXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCWludCBpOwogCWludCBudW1fcGFyZW50czsKIAljb25z dCBjaGFyICpwYXJlbnRfbmFtZXNbVVNCX1NPVVJDRV9NQVhdOwpAQCAtMzY1LDcgKzM2NSw3IEBA IHZvaWQgX19pbml0IG9mX2F0OTFzYW05eDVfY2xrX3VzYl9zZXR1cChzdHJ1Y3QgZGV2aWNlX25v ZGUgKm5wLAogdm9pZCBfX2luaXQgb2ZfYXQ5MXNhbTluMTJfY2xrX3VzYl9zZXR1cChzdHJ1Y3Qg ZGV2aWNlX25vZGUgKm5wLAogCQkJCQkgc3RydWN0IGF0OTFfcG1jICpwbWMpCiB7Ci0Jc3RydWN0 IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCWNvbnN0IGNoYXIgKnBhcmVudF9u YW1lOwogCWNvbnN0IGNoYXIgKm5hbWUgPSBucC0+bmFtZTsKIApAQCAtMzg1LDcgKzM4NSw3IEBA IHZvaWQgX19pbml0IG9mX2F0OTFzYW05bjEyX2Nsa191c2Jfc2V0dXAoc3RydWN0IGRldmljZV9u b2RlICpucCwKIHZvaWQgX19pbml0IG9mX2F0OTFybTkyMDBfY2xrX3VzYl9zZXR1cChzdHJ1Y3Qg ZGV2aWNlX25vZGUgKm5wLAogCQkJCQlzdHJ1Y3QgYXQ5MV9wbWMgKnBtYykKIHsKLQlzdHJ1Y3Qg Y2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJY29uc3QgY2hhciAqcGFyZW50X25h bWU7CiAJY29uc3QgY2hhciAqbmFtZSA9IG5wLT5uYW1lOwogCXUzMiBkaXZpc29yc1s0XSA9IHsw LCAwLCAwLCAwfTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL2F0OTEvY2xrLXV0bWkuYyBiL2Ry aXZlcnMvY2xrL2F0OTEvY2xrLXV0bWkuYwppbmRleCBhZTMyNjNiLi4wNTAyMDUwIDEwMDY0NAot LS0gYS9kcml2ZXJzL2Nsay9hdDkxL2Nsay11dG1pLmMKKysrIGIvZHJpdmVycy9jbGsvYXQ5MS9j bGstdXRtaS5jCkBAIC05MiwxMyArOTIsMTMgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3Bz IHV0bWlfb3BzID0gewogCS5yZWNhbGNfcmF0ZSA9IGNsa191dG1pX3JlY2FsY19yYXRlLAogfTsK IAotc3RhdGljIHN0cnVjdCBjbGsgKiBfX2luaXQKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKiBf X2luaXQKIGF0OTFfY2xrX3JlZ2lzdGVyX3V0bWkoc3RydWN0IGF0OTFfcG1jICpwbWMsIHVuc2ln bmVkIGludCBpcnEsCiAJCSAgICAgICBjb25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJl bnRfbmFtZSkKIHsKIAlpbnQgcmV0OwogCXN0cnVjdCBjbGtfdXRtaSAqdXRtaTsKLQlzdHJ1Y3Qg Y2xrICpjbGsgPSBOVUxMOworCXN0cnVjdCBjbGtfY29yZSAqY2xrID0gTlVMTDsKIAlzdHJ1Y3Qg Y2xrX2luaXRfZGF0YSBpbml0OwogCiAJdXRtaSA9IGt6YWxsb2Moc2l6ZW9mKCp1dG1pKSwgR0ZQ X0tFUk5FTCk7CkBAIC0xMzIsNyArMTMyLDcgQEAgc3RhdGljIHZvaWQgX19pbml0CiBvZl9hdDkx X2Nsa191dG1pX3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnAsIHN0cnVjdCBhdDkxX3BtYyAq cG1jKQogewogCXVuc2lnbmVkIGludCBpcnE7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBj bGtfY29yZSAqY2xrOwogCWNvbnN0IGNoYXIgKnBhcmVudF9uYW1lOwogCWNvbnN0IGNoYXIgKm5h bWUgPSBucC0+bmFtZTsKIApkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvYmNtL2Nsay1rb25hLXNl dHVwLmMgYi9kcml2ZXJzL2Nsay9iY20vY2xrLWtvbmEtc2V0dXAuYwppbmRleCBlNWFlZGVkLi4x MjJlN2IwIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9iY20vY2xrLWtvbmEtc2V0dXAuYworKysg Yi9kcml2ZXJzL2Nsay9iY20vY2xrLWtvbmEtc2V0dXAuYwpAQCAtNjk3LDcgKzY5Nyw3IEBAIHN0 YXRpYyB2b2lkIGJjbV9jbGtfdGVhcmRvd24oc3RydWN0IGtvbmFfY2xrICpiY21fY2xrKQogCWJj bV9jbGstPnR5cGUgPSBiY21fY2xrX25vbmU7CiB9CiAKLXN0YXRpYyB2b2lkIGtvbmFfY2xrX3Rl YXJkb3duKHN0cnVjdCBjbGsgKmNsaykKK3N0YXRpYyB2b2lkIGtvbmFfY2xrX3RlYXJkb3duKHN0 cnVjdCBjbGtfY29yZSAqY2xrKQogewogCXN0cnVjdCBjbGtfaHcgKmh3OwogCXN0cnVjdCBrb25h X2NsayAqYmNtX2NsazsKQEAgLTcxNiwxMCArNzE2LDEwIEBAIHN0YXRpYyB2b2lkIGtvbmFfY2xr X3RlYXJkb3duKHN0cnVjdCBjbGsgKmNsaykKIAliY21fY2xrX3RlYXJkb3duKGJjbV9jbGspOwog fQogCi1zdHJ1Y3QgY2xrICprb25hX2Nsa19zZXR1cChzdHJ1Y3Qga29uYV9jbGsgKmJjbV9jbGsp CitzdHJ1Y3QgY2xrX2NvcmUgKmtvbmFfY2xrX3NldHVwKHN0cnVjdCBrb25hX2NsayAqYmNtX2Ns aykKIHsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSAqaW5pdF9kYXRhID0gJmJjbV9jbGstPmluaXRf ZGF0YTsKLQlzdHJ1Y3QgY2xrICpjbGsgPSBOVUxMOworCXN0cnVjdCBjbGtfY29yZSAqY2xrID0g TlVMTDsKIAogCXN3aXRjaCAoYmNtX2Nsay0+dHlwZSkgewogCWNhc2UgYmNtX2Nsa19wZXJpOgpk aWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvYmNtL2Nsay1rb25hLmMgYi9kcml2ZXJzL2Nsay9iY20v Y2xrLWtvbmEuYwppbmRleCA5NWFmMmU2Li5hMzAxYWE5IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Ns ay9iY20vY2xrLWtvbmEuYworKysgYi9kcml2ZXJzL2Nsay9iY20vY2xrLWtvbmEuYwpAQCAtMTAz MiwxMSArMTAzMiwxMSBAQCBzdGF0aWMgbG9uZyBrb25hX3BlcmlfY2xrX3JvdW5kX3JhdGUoc3Ry dWN0IGNsa19odyAqaHcsIHVuc2lnbmVkIGxvbmcgcmF0ZSwKIH0KIAogc3RhdGljIGxvbmcga29u YV9wZXJpX2Nsa19kZXRlcm1pbmVfcmF0ZShzdHJ1Y3QgY2xrX2h3ICpodywgdW5zaWduZWQgbG9u ZyByYXRlLAotCQl1bnNpZ25lZCBsb25nICpiZXN0X3BhcmVudF9yYXRlLCBzdHJ1Y3QgY2xrICoq YmVzdF9wYXJlbnQpCisJCXVuc2lnbmVkIGxvbmcgKmJlc3RfcGFyZW50X3JhdGUsIHN0cnVjdCBj bGtfY29yZSAqKmJlc3RfcGFyZW50KQogewogCXN0cnVjdCBrb25hX2NsayAqYmNtX2NsayA9IHRv X2tvbmFfY2xrKGh3KTsKLQlzdHJ1Y3QgY2xrICpjbGsgPSBody0+Y2xrOwotCXN0cnVjdCBjbGsg KmN1cnJlbnRfcGFyZW50OworCXN0cnVjdCBjbGtfY29yZSAqY2xrID0gaHctPmNsazsKKwlzdHJ1 Y3QgY2xrX2NvcmUgKmN1cnJlbnRfcGFyZW50OwogCXVuc2lnbmVkIGxvbmcgcGFyZW50X3JhdGU7 CiAJdW5zaWduZWQgbG9uZyBiZXN0X2RlbHRhOwogCXVuc2lnbmVkIGxvbmcgYmVzdF9yYXRlOwpA QCAtMTA1MywxNCArMTA1MywxNCBAQCBzdGF0aWMgbG9uZyBrb25hX3BlcmlfY2xrX2RldGVybWlu ZV9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25lZCBsb25nIHJhdGUsCiAJCXJldHVybiBr b25hX3BlcmlfY2xrX3JvdW5kX3JhdGUoaHcsIHJhdGUsIGJlc3RfcGFyZW50X3JhdGUpOwogCiAJ LyogVW5sZXNzIHdlIGNhbiBkbyBiZXR0ZXIsIHN0aWNrIHdpdGggY3VycmVudCBwYXJlbnQgKi8K LQljdXJyZW50X3BhcmVudCA9IGNsa19nZXRfcGFyZW50KGNsayk7CisJY3VycmVudF9wYXJlbnQg PSBjbGtfcHJvdmlkZXJfZ2V0X3BhcmVudChjbGspOwogCXBhcmVudF9yYXRlID0gX19jbGtfZ2V0 X3JhdGUoY3VycmVudF9wYXJlbnQpOwogCWJlc3RfcmF0ZSA9IGtvbmFfcGVyaV9jbGtfcm91bmRf cmF0ZShodywgcmF0ZSwgJnBhcmVudF9yYXRlKTsKIAliZXN0X2RlbHRhID0gYWJzKGJlc3RfcmF0 ZSAtIHJhdGUpOwogCiAJLyogQ2hlY2sgd2hldGhlciBhbnkgb3RoZXIgcGFyZW50IGNsb2NrIGNh biBwcm9kdWNlIGEgYmV0dGVyIHJlc3VsdCAqLwogCWZvciAod2hpY2ggPSAwOyB3aGljaCA8IHBh cmVudF9jb3VudDsgd2hpY2grKykgewotCQlzdHJ1Y3QgY2xrICpwYXJlbnQgPSBjbGtfZ2V0X3Bh cmVudF9ieV9pbmRleChjbGssIHdoaWNoKTsKKwkJc3RydWN0IGNsa19jb3JlICpwYXJlbnQgPSBj bGtfZ2V0X3BhcmVudF9ieV9pbmRleChjbGssIHdoaWNoKTsKIAkJdW5zaWduZWQgbG9uZyBkZWx0 YTsKIAkJdW5zaWduZWQgbG9uZyBvdGhlcl9yYXRlOwogCkBAIC0xMjYwLDcgKzEyNjAsNyBAQCBi b29sIF9faW5pdCBrb25hX2NjdV9pbml0KHN0cnVjdCBjY3VfZGF0YSAqY2N1KQogewogCXVuc2ln bmVkIGxvbmcgZmxhZ3M7CiAJdW5zaWduZWQgaW50IHdoaWNoOwotCXN0cnVjdCBjbGsgKipjbGtz ID0gY2N1LT5jbGtfZGF0YS5jbGtzOworCXN0cnVjdCBjbGtfY29yZSAqKmNsa3MgPSBjY3UtPmNs a19kYXRhLmNsa3M7CiAJYm9vbCBzdWNjZXNzID0gdHJ1ZTsKIAogCWZsYWdzID0gY2N1X2xvY2so Y2N1KTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL2JjbS9jbGsta29uYS5oIGIvZHJpdmVycy9j bGsvYmNtL2Nsay1rb25hLmgKaW5kZXggMjUzN2IzMC4uYzJkMDE1MiAxMDA2NDQKLS0tIGEvZHJp dmVycy9jbGsvYmNtL2Nsay1rb25hLmgKKysrIGIvZHJpdmVycy9jbGsvYmNtL2Nsay1rb25hLmgK QEAgLTUwOCw3ICs1MDgsNyBAQCBleHRlcm4gdTY0IHNjYWxlZF9kaXZfbWF4KHN0cnVjdCBiY21f Y2xrX2RpdiAqZGl2KTsKIGV4dGVybiB1NjQgc2NhbGVkX2Rpdl9idWlsZChzdHJ1Y3QgYmNtX2Ns a19kaXYgKmRpdiwgdTMyIGRpdl92YWx1ZSwKIAkJCQl1MzIgYmlsbGlvbnRocyk7CiAKLWV4dGVy biBzdHJ1Y3QgY2xrICprb25hX2Nsa19zZXR1cChzdHJ1Y3Qga29uYV9jbGsgKmJjbV9jbGspOwor ZXh0ZXJuIHN0cnVjdCBjbGtfY29yZSAqa29uYV9jbGtfc2V0dXAoc3RydWN0IGtvbmFfY2xrICpi Y21fY2xrKTsKIGV4dGVybiB2b2lkIF9faW5pdCBrb25hX2R0X2NjdV9zZXR1cChzdHJ1Y3QgY2N1 X2RhdGEgKmNjdSwKIAkJCQlzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUpOwogZXh0ZXJuIGJvb2wg X19pbml0IGtvbmFfY2N1X2luaXQoc3RydWN0IGNjdV9kYXRhICpjY3UpOwpkaWZmIC0tZ2l0IGEv ZHJpdmVycy9jbGsvYmVybGluL2JlcmxpbjItYXZwbGwuYyBiL2RyaXZlcnMvY2xrL2Jlcmxpbi9i ZXJsaW4yLWF2cGxsLmMKaW5kZXggZmQwZjI2Yy4uNDg4ZDk4NiAxMDA2NDQKLS0tIGEvZHJpdmVy cy9jbGsvYmVybGluL2JlcmxpbjItYXZwbGwuYworKysgYi9kcml2ZXJzL2Nsay9iZXJsaW4vYmVy bGluMi1hdnBsbC5jCkBAIC0xODgsNyArMTg4LDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtf b3BzIGJlcmxpbjJfYXZwbGxfdmNvX29wcyA9IHsKIAkucmVjYWxjX3JhdGUJPSBiZXJsaW4yX2F2 cGxsX3Zjb19yZWNhbGNfcmF0ZSwKIH07CiAKLXN0cnVjdCBjbGsgKiBfX2luaXQgYmVybGluMl9h dnBsbF92Y29fcmVnaXN0ZXIodm9pZCBfX2lvbWVtICpiYXNlLAorc3RydWN0IGNsa19jb3JlICog X19pbml0IGJlcmxpbjJfYXZwbGxfdmNvX3JlZ2lzdGVyKHZvaWQgX19pb21lbSAqYmFzZSwKIAkJ CSAgICAgICBjb25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJCSAg ICAgICB1OCB2Y29fZmxhZ3MsIHVuc2lnbmVkIGxvbmcgZmxhZ3MpCiB7CkBAIC0zNjQsNyArMzY0 LDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIGJlcmxpbjJfYXZwbGxfY2hhbm5lbF9v cHMgPSB7CiAgKi8KIHN0YXRpYyBjb25zdCB1OCBxdWlya19pbmRleFtdIF9faW5pdGNvbnN0ID0g eyAwLCA2LCA1LCA0LCAzLCAyLCAxLCA3IH07CiAKLXN0cnVjdCBjbGsgKiBfX2luaXQgYmVybGlu Ml9hdnBsbF9jaGFubmVsX3JlZ2lzdGVyKHZvaWQgX19pb21lbSAqYmFzZSwKK3N0cnVjdCBjbGtf Y29yZSAqIF9faW5pdCBiZXJsaW4yX2F2cGxsX2NoYW5uZWxfcmVnaXN0ZXIodm9pZCBfX2lvbWVt ICpiYXNlLAogCQkJICAgY29uc3QgY2hhciAqbmFtZSwgdTggaW5kZXgsIGNvbnN0IGNoYXIgKnBh cmVudF9uYW1lLAogCQkJICAgdTggY2hfZmxhZ3MsIHVuc2lnbmVkIGxvbmcgZmxhZ3MpCiB7CmRp ZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9iZXJsaW4vYmVybGluMi1hdnBsbC5oIGIvZHJpdmVycy9j bGsvYmVybGluL2JlcmxpbjItYXZwbGwuaAppbmRleCBhMzdmNTA2Li4yMTZlZWU3IDEwMDY0NAot LS0gYS9kcml2ZXJzL2Nsay9iZXJsaW4vYmVybGluMi1hdnBsbC5oCisrKyBiL2RyaXZlcnMvY2xr L2Jlcmxpbi9iZXJsaW4yLWF2cGxsLmgKQEAgLTI0LDExICsyNCwxMSBAQCBzdHJ1Y3QgY2xrOwog I2RlZmluZSBCRVJMSU4yX0FWUExMX0JJVF9RVUlSSwkJQklUKDApCiAjZGVmaW5lIEJFUkxJTjJf QVZQTExfU0NSQU1CTEVfUVVJUksJQklUKDEpCiAKLXN0cnVjdCBjbGsgKiBfX2luaXQKK3N0cnVj dCBjbGtfY29yZSAqIF9faW5pdAogYmVybGluMl9hdnBsbF92Y29fcmVnaXN0ZXIodm9pZCBfX2lv bWVtICpiYXNlLCBjb25zdCBjaGFyICpuYW1lLAogCSAgIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1l LCB1OCB2Y29fZmxhZ3MsIHVuc2lnbmVkIGxvbmcgZmxhZ3MpOwogCi1zdHJ1Y3QgY2xrICogX19p bml0CitzdHJ1Y3QgY2xrX2NvcmUgKiBfX2luaXQKIGJlcmxpbjJfYXZwbGxfY2hhbm5lbF9yZWdp c3Rlcih2b2lkIF9faW9tZW0gKmJhc2UsIGNvbnN0IGNoYXIgKm5hbWUsCiAJCSAgICAgICB1OCBp bmRleCwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsIHU4IGNoX2ZsYWdzLAogCQkgICAgICAgdW5z aWduZWQgbG9uZyBmbGFncyk7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9iZXJsaW4vYmVybGlu Mi1kaXYuYyBiL2RyaXZlcnMvY2xrL2Jlcmxpbi9iZXJsaW4yLWRpdi5jCmluZGV4IDgxZmY5N2Yu LmM2NzMwODIgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL2Jlcmxpbi9iZXJsaW4yLWRpdi5jCisr KyBiL2RyaXZlcnMvY2xrL2Jlcmxpbi9iZXJsaW4yLWRpdi5jCkBAIC0yMzQsNyArMjM0LDcgQEAg c3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIGJlcmxpbjJfZGl2X211eF9vcHMgPSB7CiAJLmdl dF9wYXJlbnQJPSBiZXJsaW4yX2Rpdl9nZXRfcGFyZW50LAogfTsKIAotc3RydWN0IGNsayAqIF9f aW5pdAorc3RydWN0IGNsa19jb3JlICogX19pbml0CiBiZXJsaW4yX2Rpdl9yZWdpc3Rlcihjb25z dCBzdHJ1Y3QgYmVybGluMl9kaXZfbWFwICptYXAsCiAJCSAgICAgdm9pZCBfX2lvbWVtICpiYXNl LCBjb25zdCBjaGFyICpuYW1lLCB1OCBkaXZfZmxhZ3MsCiAJCSAgICAgY29uc3QgY2hhciAqKnBh cmVudF9uYW1lcywgaW50IG51bV9wYXJlbnRzLApkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvYmVy bGluL2JlcmxpbjItZGl2LmggYi9kcml2ZXJzL2Nsay9iZXJsaW4vYmVybGluMi1kaXYuaAppbmRl eCAxNWUzMzg0Li4zZGRiODdhIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9iZXJsaW4vYmVybGlu Mi1kaXYuaAorKysgYi9kcml2ZXJzL2Nsay9iZXJsaW4vYmVybGluMi1kaXYuaApAQCAtODAsNyAr ODAsNyBAQCBzdHJ1Y3QgYmVybGluMl9kaXZfZGF0YSB7CiAJdTggZGl2X2ZsYWdzOwogfTsKIAot c3RydWN0IGNsayAqIF9faW5pdAorc3RydWN0IGNsa19jb3JlICogX19pbml0CiBiZXJsaW4yX2Rp dl9yZWdpc3Rlcihjb25zdCBzdHJ1Y3QgYmVybGluMl9kaXZfbWFwICptYXAsCiAJICAgICB2b2lk IF9faW9tZW0gKmJhc2UsICBjb25zdCBjaGFyICpuYW1lLCB1OCBkaXZfZmxhZ3MsCiAJICAgICBj b25zdCBjaGFyICoqcGFyZW50X25hbWVzLCBpbnQgbnVtX3BhcmVudHMsCmRpZmYgLS1naXQgYS9k cml2ZXJzL2Nsay9iZXJsaW4vYmVybGluMi1wbGwuYyBiL2RyaXZlcnMvY2xrL2Jlcmxpbi9iZXJs aW4yLXBsbC5jCmluZGV4IGJkYzUwNmIuLmI3YTMwMTYgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xr L2Jlcmxpbi9iZXJsaW4yLXBsbC5jCisrKyBiL2RyaXZlcnMvY2xrL2Jlcmxpbi9iZXJsaW4yLXBs bC5jCkBAIC05MSw3ICs5MSw3IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgY2xrX29wcyBiZXJsaW4y X3BsbF9vcHMgPSB7CiAJLnJlY2FsY19yYXRlCT0gYmVybGluMl9wbGxfcmVjYWxjX3JhdGUsCiB9 OwogCi1zdHJ1Y3QgY2xrICogX19pbml0CitzdHJ1Y3QgY2xrX2NvcmUgKiBfX2luaXQKIGJlcmxp bjJfcGxsX3JlZ2lzdGVyKGNvbnN0IHN0cnVjdCBiZXJsaW4yX3BsbF9tYXAgKm1hcCwKIAkJICAg ICB2b2lkIF9faW9tZW0gKmJhc2UsIGNvbnN0IGNoYXIgKm5hbWUsCiAJCSAgICAgY29uc3QgY2hh ciAqcGFyZW50X25hbWUsIHVuc2lnbmVkIGxvbmcgZmxhZ3MpCmRpZmYgLS1naXQgYS9kcml2ZXJz L2Nsay9iZXJsaW4vYmVybGluMi1wbGwuaCBiL2RyaXZlcnMvY2xrL2Jlcmxpbi9iZXJsaW4yLXBs bC5oCmluZGV4IDg4MzFjZTIuLjZiNmE2ZWQgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL2Jlcmxp bi9iZXJsaW4yLXBsbC5oCisrKyBiL2RyaXZlcnMvY2xrL2Jlcmxpbi9iZXJsaW4yLXBsbC5oCkBA IC0yOSw3ICsyOSw3IEBAIHN0cnVjdCBiZXJsaW4yX3BsbF9tYXAgewogCXU4IGRpdnNlbF9zaGlm dDsKIH07CiAKLXN0cnVjdCBjbGsgKiBfX2luaXQKK3N0cnVjdCBjbGtfY29yZSAqIF9faW5pdAog YmVybGluMl9wbGxfcmVnaXN0ZXIoY29uc3Qgc3RydWN0IGJlcmxpbjJfcGxsX21hcCAqbWFwLAog CQkgICAgIHZvaWQgX19pb21lbSAqYmFzZSwgY29uc3QgY2hhciAqbmFtZSwKIAkJICAgICBjb25z dCBjaGFyICpwYXJlbnRfbmFtZSwgdW5zaWduZWQgbG9uZyBmbGFncyk7CmRpZmYgLS1naXQgYS9k cml2ZXJzL2Nsay9iZXJsaW4vYmcyLmMgYi9kcml2ZXJzL2Nsay9iZXJsaW4vYmcyLmMKaW5kZXgg NGM4MWUwOS4uNDllY2IzZSAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvYmVybGluL2JnMi5jCisr KyBiL2RyaXZlcnMvY2xrL2Jlcmxpbi9iZzIuYwpAQCAtMTcsNyArMTcsNiBAQAogICogdGhpcyBw cm9ncmFtLiAgSWYgbm90LCBzZWUgPGh0dHA6Ly93d3cuZ251Lm9yZy9saWNlbnNlcy8+LgogICov CiAKLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIu aD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNpbmNsdWRlIDxsaW51eC9rZXJuZWwuaD4K QEAgLTkzLDcgKzkyLDcgQEAKICAqLwogCiAjZGVmaW5lCU1BWF9DTEtTIDQxCi1zdGF0aWMgc3Ry dWN0IGNsayAqY2xrc1tNQVhfQ0xLU107CitzdGF0aWMgc3RydWN0IGNsa19jb3JlICpjbGtzW01B WF9DTEtTXTsKIHN0YXRpYyBzdHJ1Y3QgY2xrX29uZWNlbGxfZGF0YSBjbGtfZGF0YTsKIHN0YXRp YyBERUZJTkVfU1BJTkxPQ0sobG9jayk7CiBzdGF0aWMgdm9pZCBfX2lvbWVtICpnYmFzZTsKQEAg LTUwNCw3ICs1MDMsNyBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGJlcmxpbjJfZ2F0ZV9kYXRhIGJn Ml9nYXRlc1tdIF9faW5pdGNvbnN0ID0gewogc3RhdGljIHZvaWQgX19pbml0IGJlcmxpbjJfY2xv Y2tfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpucCkKIHsKIAljb25zdCBjaGFyICpwYXJlbnRf bmFtZXNbOV07Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXU4 IGF2cGxsX2ZsYWdzID0gMDsKIAlpbnQgbjsKIApAQCAtNTEzLDE2ICs1MTIsMTYgQEAgc3RhdGlj IHZvaWQgX19pbml0IGJlcmxpbjJfY2xvY2tfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpucCkK IAkJcmV0dXJuOwogCiAJLyogb3ZlcndyaXRlIGRlZmF1bHQgY2xvY2sgbmFtZXMgd2l0aCBEVCBw cm92aWRlZCBvbmVzICovCi0JY2xrID0gb2ZfY2xrX2dldF9ieV9uYW1lKG5wLCBjbGtfbmFtZXNb UkVGQ0xLXSk7CisJY2xrID0gb2ZfY2xrX3Byb3ZpZGVyX2dldF9ieV9uYW1lKG5wLCBjbGtfbmFt ZXNbUkVGQ0xLXSk7CiAJaWYgKCFJU19FUlIoY2xrKSkgewogCQljbGtfbmFtZXNbUkVGQ0xLXSA9 IF9fY2xrX2dldF9uYW1lKGNsayk7Ci0JCWNsa19wdXQoY2xrKTsKKwkJX19jbGtfcHV0KGNsayk7 CiAJfQogCi0JY2xrID0gb2ZfY2xrX2dldF9ieV9uYW1lKG5wLCBjbGtfbmFtZXNbVklERU9fRVhU MF0pOworCWNsayA9IG9mX2Nsa19wcm92aWRlcl9nZXRfYnlfbmFtZShucCwgY2xrX25hbWVzW1ZJ REVPX0VYVDBdKTsKIAlpZiAoIUlTX0VSUihjbGspKSB7CiAJCWNsa19uYW1lc1tWSURFT19FWFQw XSA9IF9fY2xrX2dldF9uYW1lKGNsayk7Ci0JCWNsa19wdXQoY2xrKTsKKwkJX19jbGtfcHV0KGNs ayk7CiAJfQogCiAJLyogc2ltcGxlIHJlZ2lzdGVyIFBMTHMgKi8KZGlmZiAtLWdpdCBhL2RyaXZl cnMvY2xrL2Jlcmxpbi9iZzJxLmMgYi9kcml2ZXJzL2Nsay9iZXJsaW4vYmcycS5jCmluZGV4IDc0 OGRhOWIuLjMzY2MwOGIgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL2Jlcmxpbi9iZzJxLmMKKysr IGIvZHJpdmVycy9jbGsvYmVybGluL2JnMnEuYwpAQCAtMTcsNyArMTcsNiBAQAogICogdGhpcyBw cm9ncmFtLiAgSWYgbm90LCBzZWUgPGh0dHA6Ly93d3cuZ251Lm9yZy9saWNlbnNlcy8+LgogICov CiAKLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIu aD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNpbmNsdWRlIDxsaW51eC9rZXJuZWwuaD4K QEAgLTQ3LDcgKzQ2LDcgQEAKICNkZWZpbmUgUkVHX1NESU8xWElOX0NMS0NUTAkweDAxNWMKIAog I2RlZmluZQlNQVhfQ0xLUyAyNwotc3RhdGljIHN0cnVjdCBjbGsgKmNsa3NbTUFYX0NMS1NdOwor c3RhdGljIHN0cnVjdCBjbGtfY29yZSAqY2xrc1tNQVhfQ0xLU107CiBzdGF0aWMgc3RydWN0IGNs a19vbmVjZWxsX2RhdGEgY2xrX2RhdGE7CiBzdGF0aWMgREVGSU5FX1NQSU5MT0NLKGxvY2spOwog c3RhdGljIHZvaWQgX19pb21lbSAqZ2Jhc2U7CkBAIC0yOTMsNyArMjkyLDcgQEAgc3RhdGljIGNv bnN0IHN0cnVjdCBiZXJsaW4yX2dhdGVfZGF0YSBiZzJxX2dhdGVzW10gX19pbml0Y29uc3QgPSB7 CiBzdGF0aWMgdm9pZCBfX2luaXQgYmVybGluMnFfY2xvY2tfc2V0dXAoc3RydWN0IGRldmljZV9u b2RlICpucCkKIHsKIAljb25zdCBjaGFyICpwYXJlbnRfbmFtZXNbOV07Ci0Jc3RydWN0IGNsayAq Y2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCWludCBuOwogCiAJZ2Jhc2UgPSBvZl9pb21h cChucCwgMCk7CkBAIC0zMTEsMTAgKzMxMCwxMCBAQCBzdGF0aWMgdm9pZCBfX2luaXQgYmVybGlu MnFfY2xvY2tfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpucCkKIAl9CiAKIAkvKiBvdmVyd3Jp dGUgZGVmYXVsdCBjbG9jayBuYW1lcyB3aXRoIERUIHByb3ZpZGVkIG9uZXMgKi8KLQljbGsgPSBv Zl9jbGtfZ2V0X2J5X25hbWUobnAsIGNsa19uYW1lc1tSRUZDTEtdKTsKKwljbGsgPSBvZl9jbGtf cHJvdmlkZXJfZ2V0X2J5X25hbWUobnAsIGNsa19uYW1lc1tSRUZDTEtdKTsKIAlpZiAoIUlTX0VS UihjbGspKSB7CiAJCWNsa19uYW1lc1tSRUZDTEtdID0gX19jbGtfZ2V0X25hbWUoY2xrKTsKLQkJ Y2xrX3B1dChjbGspOworCQlfX2Nsa19wdXQoY2xrKTsKIAl9CiAKIAkvKiBzaW1wbGUgcmVnaXN0 ZXIgUExMcyAqLwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvY2xrLWF4aS1jbGtnZW4uYyBiL2Ry aXZlcnMvY2xrL2Nsay1heGktY2xrZ2VuLmMKaW5kZXggMTEyN2VlNC4uZDkxNTUwYyAxMDA2NDQK LS0tIGEvZHJpdmVycy9jbGsvY2xrLWF4aS1jbGtnZW4uYworKysgYi9kcml2ZXJzL2Nsay9jbGst YXhpLWNsa2dlbi5jCkBAIC0xMCw3ICsxMCw2IEBACiAKICNpbmNsdWRlIDxsaW51eC9wbGF0Zm9y bV9kZXZpY2UuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIuaD4KLSNpbmNsdWRlIDxs aW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9zbGFiLmg+CiAjaW5jbHVkZSA8bGludXgvaW8u aD4KICNpbmNsdWRlIDxsaW51eC9vZi5oPgpAQCAtNDg5LDcgKzQ4OCw3IEBAIHN0YXRpYyBpbnQg YXhpX2Nsa2dlbl9wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQogCWNvbnN0IGNo YXIgKnBhcmVudF9uYW1lOwogCWNvbnN0IGNoYXIgKmNsa19uYW1lOwogCXN0cnVjdCByZXNvdXJj ZSAqbWVtOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAogCWlm ICghcGRldi0+ZGV2Lm9mX25vZGUpCiAJCXJldHVybiAtRU5PREVWOwpkaWZmIC0tZ2l0IGEvZHJp dmVycy9jbGsvY2xrLWF4bTU1MTYuYyBiL2RyaXZlcnMvY2xrL2Nsay1heG01NTE2LmMKaW5kZXgg ZDJmMWUxMS4uM2RjNmU1OCAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvY2xrLWF4bTU1MTYuYwor KysgYi9kcml2ZXJzL2Nsay9jbGstYXhtNTUxNi5jCkBAIC01MzIsNyArNTMyLDcgQEAgTU9EVUxF X0RFVklDRV9UQUJMRShvZiwgYXhtY2xrX21hdGNoX3RhYmxlKTsKIAogc3RydWN0IGF4bWNsa19w cml2IHsKIAlzdHJ1Y3QgY2xrX29uZWNlbGxfZGF0YSBvbmVjZWxsOwotCXN0cnVjdCBjbGsgKmNs a3NbXTsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsa3NbXTsKIH07CiAKIHN0YXRpYyBpbnQgYXhtY2xr X3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCkBAIC01NDEsNyArNTQxLDcgQEAg c3RhdGljIGludCBheG1jbGtfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKIAlz dHJ1Y3QgcmVzb3VyY2UgKnJlczsKIAlpbnQgaSwgcmV0OwogCXN0cnVjdCBkZXZpY2UgKmRldiA9 ICZwZGV2LT5kZXY7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwog CXN0cnVjdCByZWdtYXAgKnJlZ21hcDsKIAlzaXplX3QgbnVtX2Nsa3M7CiAJc3RydWN0IGF4bWNs a19wcml2ICpwcml2OwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvY2xrLWJjbTI4MzUuYyBiL2Ry aXZlcnMvY2xrL2Nsay1iY20yODM1LmMKaW5kZXggNmI5NTBjYS4uZjI1ZTg1ZSAxMDA2NDQKLS0t IGEvZHJpdmVycy9jbGsvY2xrLWJjbTI4MzUuYworKysgYi9kcml2ZXJzL2Nsay9jbGstYmNtMjgz NS5jCkBAIC0yOSw3ICsyOSw3IEBACiAgKi8KIHZvaWQgX19pbml0IGJjbTI4MzVfaW5pdF9jbG9j a3Modm9pZCkKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJ aW50IHJldDsKIAogCWNsayA9IGNsa19yZWdpc3Rlcl9maXhlZF9yYXRlKE5VTEwsICJzeXNfcGNs ayIsIE5VTEwsIENMS19JU19ST09ULApkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvY2xrLWNvbXBv c2l0ZS5jIGIvZHJpdmVycy9jbGsvY2xrLWNvbXBvc2l0ZS5jCmluZGV4IGI5MzU1ZGEuLmQ3MzIy ZmEgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL2Nsay1jb21wb3NpdGUuYworKysgYi9kcml2ZXJz L2Nsay9jbGstY29tcG9zaXRlLmMKQEAgLTE0LDcgKzE0LDYgQEAKICAqIGFsb25nIHdpdGggdGhp cyBwcm9ncmFtLiAgSWYgbm90LCBzZWUgPGh0dHA6Ly93d3cuZ251Lm9yZy9saWNlbnNlcy8+Lgog ICovCiAKLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlk ZXIuaD4KICNpbmNsdWRlIDxsaW51eC9lcnIuaD4KICNpbmNsdWRlIDxsaW51eC9zbGFiLmg+CkBA IC01NywxNCArNTYsMTQgQEAgc3RhdGljIHVuc2lnbmVkIGxvbmcgY2xrX2NvbXBvc2l0ZV9yZWNh bGNfcmF0ZShzdHJ1Y3QgY2xrX2h3ICpodywKIAogc3RhdGljIGxvbmcgY2xrX2NvbXBvc2l0ZV9k ZXRlcm1pbmVfcmF0ZShzdHJ1Y3QgY2xrX2h3ICpodywgdW5zaWduZWQgbG9uZyByYXRlLAogCQkJ CQl1bnNpZ25lZCBsb25nICpiZXN0X3BhcmVudF9yYXRlLAotCQkJCQlzdHJ1Y3QgY2xrICoqYmVz dF9wYXJlbnRfcCkKKwkJCQkJc3RydWN0IGNsa19jb3JlICoqYmVzdF9wYXJlbnRfcCkKIHsKIAlz dHJ1Y3QgY2xrX2NvbXBvc2l0ZSAqY29tcG9zaXRlID0gdG9fY2xrX2NvbXBvc2l0ZShodyk7CiAJ Y29uc3Qgc3RydWN0IGNsa19vcHMgKnJhdGVfb3BzID0gY29tcG9zaXRlLT5yYXRlX29wczsKIAlj b25zdCBzdHJ1Y3QgY2xrX29wcyAqbXV4X29wcyA9IGNvbXBvc2l0ZS0+bXV4X29wczsKIAlzdHJ1 Y3QgY2xrX2h3ICpyYXRlX2h3ID0gY29tcG9zaXRlLT5yYXRlX2h3OwogCXN0cnVjdCBjbGtfaHcg Km11eF9odyA9IGNvbXBvc2l0ZS0+bXV4X2h3OwotCXN0cnVjdCBjbGsgKnBhcmVudDsKKwlzdHJ1 Y3QgY2xrX2NvcmUgKnBhcmVudDsKIAl1bnNpZ25lZCBsb25nIHBhcmVudF9yYXRlOwogCWxvbmcg dG1wX3JhdGUsIGJlc3RfcmF0ZSA9IDA7CiAJdW5zaWduZWQgbG9uZyByYXRlX2RpZmY7CkBAIC04 MCw3ICs3OSw3IEBAIHN0YXRpYyBsb25nIGNsa19jb21wb3NpdGVfZGV0ZXJtaW5lX3JhdGUoc3Ry dWN0IGNsa19odyAqaHcsIHVuc2lnbmVkIGxvbmcgcmF0ZSwKIAkJKmJlc3RfcGFyZW50X3AgPSBO VUxMOwogCiAJCWlmIChfX2Nsa19nZXRfZmxhZ3MoaHctPmNsaykgJiBDTEtfU0VUX1JBVEVfTk9f UkVQQVJFTlQpIHsKLQkJCSpiZXN0X3BhcmVudF9wID0gY2xrX2dldF9wYXJlbnQobXV4X2h3LT5j bGspOworCQkJKmJlc3RfcGFyZW50X3AgPSBjbGtfcHJvdmlkZXJfZ2V0X3BhcmVudChtdXhfaHct PmNsayk7CiAJCQkqYmVzdF9wYXJlbnRfcmF0ZSA9IF9fY2xrX2dldF9yYXRlKCpiZXN0X3BhcmVu dF9wKTsKIAogCQkJcmV0dXJuIHJhdGVfb3BzLT5yb3VuZF9yYXRlKHJhdGVfaHcsIHJhdGUsCkBA IC0xODEsMTQgKzE4MCwxNCBAQCBzdGF0aWMgdm9pZCBjbGtfY29tcG9zaXRlX2Rpc2FibGUoc3Ry dWN0IGNsa19odyAqaHcpCiAJZ2F0ZV9vcHMtPmRpc2FibGUoZ2F0ZV9odyk7CiB9CiAKLXN0cnVj dCBjbGsgKmNsa19yZWdpc3Rlcl9jb21wb3NpdGUoc3RydWN0IGRldmljZSAqZGV2LCBjb25zdCBj aGFyICpuYW1lLAorc3RydWN0IGNsa19jb3JlICpjbGtfcmVnaXN0ZXJfY29tcG9zaXRlKHN0cnVj dCBkZXZpY2UgKmRldiwgY29uc3QgY2hhciAqbmFtZSwKIAkJCWNvbnN0IGNoYXIgKipwYXJlbnRf bmFtZXMsIGludCBudW1fcGFyZW50cywKIAkJCXN0cnVjdCBjbGtfaHcgKm11eF9odywgY29uc3Qg c3RydWN0IGNsa19vcHMgKm11eF9vcHMsCiAJCQlzdHJ1Y3QgY2xrX2h3ICpyYXRlX2h3LCBjb25z dCBzdHJ1Y3QgY2xrX29wcyAqcmF0ZV9vcHMsCiAJCQlzdHJ1Y3QgY2xrX2h3ICpnYXRlX2h3LCBj b25zdCBzdHJ1Y3QgY2xrX29wcyAqZ2F0ZV9vcHMsCiAJCQl1bnNpZ25lZCBsb25nIGZsYWdzKQog ewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xr X2luaXRfZGF0YSBpbml0OwogCXN0cnVjdCBjbGtfY29tcG9zaXRlICpjb21wb3NpdGU7CiAJc3Ry dWN0IGNsa19vcHMgKmNsa19jb21wb3NpdGVfb3BzOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsv Y2xrLWNvbmYuYyBiL2RyaXZlcnMvY2xrL2Nsay1jb25mLmMKaW5kZXggZDM2YTdiMy4uYzkyMzFj ZCAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvY2xrLWNvbmYuYworKysgYi9kcml2ZXJzL2Nsay9j bGstY29uZi5jCkBAIC03LDcgKzcsNiBAQAogICogcHVibGlzaGVkIGJ5IHRoZSBGcmVlIFNvZnR3 YXJlIEZvdW5kYXRpb24uCiAgKi8KIAotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUg PGxpbnV4L2Nsa2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1 ZGUgPGxpbnV4L2Nsay9jbGstY29uZi5oPgpAQCAtMjAsNyArMTksNyBAQCBzdGF0aWMgaW50IF9f c2V0X2Nsa19wYXJlbnRzKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbm9kZSwgYm9vbCBjbGtfc3VwcGxp ZXIpCiB7CiAJc3RydWN0IG9mX3BoYW5kbGVfYXJncyBjbGtzcGVjOwogCWludCBpbmRleCwgcmMs IG51bV9wYXJlbnRzOwotCXN0cnVjdCBjbGsgKmNsaywgKnBjbGs7CisJc3RydWN0IGNsa19jb3Jl ICpjbGssICpwY2xrOwogCiAJbnVtX3BhcmVudHMgPSBvZl9jb3VudF9waGFuZGxlX3dpdGhfYXJn cyhub2RlLCAiYXNzaWduZWQtY2xvY2stcGFyZW50cyIsCiAJCQkJCQkgIiNjbG9jay1jZWxscyIp OwpAQCAtNjMsMTYgKzYyLDE2IEBAIHN0YXRpYyBpbnQgX19zZXRfY2xrX3BhcmVudHMoc3RydWN0 IGRldmljZV9ub2RlICpub2RlLCBib29sIGNsa19zdXBwbGllcikKIAkJCWdvdG8gZXJyOwogCQl9 CiAKLQkJcmMgPSBjbGtfc2V0X3BhcmVudChjbGssIHBjbGspOworCQlyYyA9IGNsa19wcm92aWRl cl9zZXRfcGFyZW50KGNsaywgcGNsayk7CiAJCWlmIChyYyA8IDApCiAJCQlwcl9lcnIoImNsazog ZmFpbGVkIHRvIHJlcGFyZW50ICVzIHRvICVzOiAlZFxuIiwKIAkJCSAgICAgICBfX2Nsa19nZXRf bmFtZShjbGspLCBfX2Nsa19nZXRfbmFtZShwY2xrKSwgcmMpOwotCQljbGtfcHV0KGNsayk7Ci0J CWNsa19wdXQocGNsayk7CisJCV9fY2xrX3B1dChjbGspOworCQlfX2Nsa19wdXQocGNsayk7CiAJ fQogCXJldHVybiAwOwogZXJyOgotCWNsa19wdXQocGNsayk7CisJX19jbGtfcHV0KHBjbGspOwog CXJldHVybiByYzsKIH0KIApAQCAtODIsNyArODEsNyBAQCBzdGF0aWMgaW50IF9fc2V0X2Nsa19y YXRlcyhzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUsIGJvb2wgY2xrX3N1cHBsaWVyKQogCXN0cnVj dCBwcm9wZXJ0eQkqcHJvcDsKIAljb25zdCBfX2JlMzIgKmN1cjsKIAlpbnQgcmMsIGluZGV4ID0g MDsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJdTMyIHJhdGU7 CiAKIAlvZl9wcm9wZXJ0eV9mb3JfZWFjaF91MzIobm9kZSwgImFzc2lnbmVkLWNsb2NrLXJhdGVz IiwgcHJvcCwgY3VyLCByYXRlKSB7CkBAIC0xMDYsMTEgKzEwNSwxMSBAQCBzdGF0aWMgaW50IF9f c2V0X2Nsa19yYXRlcyhzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUsIGJvb2wgY2xrX3N1cHBsaWVy KQogCQkJCXJldHVybiBQVFJfRVJSKGNsayk7CiAJCQl9CiAKLQkJCXJjID0gY2xrX3NldF9yYXRl KGNsaywgcmF0ZSk7CisJCQlyYyA9IGNsa19wcm92aWRlcl9zZXRfcmF0ZShjbGssIHJhdGUpOwog CQkJaWYgKHJjIDwgMCkKIAkJCQlwcl9lcnIoImNsazogY291bGRuJ3Qgc2V0ICVzIGNsb2NrIHJh dGU6ICVkXG4iLAogCQkJCSAgICAgICBfX2Nsa19nZXRfbmFtZShjbGspLCByYyk7Ci0JCQljbGtf cHV0KGNsayk7CisJCQlfX2Nsa19wdXQoY2xrKTsKIAkJfQogCQlpbmRleCsrOwogCX0KZGlmZiAt LWdpdCBhL2RyaXZlcnMvY2xrL2Nsay1kaXZpZGVyLmMgYi9kcml2ZXJzL2Nsay9jbGstZGl2aWRl ci5jCmluZGV4IDE4YTlkZTIuLjNjNzgxMzkgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL2Nsay1k aXZpZGVyLmMKKysrIGIvZHJpdmVycy9jbGsvY2xrLWRpdmlkZXIuYwpAQCAtMzY2LDE0ICszNjYs MTQgQEAgY29uc3Qgc3RydWN0IGNsa19vcHMgY2xrX2RpdmlkZXJfcm9fb3BzID0gewogfTsKIEVY UE9SVF9TWU1CT0xfR1BMKGNsa19kaXZpZGVyX3JvX29wcyk7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xr ICpfcmVnaXN0ZXJfZGl2aWRlcihzdHJ1Y3QgZGV2aWNlICpkZXYsIGNvbnN0IGNoYXIgKm5hbWUs CitzdGF0aWMgc3RydWN0IGNsa19jb3JlICpfcmVnaXN0ZXJfZGl2aWRlcihzdHJ1Y3QgZGV2aWNl ICpkZXYsIGNvbnN0IGNoYXIgKm5hbWUsCiAJCWNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLCB1bnNp Z25lZCBsb25nIGZsYWdzLAogCQl2b2lkIF9faW9tZW0gKnJlZywgdTggc2hpZnQsIHU4IHdpZHRo LAogCQl1OCBjbGtfZGl2aWRlcl9mbGFncywgY29uc3Qgc3RydWN0IGNsa19kaXZfdGFibGUgKnRh YmxlLAogCQlzcGlubG9ja190ICpsb2NrKQogewogCXN0cnVjdCBjbGtfZGl2aWRlciAqZGl2Owot CXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xrX2lu aXRfZGF0YSBpbml0OwogCiAJaWYgKGNsa19kaXZpZGVyX2ZsYWdzICYgQ0xLX0RJVklERVJfSElX T1JEX01BU0spIHsKQEAgLTQyOSw3ICs0MjksNyBAQCBzdGF0aWMgc3RydWN0IGNsayAqX3JlZ2lz dGVyX2RpdmlkZXIoc3RydWN0IGRldmljZSAqZGV2LCBjb25zdCBjaGFyICpuYW1lLAogICogQGNs a19kaXZpZGVyX2ZsYWdzOiBkaXZpZGVyLXNwZWNpZmljIGZsYWdzIGZvciB0aGlzIGNsb2NrCiAg KiBAbG9jazogc2hhcmVkIHJlZ2lzdGVyIGxvY2sgZm9yIHRoaXMgY2xvY2sKICAqLwotc3RydWN0 IGNsayAqY2xrX3JlZ2lzdGVyX2RpdmlkZXIoc3RydWN0IGRldmljZSAqZGV2LCBjb25zdCBjaGFy ICpuYW1lLAorc3RydWN0IGNsa19jb3JlICpjbGtfcmVnaXN0ZXJfZGl2aWRlcihzdHJ1Y3QgZGV2 aWNlICpkZXYsIGNvbnN0IGNoYXIgKm5hbWUsCiAJCWNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLCB1 bnNpZ25lZCBsb25nIGZsYWdzLAogCQl2b2lkIF9faW9tZW0gKnJlZywgdTggc2hpZnQsIHU4IHdp ZHRoLAogCQl1OCBjbGtfZGl2aWRlcl9mbGFncywgc3BpbmxvY2tfdCAqbG9jaykKQEAgLTQ1Myw3 ICs0NTMsNyBAQCBFWFBPUlRfU1lNQk9MX0dQTChjbGtfcmVnaXN0ZXJfZGl2aWRlcik7CiAgKiBA dGFibGU6IGFycmF5IG9mIGRpdmlkZXIvdmFsdWUgcGFpcnMgZW5kaW5nIHdpdGggYSBkaXYgc2V0 IHRvIDAKICAqIEBsb2NrOiBzaGFyZWQgcmVnaXN0ZXIgbG9jayBmb3IgdGhpcyBjbG9jawogICov Ci1zdHJ1Y3QgY2xrICpjbGtfcmVnaXN0ZXJfZGl2aWRlcl90YWJsZShzdHJ1Y3QgZGV2aWNlICpk ZXYsIGNvbnN0IGNoYXIgKm5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdpc3Rlcl9kaXZp ZGVyX3RhYmxlKHN0cnVjdCBkZXZpY2UgKmRldiwgY29uc3QgY2hhciAqbmFtZSwKIAkJY29uc3Qg Y2hhciAqcGFyZW50X25hbWUsIHVuc2lnbmVkIGxvbmcgZmxhZ3MsCiAJCXZvaWQgX19pb21lbSAq cmVnLCB1OCBzaGlmdCwgdTggd2lkdGgsCiAJCXU4IGNsa19kaXZpZGVyX2ZsYWdzLCBjb25zdCBz dHJ1Y3QgY2xrX2Rpdl90YWJsZSAqdGFibGUsCmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9jbGst ZWZtMzJnZy5jIGIvZHJpdmVycy9jbGsvY2xrLWVmbTMyZ2cuYwppbmRleCBiYWMyZGRmLi4zMjQw ODg3IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9jbGstZWZtMzJnZy5jCisrKyBiL2RyaXZlcnMv Y2xrL2Nsay1lZm0zMmdnLmMKQEAgLTYsNyArNiw2IEBACiAgKiB0aGUgdGVybXMgb2YgdGhlIEdO VSBHZW5lcmFsIFB1YmxpYyBMaWNlbnNlIHZlcnNpb24gMiBhcyBwdWJsaXNoZWQgYnkgdGhlCiAg KiBGcmVlIFNvZnR3YXJlIEZvdW5kYXRpb24uCiAgKi8KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4K ICNpbmNsdWRlIDxsaW51eC9pby5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgog I2luY2x1ZGUgPGxpbnV4L29mLmg+CkBAIC0xNiw3ICsxNSw3IEBACiAKICNkZWZpbmUgQ01VX0hG UEVSQ0xLRU4wCQkweDQ0CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICpjbGtbMzddOworc3RhdGljIHN0 cnVjdCBjbGtfY29yZSAqY2xrWzM3XTsKIHN0YXRpYyBzdHJ1Y3QgY2xrX29uZWNlbGxfZGF0YSBj bGtfZGF0YSA9IHsKIAkuY2xrcyA9IGNsaywKIAkuY2xrX251bSA9IEFSUkFZX1NJWkUoY2xrKSwK ZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL2Nsay1maXhlZC1mYWN0b3IuYyBiL2RyaXZlcnMvY2xr L2Nsay1maXhlZC1mYWN0b3IuYwppbmRleCBkOWUzZjY3Li5hZTFmZWYwIDEwMDY0NAotLS0gYS9k cml2ZXJzL2Nsay9jbGstZml4ZWQtZmFjdG9yLmMKKysrIGIvZHJpdmVycy9jbGsvY2xrLWZpeGVk LWZhY3Rvci5jCkBAIC02NSwxMyArNjUsMTMgQEAgc3RydWN0IGNsa19vcHMgY2xrX2ZpeGVkX2Zh Y3Rvcl9vcHMgPSB7CiB9OwogRVhQT1JUX1NZTUJPTF9HUEwoY2xrX2ZpeGVkX2ZhY3Rvcl9vcHMp OwogCi1zdHJ1Y3QgY2xrICpjbGtfcmVnaXN0ZXJfZml4ZWRfZmFjdG9yKHN0cnVjdCBkZXZpY2Ug KmRldiwgY29uc3QgY2hhciAqbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqY2xrX3JlZ2lzdGVyX2Zp eGVkX2ZhY3RvcihzdHJ1Y3QgZGV2aWNlICpkZXYsIGNvbnN0IGNoYXIgKm5hbWUsCiAJCWNvbnN0 IGNoYXIgKnBhcmVudF9uYW1lLCB1bnNpZ25lZCBsb25nIGZsYWdzLAogCQl1bnNpZ25lZCBpbnQg bXVsdCwgdW5zaWduZWQgaW50IGRpdikKIHsKIAlzdHJ1Y3QgY2xrX2ZpeGVkX2ZhY3RvciAqZml4 OwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVj dCBjbGtfY29yZSAqY2xrOwogCiAJZml4ID0ga21hbGxvYyhzaXplb2YoKmZpeCksIEdGUF9LRVJO RUwpOwogCWlmICghZml4KSB7CkBAIC0xMDUsNyArMTA1LDcgQEAgRVhQT1JUX1NZTUJPTF9HUEwo Y2xrX3JlZ2lzdGVyX2ZpeGVkX2ZhY3Rvcik7CiAgKi8KIHZvaWQgX19pbml0IG9mX2ZpeGVkX2Zh Y3Rvcl9jbGtfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpub2RlKQogewotCXN0cnVjdCBjbGsg KmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAljb25zdCBjaGFyICpjbGtfbmFtZSA9IG5v ZGUtPm5hbWU7CiAJY29uc3QgY2hhciAqcGFyZW50X25hbWU7CiAJdTMyIGRpdiwgbXVsdDsKZGlm ZiAtLWdpdCBhL2RyaXZlcnMvY2xrL2Nsay1maXhlZC1yYXRlLmMgYi9kcml2ZXJzL2Nsay9jbGst Zml4ZWQtcmF0ZS5jCmluZGV4IDBmYzU2YWIuLjU2YzBjZWQgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMv Y2xrL2Nsay1maXhlZC1yYXRlLmMKKysrIGIvZHJpdmVycy9jbGsvY2xrLWZpeGVkLXJhdGUuYwpA QCAtNTYsMTIgKzU2LDEyIEBAIEVYUE9SVF9TWU1CT0xfR1BMKGNsa19maXhlZF9yYXRlX29wcyk7 CiAgKiBAZml4ZWRfcmF0ZTogbm9uLWFkanVzdGFibGUgY2xvY2sgcmF0ZQogICogQGZpeGVkX2Fj Y3VyYWN5OiBub24tYWRqdXN0YWJsZSBjbG9jayByYXRlCiAgKi8KLXN0cnVjdCBjbGsgKmNsa19y ZWdpc3Rlcl9maXhlZF9yYXRlX3dpdGhfYWNjdXJhY3koc3RydWN0IGRldmljZSAqZGV2LAorc3Ry dWN0IGNsa19jb3JlICpjbGtfcmVnaXN0ZXJfZml4ZWRfcmF0ZV93aXRoX2FjY3VyYWN5KHN0cnVj dCBkZXZpY2UgKmRldiwKIAkJY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25h bWUsIHVuc2lnbmVkIGxvbmcgZmxhZ3MsCiAJCXVuc2lnbmVkIGxvbmcgZml4ZWRfcmF0ZSwgdW5z aWduZWQgbG9uZyBmaXhlZF9hY2N1cmFjeSkKIHsKIAlzdHJ1Y3QgY2xrX2ZpeGVkX3JhdGUgKmZp eGVkOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3Qg Y2xrX2luaXRfZGF0YSBpbml0OwogCiAJLyogYWxsb2NhdGUgZml4ZWQtcmF0ZSBjbG9jayAqLwpA QCAtOTksNyArOTksNyBAQCBFWFBPUlRfU1lNQk9MX0dQTChjbGtfcmVnaXN0ZXJfZml4ZWRfcmF0 ZV93aXRoX2FjY3VyYWN5KTsKICAqIEBmbGFnczogZnJhbWV3b3JrLXNwZWNpZmljIGZsYWdzCiAg KiBAZml4ZWRfcmF0ZTogbm9uLWFkanVzdGFibGUgY2xvY2sgcmF0ZQogICovCi1zdHJ1Y3QgY2xr ICpjbGtfcmVnaXN0ZXJfZml4ZWRfcmF0ZShzdHJ1Y3QgZGV2aWNlICpkZXYsIGNvbnN0IGNoYXIg Km5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdpc3Rlcl9maXhlZF9yYXRlKHN0cnVjdCBk ZXZpY2UgKmRldiwgY29uc3QgY2hhciAqbmFtZSwKIAkJY29uc3QgY2hhciAqcGFyZW50X25hbWUs IHVuc2lnbmVkIGxvbmcgZmxhZ3MsCiAJCXVuc2lnbmVkIGxvbmcgZml4ZWRfcmF0ZSkKIHsKQEAg LTExNCw3ICsxMTQsNyBAQCBFWFBPUlRfU1lNQk9MX0dQTChjbGtfcmVnaXN0ZXJfZml4ZWRfcmF0 ZSk7CiAgKi8KIHZvaWQgb2ZfZml4ZWRfY2xrX3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbm9k ZSkKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJY29uc3Qg Y2hhciAqY2xrX25hbWUgPSBub2RlLT5uYW1lOwogCXUzMiByYXRlOwogCXUzMiBhY2N1cmFjeSA9 IDA7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9jbGstZnJhY3Rpb25hbC1kaXZpZGVyLmMgYi9k cml2ZXJzL2Nsay9jbGstZnJhY3Rpb25hbC1kaXZpZGVyLmMKaW5kZXggZWRlNjg1Yy4uODEwNDY4 MyAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvY2xrLWZyYWN0aW9uYWwtZGl2aWRlci5jCisrKyBi L2RyaXZlcnMvY2xrL2Nsay1mcmFjdGlvbmFsLWRpdmlkZXIuYwpAQCAtOTYsMTQgKzk2LDE0IEBA IGNvbnN0IHN0cnVjdCBjbGtfb3BzIGNsa19mcmFjdGlvbmFsX2RpdmlkZXJfb3BzID0gewogfTsK IEVYUE9SVF9TWU1CT0xfR1BMKGNsa19mcmFjdGlvbmFsX2RpdmlkZXJfb3BzKTsKIAotc3RydWN0 IGNsayAqY2xrX3JlZ2lzdGVyX2ZyYWN0aW9uYWxfZGl2aWRlcihzdHJ1Y3QgZGV2aWNlICpkZXYs CitzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdpc3Rlcl9mcmFjdGlvbmFsX2RpdmlkZXIoc3RydWN0 IGRldmljZSAqZGV2LAogCQljb25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnRfbmFt ZSwgdW5zaWduZWQgbG9uZyBmbGFncywKIAkJdm9pZCBfX2lvbWVtICpyZWcsIHU4IG1zaGlmdCwg dTggbXdpZHRoLCB1OCBuc2hpZnQsIHU4IG53aWR0aCwKIAkJdTggY2xrX2RpdmlkZXJfZmxhZ3Ms IHNwaW5sb2NrX3QgKmxvY2spCiB7CiAJc3RydWN0IGNsa19mcmFjdGlvbmFsX2RpdmlkZXIgKmZk OwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVj dCBjbGtfY29yZSAqY2xrOwogCiAJZmQgPSBremFsbG9jKHNpemVvZigqZmQpLCBHRlBfS0VSTkVM KTsKIAlpZiAoIWZkKSB7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9jbGstZ2F0ZS5jIGIvZHJp dmVycy9jbGsvY2xrLWdhdGUuYwppbmRleCA0YTU4YzU1Li40MjlkMzAyIDEwMDY0NAotLS0gYS9k cml2ZXJzL2Nsay9jbGstZ2F0ZS5jCisrKyBiL2RyaXZlcnMvY2xrL2Nsay1nYXRlLmMKQEAgLTEx OCwxMyArMTE4LDEzIEBAIEVYUE9SVF9TWU1CT0xfR1BMKGNsa19nYXRlX29wcyk7CiAgKiBAY2xr X2dhdGVfZmxhZ3M6IGdhdGUtc3BlY2lmaWMgZmxhZ3MgZm9yIHRoaXMgY2xvY2sKICAqIEBsb2Nr OiBzaGFyZWQgcmVnaXN0ZXIgbG9jayBmb3IgdGhpcyBjbG9jawogICovCi1zdHJ1Y3QgY2xrICpj bGtfcmVnaXN0ZXJfZ2F0ZShzdHJ1Y3QgZGV2aWNlICpkZXYsIGNvbnN0IGNoYXIgKm5hbWUsCitz dHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdpc3Rlcl9nYXRlKHN0cnVjdCBkZXZpY2UgKmRldiwgY29u c3QgY2hhciAqbmFtZSwKIAkJY29uc3QgY2hhciAqcGFyZW50X25hbWUsIHVuc2lnbmVkIGxvbmcg ZmxhZ3MsCiAJCXZvaWQgX19pb21lbSAqcmVnLCB1OCBiaXRfaWR4LAogCQl1OCBjbGtfZ2F0ZV9m bGFncywgc3BpbmxvY2tfdCAqbG9jaykKIHsKIAlzdHJ1Y3QgY2xrX2dhdGUgKmdhdGU7Ci0Jc3Ry dWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfaW5pdF9k YXRhIGluaXQ7CiAKIAlpZiAoY2xrX2dhdGVfZmxhZ3MgJiBDTEtfR0FURV9ISVdPUkRfTUFTSykg ewpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvY2xrLWhpZ2hiYW5rLmMgYi9kcml2ZXJzL2Nsay9j bGstaGlnaGJhbmsuYwppbmRleCAyZTdlOWQ5Li5jYWQyZmJhIDEwMDY0NAotLS0gYS9kcml2ZXJz L2Nsay9jbGstaGlnaGJhbmsuYworKysgYi9kcml2ZXJzL2Nsay9jbGstaGlnaGJhbmsuYwpAQCAt MjcxLDEwICsyNzEsMTAgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIHBlcmljbGtfb3Bz ID0gewogCS5zZXRfcmF0ZSA9IGNsa19wZXJpY2xrX3NldF9yYXRlLAogfTsKIAotc3RhdGljIF9f aW5pdCBzdHJ1Y3QgY2xrICpoYl9jbGtfaW5pdChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUsIGNv bnN0IHN0cnVjdCBjbGtfb3BzICpvcHMpCitzdGF0aWMgX19pbml0IHN0cnVjdCBjbGtfY29yZSAq aGJfY2xrX2luaXQoc3RydWN0IGRldmljZV9ub2RlICpub2RlLCBjb25zdCBzdHJ1Y3QgY2xrX29w cyAqb3BzKQogewogCXUzMiByZWc7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29y ZSAqY2xrOwogCXN0cnVjdCBoYl9jbGsgKmhiX2NsazsKIAljb25zdCBjaGFyICpjbGtfbmFtZSA9 IG5vZGUtPm5hbWU7CiAJY29uc3QgY2hhciAqcGFyZW50X25hbWU7CkBAIC0zMzAsOCArMzMwLDgg QEAgQ0xLX09GX0RFQ0xBUkUoaGJfYTlwZXJpcGgsICJjYWx4ZWRhLGhiLWE5cGVyaXBoLWNsb2Nr IiwgaGJfYTlwZXJpcGhfaW5pdCk7CiAKIHN0YXRpYyB2b2lkIF9faW5pdCBoYl9hOWJ1c19pbml0 KHN0cnVjdCBkZXZpY2Vfbm9kZSAqbm9kZSkKIHsKLQlzdHJ1Y3QgY2xrICpjbGsgPSBoYl9jbGtf aW5pdChub2RlLCAmYTliY2xrX29wcyk7Ci0JY2xrX3ByZXBhcmVfZW5hYmxlKGNsayk7CisJc3Ry dWN0IGNsa19jb3JlICpjbGsgPSBoYl9jbGtfaW5pdChub2RlLCAmYTliY2xrX29wcyk7CisJY2xr X3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsayk7CiB9CiBDTEtfT0ZfREVDTEFSRShoYl9hOWJ1 cywgImNhbHhlZGEsaGItYTlidXMtY2xvY2siLCBoYl9hOWJ1c19pbml0KTsKIApkaWZmIC0tZ2l0 IGEvZHJpdmVycy9jbGsvY2xrLWxzMXguYyBiL2RyaXZlcnMvY2xrL2Nsay1sczF4LmMKaW5kZXgg ZjIwYjc1MC4uNzk2MDQzYyAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvY2xrLWxzMXguYworKysg Yi9kcml2ZXJzL2Nsay9jbGstbHMxeC5jCkBAIC00OCwxMSArNDgsMTEgQEAgc3RhdGljIGNvbnN0 IHN0cnVjdCBjbGtfb3BzIGxzMXhfcGxsX2Nsa19vcHMgPSB7CiAJLnJlY2FsY19yYXRlID0gbHMx eF9wbGxfcmVjYWxjX3JhdGUsCiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayAqIF9faW5pdCBjbGtf cmVnaXN0ZXJfcGxsKHN0cnVjdCBkZXZpY2UgKmRldiwKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUg KiBfX2luaXQgY2xrX3JlZ2lzdGVyX3BsbChzdHJ1Y3QgZGV2aWNlICpkZXYsCiAJIGNvbnN0IGNo YXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLCB1bnNpZ25lZCBsb25nIGZsYWdzKQog ewogCXN0cnVjdCBjbGtfaHcgKmh3OwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2Nv cmUgKmNsazsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwogCiAJLyogYWxsb2NhdGUgdGhl IGRpdmlkZXIgKi8KQEAgLTgwLDMyICs4MCwzMiBAQCBzdGF0aWMgc3RydWN0IGNsayAqIF9faW5p dCBjbGtfcmVnaXN0ZXJfcGxsKHN0cnVjdCBkZXZpY2UgKmRldiwKIAogdm9pZCBfX2luaXQgbHMx eF9jbGtfaW5pdCh2b2lkKQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUg KmNsazsKIAogCWNsayA9IGNsa19yZWdpc3Rlcl9wbGwoTlVMTCwgInBsbF9jbGsiLCBOVUxMLCBD TEtfSVNfUk9PVCk7Ci0JY2xrX3ByZXBhcmVfZW5hYmxlKGNsayk7CisJY2xrX3Byb3ZpZGVyX3By ZXBhcmVfZW5hYmxlKGNsayk7CiAKIAljbGsgPSBjbGtfcmVnaXN0ZXJfZGl2aWRlcihOVUxMLCAi Y3B1X2NsayIsICJwbGxfY2xrIiwKIAkJCUNMS19TRVRfUkFURV9QQVJFTlQsIExTMVhfQ0xLX1BM TF9ESVYsIERJVl9DUFVfU0hJRlQsCiAJCQlESVZfQ1BVX1dJRFRILCBDTEtfRElWSURFUl9PTkVf QkFTRUQsICZfbG9jayk7Ci0JY2xrX3ByZXBhcmVfZW5hYmxlKGNsayk7CisJY2xrX3Byb3ZpZGVy X3ByZXBhcmVfZW5hYmxlKGNsayk7CiAJY2xrX3JlZ2lzdGVyX2Nsa2RldihjbGssICJjcHUiLCBO VUxMKTsKIAogCWNsayA9IGNsa19yZWdpc3Rlcl9kaXZpZGVyKE5VTEwsICJkY19jbGsiLCAicGxs X2NsayIsCiAJCQlDTEtfU0VUX1JBVEVfUEFSRU5ULCBMUzFYX0NMS19QTExfRElWLCBESVZfRENf U0hJRlQsCiAJCQlESVZfRENfV0lEVEgsIENMS19ESVZJREVSX09ORV9CQVNFRCwgJl9sb2NrKTsK LQljbGtfcHJlcGFyZV9lbmFibGUoY2xrKTsKKwljbGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUo Y2xrKTsKIAljbGtfcmVnaXN0ZXJfY2xrZGV2KGNsaywgImRjIiwgTlVMTCk7CiAKIAljbGsgPSBj bGtfcmVnaXN0ZXJfZGl2aWRlcihOVUxMLCAiYWhiX2NsayIsICJwbGxfY2xrIiwKIAkJCUNMS19T RVRfUkFURV9QQVJFTlQsIExTMVhfQ0xLX1BMTF9ESVYsIERJVl9ERFJfU0hJRlQsCiAJCQlESVZf RERSX1dJRFRILCBDTEtfRElWSURFUl9PTkVfQkFTRUQsICZfbG9jayk7Ci0JY2xrX3ByZXBhcmVf ZW5hYmxlKGNsayk7CisJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsayk7CiAJY2xrX3Jl Z2lzdGVyX2Nsa2RldihjbGssICJhaGIiLCBOVUxMKTsKIAljbGtfcmVnaXN0ZXJfY2xrZGV2KGNs aywgInN0bW1hY2V0aCIsIE5VTEwpOwogCiAJY2xrID0gY2xrX3JlZ2lzdGVyX2ZpeGVkX2ZhY3Rv cihOVUxMLCAiYXBiX2NsayIsICJhaGJfY2xrIiwgMCwgMSwgMik7Ci0JY2xrX3ByZXBhcmVfZW5h YmxlKGNsayk7CisJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsayk7CiAJY2xrX3JlZ2lz dGVyX2Nsa2RldihjbGssICJhcGIiLCBOVUxMKTsKIAljbGtfcmVnaXN0ZXJfY2xrZGV2KGNsaywg InNlcmlhbDgyNTAiLCBOVUxMKTsKIH0KZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL2Nsay1tYXg3 NzY4Ni5jIGIvZHJpdmVycy9jbGsvY2xrLW1heDc3Njg2LmMKaW5kZXggM2Q3ZThkZC4uNDJmYTQz YSAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvY2xrLW1heDc3Njg2LmMKKysrIGIvZHJpdmVycy9j bGsvY2xrLW1heDc3Njg2LmMKQEAgLTExMiwxMCArMTEyLDEwIEBAIHN0YXRpYyBzdHJ1Y3QgY2xr X2luaXRfZGF0YSBtYXg3NzY4Nl9jbGtzX2luaXRbTUFYNzc2ODZfQ0xLU19OVU1dID0gewogCX0s CiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayAqbWF4Nzc2ODZfY2xrX3JlZ2lzdGVyKHN0cnVjdCBk ZXZpY2UgKmRldiwKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKm1heDc3Njg2X2Nsa19yZWdpc3Rl cihzdHJ1Y3QgZGV2aWNlICpkZXYsCiAJCQkJc3RydWN0IG1heDc3Njg2X2NsayAqbWF4Nzc2ODYp CiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBj bGtfaHcgKmh3ID0gJm1heDc3Njg2LT5odzsKIAogCWNsayA9IGNsa19yZWdpc3RlcihkZXYsIGh3 KTsKQEAgLTEzOCwxMCArMTM4LDEwIEBAIHN0YXRpYyBpbnQgbWF4Nzc2ODZfY2xrX3Byb2JlKHN0 cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCiB7CiAJc3RydWN0IG1heDc3Njg2X2RldiAqaW9k ZXYgPSBkZXZfZ2V0X2RydmRhdGEocGRldi0+ZGV2LnBhcmVudCk7CiAJc3RydWN0IG1heDc3Njg2 X2NsayAqbWF4Nzc2ODZfY2xrc1tNQVg3NzY4Nl9DTEtTX05VTV07Ci0Jc3RydWN0IGNsayAqKmNs b2NrczsKKwlzdHJ1Y3QgY2xrX2NvcmUgKipjbG9ja3M7CiAJaW50IGksIHJldDsKIAotCWNsb2Nr cyA9IGRldm1fa3phbGxvYygmcGRldi0+ZGV2LCBzaXplb2Yoc3RydWN0IGNsayAqKQorCWNsb2Nr cyA9IGRldm1fa3phbGxvYygmcGRldi0+ZGV2LCBzaXplb2Yoc3RydWN0IGNsa19jb3JlICopCiAJ CQkJCSogTUFYNzc2ODZfQ0xLU19OVU0sIEdGUF9LRVJORUwpOwogCWlmICghY2xvY2tzKQogCQly ZXR1cm4gLUVOT01FTTsKQEAgLTIwMyw3ICsyMDMsNyBAQCBlcnJfY2xvY2tzOgogc3RhdGljIGlu dCBtYXg3NzY4Nl9jbGtfcmVtb3ZlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCiB7CiAJ c3RydWN0IG1heDc3Njg2X2RldiAqaW9kZXYgPSBkZXZfZ2V0X2RydmRhdGEocGRldi0+ZGV2LnBh cmVudCk7Ci0Jc3RydWN0IGNsayAqKmNsb2NrcyA9IHBsYXRmb3JtX2dldF9kcnZkYXRhKHBkZXYp OworCXN0cnVjdCBjbGtfY29yZSAqKmNsb2NrcyA9IHBsYXRmb3JtX2dldF9kcnZkYXRhKHBkZXYp OwogCWludCBpOwogCiAJaWYgKGlvZGV2LT5kZXYtPm9mX25vZGUpCmRpZmYgLS1naXQgYS9kcml2 ZXJzL2Nsay9jbGstbW94YXJ0LmMgYi9kcml2ZXJzL2Nsay9jbGstbW94YXJ0LmMKaW5kZXggMzBh M2I2OS4uYzUwM2MwOSAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvY2xrLW1veGFydC5jCisrKyBi L2RyaXZlcnMvY2xrL2Nsay1tb3hhcnQuYwpAQCAtMTgsNyArMTgsNyBAQAogdm9pZCBfX2luaXQg bW94YXJ0X29mX3BsbF9jbGtfaW5pdChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUpCiB7CiAJc3Rh dGljIHZvaWQgX19pb21lbSAqYmFzZTsKLQlzdHJ1Y3QgY2xrICpjbGssICpyZWZfY2xrOworCXN0 cnVjdCBjbGtfY29yZSAqY2xrLCAqcmVmX2NsazsKIAl1bnNpZ25lZCBpbnQgbXVsOwogCWNvbnN0 IGNoYXIgKm5hbWUgPSBub2RlLT5uYW1lOwogCWNvbnN0IGNoYXIgKnBhcmVudF9uYW1lOwpAQCAt MzUsNyArMzUsNyBAQCB2b2lkIF9faW5pdCBtb3hhcnRfb2ZfcGxsX2Nsa19pbml0KHN0cnVjdCBk ZXZpY2Vfbm9kZSAqbm9kZSkKIAltdWwgPSByZWFkbChiYXNlICsgMHgzMCkgPj4gMyAmIDB4M2Y7 CiAJaW91bm1hcChiYXNlKTsKIAotCXJlZl9jbGsgPSBvZl9jbGtfZ2V0KG5vZGUsIDApOworCXJl Zl9jbGsgPSBvZl9jbGtfcHJvdmlkZXJfZ2V0KG5vZGUsIDApOwogCWlmIChJU19FUlIocmVmX2Ns aykpIHsKIAkJcHJfZXJyKCIlczogb2ZfY2xrX2dldCBmYWlsZWRcbiIsIG5vZGUtPmZ1bGxfbmFt ZSk7CiAJCXJldHVybjsKQEAgLTU2LDcgKzU2LDcgQEAgQ0xLX09GX0RFQ0xBUkUobW94YXJ0X3Bs bF9jbG9jaywgIm1veGEsbW94YXJ0LXBsbC1jbG9jayIsCiB2b2lkIF9faW5pdCBtb3hhcnRfb2Zf YXBiX2Nsa19pbml0KHN0cnVjdCBkZXZpY2Vfbm9kZSAqbm9kZSkKIHsKIAlzdGF0aWMgdm9pZCBf X2lvbWVtICpiYXNlOwotCXN0cnVjdCBjbGsgKmNsaywgKnBsbF9jbGs7CisJc3RydWN0IGNsa19j b3JlICpjbGssICpwbGxfY2xrOwogCXVuc2lnbmVkIGludCBkaXYsIHZhbDsKIAl1bnNpZ25lZCBp bnQgZGl2X2lkeFtdID0geyAyLCAzLCA0LCA2LCA4fTsKIAljb25zdCBjaGFyICpuYW1lID0gbm9k ZS0+bmFtZTsKQEAgLTc4LDcgKzc4LDcgQEAgdm9pZCBfX2luaXQgbW94YXJ0X29mX2FwYl9jbGtf aW5pdChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUpCiAJCXZhbCA9IDA7CiAJZGl2ID0gZGl2X2lk eFt2YWxdICogMjsKIAotCXBsbF9jbGsgPSBvZl9jbGtfZ2V0KG5vZGUsIDApOworCXBsbF9jbGsg PSBvZl9jbGtfcHJvdmlkZXJfZ2V0KG5vZGUsIDApOwogCWlmIChJU19FUlIocGxsX2NsaykpIHsK IAkJcHJfZXJyKCIlczogb2ZfY2xrX2dldCBmYWlsZWRcbiIsIG5vZGUtPmZ1bGxfbmFtZSk7CiAJ CXJldHVybjsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL2Nsay1tdXguYyBiL2RyaXZlcnMvY2xr L2Nsay1tdXguYwppbmRleCA0Zjk2ZmYzLi41MzhjNDU1IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Ns ay9jbGstbXV4LmMKKysrIGIvZHJpdmVycy9jbGsvY2xrLW11eC5jCkBAIC0xMCw3ICsxMCw2IEBA CiAgKiBTaW1wbGUgbXVsdGlwbGV4ZXIgY2xvY2sgaW1wbGVtZW50YXRpb24KICAqLwogCi0jaW5j bHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5j bHVkZSA8bGludXgvbW9kdWxlLmg+CiAjaW5jbHVkZSA8bGludXgvc2xhYi5oPgpAQCAtMTEzLDEz ICsxMTIsMTMgQEAgY29uc3Qgc3RydWN0IGNsa19vcHMgY2xrX211eF9yb19vcHMgPSB7CiB9Owog RVhQT1JUX1NZTUJPTF9HUEwoY2xrX211eF9yb19vcHMpOwogCi1zdHJ1Y3QgY2xrICpjbGtfcmVn aXN0ZXJfbXV4X3RhYmxlKHN0cnVjdCBkZXZpY2UgKmRldiwgY29uc3QgY2hhciAqbmFtZSwKK3N0 cnVjdCBjbGtfY29yZSAqY2xrX3JlZ2lzdGVyX211eF90YWJsZShzdHJ1Y3QgZGV2aWNlICpkZXYs IGNvbnN0IGNoYXIgKm5hbWUsCiAJCWNvbnN0IGNoYXIgKipwYXJlbnRfbmFtZXMsIHU4IG51bV9w YXJlbnRzLCB1bnNpZ25lZCBsb25nIGZsYWdzLAogCQl2b2lkIF9faW9tZW0gKnJlZywgdTggc2hp ZnQsIHUzMiBtYXNrLAogCQl1OCBjbGtfbXV4X2ZsYWdzLCB1MzIgKnRhYmxlLCBzcGlubG9ja190 ICpsb2NrKQogewogCXN0cnVjdCBjbGtfbXV4ICptdXg7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0 cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAJdTggd2lk dGggPSAwOwogCkBAIC0xNjUsNyArMTY0LDcgQEAgc3RydWN0IGNsayAqY2xrX3JlZ2lzdGVyX211 eF90YWJsZShzdHJ1Y3QgZGV2aWNlICpkZXYsIGNvbnN0IGNoYXIgKm5hbWUsCiB9CiBFWFBPUlRf U1lNQk9MX0dQTChjbGtfcmVnaXN0ZXJfbXV4X3RhYmxlKTsKIAotc3RydWN0IGNsayAqY2xrX3Jl Z2lzdGVyX211eChzdHJ1Y3QgZGV2aWNlICpkZXYsIGNvbnN0IGNoYXIgKm5hbWUsCitzdHJ1Y3Qg Y2xrX2NvcmUgKmNsa19yZWdpc3Rlcl9tdXgoc3RydWN0IGRldmljZSAqZGV2LCBjb25zdCBjaGFy ICpuYW1lLAogCQljb25zdCBjaGFyICoqcGFyZW50X25hbWVzLCB1OCBudW1fcGFyZW50cywgdW5z aWduZWQgbG9uZyBmbGFncywKIAkJdm9pZCBfX2lvbWVtICpyZWcsIHU4IHNoaWZ0LCB1OCB3aWR0 aCwKIAkJdTggY2xrX211eF9mbGFncywgc3BpbmxvY2tfdCAqbG9jaykKZGlmZiAtLWdpdCBhL2Ry aXZlcnMvY2xrL2Nsay1ub21hZGlrLmMgYi9kcml2ZXJzL2Nsay9jbGstbm9tYWRpay5jCmluZGV4 IDA1ZTA0Y2UuLjkxODU1ZDMgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL2Nsay1ub21hZGlrLmMK KysrIGIvZHJpdmVycy9jbGsvY2xrLW5vbWFkaWsuYwpAQCAtOCw3ICs4LDYgQEAKICNkZWZpbmUg cHJfZm10KGZtdCkgIk5vbWFkaWsgU1JDIGNsb2NrczogIiBmbXQKIAogI2luY2x1ZGUgPGxpbnV4 L2JpdG9wcy5oPgotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsa2Rl di5oPgogI2luY2x1ZGUgPGxpbnV4L2Vyci5oPgogI2luY2x1ZGUgPGxpbnV4L2lvLmg+CkBAIC0y NTQsMTEgKzI1MywxMSBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGNsa19vcHMgcGxsX2Nsa19vcHMg PSB7CiAJLnJlY2FsY19yYXRlID0gcGxsX2Nsa19yZWNhbGNfcmF0ZSwKIH07CiAKLXN0YXRpYyBz dHJ1Y3QgY2xrICogX19pbml0CitzdGF0aWMgc3RydWN0IGNsa19jb3JlICogX19pbml0CiBwbGxf Y2xrX3JlZ2lzdGVyKHN0cnVjdCBkZXZpY2UgKmRldiwgY29uc3QgY2hhciAqbmFtZSwKIAkJIGNv bnN0IGNoYXIgKnBhcmVudF9uYW1lLCB1MzIgaWQpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0 cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfcGxsICpwbGw7CiAJc3RydWN0IGNsa19p bml0X2RhdGEgaW5pdDsKIApAQCAtMzQ2LDExICszNDUsMTEgQEAgc3RhdGljIGNvbnN0IHN0cnVj dCBjbGtfb3BzIHNyY19jbGtfb3BzID0gewogCS5yZWNhbGNfcmF0ZSA9IHNyY19jbGtfcmVjYWxj X3JhdGUsCiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayAqIF9faW5pdAorc3RhdGljIHN0cnVjdCBj bGtfY29yZSAqIF9faW5pdAogc3JjX2Nsa19yZWdpc3RlcihzdHJ1Y3QgZGV2aWNlICpkZXYsIGNv bnN0IGNoYXIgKm5hbWUsCiAJCSBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwgdTggaWQpCiB7Ci0J c3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfc3Jj ICpzY2xrOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKQEAgLTUxMCw3ICs1MDksNyBA QCBtb2R1bGVfaW5pdChub21hZGlrX3NyY19jbGtfaW5pdF9kZWJ1Z2ZzKTsKIAogc3RhdGljIHZv aWQgX19pbml0IG9mX25vbWFkaWtfcGxsX3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnApCiB7 Ci0Jc3RydWN0IGNsayAqY2xrID0gRVJSX1BUUigtRUlOVkFMKTsKKwlzdHJ1Y3QgY2xrX2NvcmUg KmNsayA9IEVSUl9QVFIoLUVJTlZBTCk7CiAJY29uc3QgY2hhciAqY2xrX25hbWUgPSBucC0+bmFt ZTsKIAljb25zdCBjaGFyICpwYXJlbnRfbmFtZTsKIAl1MzIgcGxsX2lkOwpAQCAtNTMzLDcgKzUz Miw3IEBAIENMS19PRl9ERUNMQVJFKG5vbWFkaWtfcGxsX2NsaywKIAogc3RhdGljIHZvaWQgX19p bml0IG9mX25vbWFkaWtfaGNsa19zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wKQogewotCXN0 cnVjdCBjbGsgKmNsayA9IEVSUl9QVFIoLUVJTlZBTCk7CisJc3RydWN0IGNsa19jb3JlICpjbGsg PSBFUlJfUFRSKC1FSU5WQUwpOwogCWNvbnN0IGNoYXIgKmNsa19uYW1lID0gbnAtPm5hbWU7CiAJ Y29uc3QgY2hhciAqcGFyZW50X25hbWU7CiAKQEAgLTU1Nyw3ICs1NTYsNyBAQCBDTEtfT0ZfREVD TEFSRShub21hZGlrX2hjbGtfY2xrLAogCiBzdGF0aWMgdm9pZCBfX2luaXQgb2Zfbm9tYWRpa19z cmNfY2xrX3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnApCiB7Ci0Jc3RydWN0IGNsayAqY2xr ID0gRVJSX1BUUigtRUlOVkFMKTsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsayA9IEVSUl9QVFIoLUVJ TlZBTCk7CiAJY29uc3QgY2hhciAqY2xrX25hbWUgPSBucC0+bmFtZTsKIAljb25zdCBjaGFyICpw YXJlbnRfbmFtZTsKIAl1MzIgY2xrX2lkOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvY2xrLW5z cGlyZS5jIGIvZHJpdmVycy9jbGsvY2xrLW5zcGlyZS5jCmluZGV4IGEzNzhkYjcuLmU5YzQzZjQg MTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL2Nsay1uc3BpcmUuYworKysgYi9kcml2ZXJzL2Nsay9j bGstbnNwaXJlLmMKQEAgLTY5LDcgKzY5LDcgQEAgc3RhdGljIHZvaWQgX19pbml0IG5zcGlyZV9h aGJkaXZfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpub2RlLAogewogCXUzMiB2YWw7CiAJdm9p ZCBfX2lvbWVtICppbzsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7 CiAJY29uc3QgY2hhciAqY2xrX25hbWUgPSBub2RlLT5uYW1lOwogCWNvbnN0IGNoYXIgKnBhcmVu dF9uYW1lOwogCXN0cnVjdCBuc3BpcmVfY2xrX2luZm8gaW5mbzsKQEAgLTExMSw3ICsxMTEsNyBA QCBzdGF0aWMgdm9pZCBfX2luaXQgbnNwaXJlX2Nsa19zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUg Km5vZGUsCiB7CiAJdTMyIHZhbDsKIAl2b2lkIF9faW9tZW0gKmlvOwotCXN0cnVjdCBjbGsgKmNs azsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAljb25zdCBjaGFyICpjbGtfbmFtZSA9IG5vZGUt Pm5hbWU7CiAJc3RydWN0IG5zcGlyZV9jbGtfaW5mbyBpbmZvOwogCmRpZmYgLS1naXQgYS9kcml2 ZXJzL2Nsay9jbGstcGFsbWFzLmMgYi9kcml2ZXJzL2Nsay9jbGstcGFsbWFzLmMKaW5kZXggNzgx NjMwZS4uOGZlYmQ4YyAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvY2xrLXBhbG1hcy5jCisrKyBi L2RyaXZlcnMvY2xrL2Nsay1wYWxtYXMuYwpAQCAtMTcsNyArMTcsNiBAQAogICogR2VuZXJhbCBQ dWJsaWMgTGljZW5zZSBmb3IgbW9yZSBkZXRhaWxzLgogICovCiAKLSNpbmNsdWRlIDxsaW51eC9j bGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJv dmlkZXIuaD4KICNpbmNsdWRlIDxsaW51eC9tZmQvcGFsbWFzLmg+CkBAIC00Miw3ICs0MSw3IEBA IHN0cnVjdCBwYWxtYXNfY2xrMzJrX2Rlc2MgewogCiBzdHJ1Y3QgcGFsbWFzX2Nsb2NrX2luZm8g ewogCXN0cnVjdCBkZXZpY2UgKmRldjsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19j b3JlICpjbGs7CiAJc3RydWN0IGNsa19odyBodzsKIAlzdHJ1Y3QgcGFsbWFzICpwYWxtYXM7CiAJ c3RydWN0IHBhbG1hc19jbGszMmtfZGVzYyAqY2xrX2Rlc2M7CkBAIC0yMTksNyArMjE4LDcgQEAg c3RhdGljIGludCBwYWxtYXNfY2xrc19pbml0X2NvbmZpZ3VyZShzdHJ1Y3QgcGFsbWFzX2Nsb2Nr X2luZm8gKmNpbmZvKQogCX0KIAogCWlmIChjaW5mby0+ZXh0X2NvbnRyb2xfcGluKSB7Ci0JCXJl dCA9IGNsa19wcmVwYXJlKGNpbmZvLT5jbGspOworCQlyZXQgPSBjbGtfcHJvdmlkZXJfcHJlcGFy ZShjaW5mby0+Y2xrKTsKIAkJaWYgKHJldCA8IDApIHsKIAkJCWRldl9lcnIoY2luZm8tPmRldiwg IkNsb2NrIHByZXAgZmFpbGVkLCAlZFxuIiwgcmV0KTsKIAkJCXJldHVybiByZXQ7CkBAIC0yNDQs NyArMjQzLDcgQEAgc3RhdGljIGludCBwYWxtYXNfY2xrc19wcm9iZShzdHJ1Y3QgcGxhdGZvcm1f ZGV2aWNlICpwZGV2KQogCXN0cnVjdCBwYWxtYXNfY2xrc19vZl9tYXRjaF9kYXRhICptYXRjaF9k YXRhOwogCWNvbnN0IHN0cnVjdCBvZl9kZXZpY2VfaWQgKm1hdGNoOwogCXN0cnVjdCBwYWxtYXNf Y2xvY2tfaW5mbyAqY2luZm87Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAq Y2xrOwogCWludCByZXQ7CiAKIAltYXRjaCA9IG9mX21hdGNoX2RldmljZShwYWxtYXNfY2xrc19v Zl9tYXRjaCwgJnBkZXYtPmRldik7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9jbGstcHBjLWNv cmVuZXQuYyBiL2RyaXZlcnMvY2xrL2Nsay1wcGMtY29yZW5ldC5jCmluZGV4IDhlNThlZGYuLjU2 MTllZTkgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL2Nsay1wcGMtY29yZW5ldC5jCisrKyBiL2Ry aXZlcnMvY2xrL2Nsay1wcGMtY29yZW5ldC5jCkBAIC02NCw3ICs2NCw3IEBAIGNvbnN0IHN0cnVj dCBjbGtfb3BzIGNtdXhfb3BzID0gewogCiBzdGF0aWMgdm9pZCBfX2luaXQgY29yZV9tdXhfaW5p dChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wKQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3Qg Y2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwogCXN0cnVjdCBjbXV4 X2NsayAqY211eF9jbGs7CiAJc3RydWN0IGRldmljZV9ub2RlICpub2RlOwpAQCAtMTUwLDcgKzE1 MCw3IEBAIHN0YXRpYyB2b2lkIF9faW5pdCBjb3JlX3BsbF9pbml0KHN0cnVjdCBkZXZpY2Vfbm9k ZSAqbnApCiAJaW50IGksIHJjLCBjb3VudDsKIAljb25zdCBjaGFyICpjbGtfbmFtZSwgKnBhcmVu dF9uYW1lOwogCXN0cnVjdCBjbGtfb25lY2VsbF9kYXRhICpvbmVjZWxsX2RhdGE7Ci0Jc3RydWN0 IGNsayAgICAgICoqc3ViY2xrczsKKwlzdHJ1Y3QgY2xrX2NvcmUgICAgICAqKnN1YmNsa3M7CiAJ dm9pZCBfX2lvbWVtICpiYXNlOwogCiAJYmFzZSA9IG9mX2lvbWFwKG5wLCAwKTsKQEAgLTE4NCw3 ICsxODQsNyBAQCBzdGF0aWMgdm9pZCBfX2luaXQgY29yZV9wbGxfaW5pdChzdHJ1Y3QgZGV2aWNl X25vZGUgKm5wKQogCS8qIG91dHB1dCBjbG9jayBudW1iZXIgcGVyIFBMTCAqLwogCWNsb2Nrc19w ZXJfcGxsID0gY291bnQ7CiAKLQlzdWJjbGtzID0ga3phbGxvYyhzaXplb2Yoc3RydWN0IGNsayAq KSAqIGNvdW50LCBHRlBfS0VSTkVMKTsKKwlzdWJjbGtzID0ga3phbGxvYyhzaXplb2Yoc3RydWN0 IGNsa19jb3JlICopICogY291bnQsIEdGUF9LRVJORUwpOwogCWlmICghc3ViY2xrcykgewogCQlw cl9lcnIoIiVzOiBjb3VsZCBub3QgYWxsb2NhdGUgc3ViY2xrc1xuIiwgX19mdW5jX18pOwogCQln b3RvIGVycl9tYXA7CkBAIC0yNDYsNyArMjQ2LDcgQEAgZXJyX21hcDoKIAogc3RhdGljIHZvaWQg X19pbml0IHN5c2Nsa19pbml0KHN0cnVjdCBkZXZpY2Vfbm9kZSAqbm9kZSkKIHsKLQlzdHJ1Y3Qg Y2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJY29uc3QgY2hhciAqY2xrX25hbWUg PSBub2RlLT5uYW1lOwogCXN0cnVjdCBkZXZpY2Vfbm9kZSAqbnAgPSBvZl9nZXRfcGFyZW50KG5v ZGUpOwogCXUzMiByYXRlOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvY2xrLXMybXBzMTEuYyBi L2RyaXZlcnMvY2xrL2Nsay1zMm1wczExLmMKaW5kZXggYjc3OTdmYi4uMTdmYzdlMSAxMDA2NDQK LS0tIGEvZHJpdmVycy9jbGsvY2xrLXMybXBzMTEuYworKysgYi9kcml2ZXJzL2Nsay9jbGstczJt cHMxMS5jCkBAIC0yOSw3ICsyOSw3IEBACiAKICNkZWZpbmUgczJtcHMxMV9uYW1lKGEpIChhLT5o dy5pbml0LT5uYW1lKQogCi1zdGF0aWMgc3RydWN0IGNsayAqKmNsa190YWJsZTsKK3N0YXRpYyBz dHJ1Y3QgY2xrX2NvcmUgKipjbGtfdGFibGU7CiBzdGF0aWMgc3RydWN0IGNsa19vbmVjZWxsX2Rh dGEgY2xrX2RhdGE7CiAKIGVudW0gewpAQCAtNDMsNyArNDMsNyBAQCBzdHJ1Y3QgczJtcHMxMV9j bGsgewogCXN0cnVjdCBzZWNfcG1pY19kZXYgKmlvZGV2OwogCXN0cnVjdCBkZXZpY2Vfbm9kZSAq Y2xrX25wOwogCXN0cnVjdCBjbGtfaHcgaHc7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBj bGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfbG9va3VwICpsb29rdXA7CiAJdTMyIG1hc2s7CiAJ dW5zaWduZWQgaW50IHJlZzsKQEAgLTE3NCw3ICsxNzQsNyBAQCBzdGF0aWMgaW50IHMybXBzMTFf Y2xrX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCiAKIAlzMm1wczExX2NsayA9 IHMybXBzMTFfY2xrczsKIAotCWNsa190YWJsZSA9IGRldm1fa3phbGxvYygmcGRldi0+ZGV2LCBz aXplb2Yoc3RydWN0IGNsayAqKSAqCisJY2xrX3RhYmxlID0gZGV2bV9remFsbG9jKCZwZGV2LT5k ZXYsIHNpemVvZihzdHJ1Y3QgY2xrX2NvcmUgKikgKgogCQkJCSBTMk1QUzExX0NMS1NfTlVNLCBH RlBfS0VSTkVMKTsKIAlpZiAoIWNsa190YWJsZSkKIAkJcmV0dXJuIC1FTk9NRU07CmRpZmYgLS1n aXQgYS9kcml2ZXJzL2Nsay9jbGstc2k1MzUxLmMgYi9kcml2ZXJzL2Nsay9jbGstc2k1MzUxLmMK aW5kZXggM2IyYTY2Zi4uNTdjOWViNSAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvY2xrLXNpNTM1 MS5jCisrKyBiL2RyaXZlcnMvY2xrL2Nsay1zaTUzNTEuYwpAQCAtNTYsMTAgKzU2LDEwIEBAIHN0 cnVjdCBzaTUzNTFfZHJpdmVyX2RhdGEgewogCXN0cnVjdCByZWdtYXAJCSpyZWdtYXA7CiAJc3Ry dWN0IGNsa19vbmVjZWxsX2RhdGEgb25lY2VsbDsKIAotCXN0cnVjdCBjbGsJCSpweHRhbDsKKwlz dHJ1Y3QgY2xrX2NvcmUJCSpweHRhbDsKIAljb25zdCBjaGFyCQkqcHh0YWxfbmFtZTsKIAlzdHJ1 Y3QgY2xrX2h3CQl4dGFsOwotCXN0cnVjdCBjbGsJCSpwY2xraW47CisJc3RydWN0IGNsa19jb3Jl CQkqcGNsa2luOwogCWNvbnN0IGNoYXIJCSpwY2xraW5fbmFtZTsKIAlzdHJ1Y3QgY2xrX2h3CQlj bGtpbjsKIApAQCAtMTEyOCwxMiArMTEyOCwxMiBAQCBzdGF0aWMgaW50IHNpNTM1MV9kdF9wYXJz ZShzdHJ1Y3QgaTJjX2NsaWVudCAqY2xpZW50LAogCWlmICghcGRhdGEpCiAJCXJldHVybiAtRU5P TUVNOwogCi0JcGRhdGEtPmNsa194dGFsID0gb2ZfY2xrX2dldChucCwgMCk7CisJcGRhdGEtPmNs a194dGFsID0gb2ZfY2xrX3Byb3ZpZGVyX2dldChucCwgMCk7CiAJaWYgKCFJU19FUlIocGRhdGEt PmNsa194dGFsKSkKLQkJY2xrX3B1dChwZGF0YS0+Y2xrX3h0YWwpOwotCXBkYXRhLT5jbGtfY2xr aW4gPSBvZl9jbGtfZ2V0KG5wLCAxKTsKKwkJX19jbGtfcHV0KHBkYXRhLT5jbGtfeHRhbCk7CisJ cGRhdGEtPmNsa19jbGtpbiA9IG9mX2Nsa19wcm92aWRlcl9nZXQobnAsIDEpOwogCWlmICghSVNf RVJSKHBkYXRhLT5jbGtfY2xraW4pKQotCQljbGtfcHV0KHBkYXRhLT5jbGtfY2xraW4pOworCQlf X2Nsa19wdXQocGRhdGEtPmNsa19jbGtpbik7CiAKIAkvKgogCSAqIHByb3BlcnR5IHNpbGFicyxw bGwtc291cmNlIDogPG51bSBzcmM+LCBbPC4uPl0KQEAgLTEzMDYsNyArMTMwNiw3IEBAIHN0YXRp YyBpbnQgc2k1MzUxX2kyY19wcm9iZShzdHJ1Y3QgaTJjX2NsaWVudCAqY2xpZW50LAogCXN0cnVj dCBzaTUzNTFfcGxhdGZvcm1fZGF0YSAqcGRhdGE7CiAJc3RydWN0IHNpNTM1MV9kcml2ZXJfZGF0 YSAqZHJ2ZGF0YTsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwotCXN0cnVjdCBjbGsgKmNs azsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAljb25zdCBjaGFyICpwYXJlbnRfbmFtZXNbNF07 CiAJdTggbnVtX3BhcmVudHMsIG51bV9jbG9ja3M7CiAJaW50IHJldCwgbjsKQEAgLTE1NDUsNyAr MTU0NSw4IEBAIHN0YXRpYyBpbnQgc2k1MzUxX2kyY19wcm9iZShzdHJ1Y3QgaTJjX2NsaWVudCAq Y2xpZW50LAogCQkvKiBzZXQgaW5pdGlhbCBjbGtvdXQgcmF0ZSAqLwogCQlpZiAocGRhdGEtPmNs a291dFtuXS5yYXRlICE9IDApIHsKIAkJCWludCByZXQ7Ci0JCQlyZXQgPSBjbGtfc2V0X3JhdGUo Y2xrLCBwZGF0YS0+Y2xrb3V0W25dLnJhdGUpOworCQkJcmV0ID0gY2xrX3Byb3ZpZGVyX3NldF9y YXRlKGNsaywKKwkJCQkJCSAgICBwZGF0YS0+Y2xrb3V0W25dLnJhdGUpOwogCQkJaWYgKHJldCAh PSAwKSB7CiAJCQkJZGV2X2VycigmY2xpZW50LT5kZXYsICJDYW5ub3Qgc2V0IHJhdGUgOiAlZFxu IiwKIAkJCQkJcmV0KTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL2Nsay1zaTU3MC5jIGIvZHJp dmVycy9jbGsvY2xrLXNpNTcwLmMKaW5kZXggZmMxNjdiMy4uZjBlZWM0ZSAxMDA2NDQKLS0tIGEv ZHJpdmVycy9jbGsvY2xrLXNpNTcwLmMKKysrIGIvZHJpdmVycy9jbGsvY2xrLXNpNTcwLmMKQEAg LTQwNyw3ICs0MDcsNyBAQCBzdGF0aWMgaW50IHNpNTcwX3Byb2JlKHN0cnVjdCBpMmNfY2xpZW50 ICpjbGllbnQsCiB7CiAJc3RydWN0IGNsa19zaTU3MCAqZGF0YTsKIAlzdHJ1Y3QgY2xrX2luaXRf ZGF0YSBpbml0OwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAl1 MzIgaW5pdGlhbF9mb3V0LCBmYWN0b3J5X2ZvdXQsIHN0YWJpbGl0eTsKIAlpbnQgZXJyOwogCWVu dW0gY2xrX3NpNTcwX3ZhcmlhbnQgdmFyaWFudCA9IGlkLT5kcml2ZXJfZGF0YTsKQEAgLTQ3Niw3 ICs0NzYsNyBAQCBzdGF0aWMgaW50IHNpNTcwX3Byb2JlKHN0cnVjdCBpMmNfY2xpZW50ICpjbGll bnQsCiAJLyogUmVhZCB0aGUgcmVxdWVzdGVkIGluaXRpYWwgb3V0cHV0IGZyZXF1ZW5jeSBmcm9t IGRldmljZSB0cmVlICovCiAJaWYgKCFvZl9wcm9wZXJ0eV9yZWFkX3UzMihjbGllbnQtPmRldi5v Zl9ub2RlLCAiY2xvY2stZnJlcXVlbmN5IiwKIAkJCQkmaW5pdGlhbF9mb3V0KSkgewotCQllcnIg PSBjbGtfc2V0X3JhdGUoY2xrLCBpbml0aWFsX2ZvdXQpOworCQllcnIgPSBjbGtfcHJvdmlkZXJf c2V0X3JhdGUoY2xrLCBpbml0aWFsX2ZvdXQpOwogCQlpZiAoZXJyKSB7CiAJCQlvZl9jbGtfZGVs X3Byb3ZpZGVyKGNsaWVudC0+ZGV2Lm9mX25vZGUpOwogCQkJcmV0dXJuIGVycjsKZGlmZiAtLWdp dCBhL2RyaXZlcnMvY2xrL2Nsay10d2w2MDQwLmMgYi9kcml2ZXJzL2Nsay9jbGstdHdsNjA0MC5j CmluZGV4IDFhZGE3OWEuLmQyNGE4YTIgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL2Nsay10d2w2 MDQwLmMKKysrIGIvZHJpdmVycy9jbGsvY2xrLXR3bDYwNDAuYwpAQCAtMjAsNyArMjAsNiBAQAog KgogKi8KIAotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L21vZHVsZS5o PgogI2luY2x1ZGUgPGxpbnV4L3NsYWIuaD4KICNpbmNsdWRlIDxsaW51eC9wbGF0Zm9ybV9kZXZp Y2UuaD4KQEAgLTMxLDcgKzMwLDcgQEAgc3RydWN0IHR3bDYwNDBfY2xrIHsKIAlzdHJ1Y3QgdHds NjA0MCAqdHdsNjA0MDsKIAlzdHJ1Y3QgZGV2aWNlICpkZXY7CiAJc3RydWN0IGNsa19odyBtY3Bk bV9mY2xrOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlpbnQg ZW5hYmxlZDsKIH07CiAKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL2Nsay11MzAwLmMgYi9kcml2 ZXJzL2Nsay9jbGstdTMwMC5jCmluZGV4IDQwNmJmYzEuLjM5MmJjYmYgMTAwNjQ0Ci0tLSBhL2Ry aXZlcnMvY2xrL2Nsay11MzAwLmMKKysrIGIvZHJpdmVycy9jbGsvY2xrLXUzMDAuYwpAQCAtNSw3 ICs1LDYgQEAKICAqIEF1dGhvcjogTGludXMgV2FsbGVpaiA8bGludXMud2FsbGVpakBzdGVyaWNz c29uLmNvbT4KICAqIEF1dGhvcjogSm9uYXMgQWFiZXJnIDxqb25hcy5hYmVyZ0BzdGVyaWNzc29u LmNvbT4KICAqLwotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsa2Rl di5oPgogI2luY2x1ZGUgPGxpbnV4L2Vyci5oPgogI2luY2x1ZGUgPGxpbnV4L2lvLmg+CkBAIC02 ODgsNyArNjg3LDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIHN5c2Nvbl9jbGtfb3Bz ID0gewogCS5zZXRfcmF0ZSA9IHN5c2Nvbl9jbGtfc2V0X3JhdGUsCiB9OwogCi1zdGF0aWMgc3Ry dWN0IGNsayAqIF9faW5pdAorc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqIF9faW5pdAogc3lzY29u X2Nsa19yZWdpc3RlcihzdHJ1Y3QgZGV2aWNlICpkZXYsIGNvbnN0IGNoYXIgKm5hbWUsCiAJCSAg ICBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwgdW5zaWduZWQgbG9uZyBmbGFncywKIAkJICAgIGJv b2wgaHdfY3RybGQsCkBAIC02OTYsNyArNjk1LDcgQEAgc3lzY29uX2Nsa19yZWdpc3RlcihzdHJ1 Y3QgZGV2aWNlICpkZXYsIGNvbnN0IGNoYXIgKm5hbWUsCiAJCSAgICB2b2lkIF9faW9tZW0gKmVu X3JlZywgdTggZW5fYml0LAogCQkgICAgdTE2IGNsa192YWwpCiB7Ci0Jc3RydWN0IGNsayAqY2xr OworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfc3lzY29uICpzY2xrOwogCXN0 cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKQEAgLTg2Nyw3ICs4NjYsNyBAQCBzdGF0aWMgc3Ry dWN0IHUzMDBfY2xvY2sgY29uc3QgdTMwMF9jbGtfbG9va3VwW10gX19pbml0Y29uc3QgPSB7CiAK IHN0YXRpYyB2b2lkIF9faW5pdCBvZl91MzAwX3N5c2Nvbl9jbGtfaW5pdChzdHJ1Y3QgZGV2aWNl X25vZGUgKm5wKQogewotCXN0cnVjdCBjbGsgKmNsayA9IEVSUl9QVFIoLUVJTlZBTCk7CisJc3Ry dWN0IGNsa19jb3JlICpjbGsgPSBFUlJfUFRSKC1FSU5WQUwpOwogCWNvbnN0IGNoYXIgKmNsa19u YW1lID0gbnAtPm5hbWU7CiAJY29uc3QgY2hhciAqcGFyZW50X25hbWU7CiAJdm9pZCBfX2lvbWVt ICpyZXNfcmVnOwpAQCAtMTExMCwxMSArMTEwOSwxMSBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGNs a19vcHMgbWNsa19vcHMgPSB7CiAJLnNldF9yYXRlID0gbWNsa19jbGtfc2V0X3JhdGUsCiB9Owog Ci1zdGF0aWMgc3RydWN0IGNsayAqIF9faW5pdAorc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqIF9f aW5pdAogbWNsa19jbGtfcmVnaXN0ZXIoc3RydWN0IGRldmljZSAqZGV2LCBjb25zdCBjaGFyICpu YW1lLAogCQkgIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLCBib29sIGlzX21zcHJvKQogewotCXN0 cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xrX21jbGsg Km1jbGs7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIApAQCAtMTE0MSw3ICsxMTQwLDcg QEAgbWNsa19jbGtfcmVnaXN0ZXIoc3RydWN0IGRldmljZSAqZGV2LCBjb25zdCBjaGFyICpuYW1l LAogCiBzdGF0aWMgdm9pZCBfX2luaXQgb2ZfdTMwMF9zeXNjb25fbWNsa19pbml0KHN0cnVjdCBk ZXZpY2Vfbm9kZSAqbnApCiB7Ci0Jc3RydWN0IGNsayAqY2xrID0gRVJSX1BUUigtRUlOVkFMKTsK KwlzdHJ1Y3QgY2xrX2NvcmUgKmNsayA9IEVSUl9QVFIoLUVJTlZBTCk7CiAJY29uc3QgY2hhciAq Y2xrX25hbWUgPSBucC0+bmFtZTsKIAljb25zdCBjaGFyICpwYXJlbnRfbmFtZTsKIApkaWZmIC0t Z2l0IGEvZHJpdmVycy9jbGsvY2xrLXZ0ODUwMC5jIGIvZHJpdmVycy9jbGsvY2xrLXZ0ODUwMC5j CmluZGV4IDM3ZTkyODguLmU1ZmI5MzMgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL2Nsay12dDg1 MDAuYworKysgYi9kcml2ZXJzL2Nsay9jbGstdnQ4NTAwLmMKQEAgLTIzMiw3ICsyMzIsNyBAQCBz dGF0aWMgY29uc3Qgc3RydWN0IGNsa19vcHMgdnQ4NTAwX2dhdGVkX2Rpdmlzb3JfY2xrX29wcyA9 IHsKIHN0YXRpYyBfX2luaXQgdm9pZCB2dHdtX2RldmljZV9jbGtfaW5pdChzdHJ1Y3QgZGV2aWNl X25vZGUgKm5vZGUpCiB7CiAJdTMyIGVuX3JlZywgZGl2X3JlZzsKLQlzdHJ1Y3QgY2xrICpjbGs7 CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0IGNsa19kZXZpY2UgKmRldl9jbGs7CiAJ Y29uc3QgY2hhciAqY2xrX25hbWUgPSBub2RlLT5uYW1lOwogCWNvbnN0IGNoYXIgKnBhcmVudF9u YW1lOwpAQCAtNjUwLDcgKzY1MCw3IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgY2xrX29wcyB2dHdt X3BsbF9vcHMgPSB7CiBzdGF0aWMgX19pbml0IHZvaWQgdnR3bV9wbGxfY2xrX2luaXQoc3RydWN0 IGRldmljZV9ub2RlICpub2RlLCBpbnQgcGxsX3R5cGUpCiB7CiAJdTMyIHJlZzsKLQlzdHJ1Y3Qg Y2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0IGNsa19wbGwgKnBsbF9j bGs7CiAJY29uc3QgY2hhciAqY2xrX25hbWUgPSBub2RlLT5uYW1lOwogCWNvbnN0IGNoYXIgKnBh cmVudF9uYW1lOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvY2xrLXdtODMxeC5jIGIvZHJpdmVy cy9jbGsvY2xrLXdtODMxeC5jCmluZGV4IGIxMzEwNDEuLjg0Y2U4NzMgMTAwNjQ0Ci0tLSBhL2Ry aXZlcnMvY2xrL2Nsay13bTgzMXguYworKysgYi9kcml2ZXJzL2Nsay9jbGstd204MzF4LmMKQEAg LTEyLDcgKzEyLDYgQEAKICAqCiAgKi8KIAotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1 ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxpbnV4L2RlbGF5Lmg+CiAjaW5j bHVkZSA8bGludXgvbW9kdWxlLmg+CkBAIC0yNSw5ICsyNCw5IEBAIHN0cnVjdCB3bTgzMXhfY2xr IHsKIAlzdHJ1Y3QgY2xrX2h3IHh0YWxfaHc7CiAJc3RydWN0IGNsa19odyBmbGxfaHc7CiAJc3Ry dWN0IGNsa19odyBjbGtvdXRfaHc7Ci0Jc3RydWN0IGNsayAqeHRhbDsKLQlzdHJ1Y3QgY2xrICpm bGw7Ci0Jc3RydWN0IGNsayAqY2xrb3V0OworCXN0cnVjdCBjbGtfY29yZSAqeHRhbDsKKwlzdHJ1 Y3QgY2xrX2NvcmUgKmZsbDsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsa291dDsKIAlib29sIHh0YWxf ZW5hOwogfTsKIApkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvY2xrLXhnZW5lLmMgYi9kcml2ZXJz L2Nsay9jbGsteGdlbmUuYwppbmRleCBkZDhhNjJkLi5jZTNlZDM0IDEwMDY0NAotLS0gYS9kcml2 ZXJzL2Nsay9jbGsteGdlbmUuYworKysgYi9kcml2ZXJzL2Nsay9jbGsteGdlbmUuYwpAQCAtMTI0 LDEzICsxMjQsMTMgQEAgY29uc3Qgc3RydWN0IGNsa19vcHMgeGdlbmVfY2xrX3BsbF9vcHMgPSB7 CiAJLnJlY2FsY19yYXRlID0geGdlbmVfY2xrX3BsbF9yZWNhbGNfcmF0ZSwKIH07CiAKLXN0YXRp YyBzdHJ1Y3QgY2xrICp4Z2VuZV9yZWdpc3Rlcl9jbGtfcGxsKHN0cnVjdCBkZXZpY2UgKmRldiwK K3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKnhnZW5lX3JlZ2lzdGVyX2Nsa19wbGwoc3RydWN0IGRl dmljZSAqZGV2LAogCWNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAog CXVuc2lnbmVkIGxvbmcgZmxhZ3MsIHZvaWQgX19pb21lbSAqcmVnLCB1MzIgcGxsX29mZnNldCwK IAl1MzIgdHlwZSwgc3BpbmxvY2tfdCAqbG9jaykKIHsKIAlzdHJ1Y3QgeGdlbmVfY2xrX3BsbCAq YXBtY2xrOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1 Y3QgY2xrX2luaXRfZGF0YSBpbml0OwogCiAJLyogYWxsb2NhdGUgdGhlIEFQTSBjbG9jayBzdHJ1 Y3R1cmUgKi8KQEAgLTE2Niw3ICsxNjYsNyBAQCBzdGF0aWMgc3RydWN0IGNsayAqeGdlbmVfcmVn aXN0ZXJfY2xrX3BsbChzdHJ1Y3QgZGV2aWNlICpkZXYsCiBzdGF0aWMgdm9pZCB4Z2VuZV9wbGxj bGtfaW5pdChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wLCBlbnVtIHhnZW5lX3BsbF90eXBlIHBsbF90 eXBlKQogewogICAgICAgICBjb25zdCBjaGFyICpjbGtfbmFtZSA9IG5wLT5mdWxsX25hbWU7Ci0g ICAgICAgIHN0cnVjdCBjbGsgKmNsazsKKyAgICAgICAgc3RydWN0IGNsa19jb3JlICpjbGs7CiAg ICAgICAgIHZvaWQgKnJlZzsKIAogICAgICAgICByZWcgPSBvZl9pb21hcChucCwgMCk7CkBAIC0z OTUsMTIgKzM5NSwxMiBAQCBjb25zdCBzdHJ1Y3QgY2xrX29wcyB4Z2VuZV9jbGtfb3BzID0gewog CS5yb3VuZF9yYXRlID0geGdlbmVfY2xrX3JvdW5kX3JhdGUsCiB9OwogCi1zdGF0aWMgc3RydWN0 IGNsayAqeGdlbmVfcmVnaXN0ZXJfY2xrKHN0cnVjdCBkZXZpY2UgKmRldiwKK3N0YXRpYyBzdHJ1 Y3QgY2xrX2NvcmUgKnhnZW5lX3JlZ2lzdGVyX2NsayhzdHJ1Y3QgZGV2aWNlICpkZXYsCiAJCWNv bnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAogCQlzdHJ1Y3QgeGdlbmVf ZGV2X3BhcmFtZXRlcnMgKnBhcmFtZXRlcnMsIHNwaW5sb2NrX3QgKmxvY2spCiB7CiAJc3RydWN0 IHhnZW5lX2NsayAqYXBtY2xrOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUg KmNsazsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwogCWludCByYzsKIApAQCAtNDQyLDcg KzQ0Miw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrICp4Z2VuZV9yZWdpc3Rlcl9jbGsoc3RydWN0IGRl dmljZSAqZGV2LAogc3RhdGljIHZvaWQgX19pbml0IHhnZW5lX2RldmNsa19pbml0KHN0cnVjdCBk ZXZpY2Vfbm9kZSAqbnApCiB7CiAJY29uc3QgY2hhciAqY2xrX25hbWUgPSBucC0+ZnVsbF9uYW1l OwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgcmVz b3VyY2UgcmVzOwogCWludCByYzsKIAlzdHJ1Y3QgeGdlbmVfZGV2X3BhcmFtZXRlcnMgcGFyYW1l dGVyczsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL2Nsay5oIGIvZHJpdmVycy9jbGsvY2xrLmgK aW5kZXggYzc5ODEzOC4uZDI3ODU3MiAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvY2xrLmgKKysr IGIvZHJpdmVycy9jbGsvY2xrLmgKQEAgLTEwLDggKzEwLDggQEAKICAqLwogCiAjaWYgZGVmaW5l ZChDT05GSUdfT0YpICYmIGRlZmluZWQoQ09ORklHX0NPTU1PTl9DTEspCi1zdHJ1Y3QgY2xrICpv Zl9jbGtfZ2V0X2J5X2Nsa3NwZWMoc3RydWN0IG9mX3BoYW5kbGVfYXJncyAqY2xrc3BlYyk7Ci1z dHJ1Y3QgY2xrICpfX29mX2Nsa19nZXRfZnJvbV9wcm92aWRlcihzdHJ1Y3Qgb2ZfcGhhbmRsZV9h cmdzICpjbGtzcGVjKTsKK3N0cnVjdCBjbGtfY29yZSAqb2ZfY2xrX2dldF9ieV9jbGtzcGVjKHN0 cnVjdCBvZl9waGFuZGxlX2FyZ3MgKmNsa3NwZWMpOworc3RydWN0IGNsa19jb3JlICpfX29mX2Ns a19nZXRfZnJvbV9wcm92aWRlcihzdHJ1Y3Qgb2ZfcGhhbmRsZV9hcmdzICpjbGtzcGVjKTsKIHZv aWQgb2ZfY2xrX2xvY2sodm9pZCk7CiB2b2lkIG9mX2Nsa191bmxvY2sodm9pZCk7CiAjZW5kaWYK ZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL2hpc2lsaWNvbi9jbGstaGkzNjIwLmMgYi9kcml2ZXJz L2Nsay9oaXNpbGljb24vY2xrLWhpMzYyMC5jCmluZGV4IDMzOTk0NWQuLjI2ZjExYTMgMTAwNjQ0 Ci0tLSBhL2RyaXZlcnMvY2xrL2hpc2lsaWNvbi9jbGstaGkzNjIwLmMKKysrIGIvZHJpdmVycy9j bGsvaGlzaWxpY29uL2Nsay1oaTM2MjAuYwpAQCAtMzEsNyArMzEsNiBAQAogI2luY2x1ZGUgPGxp bnV4L29mX2FkZHJlc3MuaD4KICNpbmNsdWRlIDxsaW51eC9vZl9kZXZpY2UuaD4KICNpbmNsdWRl IDxsaW51eC9zbGFiLmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAKICNpbmNsdWRlIDxkdC1i aW5kaW5ncy9jbG9jay9oaTM2MjAtY2xvY2suaD4KIApAQCAtMjk2LDcgKzI5NSw3IEBAIHN0YXRp YyB1bnNpZ25lZCBsb25nIG1tY19jbGtfcmVjYWxjX3JhdGUoc3RydWN0IGNsa19odyAqaHcsCiAK IHN0YXRpYyBsb25nIG1tY19jbGtfZGV0ZXJtaW5lX3JhdGUoc3RydWN0IGNsa19odyAqaHcsIHVu c2lnbmVkIGxvbmcgcmF0ZSwKIAkJCSAgICAgIHVuc2lnbmVkIGxvbmcgKmJlc3RfcGFyZW50X3Jh dGUsCi0JCQkgICAgICBzdHJ1Y3QgY2xrICoqYmVzdF9wYXJlbnRfcCkKKwkJCSAgICAgIHN0cnVj dCBjbGtfY29yZSAqKmJlc3RfcGFyZW50X3ApCiB7CiAJc3RydWN0IGNsa19tbWMgKm1jbGsgPSB0 b19tbWMoaHcpOwogCXVuc2lnbmVkIGxvbmcgYmVzdCA9IDA7CkBAIC00MjcsMTEgKzQyNiwxMSBA QCBzdGF0aWMgc3RydWN0IGNsa19vcHMgY2xrX21tY19vcHMgPSB7CiAJLnJlY2FsY19yYXRlID0g bW1jX2Nsa19yZWNhbGNfcmF0ZSwKIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICpoaXNpX3JlZ2lz dGVyX2Nsa19tbWMoc3RydWN0IGhpc2lfbW1jX2Nsb2NrICptbWNfY2xrLAorc3RhdGljIHN0cnVj dCBjbGtfY29yZSAqaGlzaV9yZWdpc3Rlcl9jbGtfbW1jKHN0cnVjdCBoaXNpX21tY19jbG9jayAq bW1jX2NsaywKIAkJCXZvaWQgX19pb21lbSAqYmFzZSwgc3RydWN0IGRldmljZV9ub2RlICpucCkK IHsKIAlzdHJ1Y3QgY2xrX21tYyAqbWNsazsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNs a19jb3JlICpjbGs7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAogCW1jbGsgPSBremFs bG9jKHNpemVvZigqbWNsayksIEdGUF9LRVJORUwpOwpAQCAtNDg3LDcgKzQ4Niw3IEBAIHN0YXRp YyB2b2lkIF9faW5pdCBoaTM2MjBfbW1jX2Nsa19pbml0KHN0cnVjdCBkZXZpY2Vfbm9kZSAqbm9k ZSkKIAlpZiAoV0FSTl9PTighY2xrX2RhdGEpKQogCQlyZXR1cm47CiAKLQljbGtfZGF0YS0+Y2xr cyA9IGt6YWxsb2Moc2l6ZW9mKHN0cnVjdCBjbGsgKikgKiBudW0sIEdGUF9LRVJORUwpOworCWNs a19kYXRhLT5jbGtzID0ga3phbGxvYyhzaXplb2Yoc3RydWN0IGNsa19jb3JlICopICogbnVtLCBH RlBfS0VSTkVMKTsKIAlpZiAoIWNsa19kYXRhLT5jbGtzKSB7CiAJCXByX2VycigiJXM6IGZhaWwg dG8gYWxsb2NhdGUgbW1jIGNsa1xuIiwgX19mdW5jX18pOwogCQlyZXR1cm47CmRpZmYgLS1naXQg YS9kcml2ZXJzL2Nsay9oaXNpbGljb24vY2xrLWhpcDA0LmMgYi9kcml2ZXJzL2Nsay9oaXNpbGlj b24vY2xrLWhpcDA0LmMKaW5kZXggMTMyYjU3YS4uZTg0MDNjMCAxMDA2NDQKLS0tIGEvZHJpdmVy cy9jbGsvaGlzaWxpY29uL2Nsay1oaXAwNC5jCisrKyBiL2RyaXZlcnMvY2xrL2hpc2lsaWNvbi9j bGstaGlwMDQuYwpAQCAtMzAsNyArMzAsNiBAQAogI2luY2x1ZGUgPGxpbnV4L29mX2FkZHJlc3Mu aD4KICNpbmNsdWRlIDxsaW51eC9vZl9kZXZpY2UuaD4KICNpbmNsdWRlIDxsaW51eC9zbGFiLmg+ Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAKICNpbmNsdWRlIDxkdC1iaW5kaW5ncy9jbG9jay9o aXAwNC1jbG9jay5oPgogCmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9oaXNpbGljb24vY2xrLmMg Yi9kcml2ZXJzL2Nsay9oaXNpbGljb24vY2xrLmMKaW5kZXggYTA3OGU4NC4uMDBiN2M5YyAxMDA2 NDQKLS0tIGEvZHJpdmVycy9jbGsvaGlzaWxpY29uL2Nsay5jCisrKyBiL2RyaXZlcnMvY2xrL2hp c2lsaWNvbi9jbGsuYwpAQCAtMzIsNyArMzIsNiBAQAogI2luY2x1ZGUgPGxpbnV4L29mX2FkZHJl c3MuaD4KICNpbmNsdWRlIDxsaW51eC9vZl9kZXZpY2UuaD4KICNpbmNsdWRlIDxsaW51eC9zbGFi Lmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAKICNpbmNsdWRlICJjbGsuaCIKIApAQCAtNDIs NyArNDEsNyBAQCBzdHJ1Y3QgaGlzaV9jbG9ja19kYXRhIF9faW5pdCAqaGlzaV9jbGtfaW5pdChz dHJ1Y3QgZGV2aWNlX25vZGUgKm5wLAogCQkJCQkgICAgIGludCBucl9jbGtzKQogewogCXN0cnVj dCBoaXNpX2Nsb2NrX2RhdGEgKmNsa19kYXRhOwotCXN0cnVjdCBjbGsgKipjbGtfdGFibGU7CisJ c3RydWN0IGNsa19jb3JlICoqY2xrX3RhYmxlOwogCXZvaWQgX19pb21lbSAqYmFzZTsKIAogCWlm IChucCkgewpAQCAtNjMsNyArNjIsNyBAQCBzdHJ1Y3QgaGlzaV9jbG9ja19kYXRhIF9faW5pdCAq aGlzaV9jbGtfaW5pdChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wLAogCX0KIAljbGtfZGF0YS0+YmFz ZSA9IGJhc2U7CiAKLQljbGtfdGFibGUgPSBremFsbG9jKHNpemVvZihzdHJ1Y3QgY2xrICopICog bnJfY2xrcywgR0ZQX0tFUk5FTCk7CisJY2xrX3RhYmxlID0ga3phbGxvYyhzaXplb2Yoc3RydWN0 IGNsa19jb3JlICopICogbnJfY2xrcywgR0ZQX0tFUk5FTCk7CiAJaWYgKCFjbGtfdGFibGUpIHsK IAkJcHJfZXJyKCIlczogY291bGQgbm90IGFsbG9jYXRlIGNsb2NrIGxvb2t1cCB0YWJsZVxuIiwg X19mdW5jX18pOwogCQlnb3RvIGVycl9kYXRhOwpAQCAtODEsNyArODAsNyBAQCBlcnI6CiB2b2lk IF9faW5pdCBoaXNpX2Nsa19yZWdpc3Rlcl9maXhlZF9yYXRlKHN0cnVjdCBoaXNpX2ZpeGVkX3Jh dGVfY2xvY2sgKmNsa3MsCiAJCQkJCSBpbnQgbnVtcywgc3RydWN0IGhpc2lfY2xvY2tfZGF0YSAq ZGF0YSkKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJaW50 IGk7CiAKIAlmb3IgKGkgPSAwOyBpIDwgbnVtczsgaSsrKSB7CkBAIC0xMDIsNyArMTAxLDcgQEAg dm9pZCBfX2luaXQgaGlzaV9jbGtfcmVnaXN0ZXJfZml4ZWRfZmFjdG9yKHN0cnVjdCBoaXNpX2Zp eGVkX2ZhY3Rvcl9jbG9jayAqY2xrcywKIAkJCQkJICAgaW50IG51bXMsCiAJCQkJCSAgIHN0cnVj dCBoaXNpX2Nsb2NrX2RhdGEgKmRhdGEpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBj bGtfY29yZSAqY2xrOwogCWludCBpOwogCiAJZm9yIChpID0gMDsgaSA8IG51bXM7IGkrKykgewpA QCAtMTIyLDcgKzEyMSw3IEBAIHZvaWQgX19pbml0IGhpc2lfY2xrX3JlZ2lzdGVyX2ZpeGVkX2Zh Y3RvcihzdHJ1Y3QgaGlzaV9maXhlZF9mYWN0b3JfY2xvY2sgKmNsa3MsCiB2b2lkIF9faW5pdCBo aXNpX2Nsa19yZWdpc3Rlcl9tdXgoc3RydWN0IGhpc2lfbXV4X2Nsb2NrICpjbGtzLAogCQkJCSAg aW50IG51bXMsIHN0cnVjdCBoaXNpX2Nsb2NrX2RhdGEgKmRhdGEpCiB7Ci0Jc3RydWN0IGNsayAq Y2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXZvaWQgX19pb21lbSAqYmFzZSA9IGRhdGEt PmJhc2U7CiAJaW50IGk7CiAKQEAgLTE1MSw3ICsxNTAsNyBAQCB2b2lkIF9faW5pdCBoaXNpX2Ns a19yZWdpc3Rlcl9tdXgoc3RydWN0IGhpc2lfbXV4X2Nsb2NrICpjbGtzLAogdm9pZCBfX2luaXQg aGlzaV9jbGtfcmVnaXN0ZXJfZGl2aWRlcihzdHJ1Y3QgaGlzaV9kaXZpZGVyX2Nsb2NrICpjbGtz LAogCQkJCSAgICAgIGludCBudW1zLCBzdHJ1Y3QgaGlzaV9jbG9ja19kYXRhICpkYXRhKQogewot CXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAl2b2lkIF9faW9tZW0g KmJhc2UgPSBkYXRhLT5iYXNlOwogCWludCBpOwogCkBAIC0xODAsNyArMTc5LDcgQEAgdm9pZCBf X2luaXQgaGlzaV9jbGtfcmVnaXN0ZXJfZGl2aWRlcihzdHJ1Y3QgaGlzaV9kaXZpZGVyX2Nsb2Nr ICpjbGtzLAogdm9pZCBfX2luaXQgaGlzaV9jbGtfcmVnaXN0ZXJfZ2F0ZShzdHJ1Y3QgaGlzaV9n YXRlX2Nsb2NrICpjbGtzLAogCQkJCSAgICAgICBpbnQgbnVtcywgc3RydWN0IGhpc2lfY2xvY2tf ZGF0YSAqZGF0YSkKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7 CiAJdm9pZCBfX2lvbWVtICpiYXNlID0gZGF0YS0+YmFzZTsKIAlpbnQgaTsKIApAQCAtMjA4LDcg KzIwNyw3IEBAIHZvaWQgX19pbml0IGhpc2lfY2xrX3JlZ2lzdGVyX2dhdGUoc3RydWN0IGhpc2lf Z2F0ZV9jbG9jayAqY2xrcywKIHZvaWQgX19pbml0IGhpc2lfY2xrX3JlZ2lzdGVyX2dhdGVfc2Vw KHN0cnVjdCBoaXNpX2dhdGVfY2xvY2sgKmNsa3MsCiAJCQkJICAgICAgIGludCBudW1zLCBzdHJ1 Y3QgaGlzaV9jbG9ja19kYXRhICpkYXRhKQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3Qg Y2xrX2NvcmUgKmNsazsKIAl2b2lkIF9faW9tZW0gKmJhc2UgPSBkYXRhLT5iYXNlOwogCWludCBp OwogCmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9oaXNpbGljb24vY2xrLmggYi9kcml2ZXJzL2Ns ay9oaXNpbGljb24vY2xrLmgKaW5kZXggMzEwODNmZi4uZjdmYzRiOSAxMDA2NDQKLS0tIGEvZHJp dmVycy9jbGsvaGlzaWxpY29uL2Nsay5oCisrKyBiL2RyaXZlcnMvY2xrL2hpc2lsaWNvbi9jbGsu aApAQCAtOTAsNyArOTAsNyBAQCBzdHJ1Y3QgaGlzaV9nYXRlX2Nsb2NrIHsKIAljb25zdCBjaGFy CQkqYWxpYXM7CiB9OwogCi1zdHJ1Y3QgY2xrICpoaXNpX3JlZ2lzdGVyX2Nsa2dhdGVfc2VwKHN0 cnVjdCBkZXZpY2UgKiwgY29uc3QgY2hhciAqLAorc3RydWN0IGNsa19jb3JlICpoaXNpX3JlZ2lz dGVyX2Nsa2dhdGVfc2VwKHN0cnVjdCBkZXZpY2UgKiwgY29uc3QgY2hhciAqLAogCQkJCWNvbnN0 IGNoYXIgKiwgdW5zaWduZWQgbG9uZywKIAkJCQl2b2lkIF9faW9tZW0gKiwgdTgsCiAJCQkJdTgs IHNwaW5sb2NrX3QgKik7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9oaXNpbGljb24vY2xrZ2F0 ZS1zZXBhcmF0ZWQuYyBiL2RyaXZlcnMvY2xrL2hpc2lsaWNvbi9jbGtnYXRlLXNlcGFyYXRlZC5j CmluZGV4IGIwM2Q1YTcuLjVkYjViYTYgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL2hpc2lsaWNv bi9jbGtnYXRlLXNlcGFyYXRlZC5jCisrKyBiL2RyaXZlcnMvY2xrL2hpc2lsaWNvbi9jbGtnYXRl LXNlcGFyYXRlZC5jCkBAIC0yOCw3ICsyOCw2IEBACiAjaW5jbHVkZSA8bGludXgvY2xrZGV2Lmg+ CiAjaW5jbHVkZSA8bGludXgvaW8uaD4KICNpbmNsdWRlIDxsaW51eC9zbGFiLmg+Ci0jaW5jbHVk ZSA8bGludXgvY2xrLmg+CiAKICNpbmNsdWRlICJjbGsuaCIKIApAQCAtOTYsMTQgKzk1LDE0IEBA IHN0YXRpYyBzdHJ1Y3QgY2xrX29wcyBjbGtnYXRlX3NlcGFyYXRlZF9vcHMgPSB7CiAJLmlzX2Vu YWJsZWQJPSBjbGtnYXRlX3NlcGFyYXRlZF9pc19lbmFibGVkLAogfTsKIAotc3RydWN0IGNsayAq aGlzaV9yZWdpc3Rlcl9jbGtnYXRlX3NlcChzdHJ1Y3QgZGV2aWNlICpkZXYsIGNvbnN0IGNoYXIg Km5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmhpc2lfcmVnaXN0ZXJfY2xrZ2F0ZV9zZXAoc3RydWN0 IGRldmljZSAqZGV2LCBjb25zdCBjaGFyICpuYW1lLAogCQkJCSAgICAgIGNvbnN0IGNoYXIgKnBh cmVudF9uYW1lLAogCQkJCSAgICAgIHVuc2lnbmVkIGxvbmcgZmxhZ3MsCiAJCQkJICAgICAgdm9p ZCBfX2lvbWVtICpyZWcsIHU4IGJpdF9pZHgsCiAJCQkJICAgICAgdTggY2xrX2dhdGVfZmxhZ3Ms IHNwaW5sb2NrX3QgKmxvY2spCiB7CiAJc3RydWN0IGNsa2dhdGVfc2VwYXJhdGVkICpzY2xrOwot CXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xrX2lu aXRfZGF0YSBpbml0OwogCiAJc2NsayA9IGt6YWxsb2Moc2l6ZW9mKCpzY2xrKSwgR0ZQX0tFUk5F TCk7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9rZXlzdG9uZS9nYXRlLmMgYi9kcml2ZXJzL2Ns ay9rZXlzdG9uZS9nYXRlLmMKaW5kZXggODZmMWUzNi4uNmJiMjExYSAxMDA2NDQKLS0tIGEvZHJp dmVycy9jbGsva2V5c3RvbmUvZ2F0ZS5jCisrKyBiL2RyaXZlcnMvY2xrL2tleXN0b25lL2dhdGUu YwpAQCAtMTAsNyArMTAsNiBAQAogICogdGhlIEZyZWUgU29mdHdhcmUgRm91bmRhdGlvbjsgZWl0 aGVyIHZlcnNpb24gMiBvZiB0aGUgTGljZW5zZSwgb3IKICAqIChhdCB5b3VyIG9wdGlvbikgYW55 IGxhdGVyIHZlcnNpb24uCiAgKi8KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxs aW51eC9jbGstcHJvdmlkZXIuaD4KICNpbmNsdWRlIDxsaW51eC9lcnIuaD4KICNpbmNsdWRlIDxs aW51eC9pby5oPgpAQCAtMTYzLDcgKzE2Miw3IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgY2xrX29w cyBjbGtfcHNjX29wcyA9IHsKICAqIEBwc2NfZGF0YTogcGxhdGZvcm0gZGF0YSB0byBjb25maWd1 cmUgdGhpcyBjbG9jawogICogQGxvY2s6IHNwaW5sb2NrIHVzZWQgYnkgdGhpcyBjbG9jawogICov Ci1zdGF0aWMgc3RydWN0IGNsayAqY2xrX3JlZ2lzdGVyX3BzYyhzdHJ1Y3QgZGV2aWNlICpkZXYs CitzdGF0aWMgc3RydWN0IGNsa19jb3JlICpjbGtfcmVnaXN0ZXJfcHNjKHN0cnVjdCBkZXZpY2Ug KmRldiwKIAkJCWNvbnN0IGNoYXIgKm5hbWUsCiAJCQljb25zdCBjaGFyICpwYXJlbnRfbmFtZSwK IAkJCXN0cnVjdCBjbGtfcHNjX2RhdGEgKnBzY19kYXRhLApAQCAtMTcxLDcgKzE3MCw3IEBAIHN0 YXRpYyBzdHJ1Y3QgY2xrICpjbGtfcmVnaXN0ZXJfcHNjKHN0cnVjdCBkZXZpY2UgKmRldiwKIHsK IAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwogCXN0cnVjdCBjbGtfcHNjICpwc2M7Ci0Jc3Ry dWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCiAJcHNjID0ga3phbGxvYyhz aXplb2YoKnBzYyksIEdGUF9LRVJORUwpOwogCWlmICghcHNjKQpAQCAtMjA0LDcgKzIwMyw3IEBA IHN0YXRpYyB2b2lkIF9faW5pdCBvZl9wc2NfY2xrX2luaXQoc3RydWN0IGRldmljZV9ub2RlICpu b2RlLCBzcGlubG9ja190ICpsb2NrKQogCWNvbnN0IGNoYXIgKmNsa19uYW1lID0gbm9kZS0+bmFt ZTsKIAljb25zdCBjaGFyICpwYXJlbnRfbmFtZTsKIAlzdHJ1Y3QgY2xrX3BzY19kYXRhICpkYXRh OwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlpbnQgaTsKIAog CWRhdGEgPSBremFsbG9jKHNpemVvZigqZGF0YSksIEdGUF9LRVJORUwpOwpkaWZmIC0tZ2l0IGEv ZHJpdmVycy9jbGsva2V5c3RvbmUvcGxsLmMgYi9kcml2ZXJzL2Nsay9rZXlzdG9uZS9wbGwuYwpp bmRleCAwZGQ4YTRiLi4yZTMxODk1IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9rZXlzdG9uZS9w bGwuYworKysgYi9kcml2ZXJzL2Nsay9rZXlzdG9uZS9wbGwuYwpAQCAtMTAsNyArMTAsNiBAQAog ICogdGhlIEZyZWUgU29mdHdhcmUgRm91bmRhdGlvbjsgZWl0aGVyIHZlcnNpb24gMiBvZiB0aGUg TGljZW5zZSwgb3IKICAqIChhdCB5b3VyIG9wdGlvbikgYW55IGxhdGVyIHZlcnNpb24uCiAgKi8K LSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIuaD4K ICNpbmNsdWRlIDxsaW51eC9lcnIuaD4KICNpbmNsdWRlIDxsaW51eC9pby5oPgpAQCAtMTE2LDE0 ICsxMTUsMTQgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIGNsa19wbGxfb3BzID0gewog CS5yZWNhbGNfcmF0ZSA9IGNsa19wbGxjbGtfcmVjYWxjLAogfTsKIAotc3RhdGljIHN0cnVjdCBj bGsgKmNsa19yZWdpc3Rlcl9wbGwoc3RydWN0IGRldmljZSAqZGV2LAorc3RhdGljIHN0cnVjdCBj bGtfY29yZSAqY2xrX3JlZ2lzdGVyX3BsbChzdHJ1Y3QgZGV2aWNlICpkZXYsCiAJCQljb25zdCBj aGFyICpuYW1lLAogCQkJY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAJCQlzdHJ1Y3QgY2xrX3Bs bF9kYXRhICpwbGxfZGF0YSkKIHsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwogCXN0cnVj dCBjbGtfcGxsICpwbGw7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xr OwogCiAJcGxsID0ga3phbGxvYyhzaXplb2YoKnBsbCksIEdGUF9LRVJORUwpOwogCWlmICghcGxs KQpAQCAtMTU4LDcgKzE1Nyw3IEBAIHN0YXRpYyB2b2lkIF9faW5pdCBfb2ZfcGxsX2Nsa19pbml0 KHN0cnVjdCBkZXZpY2Vfbm9kZSAqbm9kZSwgYm9vbCBwbGxjdHJsKQogewogCXN0cnVjdCBjbGtf cGxsX2RhdGEgKnBsbF9kYXRhOwogCWNvbnN0IGNoYXIgKnBhcmVudF9uYW1lOwotCXN0cnVjdCBj bGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlpbnQgaTsKIAogCXBsbF9kYXRhID0g a3phbGxvYyhzaXplb2YoKnBsbF9kYXRhKSwgR0ZQX0tFUk5FTCk7CkBAIC0yMzksNyArMjM4LDcg QEAgc3RhdGljIHZvaWQgX19pbml0IG9mX3BsbF9kaXZfY2xrX2luaXQoc3RydWN0IGRldmljZV9u b2RlICpub2RlKQogCWNvbnN0IGNoYXIgKnBhcmVudF9uYW1lOwogCXZvaWQgX19pb21lbSAqcmVn OwogCXUzMiBzaGlmdCwgbWFzazsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3Jl ICpjbGs7CiAJY29uc3QgY2hhciAqY2xrX25hbWUgPSBub2RlLT5uYW1lOwogCiAJb2ZfcHJvcGVy dHlfcmVhZF9zdHJpbmcobm9kZSwgImNsb2NrLW91dHB1dC1uYW1lcyIsICZjbGtfbmFtZSk7CkBA IC0yODIsNyArMjgxLDcgQEAgc3RhdGljIHZvaWQgX19pbml0IG9mX3BsbF9tdXhfY2xrX2luaXQo c3RydWN0IGRldmljZV9ub2RlICpub2RlKQogewogCXZvaWQgX19pb21lbSAqcmVnOwogCXUzMiBz aGlmdCwgbWFzazsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJ Y29uc3QgY2hhciAqcGFyZW50c1syXTsKIAljb25zdCBjaGFyICpjbGtfbmFtZSA9IG5vZGUtPm5h bWU7CiAKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL21tcC9jbGstYXBiYy5jIGIvZHJpdmVycy9j bGsvbW1wL2Nsay1hcGJjLmMKaW5kZXggZDE0MTIwZS4uNGExZGU0OSAxMDA2NDQKLS0tIGEvZHJp dmVycy9jbGsvbW1wL2Nsay1hcGJjLmMKKysrIGIvZHJpdmVycy9jbGsvbW1wL2Nsay1hcGJjLmMK QEAgLTEwLDcgKzEwLDYgQEAKICAqLwogCiAjaW5jbHVkZSA8bGludXgva2VybmVsLmg+Ci0jaW5j bHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvaW8uaD4KICNpbmNsdWRlIDxsaW51 eC9lcnIuaD4KICNpbmNsdWRlIDxsaW51eC9kZWxheS5oPgpAQCAtMTIwLDEyICsxMTksMTIgQEAg c3RydWN0IGNsa19vcHMgY2xrX2FwYmNfb3BzID0gewogCS51bnByZXBhcmUgPSBjbGtfYXBiY191 bnByZXBhcmUsCiB9OwogCi1zdHJ1Y3QgY2xrICptbXBfY2xrX3JlZ2lzdGVyX2FwYmMoY29uc3Qg Y2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKm1t cF9jbGtfcmVnaXN0ZXJfYXBiYyhjb25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnRf bmFtZSwKIAkJdm9pZCBfX2lvbWVtICpiYXNlLCB1bnNpZ25lZCBpbnQgZGVsYXksCiAJCXVuc2ln bmVkIGludCBhcGJjX2ZsYWdzLCBzcGlubG9ja190ICpsb2NrKQogewogCXN0cnVjdCBjbGtfYXBi YyAqYXBiYzsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3Ry dWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAogCWFwYmMgPSBremFsbG9jKHNpemVvZigqYXBiYyks IEdGUF9LRVJORUwpOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvbW1wL2Nsay1hcG11LmMgYi9k cml2ZXJzL2Nsay9tbXAvY2xrLWFwbXUuYwppbmRleCBhYmUxODJiLi5jYmMwNzEyIDEwMDY0NAot LS0gYS9kcml2ZXJzL2Nsay9tbXAvY2xrLWFwbXUuYworKysgYi9kcml2ZXJzL2Nsay9tbXAvY2xr LWFwbXUuYwpAQCAtMTAsNyArMTAsNiBAQAogICovCiAKICNpbmNsdWRlIDxsaW51eC9rZXJuZWwu aD4KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9pby5oPgogI2luY2x1 ZGUgPGxpbnV4L2Vyci5oPgogI2luY2x1ZGUgPGxpbnV4L2RlbGF5Lmg+CkBAIC02NiwxMSArNjUs MTEgQEAgc3RydWN0IGNsa19vcHMgY2xrX2FwbXVfb3BzID0gewogCS5kaXNhYmxlID0gY2xrX2Fw bXVfZGlzYWJsZSwKIH07CiAKLXN0cnVjdCBjbGsgKm1tcF9jbGtfcmVnaXN0ZXJfYXBtdShjb25z dCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAq bW1wX2Nsa19yZWdpc3Rlcl9hcG11KGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVu dF9uYW1lLAogCQl2b2lkIF9faW9tZW0gKmJhc2UsIHUzMiBlbmFibGVfbWFzaywgc3BpbmxvY2tf dCAqbG9jaykKIHsKIAlzdHJ1Y3QgY2xrX2FwbXUgKmFwbXU7Ci0Jc3RydWN0IGNsayAqY2xrOwor CXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAlh cG11ID0ga3phbGxvYyhzaXplb2YoKmFwbXUpLCBHRlBfS0VSTkVMKTsKZGlmZiAtLWdpdCBhL2Ry aXZlcnMvY2xrL21tcC9jbGstZnJhYy5jIGIvZHJpdmVycy9jbGsvbW1wL2Nsay1mcmFjLmMKaW5k ZXggMjNhNTZmNS4uMDM4NmNkZCAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvbW1wL2Nsay1mcmFj LmMKKysrIGIvZHJpdmVycy9jbGsvbW1wL2Nsay1mcmFjLmMKQEAgLTExNiwxNCArMTE2LDE0IEBA IHN0YXRpYyBzdHJ1Y3QgY2xrX29wcyBjbGtfZmFjdG9yX29wcyA9IHsKIAkuc2V0X3JhdGUgPSBj bGtfZmFjdG9yX3NldF9yYXRlLAogfTsKIAotc3RydWN0IGNsayAqbW1wX2Nsa19yZWdpc3Rlcl9m YWN0b3IoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCitzdHJ1Y3Qg Y2xrX2NvcmUgKm1tcF9jbGtfcmVnaXN0ZXJfZmFjdG9yKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0 IGNoYXIgKnBhcmVudF9uYW1lLAogCQl1bnNpZ25lZCBsb25nIGZsYWdzLCB2b2lkIF9faW9tZW0g KmJhc2UsCiAJCXN0cnVjdCBjbGtfZmFjdG9yX21hc2tzICptYXNrcywgc3RydWN0IGNsa19mYWN0 b3JfdGJsICpmdGJsLAogCQl1bnNpZ25lZCBpbnQgZnRibF9jbnQpCiB7CiAJc3RydWN0IGNsa19m YWN0b3IgKmZhY3RvcjsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwotCXN0cnVjdCBjbGsg KmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAogCWlmICghbWFza3MpIHsKIAkJcHJfZXJy KCIlczogbXVzdCBwYXNzIGEgY2xrX2ZhY3Rvcl9tYXNrXG4iLCBfX2Z1bmNfXyk7CmRpZmYgLS1n aXQgYS9kcml2ZXJzL2Nsay9tbXAvY2xrLW1tcDIuYyBiL2RyaXZlcnMvY2xrL21tcC9jbGstbW1w Mi5jCmluZGV4IGIyNzIxY2EuLjk4YmQ3M2YgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL21tcC9j bGstbW1wMi5jCisrKyBiL2RyaXZlcnMvY2xrL21tcC9jbGstbW1wMi5jCkBAIC03Nyw4ICs3Nyw4 IEBAIHN0YXRpYyBjb25zdCBjaGFyICpjY2ljX3BhcmVudFtdID0geyJwbGwxXzIiLCAicGxsMV8x NiIsICJ2Y3RjeG8ifTsKIAogdm9pZCBfX2luaXQgbW1wMl9jbGtfaW5pdCh2b2lkKQogewotCXN0 cnVjdCBjbGsgKmNsazsKLQlzdHJ1Y3QgY2xrICp2Y3RjeG87CisJc3RydWN0IGNsa19jb3JlICpj bGs7CisJc3RydWN0IGNsa19jb3JlICp2Y3RjeG87CiAJdm9pZCBfX2lvbWVtICptcG11X2Jhc2U7 CiAJdm9pZCBfX2lvbWVtICphcG11X2Jhc2U7CiAJdm9pZCBfX2lvbWVtICphcGJjX2Jhc2U7CkBA IC0xOTIsNyArMTkyLDcgQEAgdm9pZCBfX2luaXQgbW1wMl9jbGtfaW5pdCh2b2lkKQogCQkJCW1w bXVfYmFzZSArIE1QTVVfVUFSVF9QTEwsCiAJCQkJJnVhcnRfZmFjdG9yX21hc2tzLCB1YXJ0X2Zh Y3Rvcl90YmwsCiAJCQkJQVJSQVlfU0laRSh1YXJ0X2ZhY3Rvcl90YmwpKTsKLQljbGtfc2V0X3Jh dGUoY2xrLCAxNDc0NTYwMCk7CisJY2xrX3Byb3ZpZGVyX3NldF9yYXRlKGNsaywgMTQ3NDU2MDAp OwogCWNsa19yZWdpc3Rlcl9jbGtkZXYoY2xrLCAidWFydF9wbGwiLCBOVUxMKTsKIAogCWNsayA9 IG1tcF9jbGtfcmVnaXN0ZXJfYXBiYygidHdzaTAiLCAidmN0Y3hvIiwKQEAgLTI1MSw3ICsyNTEs NyBAQCB2b2lkIF9faW5pdCBtbXAyX2Nsa19pbml0KHZvaWQpCiAJCQkJQVJSQVlfU0laRSh1YXJ0 X3BhcmVudCksCiAJCQkJQ0xLX1NFVF9SQVRFX1BBUkVOVCB8IENMS19TRVRfUkFURV9OT19SRVBB UkVOVCwKIAkJCQlhcGJjX2Jhc2UgKyBBUEJDX1VBUlQwLCA0LCAzLCAwLCAmY2xrX2xvY2spOwot CWNsa19zZXRfcGFyZW50KGNsaywgdmN0Y3hvKTsKKwljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChj bGssIHZjdGN4byk7CiAJY2xrX3JlZ2lzdGVyX2Nsa2RldihjbGssICJ1YXJ0X211eC4wIiwgTlVM TCk7CiAKIAljbGsgPSBtbXBfY2xrX3JlZ2lzdGVyX2FwYmMoInVhcnQwIiwgInVhcnQwX211eCIs CkBAIC0yNjIsNyArMjYyLDcgQEAgdm9pZCBfX2luaXQgbW1wMl9jbGtfaW5pdCh2b2lkKQogCQkJ CUFSUkFZX1NJWkUodWFydF9wYXJlbnQpLAogCQkJCUNMS19TRVRfUkFURV9QQVJFTlQgfCBDTEtf U0VUX1JBVEVfTk9fUkVQQVJFTlQsCiAJCQkJYXBiY19iYXNlICsgQVBCQ19VQVJUMSwgNCwgMywg MCwgJmNsa19sb2NrKTsKLQljbGtfc2V0X3BhcmVudChjbGssIHZjdGN4byk7CisJY2xrX3Byb3Zp ZGVyX3NldF9wYXJlbnQoY2xrLCB2Y3RjeG8pOwogCWNsa19yZWdpc3Rlcl9jbGtkZXYoY2xrLCAi dWFydF9tdXguMSIsIE5VTEwpOwogCiAJY2xrID0gbW1wX2Nsa19yZWdpc3Rlcl9hcGJjKCJ1YXJ0 MSIsICJ1YXJ0MV9tdXgiLApAQCAtMjczLDcgKzI3Myw3IEBAIHZvaWQgX19pbml0IG1tcDJfY2xr X2luaXQodm9pZCkKIAkJCQlBUlJBWV9TSVpFKHVhcnRfcGFyZW50KSwKIAkJCQlDTEtfU0VUX1JB VEVfUEFSRU5UIHwgQ0xLX1NFVF9SQVRFX05PX1JFUEFSRU5ULAogCQkJCWFwYmNfYmFzZSArIEFQ QkNfVUFSVDIsIDQsIDMsIDAsICZjbGtfbG9jayk7Ci0JY2xrX3NldF9wYXJlbnQoY2xrLCB2Y3Rj eG8pOworCWNsa19wcm92aWRlcl9zZXRfcGFyZW50KGNsaywgdmN0Y3hvKTsKIAljbGtfcmVnaXN0 ZXJfY2xrZGV2KGNsaywgInVhcnRfbXV4LjIiLCBOVUxMKTsKIAogCWNsayA9IG1tcF9jbGtfcmVn aXN0ZXJfYXBiYygidWFydDIiLCAidWFydDJfbXV4IiwKQEAgLTI4NCw3ICsyODQsNyBAQCB2b2lk IF9faW5pdCBtbXAyX2Nsa19pbml0KHZvaWQpCiAJCQkJQVJSQVlfU0laRSh1YXJ0X3BhcmVudCks CiAJCQkJQ0xLX1NFVF9SQVRFX1BBUkVOVCB8IENMS19TRVRfUkFURV9OT19SRVBBUkVOVCwKIAkJ CQlhcGJjX2Jhc2UgKyBBUEJDX1VBUlQzLCA0LCAzLCAwLCAmY2xrX2xvY2spOwotCWNsa19zZXRf cGFyZW50KGNsaywgdmN0Y3hvKTsKKwljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChjbGssIHZjdGN4 byk7CiAJY2xrX3JlZ2lzdGVyX2Nsa2RldihjbGssICJ1YXJ0X211eC4zIiwgTlVMTCk7CiAKIAlj bGsgPSBtbXBfY2xrX3JlZ2lzdGVyX2FwYmMoInVhcnQzIiwgInVhcnQzX211eCIsCmRpZmYgLS1n aXQgYS9kcml2ZXJzL2Nsay9tbXAvY2xrLXB4YTE2OC5jIGIvZHJpdmVycy9jbGsvbW1wL2Nsay1w eGExNjguYwppbmRleCAwMTQzOTZiLi5lNGY1MGFiIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9t bXAvY2xrLXB4YTE2OC5jCisrKyBiL2RyaXZlcnMvY2xrL21tcC9jbGstcHhhMTY4LmMKQEAgLTY4 LDggKzY4LDggQEAgc3RhdGljIGNvbnN0IGNoYXIgKmNjaWNfcGh5X3BhcmVudFtdID0geyJwbGwx XzYiLCAicGxsMV8xMiJ9OwogCiB2b2lkIF9faW5pdCBweGExNjhfY2xrX2luaXQodm9pZCkKIHsK LQlzdHJ1Y3QgY2xrICpjbGs7Ci0Jc3RydWN0IGNsayAqdWFydF9wbGw7CisJc3RydWN0IGNsa19j b3JlICpjbGs7CisJc3RydWN0IGNsa19jb3JlICp1YXJ0X3BsbDsKIAl2b2lkIF9faW9tZW0gKm1w bXVfYmFzZTsKIAl2b2lkIF9faW9tZW0gKmFwbXVfYmFzZTsKIAl2b2lkIF9faW9tZW0gKmFwYmNf YmFzZTsKQEAgLTE1OSw3ICsxNTksNyBAQCB2b2lkIF9faW5pdCBweGExNjhfY2xrX2luaXQodm9p ZCkKIAkJCQltcG11X2Jhc2UgKyBNUE1VX1VBUlRfUExMLAogCQkJCSZ1YXJ0X2ZhY3Rvcl9tYXNr cywgdWFydF9mYWN0b3JfdGJsLAogCQkJCUFSUkFZX1NJWkUodWFydF9mYWN0b3JfdGJsKSk7Ci0J Y2xrX3NldF9yYXRlKHVhcnRfcGxsLCAxNDc0NTYwMCk7CisJY2xrX3Byb3ZpZGVyX3NldF9yYXRl KHVhcnRfcGxsLCAxNDc0NTYwMCk7CiAJY2xrX3JlZ2lzdGVyX2Nsa2Rldih1YXJ0X3BsbCwgInVh cnRfcGxsIiwgTlVMTCk7CiAKIAljbGsgPSBtbXBfY2xrX3JlZ2lzdGVyX2FwYmMoInR3c2kwIiwg InBsbDFfMTNfMV81IiwKQEAgLTIwMiw3ICsyMDIsNyBAQCB2b2lkIF9faW5pdCBweGExNjhfY2xr X2luaXQodm9pZCkKIAkJCQlBUlJBWV9TSVpFKHVhcnRfcGFyZW50KSwKIAkJCQlDTEtfU0VUX1JB VEVfUEFSRU5UIHwgQ0xLX1NFVF9SQVRFX05PX1JFUEFSRU5ULAogCQkJCWFwYmNfYmFzZSArIEFQ QkNfVUFSVDAsIDQsIDMsIDAsICZjbGtfbG9jayk7Ci0JY2xrX3NldF9wYXJlbnQoY2xrLCB1YXJ0 X3BsbCk7CisJY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQoY2xrLCB1YXJ0X3BsbCk7CiAJY2xrX3Jl Z2lzdGVyX2Nsa2RldihjbGssICJ1YXJ0X211eC4wIiwgTlVMTCk7CiAKIAljbGsgPSBtbXBfY2xr X3JlZ2lzdGVyX2FwYmMoInVhcnQwIiwgInVhcnQwX211eCIsCkBAIC0yMTMsNyArMjEzLDcgQEAg dm9pZCBfX2luaXQgcHhhMTY4X2Nsa19pbml0KHZvaWQpCiAJCQkJQVJSQVlfU0laRSh1YXJ0X3Bh cmVudCksCiAJCQkJQ0xLX1NFVF9SQVRFX1BBUkVOVCB8IENMS19TRVRfUkFURV9OT19SRVBBUkVO VCwKIAkJCQlhcGJjX2Jhc2UgKyBBUEJDX1VBUlQxLCA0LCAzLCAwLCAmY2xrX2xvY2spOwotCWNs a19zZXRfcGFyZW50KGNsaywgdWFydF9wbGwpOworCWNsa19wcm92aWRlcl9zZXRfcGFyZW50KGNs aywgdWFydF9wbGwpOwogCWNsa19yZWdpc3Rlcl9jbGtkZXYoY2xrLCAidWFydF9tdXguMSIsIE5V TEwpOwogCiAJY2xrID0gbW1wX2Nsa19yZWdpc3Rlcl9hcGJjKCJ1YXJ0MSIsICJ1YXJ0MV9tdXgi LApAQCAtMjI0LDcgKzIyNCw3IEBAIHZvaWQgX19pbml0IHB4YTE2OF9jbGtfaW5pdCh2b2lkKQog CQkJCUFSUkFZX1NJWkUodWFydF9wYXJlbnQpLAogCQkJCUNMS19TRVRfUkFURV9QQVJFTlQgfCBD TEtfU0VUX1JBVEVfTk9fUkVQQVJFTlQsCiAJCQkJYXBiY19iYXNlICsgQVBCQ19VQVJUMiwgNCwg MywgMCwgJmNsa19sb2NrKTsKLQljbGtfc2V0X3BhcmVudChjbGssIHVhcnRfcGxsKTsKKwljbGtf cHJvdmlkZXJfc2V0X3BhcmVudChjbGssIHVhcnRfcGxsKTsKIAljbGtfcmVnaXN0ZXJfY2xrZGV2 KGNsaywgInVhcnRfbXV4LjIiLCBOVUxMKTsKIAogCWNsayA9IG1tcF9jbGtfcmVnaXN0ZXJfYXBi YygidWFydDIiLCAidWFydDJfbXV4IiwKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL21tcC9jbGst cHhhOTEwLmMgYi9kcml2ZXJzL2Nsay9tbXAvY2xrLXB4YTkxMC5jCmluZGV4IDllZmM2YTQuLmI1 YzIxNWUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL21tcC9jbGstcHhhOTEwLmMKKysrIGIvZHJp dmVycy9jbGsvbW1wL2Nsay1weGE5MTAuYwpAQCAtNjYsOCArNjYsOCBAQCBzdGF0aWMgY29uc3Qg Y2hhciAqY2NpY19waHlfcGFyZW50W10gPSB7InBsbDFfNiIsICJwbGwxXzEyIn07CiAKIHZvaWQg X19pbml0IHB4YTkxMF9jbGtfaW5pdCh2b2lkKQogewotCXN0cnVjdCBjbGsgKmNsazsKLQlzdHJ1 Y3QgY2xrICp1YXJ0X3BsbDsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKKwlzdHJ1Y3QgY2xrX2Nv cmUgKnVhcnRfcGxsOwogCXZvaWQgX19pb21lbSAqbXBtdV9iYXNlOwogCXZvaWQgX19pb21lbSAq YXBtdV9iYXNlOwogCXZvaWQgX19pb21lbSAqYXBiY3BfYmFzZTsKQEAgLTE2NCw3ICsxNjQsNyBA QCB2b2lkIF9faW5pdCBweGE5MTBfY2xrX2luaXQodm9pZCkKIAkJCQltcG11X2Jhc2UgKyBNUE1V X1VBUlRfUExMLAogCQkJCSZ1YXJ0X2ZhY3Rvcl9tYXNrcywgdWFydF9mYWN0b3JfdGJsLAogCQkJ CUFSUkFZX1NJWkUodWFydF9mYWN0b3JfdGJsKSk7Ci0JY2xrX3NldF9yYXRlKHVhcnRfcGxsLCAx NDc0NTYwMCk7CisJY2xrX3Byb3ZpZGVyX3NldF9yYXRlKHVhcnRfcGxsLCAxNDc0NTYwMCk7CiAJ Y2xrX3JlZ2lzdGVyX2Nsa2Rldih1YXJ0X3BsbCwgInVhcnRfcGxsIiwgTlVMTCk7CiAKIAljbGsg PSBtbXBfY2xrX3JlZ2lzdGVyX2FwYmMoInR3c2kwIiwgInBsbDFfMTNfMV81IiwKQEAgLTIwNyw3 ICsyMDcsNyBAQCB2b2lkIF9faW5pdCBweGE5MTBfY2xrX2luaXQodm9pZCkKIAkJCQlBUlJBWV9T SVpFKHVhcnRfcGFyZW50KSwKIAkJCQlDTEtfU0VUX1JBVEVfUEFSRU5UIHwgQ0xLX1NFVF9SQVRF X05PX1JFUEFSRU5ULAogCQkJCWFwYmNfYmFzZSArIEFQQkNfVUFSVDAsIDQsIDMsIDAsICZjbGtf bG9jayk7Ci0JY2xrX3NldF9wYXJlbnQoY2xrLCB1YXJ0X3BsbCk7CisJY2xrX3Byb3ZpZGVyX3Nl dF9wYXJlbnQoY2xrLCB1YXJ0X3BsbCk7CiAJY2xrX3JlZ2lzdGVyX2Nsa2RldihjbGssICJ1YXJ0 X211eC4wIiwgTlVMTCk7CiAKIAljbGsgPSBtbXBfY2xrX3JlZ2lzdGVyX2FwYmMoInVhcnQwIiwg InVhcnQwX211eCIsCkBAIC0yMTgsNyArMjE4LDcgQEAgdm9pZCBfX2luaXQgcHhhOTEwX2Nsa19p bml0KHZvaWQpCiAJCQkJQVJSQVlfU0laRSh1YXJ0X3BhcmVudCksCiAJCQkJQ0xLX1NFVF9SQVRF X1BBUkVOVCB8IENMS19TRVRfUkFURV9OT19SRVBBUkVOVCwKIAkJCQlhcGJjX2Jhc2UgKyBBUEJD X1VBUlQxLCA0LCAzLCAwLCAmY2xrX2xvY2spOwotCWNsa19zZXRfcGFyZW50KGNsaywgdWFydF9w bGwpOworCWNsa19wcm92aWRlcl9zZXRfcGFyZW50KGNsaywgdWFydF9wbGwpOwogCWNsa19yZWdp c3Rlcl9jbGtkZXYoY2xrLCAidWFydF9tdXguMSIsIE5VTEwpOwogCiAJY2xrID0gbW1wX2Nsa19y ZWdpc3Rlcl9hcGJjKCJ1YXJ0MSIsICJ1YXJ0MV9tdXgiLApAQCAtMjI5LDcgKzIyOSw3IEBAIHZv aWQgX19pbml0IHB4YTkxMF9jbGtfaW5pdCh2b2lkKQogCQkJCUFSUkFZX1NJWkUodWFydF9wYXJl bnQpLAogCQkJCUNMS19TRVRfUkFURV9QQVJFTlQgfCBDTEtfU0VUX1JBVEVfTk9fUkVQQVJFTlQs CiAJCQkJYXBiY3BfYmFzZSArIEFQQkNQX1VBUlQyLCA0LCAzLCAwLCAmY2xrX2xvY2spOwotCWNs a19zZXRfcGFyZW50KGNsaywgdWFydF9wbGwpOworCWNsa19wcm92aWRlcl9zZXRfcGFyZW50KGNs aywgdWFydF9wbGwpOwogCWNsa19yZWdpc3Rlcl9jbGtkZXYoY2xrLCAidWFydF9tdXguMiIsIE5V TEwpOwogCiAJY2xrID0gbW1wX2Nsa19yZWdpc3Rlcl9hcGJjKCJ1YXJ0MiIsICJ1YXJ0Ml9tdXgi LApkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvbW1wL2Nsay5oIGIvZHJpdmVycy9jbGsvbW1wL2Ns ay5oCmluZGV4IGFiODZkZDQuLjE0NzdlNjEgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL21tcC9j bGsuaAorKysgYi9kcml2ZXJzL2Nsay9tbXAvY2xrLmgKQEAgLTIwLDE1ICsyMCwxNSBAQCBzdHJ1 Y3QgY2xrX2ZhY3Rvcl90YmwgewogCXVuc2lnbmVkIGludCBkZW47CiB9OwogCi1leHRlcm4gc3Ry dWN0IGNsayAqbW1wX2Nsa19yZWdpc3Rlcl9wbGwyKGNvbnN0IGNoYXIgKm5hbWUsCitleHRlcm4g c3RydWN0IGNsa19jb3JlICptbXBfY2xrX3JlZ2lzdGVyX3BsbDIoY29uc3QgY2hhciAqbmFtZSwK IAkJY29uc3QgY2hhciAqcGFyZW50X25hbWUsIHVuc2lnbmVkIGxvbmcgZmxhZ3MpOwotZXh0ZXJu IHN0cnVjdCBjbGsgKm1tcF9jbGtfcmVnaXN0ZXJfYXBiYyhjb25zdCBjaGFyICpuYW1lLAorZXh0 ZXJuIHN0cnVjdCBjbGtfY29yZSAqbW1wX2Nsa19yZWdpc3Rlcl9hcGJjKGNvbnN0IGNoYXIgKm5h bWUsCiAJCWNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLCB2b2lkIF9faW9tZW0gKmJhc2UsCiAJCXVu c2lnbmVkIGludCBkZWxheSwgdW5zaWduZWQgaW50IGFwYmNfZmxhZ3MsIHNwaW5sb2NrX3QgKmxv Y2spOwotZXh0ZXJuIHN0cnVjdCBjbGsgKm1tcF9jbGtfcmVnaXN0ZXJfYXBtdShjb25zdCBjaGFy ICpuYW1lLAorZXh0ZXJuIHN0cnVjdCBjbGtfY29yZSAqbW1wX2Nsa19yZWdpc3Rlcl9hcG11KGNv bnN0IGNoYXIgKm5hbWUsCiAJCWNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLCB2b2lkIF9faW9tZW0g KmJhc2UsIHUzMiBlbmFibGVfbWFzaywKIAkJc3BpbmxvY2tfdCAqbG9jayk7Ci1leHRlcm4gc3Ry dWN0IGNsayAqbW1wX2Nsa19yZWdpc3Rlcl9mYWN0b3IoY29uc3QgY2hhciAqbmFtZSwKK2V4dGVy biBzdHJ1Y3QgY2xrX2NvcmUgKm1tcF9jbGtfcmVnaXN0ZXJfZmFjdG9yKGNvbnN0IGNoYXIgKm5h bWUsCiAJCWNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLCB1bnNpZ25lZCBsb25nIGZsYWdzLAogCQl2 b2lkIF9faW9tZW0gKmJhc2UsIHN0cnVjdCBjbGtfZmFjdG9yX21hc2tzICptYXNrcywKIAkJc3Ry dWN0IGNsa19mYWN0b3JfdGJsICpmdGJsLCB1bnNpZ25lZCBpbnQgZnRibF9jbnQpOwpkaWZmIC0t Z2l0IGEvZHJpdmVycy9jbGsvbXZlYnUvY2xrLWNvcmVkaXYuYyBiL2RyaXZlcnMvY2xrL212ZWJ1 L2Nsay1jb3JlZGl2LmMKaW5kZXggZDFlNTg2My4uMWJlMTVjNCAxMDA2NDQKLS0tIGEvZHJpdmVy cy9jbGsvbXZlYnUvY2xrLWNvcmVkaXYuYworKysgYi9kcml2ZXJzL2Nsay9tdmVidS9jbGstY29y ZWRpdi5jCkBAIC0yMzgsNyArMjM4LDcgQEAgbXZlYnVfY29yZWRpdl9jbGtfaW5pdChzdHJ1Y3Qg ZGV2aWNlX25vZGUgKm5vZGUsCiB7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAlzdHJ1 Y3QgY2xrX2NvcmVkaXYgKmNvcmVkaXY7Ci0Jc3RydWN0IGNsayAqKmNsa3M7CisJc3RydWN0IGNs a19jb3JlICoqY2xrczsKIAl2b2lkIF9faW9tZW0gKmJhc2U7CiAJY29uc3QgY2hhciAqcGFyZW50 X25hbWU7CiAJY29uc3QgY2hhciAqY2xrX25hbWU7CkBAIC0yNTMsNyArMjUzLDcgQEAgbXZlYnVf Y29yZWRpdl9jbGtfaW5pdChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUsCiAJY2xrX2RhdGEuY2xr X251bSA9IHNvY19kZXNjLT5uZGVzY3M7CiAKIAkvKiBjbGtzIGhvbGRzIHRoZSBjbG9jayBhcnJh eSAqLwotCWNsa3MgPSBrY2FsbG9jKGNsa19kYXRhLmNsa19udW0sIHNpemVvZihzdHJ1Y3QgY2xr ICopLAorCWNsa3MgPSBrY2FsbG9jKGNsa19kYXRhLmNsa19udW0sIHNpemVvZihzdHJ1Y3QgY2xr X2NvcmUgKiksCiAJCQkJR0ZQX0tFUk5FTCk7CiAJaWYgKFdBUk5fT04oIWNsa3MpKQogCQlnb3Rv IGVycl91bm1hcDsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL212ZWJ1L2Nsay1jcHUuYyBiL2Ry aXZlcnMvY2xrL212ZWJ1L2Nsay1jcHUuYwppbmRleCAzODIxYTg4Li41OWE0MGM3IDEwMDY0NAot LS0gYS9kcml2ZXJzL2Nsay9tdmVidS9jbGstY3B1LmMKKysrIGIvZHJpdmVycy9jbGsvbXZlYnUv Y2xrLWNwdS5jCkBAIC00MCw3ICs0MCw3IEBAIHN0cnVjdCBjcHVfY2xrIHsKIAl2b2lkIF9faW9t ZW0gKnBtdV9kZnM7CiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayAqKmNsa3M7CitzdGF0aWMgc3Ry dWN0IGNsa19jb3JlICoqY2xrczsKIAogc3RhdGljIHN0cnVjdCBjbGtfb25lY2VsbF9kYXRhIGNs a19kYXRhOwogCkBAIC0xOTUsOCArMTk1LDggQEAgc3RhdGljIHZvaWQgX19pbml0IG9mX2NwdV9j bGtfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpub2RlKQogCiAJZm9yX2VhY2hfbm9kZV9ieV90 eXBlKGRuLCAiY3B1IikgewogCQlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwotCQlzdHJ1Y3Qg Y2xrICpjbGs7Ci0JCXN0cnVjdCBjbGsgKnBhcmVudF9jbGs7CisJCXN0cnVjdCBjbGtfY29yZSAq Y2xrOworCQlzdHJ1Y3QgY2xrX2NvcmUgKnBhcmVudF9jbGs7CiAJCWNoYXIgKmNsa19uYW1lID0g a3phbGxvYyg1LCBHRlBfS0VSTkVMKTsKIAkJaW50IGNwdSwgZXJyOwogCkBAIC0yMDgsNyArMjA4 LDcgQEAgc3RhdGljIHZvaWQgX19pbml0IG9mX2NwdV9jbGtfc2V0dXAoc3RydWN0IGRldmljZV9u b2RlICpub2RlKQogCQkJZ290byBiYWlsX291dDsKIAogCQlzcHJpbnRmKGNsa19uYW1lLCAiY3B1 JWQiLCBjcHUpOwotCQlwYXJlbnRfY2xrID0gb2ZfY2xrX2dldChub2RlLCAwKTsKKwkJcGFyZW50 X2NsayA9IG9mX2Nsa19wcm92aWRlcl9nZXQobm9kZSwgMCk7CiAKIAkJY3B1Y2xrW2NwdV0ucGFy ZW50X25hbWUgPSBfX2Nsa19nZXRfbmFtZShwYXJlbnRfY2xrKTsKIAkJY3B1Y2xrW2NwdV0uY2xr X25hbWUgPSBjbGtfbmFtZTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL212ZWJ1L2NvbW1vbi5j IGIvZHJpdmVycy9jbGsvbXZlYnUvY29tbW9uLmMKaW5kZXggODE0NWM0ZS4uZjZlMTRmOCAxMDA2 NDQKLS0tIGEvZHJpdmVycy9jbGsvbXZlYnUvY29tbW9uLmMKKysrIGIvZHJpdmVycy9jbGsvbXZl YnUvY29tbW9uLmMKQEAgLTEzLDcgKzEzLDYgQEAKICAqLwogCiAjaW5jbHVkZSA8bGludXgva2Vy bmVsLmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrZGV2Lmg+ CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5jbHVkZSA8bGludXgvaW8uaD4K QEAgLTQzLDcgKzQyLDcgQEAgdm9pZCBfX2luaXQgbXZlYnVfY29yZWNsa19zZXR1cChzdHJ1Y3Qg ZGV2aWNlX25vZGUgKm5wLAogCiAJLyogQWxsb2NhdGUgc3RydWN0IGZvciBUQ0xLLCBjcHUgY2xr LCBhbmQgY29yZSByYXRpbyBjbG9ja3MgKi8KIAljbGtfZGF0YS5jbGtfbnVtID0gMiArIGRlc2Mt Pm51bV9yYXRpb3M7Ci0JY2xrX2RhdGEuY2xrcyA9IGt6YWxsb2MoY2xrX2RhdGEuY2xrX251bSAq IHNpemVvZihzdHJ1Y3QgY2xrICopLAorCWNsa19kYXRhLmNsa3MgPSBremFsbG9jKGNsa19kYXRh LmNsa19udW0gKiBzaXplb2Yoc3RydWN0IGNsa19jb3JlICopLAogCQkJCUdGUF9LRVJORUwpOwog CWlmIChXQVJOX09OKCFjbGtfZGF0YS5jbGtzKSkgewogCQlpb3VubWFwKGJhc2UpOwpAQCAtOTMs MTMgKzkyLDEzIEBAIERFRklORV9TUElOTE9DSyhjdHJsX2dhdGluZ19sb2NrKTsKIAogc3RydWN0 IGNsa19nYXRpbmdfY3RybCB7CiAJc3BpbmxvY2tfdCAqbG9jazsKLQlzdHJ1Y3QgY2xrICoqZ2F0 ZXM7CisJc3RydWN0IGNsa19jb3JlICoqZ2F0ZXM7CiAJaW50IG51bV9nYXRlczsKIH07CiAKICNk ZWZpbmUgdG9fY2xrX2dhdGUoX2h3KSBjb250YWluZXJfb2YoX2h3LCBzdHJ1Y3QgY2xrX2dhdGUs IGh3KQogCi1zdGF0aWMgc3RydWN0IGNsayAqY2xrX2dhdGluZ19nZXRfc3JjKAorc3RhdGljIHN0 cnVjdCBjbGtfY29yZSAqY2xrX2dhdGluZ19nZXRfc3JjKAogCXN0cnVjdCBvZl9waGFuZGxlX2Fy Z3MgKmNsa3NwZWMsIHZvaWQgKmRhdGEpCiB7CiAJc3RydWN0IGNsa19nYXRpbmdfY3RybCAqY3Ry bCA9IChzdHJ1Y3QgY2xrX2dhdGluZ19jdHJsICopZGF0YTsKQEAgLTEyMSw3ICsxMjAsNyBAQCB2 b2lkIF9faW5pdCBtdmVidV9jbGtfZ2F0aW5nX3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnAs CiAJCQkJICAgY29uc3Qgc3RydWN0IGNsa19nYXRpbmdfc29jX2Rlc2MgKmRlc2MpCiB7CiAJc3Ry dWN0IGNsa19nYXRpbmdfY3RybCAqY3RybDsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNs a19jb3JlICpjbGs7CiAJdm9pZCBfX2lvbWVtICpiYXNlOwogCWNvbnN0IGNoYXIgKmRlZmF1bHRf cGFyZW50ID0gTlVMTDsKIAlpbnQgbjsKQEAgLTEzMCwxMCArMTI5LDEwIEBAIHZvaWQgX19pbml0 IG12ZWJ1X2Nsa19nYXRpbmdfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpucCwKIAlpZiAoV0FS Tl9PTighYmFzZSkpCiAJCXJldHVybjsKIAotCWNsayA9IG9mX2Nsa19nZXQobnAsIDApOworCWNs ayA9IG9mX2Nsa19wcm92aWRlcl9nZXQobnAsIDApOwogCWlmICghSVNfRVJSKGNsaykpIHsKIAkJ ZGVmYXVsdF9wYXJlbnQgPSBfX2Nsa19nZXRfbmFtZShjbGspOwotCQljbGtfcHV0KGNsayk7CisJ CV9fY2xrX3B1dChjbGspOwogCX0KIAogCWN0cmwgPSBremFsbG9jKHNpemVvZigqY3RybCksIEdG UF9LRVJORUwpOwpAQCAtMTQ4LDcgKzE0Nyw3IEBAIHZvaWQgX19pbml0IG12ZWJ1X2Nsa19nYXRp bmdfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpucCwKIAkJbisrOwogCiAJY3RybC0+bnVtX2dh dGVzID0gbjsKLQljdHJsLT5nYXRlcyA9IGt6YWxsb2MoY3RybC0+bnVtX2dhdGVzICogc2l6ZW9m KHN0cnVjdCBjbGsgKiksCisJY3RybC0+Z2F0ZXMgPSBremFsbG9jKGN0cmwtPm51bV9nYXRlcyAq IHNpemVvZihzdHJ1Y3QgY2xrX2NvcmUgKiksCiAJCQkgICAgICBHRlBfS0VSTkVMKTsKIAlpZiAo V0FSTl9PTighY3RybC0+Z2F0ZXMpKQogCQlnb3RvIGdhdGVzX291dDsKZGlmZiAtLWdpdCBhL2Ry aXZlcnMvY2xrL212ZWJ1L2tpcmt3b29kLmMgYi9kcml2ZXJzL2Nsay9tdmVidS9raXJrd29vZC5j CmluZGV4IDk5NTUwZjIuLjVkMDk3OGIgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL212ZWJ1L2tp cmt3b29kLmMKKysrIGIvZHJpdmVycy9jbGsvbXZlYnUva2lya3dvb2QuYwpAQCAtMjQyLDcgKzI0 Miw3IEBAIHN0cnVjdCBjbGtfbXV4aW5nX3NvY19kZXNjIHsKIAogc3RydWN0IGNsa19tdXhpbmdf Y3RybCB7CiAJc3BpbmxvY2tfdCAqbG9jazsKLQlzdHJ1Y3QgY2xrICoqbXV4ZXM7CisJc3RydWN0 IGNsa19jb3JlICoqbXV4ZXM7CiAJaW50IG51bV9tdXhlczsKIH07CiAKQEAgLTI1OCw3ICsyNTgs NyBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGNsa19tdXhpbmdfc29jX2Rlc2Mga2lya3dvb2RfbXV4 X2Rlc2NbXSBfX2luaXRjb25zdCA9IHsKIAogI2RlZmluZSB0b19jbGtfbXV4KF9odykgY29udGFp bmVyX29mKF9odywgc3RydWN0IGNsa19tdXgsIGh3KQogCi1zdGF0aWMgc3RydWN0IGNsayAqY2xr X211eGluZ19nZXRfc3JjKAorc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqY2xrX211eGluZ19nZXRf c3JjKAogCXN0cnVjdCBvZl9waGFuZGxlX2FyZ3MgKmNsa3NwZWMsIHZvaWQgKmRhdGEpCiB7CiAJ c3RydWN0IGNsa19tdXhpbmdfY3RybCAqY3RybCA9IChzdHJ1Y3QgY2xrX211eGluZ19jdHJsICop ZGF0YTsKQEAgLTI5OSw3ICsyOTksNyBAQCBzdGF0aWMgdm9pZCBfX2luaXQga2lya3dvb2RfY2xr X211eGluZ19zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wLAogCQluKys7CiAKIAljdHJsLT5u dW1fbXV4ZXMgPSBuOwotCWN0cmwtPm11eGVzID0ga2NhbGxvYyhjdHJsLT5udW1fbXV4ZXMsIHNp emVvZihzdHJ1Y3QgY2xrICopLAorCWN0cmwtPm11eGVzID0ga2NhbGxvYyhjdHJsLT5udW1fbXV4 ZXMsIHNpemVvZihzdHJ1Y3QgY2xrX2NvcmUgKiksCiAJCQlHRlBfS0VSTkVMKTsKIAlpZiAoV0FS Tl9PTighY3RybC0+bXV4ZXMpKQogCQlnb3RvIG11eGVzX291dDsKZGlmZiAtLWdpdCBhL2RyaXZl cnMvY2xrL214cy9jbGstZGl2LmMgYi9kcml2ZXJzL2Nsay9teHMvY2xrLWRpdi5jCmluZGV4IDkw ZTFkYTkuLjczY2ExZTggMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL214cy9jbGstZGl2LmMKKysr IGIvZHJpdmVycy9jbGsvbXhzL2Nsay1kaXYuYwpAQCAtOSw3ICs5LDYgQEAKICAqIGh0dHA6Ly93 d3cuZ251Lm9yZy9jb3B5bGVmdC9ncGwuaHRtbAogICovCiAKLSNpbmNsdWRlIDxsaW51eC9jbGsu aD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIuaD4KICNpbmNsdWRlIDxsaW51eC9lcnIu aD4KICNpbmNsdWRlIDxsaW51eC9zbGFiLmg+CkBAIC03NCwxMSArNzMsMTEgQEAgc3RhdGljIHN0 cnVjdCBjbGtfb3BzIGNsa19kaXZfb3BzID0gewogCS5zZXRfcmF0ZSA9IGNsa19kaXZfc2V0X3Jh dGUsCiB9OwogCi1zdHJ1Y3QgY2xrICpteHNfY2xrX2Rpdihjb25zdCBjaGFyICpuYW1lLCBjb25z dCBjaGFyICpwYXJlbnRfbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqbXhzX2Nsa19kaXYoY29uc3Qg Y2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAJCQl2b2lkIF9faW9tZW0gKnJl ZywgdTggc2hpZnQsIHU4IHdpZHRoLCB1OCBidXN5KQogewogCXN0cnVjdCBjbGtfZGl2ICpkaXY7 Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtf aW5pdF9kYXRhIGluaXQ7CiAKIAlkaXYgPSBremFsbG9jKHNpemVvZigqZGl2KSwgR0ZQX0tFUk5F TCk7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9teHMvY2xrLWZyYWMuYyBiL2RyaXZlcnMvY2xr L214cy9jbGstZnJhYy5jCmluZGV4IGU2YWE2YjUuLjY1Y2VkZjggMTAwNjQ0Ci0tLSBhL2RyaXZl cnMvY2xrL214cy9jbGstZnJhYy5jCisrKyBiL2RyaXZlcnMvY2xrL214cy9jbGstZnJhYy5jCkBA IC05LDcgKzksNiBAQAogICogaHR0cDovL3d3dy5nbnUub3JnL2NvcHlsZWZ0L2dwbC5odG1sCiAg Ki8KIAotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRl ci5oPgogI2luY2x1ZGUgPGxpbnV4L2Vyci5oPgogI2luY2x1ZGUgPGxpbnV4L2lvLmg+CkBAIC0x MDgsMTEgKzEwNywxMSBAQCBzdGF0aWMgc3RydWN0IGNsa19vcHMgY2xrX2ZyYWNfb3BzID0gewog CS5zZXRfcmF0ZSA9IGNsa19mcmFjX3NldF9yYXRlLAogfTsKIAotc3RydWN0IGNsayAqbXhzX2Ns a19mcmFjKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAorc3RydWN0 IGNsa19jb3JlICpteHNfY2xrX2ZyYWMoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFy ZW50X25hbWUsCiAJCQkgdm9pZCBfX2lvbWVtICpyZWcsIHU4IHNoaWZ0LCB1OCB3aWR0aCwgdTgg YnVzeSkKIHsKIAlzdHJ1Y3QgY2xrX2ZyYWMgKmZyYWM7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0 cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAlmcmFj ID0ga3phbGxvYyhzaXplb2YoKmZyYWMpLCBHRlBfS0VSTkVMKTsKZGlmZiAtLWdpdCBhL2RyaXZl cnMvY2xrL214cy9jbGstaW14MjMuYyBiL2RyaXZlcnMvY2xrL214cy9jbGstaW14MjMuYwppbmRl eCA5ZmM5MzU5Li40M2YyZDMxIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9teHMvY2xrLWlteDIz LmMKKysrIGIvZHJpdmVycy9jbGsvbXhzL2Nsay1pbXgyMy5jCkBAIC05LDcgKzksNiBAQAogICog aHR0cDovL3d3dy5nbnUub3JnL2NvcHlsZWZ0L2dwbC5odG1sCiAgKi8KIAotI2luY2x1ZGUgPGxp bnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay9teHMuaD4KICNpbmNsdWRlIDxsaW51eC9j bGtkZXYuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIuaD4KQEAgLTk0LDcgKzkzLDcg QEAgZW51bSBpbXgyM19jbGsgewogCWNsa19tYXgKIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICpj bGtzW2Nsa19tYXhdOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqY2xrc1tjbGtfbWF4XTsKIHN0 YXRpYyBzdHJ1Y3QgY2xrX29uZWNlbGxfZGF0YSBjbGtfZGF0YTsKIAogc3RhdGljIGVudW0gaW14 MjNfY2xrIGNsa3NfaW5pdF9vbltdIF9faW5pdGRhdGEgPSB7CkBAIC0xNzEsNyArMTcwLDcgQEAg c3RhdGljIHZvaWQgX19pbml0IG14MjNfY2xvY2tzX2luaXQoc3RydWN0IGRldmljZV9ub2RlICpu cCkKIAlvZl9jbGtfYWRkX3Byb3ZpZGVyKG5wLCBvZl9jbGtfc3JjX29uZWNlbGxfZ2V0LCAmY2xr X2RhdGEpOwogCiAJZm9yIChpID0gMDsgaSA8IEFSUkFZX1NJWkUoY2xrc19pbml0X29uKTsgaSsr KQotCQljbGtfcHJlcGFyZV9lbmFibGUoY2xrc1tjbGtzX2luaXRfb25baV1dKTsKKwkJY2xrX3By b3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsa3NbY2xrc19pbml0X29uW2ldXSk7CiAKIH0KIENMS19P Rl9ERUNMQVJFKGlteDIzX2Nsa2N0cmwsICJmc2wsaW14MjMtY2xrY3RybCIsIG14MjNfY2xvY2tz X2luaXQpOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvbXhzL2Nsay1pbXgyOC5jIGIvZHJpdmVy cy9jbGsvbXhzL2Nsay1pbXgyOC5jCmluZGV4IGE2YzM1MDEuLmU2ZDcwYWMgMTAwNjQ0Ci0tLSBh L2RyaXZlcnMvY2xrL214cy9jbGstaW14MjguYworKysgYi9kcml2ZXJzL2Nsay9teHMvY2xrLWlt eDI4LmMKQEAgLTksNyArOSw2IEBACiAgKiBodHRwOi8vd3d3LmdudS5vcmcvY29weWxlZnQvZ3Bs Lmh0bWwKICAqLwogCi0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvY2xr L214cy5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsa2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay1w cm92aWRlci5oPgpAQCAtMTQ4LDcgKzE0Nyw3IEBAIGVudW0gaW14MjhfY2xrIHsKIAljbGtfbWF4 CiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayAqY2xrc1tjbGtfbWF4XTsKK3N0YXRpYyBzdHJ1Y3Qg Y2xrX2NvcmUgKmNsa3NbY2xrX21heF07CiBzdGF0aWMgc3RydWN0IGNsa19vbmVjZWxsX2RhdGEg Y2xrX2RhdGE7CiAKIHN0YXRpYyBlbnVtIGlteDI4X2NsayBjbGtzX2luaXRfb25bXSBfX2luaXRk YXRhID0gewpAQCAtMjUwLDYgKzI0OSw2IEBAIHN0YXRpYyB2b2lkIF9faW5pdCBteDI4X2Nsb2Nr c19pbml0KHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnApCiAJY2xrX3JlZ2lzdGVyX2Nsa2RldihjbGtz W2VuZXRfb3V0XSwgTlVMTCwgImVuZXRfb3V0Iik7CiAKIAlmb3IgKGkgPSAwOyBpIDwgQVJSQVlf U0laRShjbGtzX2luaXRfb24pOyBpKyspCi0JCWNsa19wcmVwYXJlX2VuYWJsZShjbGtzW2Nsa3Nf aW5pdF9vbltpXV0pOworCQljbGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUoY2xrc1tjbGtzX2lu aXRfb25baV1dKTsKIH0KIENMS19PRl9ERUNMQVJFKGlteDI4X2Nsa2N0cmwsICJmc2wsaW14Mjgt Y2xrY3RybCIsIG14MjhfY2xvY2tzX2luaXQpOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvbXhz L2Nsay1wbGwuYyBiL2RyaXZlcnMvY2xrL214cy9jbGstcGxsLmMKaW5kZXggZmFkYWU0MS4uZTBm OTRhYyAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvbXhzL2Nsay1wbGwuYworKysgYi9kcml2ZXJz L2Nsay9teHMvY2xrLXBsbC5jCkBAIC05LDcgKzksNiBAQAogICogaHR0cDovL3d3dy5nbnUub3Jn L2NvcHlsZWZ0L2dwbC5odG1sCiAgKi8KIAotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1 ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxpbnV4L2RlbGF5Lmg+CiAjaW5j bHVkZSA8bGludXgvZXJyLmg+CkBAIC04NiwxMSArODUsMTEgQEAgc3RhdGljIGNvbnN0IHN0cnVj dCBjbGtfb3BzIGNsa19wbGxfb3BzID0gewogCS5yZWNhbGNfcmF0ZSA9IGNsa19wbGxfcmVjYWxj X3JhdGUsCiB9OwogCi1zdHJ1Y3QgY2xrICpteHNfY2xrX3BsbChjb25zdCBjaGFyICpuYW1lLCBj b25zdCBjaGFyICpwYXJlbnRfbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqbXhzX2Nsa19wbGwoY29u c3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAJCQl2b2lkIF9faW9tZW0g KmJhc2UsIHU4IHBvd2VyLCB1bnNpZ25lZCBsb25nIHJhdGUpCiB7CiAJc3RydWN0IGNsa19wbGwg KnBsbDsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0 IGNsa19pbml0X2RhdGEgaW5pdDsKIAogCXBsbCA9IGt6YWxsb2Moc2l6ZW9mKCpwbGwpLCBHRlBf S0VSTkVMKTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL214cy9jbGstcmVmLmMgYi9kcml2ZXJz L2Nsay9teHMvY2xrLXJlZi5jCmluZGV4IDRhZGVlZDYuLmFmNzVjM2YgMTAwNjQ0Ci0tLSBhL2Ry aXZlcnMvY2xrL214cy9jbGstcmVmLmMKKysrIGIvZHJpdmVycy9jbGsvbXhzL2Nsay1yZWYuYwpA QCAtOSw3ICs5LDYgQEAKICAqIGh0dHA6Ly93d3cuZ251Lm9yZy9jb3B5bGVmdC9ncGwuaHRtbAog ICovCiAKLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlk ZXIuaD4KICNpbmNsdWRlIDxsaW51eC9lcnIuaD4KICNpbmNsdWRlIDxsaW51eC9pby5oPgpAQCAt MTI1LDExICsxMjQsMTEgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIGNsa19yZWZfb3Bz ID0gewogCS5zZXRfcmF0ZQk9IGNsa19yZWZfc2V0X3JhdGUsCiB9OwogCi1zdHJ1Y3QgY2xrICpt eHNfY2xrX3JlZihjb25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKK3N0 cnVjdCBjbGtfY29yZSAqbXhzX2Nsa19yZWYoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAq cGFyZW50X25hbWUsCiAJCQl2b2lkIF9faW9tZW0gKnJlZywgdTggaWR4KQogewogCXN0cnVjdCBj bGtfcmVmICpyZWY7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwog CXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAlyZWYgPSBremFsbG9jKHNpemVvZigqcmVm KSwgR0ZQX0tFUk5FTCk7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9teHMvY2xrLmggYi9kcml2 ZXJzL2Nsay9teHMvY2xrLmgKaW5kZXggZWYxMGFkOS4uMTliOWRjMyAxMDA2NDQKLS0tIGEvZHJp dmVycy9jbGsvbXhzL2Nsay5oCisrKyBiL2RyaXZlcnMvY2xrL214cy9jbGsuaApAQCAtMTIsNyAr MTIsNiBAQAogI2lmbmRlZiBfX01YU19DTEtfSAogI2RlZmluZSBfX01YU19DTEtfSAogCi0jaW5j bHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5j bHVkZSA8bGludXgvc3BpbmxvY2suaD4KIApAQCAtMjMsMjQgKzIyLDI0IEBAIGV4dGVybiBzcGlu bG9ja190IG14c19sb2NrOwogCiBpbnQgbXhzX2Nsa193YWl0KHZvaWQgX19pb21lbSAqcmVnLCB1 OCBzaGlmdCk7CiAKLXN0cnVjdCBjbGsgKm14c19jbGtfcGxsKGNvbnN0IGNoYXIgKm5hbWUsIGNv bnN0IGNoYXIgKnBhcmVudF9uYW1lLAorc3RydWN0IGNsa19jb3JlICpteHNfY2xrX3BsbChjb25z dCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJCXZvaWQgX19pb21lbSAq YmFzZSwgdTggcG93ZXIsIHVuc2lnbmVkIGxvbmcgcmF0ZSk7CiAKLXN0cnVjdCBjbGsgKm14c19j bGtfcmVmKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAorc3RydWN0 IGNsa19jb3JlICpteHNfY2xrX3JlZihjb25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJl bnRfbmFtZSwKIAkJCXZvaWQgX19pb21lbSAqcmVnLCB1OCBpZHgpOwogCi1zdHJ1Y3QgY2xrICpt eHNfY2xrX2Rpdihjb25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKK3N0 cnVjdCBjbGtfY29yZSAqbXhzX2Nsa19kaXYoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAq cGFyZW50X25hbWUsCiAJCQl2b2lkIF9faW9tZW0gKnJlZywgdTggc2hpZnQsIHU4IHdpZHRoLCB1 OCBidXN5KTsKIAotc3RydWN0IGNsayAqbXhzX2Nsa19mcmFjKGNvbnN0IGNoYXIgKm5hbWUsIGNv bnN0IGNoYXIgKnBhcmVudF9uYW1lLAorc3RydWN0IGNsa19jb3JlICpteHNfY2xrX2ZyYWMoY29u c3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAJCQkgdm9pZCBfX2lvbWVt ICpyZWcsIHU4IHNoaWZ0LCB1OCB3aWR0aCwgdTggYnVzeSk7CiAKLXN0YXRpYyBpbmxpbmUgc3Ry dWN0IGNsayAqbXhzX2Nsa19maXhlZChjb25zdCBjaGFyICpuYW1lLCBpbnQgcmF0ZSkKK3N0YXRp YyBpbmxpbmUgc3RydWN0IGNsa19jb3JlICpteHNfY2xrX2ZpeGVkKGNvbnN0IGNoYXIgKm5hbWUs IGludCByYXRlKQogewogCXJldHVybiBjbGtfcmVnaXN0ZXJfZml4ZWRfcmF0ZShOVUxMLCBuYW1l LCBOVUxMLCBDTEtfSVNfUk9PVCwgcmF0ZSk7CiB9CiAKLXN0YXRpYyBpbmxpbmUgc3RydWN0IGNs ayAqbXhzX2Nsa19nYXRlKGNvbnN0IGNoYXIgKm5hbWUsCitzdGF0aWMgaW5saW5lIHN0cnVjdCBj bGtfY29yZSAqbXhzX2Nsa19nYXRlKGNvbnN0IGNoYXIgKm5hbWUsCiAJCQljb25zdCBjaGFyICpw YXJlbnRfbmFtZSwgdm9pZCBfX2lvbWVtICpyZWcsIHU4IHNoaWZ0KQogewogCXJldHVybiBjbGtf cmVnaXN0ZXJfZ2F0ZShOVUxMLCBuYW1lLCBwYXJlbnRfbmFtZSwgQ0xLX1NFVF9SQVRFX1BBUkVO VCwKQEAgLTQ4LDcgKzQ3LDcgQEAgc3RhdGljIGlubGluZSBzdHJ1Y3QgY2xrICpteHNfY2xrX2dh dGUoY29uc3QgY2hhciAqbmFtZSwKIAkJCQkgJm14c19sb2NrKTsKIH0KIAotc3RhdGljIGlubGlu ZSBzdHJ1Y3QgY2xrICpteHNfY2xrX211eChjb25zdCBjaGFyICpuYW1lLCB2b2lkIF9faW9tZW0g KnJlZywKK3N0YXRpYyBpbmxpbmUgc3RydWN0IGNsa19jb3JlICpteHNfY2xrX211eChjb25zdCBj aGFyICpuYW1lLCB2b2lkIF9faW9tZW0gKnJlZywKIAkJdTggc2hpZnQsIHU4IHdpZHRoLCBjb25z dCBjaGFyICoqcGFyZW50X25hbWVzLCBpbnQgbnVtX3BhcmVudHMpCiB7CiAJcmV0dXJuIGNsa19y ZWdpc3Rlcl9tdXgoTlVMTCwgbmFtZSwgcGFyZW50X25hbWVzLCBudW1fcGFyZW50cywKQEAgLTU2 LDcgKzU1LDcgQEAgc3RhdGljIGlubGluZSBzdHJ1Y3QgY2xrICpteHNfY2xrX211eChjb25zdCBj aGFyICpuYW1lLCB2b2lkIF9faW9tZW0gKnJlZywKIAkJCQlyZWcsIHNoaWZ0LCB3aWR0aCwgMCwg Jm14c19sb2NrKTsKIH0KIAotc3RhdGljIGlubGluZSBzdHJ1Y3QgY2xrICpteHNfY2xrX2ZpeGVk X2ZhY3Rvcihjb25zdCBjaGFyICpuYW1lLAorc3RhdGljIGlubGluZSBzdHJ1Y3QgY2xrX2NvcmUg Km14c19jbGtfZml4ZWRfZmFjdG9yKGNvbnN0IGNoYXIgKm5hbWUsCiAJCWNvbnN0IGNoYXIgKnBh cmVudF9uYW1lLCB1bnNpZ25lZCBpbnQgbXVsdCwgdW5zaWduZWQgaW50IGRpdikKIHsKIAlyZXR1 cm4gY2xrX3JlZ2lzdGVyX2ZpeGVkX2ZhY3RvcihOVUxMLCBuYW1lLCBwYXJlbnRfbmFtZSwKZGlm ZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3Fjb20vY2xrLXJjZy5jIGIvZHJpdmVycy9jbGsvcWNvbS9j bGstcmNnLmMKaW5kZXggYjYzOGM1OC4uNTlmMTE4YyAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsv cWNvbS9jbGstcmNnLmMKKysrIGIvZHJpdmVycy9jbGsvcWNvbS9jbGstcmNnLmMKQEAgLTM3NSw3 ICszNzUsNyBAQCBzdHJ1Y3QgZnJlcV90YmwgKmZpbmRfZnJlcShjb25zdCBzdHJ1Y3QgZnJlcV90 YmwgKmYsIHVuc2lnbmVkIGxvbmcgcmF0ZSkKIAogc3RhdGljIGxvbmcgX2ZyZXFfdGJsX2RldGVy bWluZV9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LAogCQljb25zdCBzdHJ1Y3QgZnJlcV90YmwgKmYs IHVuc2lnbmVkIGxvbmcgcmF0ZSwKLQkJdW5zaWduZWQgbG9uZyAqcF9yYXRlLCBzdHJ1Y3QgY2xr ICoqcCkKKwkJdW5zaWduZWQgbG9uZyAqcF9yYXRlLCBzdHJ1Y3QgY2xrX2NvcmUgKipwKQogewog CXVuc2lnbmVkIGxvbmcgY2xrX2ZsYWdzOwogCkBAIC00MDIsNyArNDAyLDcgQEAgc3RhdGljIGxv bmcgX2ZyZXFfdGJsX2RldGVybWluZV9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LAogfQogCiBzdGF0 aWMgbG9uZyBjbGtfcmNnX2RldGVybWluZV9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25l ZCBsb25nIHJhdGUsCi0JCXVuc2lnbmVkIGxvbmcgKnBfcmF0ZSwgc3RydWN0IGNsayAqKnApCisJ CXVuc2lnbmVkIGxvbmcgKnBfcmF0ZSwgc3RydWN0IGNsa19jb3JlICoqcCkKIHsKIAlzdHJ1Y3Qg Y2xrX3JjZyAqcmNnID0gdG9fY2xrX3JjZyhodyk7CiAKQEAgLTQxMCw3ICs0MTAsNyBAQCBzdGF0 aWMgbG9uZyBjbGtfcmNnX2RldGVybWluZV9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25l ZCBsb25nIHJhdGUsCiB9CiAKIHN0YXRpYyBsb25nIGNsa19keW5fcmNnX2RldGVybWluZV9yYXRl KHN0cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25lZCBsb25nIHJhdGUsCi0JCXVuc2lnbmVkIGxvbmcg KnBfcmF0ZSwgc3RydWN0IGNsayAqKnApCisJCXVuc2lnbmVkIGxvbmcgKnBfcmF0ZSwgc3RydWN0 IGNsa19jb3JlICoqcCkKIHsKIAlzdHJ1Y3QgY2xrX2R5bl9yY2cgKnJjZyA9IHRvX2Nsa19keW5f cmNnKGh3KTsKIApAQCAtNDE4LDcgKzQxOCw3IEBAIHN0YXRpYyBsb25nIGNsa19keW5fcmNnX2Rl dGVybWluZV9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25lZCBsb25nIHJhdGUsCiB9CiAK IHN0YXRpYyBsb25nIGNsa19yY2dfYnlwYXNzX2RldGVybWluZV9yYXRlKHN0cnVjdCBjbGtfaHcg Kmh3LCB1bnNpZ25lZCBsb25nIHJhdGUsCi0JCXVuc2lnbmVkIGxvbmcgKnBfcmF0ZSwgc3RydWN0 IGNsayAqKnApCisJCXVuc2lnbmVkIGxvbmcgKnBfcmF0ZSwgc3RydWN0IGNsa19jb3JlICoqcCkK IHsKIAlzdHJ1Y3QgY2xrX3JjZyAqcmNnID0gdG9fY2xrX3JjZyhodyk7CiAJY29uc3Qgc3RydWN0 IGZyZXFfdGJsICpmID0gcmNnLT5mcmVxX3RibDsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3Fj b20vY2xrLXJjZzIuYyBiL2RyaXZlcnMvY2xrL3Fjb20vY2xrLXJjZzIuYwppbmRleCBjZDE4NWQ1 Li42YWFjMWVjIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9xY29tL2Nsay1yY2cyLmMKKysrIGIv ZHJpdmVycy9jbGsvcWNvbS9jbGstcmNnMi5jCkBAIC0xODgsNyArMTg4LDcgQEAgc3RydWN0IGZy ZXFfdGJsICpmaW5kX2ZyZXEoY29uc3Qgc3RydWN0IGZyZXFfdGJsICpmLCB1bnNpZ25lZCBsb25n IHJhdGUpCiAKIHN0YXRpYyBsb25nIF9mcmVxX3RibF9kZXRlcm1pbmVfcmF0ZShzdHJ1Y3QgY2xr X2h3ICpodywKIAkJY29uc3Qgc3RydWN0IGZyZXFfdGJsICpmLCB1bnNpZ25lZCBsb25nIHJhdGUs Ci0JCXVuc2lnbmVkIGxvbmcgKnBfcmF0ZSwgc3RydWN0IGNsayAqKnApCisJCXVuc2lnbmVkIGxv bmcgKnBfcmF0ZSwgc3RydWN0IGNsa19jb3JlICoqcCkKIHsKIAl1bnNpZ25lZCBsb25nIGNsa19m bGFnczsKIApAQCAtMjE5LDcgKzIxOSw3IEBAIHN0YXRpYyBsb25nIF9mcmVxX3RibF9kZXRlcm1p bmVfcmF0ZShzdHJ1Y3QgY2xrX2h3ICpodywKIH0KIAogc3RhdGljIGxvbmcgY2xrX3JjZzJfZGV0 ZXJtaW5lX3JhdGUoc3RydWN0IGNsa19odyAqaHcsIHVuc2lnbmVkIGxvbmcgcmF0ZSwKLQkJdW5z aWduZWQgbG9uZyAqcF9yYXRlLCBzdHJ1Y3QgY2xrICoqcCkKKwkJdW5zaWduZWQgbG9uZyAqcF9y YXRlLCBzdHJ1Y3QgY2xrX2NvcmUgKipwKQogewogCXN0cnVjdCBjbGtfcmNnMiAqcmNnID0gdG9f Y2xrX3JjZzIoaHcpOwogCkBAIC0zNzIsNyArMzcyLDcgQEAgc3RhdGljIGludCBjbGtfZWRwX3Bp eGVsX3NldF9yYXRlX2FuZF9wYXJlbnQoc3RydWN0IGNsa19odyAqaHcsCiB9CiAKIHN0YXRpYyBs b25nIGNsa19lZHBfcGl4ZWxfZGV0ZXJtaW5lX3JhdGUoc3RydWN0IGNsa19odyAqaHcsIHVuc2ln bmVkIGxvbmcgcmF0ZSwKLQkJCQkgdW5zaWduZWQgbG9uZyAqcF9yYXRlLCBzdHJ1Y3QgY2xrICoq cCkKKwkJCQkgdW5zaWduZWQgbG9uZyAqcF9yYXRlLCBzdHJ1Y3QgY2xrX2NvcmUgKipwKQogewog CXN0cnVjdCBjbGtfcmNnMiAqcmNnID0gdG9fY2xrX3JjZzIoaHcpOwogCWNvbnN0IHN0cnVjdCBm cmVxX3RibCAqZiA9IHJjZy0+ZnJlcV90Ymw7CkBAIC00MjMsNyArNDIzLDcgQEAgY29uc3Qgc3Ry dWN0IGNsa19vcHMgY2xrX2VkcF9waXhlbF9vcHMgPSB7CiBFWFBPUlRfU1lNQk9MX0dQTChjbGtf ZWRwX3BpeGVsX29wcyk7CiAKIHN0YXRpYyBsb25nIGNsa19ieXRlX2RldGVybWluZV9yYXRlKHN0 cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25lZCBsb25nIHJhdGUsCi0JCQkgdW5zaWduZWQgbG9uZyAq cF9yYXRlLCBzdHJ1Y3QgY2xrICoqcCkKKwkJCSB1bnNpZ25lZCBsb25nICpwX3JhdGUsIHN0cnVj dCBjbGtfY29yZSAqKnApCiB7CiAJc3RydWN0IGNsa19yY2cyICpyY2cgPSB0b19jbGtfcmNnMiho dyk7CiAJY29uc3Qgc3RydWN0IGZyZXFfdGJsICpmID0gcmNnLT5mcmVxX3RibDsKQEAgLTQ4NSwx NCArNDg1LDE0IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgZnJhY19lbnRyeSBmcmFjX3RhYmxlX3Bp eGVsW10gPSB7CiB9OwogCiBzdGF0aWMgbG9uZyBjbGtfcGl4ZWxfZGV0ZXJtaW5lX3JhdGUoc3Ry dWN0IGNsa19odyAqaHcsIHVuc2lnbmVkIGxvbmcgcmF0ZSwKLQkJCQkgdW5zaWduZWQgbG9uZyAq cF9yYXRlLCBzdHJ1Y3QgY2xrICoqcCkKKwkJCQkgdW5zaWduZWQgbG9uZyAqcF9yYXRlLCBzdHJ1 Y3QgY2xrX2NvcmUgKipwKQogewogCXN0cnVjdCBjbGtfcmNnMiAqcmNnID0gdG9fY2xrX3JjZzIo aHcpOwogCXVuc2lnbmVkIGxvbmcgcmVxdWVzdCwgc3JjX3JhdGU7CiAJaW50IGRlbHRhID0gMTAw MDAwOwogCWNvbnN0IHN0cnVjdCBmcmVxX3RibCAqZiA9IHJjZy0+ZnJlcV90Ymw7CiAJY29uc3Qg c3RydWN0IGZyYWNfZW50cnkgKmZyYWMgPSBmcmFjX3RhYmxlX3BpeGVsOwotCXN0cnVjdCBjbGsg KnBhcmVudCA9ICpwID0gY2xrX2dldF9wYXJlbnRfYnlfaW5kZXgoaHctPmNsaywgZi0+c3JjKTsK KwlzdHJ1Y3QgY2xrX2NvcmUgKnBhcmVudCA9ICpwID0gY2xrX2dldF9wYXJlbnRfYnlfaW5kZXgo aHctPmNsaywgZi0+c3JjKTsKIAogCWZvciAoOyBmcmFjLT5udW07IGZyYWMrKykgewogCQlyZXF1 ZXN0ID0gKHJhdGUgKiBmcmFjLT5kZW4pIC8gZnJhYy0+bnVtOwpAQCAtNTE5LDcgKzUxOSw3IEBA IHN0YXRpYyBpbnQgY2xrX3BpeGVsX3NldF9yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25l ZCBsb25nIHJhdGUsCiAJaW50IGRlbHRhID0gMTAwMDAwOwogCXUzMiBtYXNrID0gQklUKHJjZy0+ aGlkX3dpZHRoKSAtIDE7CiAJdTMyIGhpZF9kaXY7Ci0Jc3RydWN0IGNsayAqcGFyZW50ID0gY2xr X2dldF9wYXJlbnRfYnlfaW5kZXgoaHctPmNsaywgZi5zcmMpOworCXN0cnVjdCBjbGtfY29yZSAq cGFyZW50ID0gY2xrX2dldF9wYXJlbnRfYnlfaW5kZXgoaHctPmNsaywgZi5zcmMpOwogCiAJZm9y ICg7IGZyYWMtPm51bTsgZnJhYysrKSB7CiAJCXJlcXVlc3QgPSAocmF0ZSAqIGZyYWMtPmRlbikg LyBmcmFjLT5udW07CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9xY29tL2Nsay1yZWdtYXAuYyBi L2RyaXZlcnMvY2xrL3Fjb20vY2xrLXJlZ21hcC5jCmluZGV4IGE1OGJhMzkuLjJhOTgwNDAgMTAw NjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3Fjb20vY2xrLXJlZ21hcC5jCisrKyBiL2RyaXZlcnMvY2xr L3Fjb20vY2xrLXJlZ21hcC5jCkBAIC0xMDEsNyArMTAxLDcgQEAgRVhQT1JUX1NZTUJPTF9HUEwo Y2xrX2Rpc2FibGVfcmVnbWFwKTsKICAqIGNsa19yZWdtYXAgc3RydWN0IHZpYSB0aGlzIGZ1bmN0 aW9uIHNvIHRoYXQgdGhlIHJlZ21hcCBpcyBpbml0aWFsaXplZAogICogYW5kIHNvIHRoYXQgdGhl IGNsb2NrIGlzIHJlZ2lzdGVyZWQgd2l0aCB0aGUgY29tbW9uIGNsb2NrIGZyYW1ld29yay4KICAq Lwotc3RydWN0IGNsayAqZGV2bV9jbGtfcmVnaXN0ZXJfcmVnbWFwKHN0cnVjdCBkZXZpY2UgKmRl diwKK3N0cnVjdCBjbGtfY29yZSAqZGV2bV9jbGtfcmVnaXN0ZXJfcmVnbWFwKHN0cnVjdCBkZXZp Y2UgKmRldiwKIAkJCQkgICAgIHN0cnVjdCBjbGtfcmVnbWFwICpyY2xrKQogewogCWlmIChkZXYg JiYgZGV2X2dldF9yZWdtYXAoZGV2LCBOVUxMKSkKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3Fj b20vY2xrLXJlZ21hcC5oIGIvZHJpdmVycy9jbGsvcWNvbS9jbGstcmVnbWFwLmgKaW5kZXggNDkx YTYzZC4uODkyNThjYiAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvcWNvbS9jbGstcmVnbWFwLmgK KysrIGIvZHJpdmVycy9jbGsvcWNvbS9jbGstcmVnbWFwLmgKQEAgLTM5LDcgKzM5LDcgQEAgc3Ry dWN0IGNsa19yZWdtYXAgewogaW50IGNsa19pc19lbmFibGVkX3JlZ21hcChzdHJ1Y3QgY2xrX2h3 ICpodyk7CiBpbnQgY2xrX2VuYWJsZV9yZWdtYXAoc3RydWN0IGNsa19odyAqaHcpOwogdm9pZCBj bGtfZGlzYWJsZV9yZWdtYXAoc3RydWN0IGNsa19odyAqaHcpOwotc3RydWN0IGNsayAqCitzdHJ1 Y3QgY2xrX2NvcmUgKgogZGV2bV9jbGtfcmVnaXN0ZXJfcmVnbWFwKHN0cnVjdCBkZXZpY2UgKmRl diwgc3RydWN0IGNsa19yZWdtYXAgKnJjbGspOwogCiAjZW5kaWYKZGlmZiAtLWdpdCBhL2RyaXZl cnMvY2xrL3Fjb20vY29tbW9uLmMgYi9kcml2ZXJzL2Nsay9xY29tL2NvbW1vbi5jCmluZGV4IGVl YjNlZWEuLmFmZDQwZWEgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3Fjb20vY29tbW9uLmMKKysr IGIvZHJpdmVycy9jbGsvcWNvbS9jb21tb24uYwpAQCAtMjQsNyArMjQsNyBAQAogc3RydWN0IHFj b21fY2MgewogCXN0cnVjdCBxY29tX3Jlc2V0X2NvbnRyb2xsZXIgcmVzZXQ7CiAJc3RydWN0IGNs a19vbmVjZWxsX2RhdGEgZGF0YTsKLQlzdHJ1Y3QgY2xrICpjbGtzW107CisJc3RydWN0IGNsa19j b3JlICpjbGtzW107CiB9OwogCiBzdHJ1Y3QgcmVnbWFwICoKQEAgLTQ4LDkgKzQ4LDkgQEAgaW50 IHFjb21fY2NfcmVhbGx5X3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYsCiB7CiAJ aW50IGksIHJldDsKIAlzdHJ1Y3QgZGV2aWNlICpkZXYgPSAmcGRldi0+ZGV2OwotCXN0cnVjdCBj bGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xrX29uZWNlbGxfZGF0 YSAqZGF0YTsKLQlzdHJ1Y3QgY2xrICoqY2xrczsKKwlzdHJ1Y3QgY2xrX2NvcmUgKipjbGtzOwog CXN0cnVjdCBxY29tX3Jlc2V0X2NvbnRyb2xsZXIgKnJlc2V0OwogCXN0cnVjdCBxY29tX2NjICpj YzsKIAlzaXplX3QgbnVtX2Nsa3MgPSBkZXNjLT5udW1fY2xrczsKZGlmZiAtLWdpdCBhL2RyaXZl cnMvY2xrL3Fjb20vZ2NjLWFwcTgwODQuYyBiL2RyaXZlcnMvY2xrL3Fjb20vZ2NjLWFwcTgwODQu YwppbmRleCBlZTUyZWIxLi4yN2FmMGNkIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9xY29tL2dj Yy1hcHE4MDg0LmMKKysrIGIvZHJpdmVycy9jbGsvcWNvbS9nY2MtYXBxODA4NC5jCkBAIC0zNTYy LDcgKzM1NjIsNyBAQCBNT0RVTEVfREVWSUNFX1RBQkxFKG9mLCBnY2NfYXBxODA4NF9tYXRjaF90 YWJsZSk7CiAKIHN0YXRpYyBpbnQgZ2NjX2FwcTgwODRfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2Rl dmljZSAqcGRldikKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7 CiAJc3RydWN0IGRldmljZSAqZGV2ID0gJnBkZXYtPmRldjsKIAogCS8qIFRlbXBvcmFyeSB1bnRp bCBSUE0gY2xvY2tzIHN1cHBvcnRlZCAqLwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvcWNvbS9n Y2MtaXBxODA2eC5jIGIvZHJpdmVycy9jbGsvcWNvbS9nY2MtaXBxODA2eC5jCmluZGV4IDQwMzJl NTEuLmYzMWYwOTUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3Fjb20vZ2NjLWlwcTgwNnguYwor KysgYi9kcml2ZXJzL2Nsay9xY29tL2djYy1pcHE4MDZ4LmMKQEAgLTIzNzYsNyArMjM3Niw3IEBA IE1PRFVMRV9ERVZJQ0VfVEFCTEUob2YsIGdjY19pcHE4MDZ4X21hdGNoX3RhYmxlKTsKIAogc3Rh dGljIGludCBnY2NfaXBxODA2eF9wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQog ewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgZGV2 aWNlICpkZXYgPSAmcGRldi0+ZGV2OwogCiAJLyogVGVtcG9yYXJ5IHVudGlsIFJQTSBjbG9ja3Mg c3VwcG9ydGVkICovCmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9xY29tL2djYy1tc204NjYwLmMg Yi9kcml2ZXJzL2Nsay9xY29tL2djYy1tc204NjYwLmMKaW5kZXggMGM0YjcyNy4uMmQ0MWZkYiAx MDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvcWNvbS9nY2MtbXNtODY2MC5jCisrKyBiL2RyaXZlcnMv Y2xrL3Fjb20vZ2NjLW1zbTg2NjAuYwpAQCAtMjcxOCw3ICsyNzE4LDcgQEAgTU9EVUxFX0RFVklD RV9UQUJMRShvZiwgZ2NjX21zbTg2NjBfbWF0Y2hfdGFibGUpOwogCiBzdGF0aWMgaW50IGdjY19t c204NjYwX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCiB7Ci0Jc3RydWN0IGNs ayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBkZXZpY2UgKmRldiA9ICZw ZGV2LT5kZXY7CiAKIAkvKiBUZW1wb3JhcnkgdW50aWwgUlBNIGNsb2NrcyBzdXBwb3J0ZWQgKi8K ZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3Fjb20vZ2NjLW1zbTg5NjAuYyBiL2RyaXZlcnMvY2xr L3Fjb20vZ2NjLW1zbTg5NjAuYwppbmRleCAwMDc1MzRmLi5lZDhmOGY1IDEwMDY0NAotLS0gYS9k cml2ZXJzL2Nsay9xY29tL2djYy1tc204OTYwLmMKKysrIGIvZHJpdmVycy9jbGsvcWNvbS9nY2Mt bXNtODk2MC5jCkBAIC0zNDg4LDcgKzM0ODgsNyBAQCBNT0RVTEVfREVWSUNFX1RBQkxFKG9mLCBn Y2NfbXNtODk2MF9tYXRjaF90YWJsZSk7CiAKIHN0YXRpYyBpbnQgZ2NjX21zbTg5NjBfcHJvYmUo c3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3Ry dWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0IGRldmljZSAqZGV2ID0gJnBkZXYtPmRldjsKIAlj b25zdCBzdHJ1Y3Qgb2ZfZGV2aWNlX2lkICptYXRjaDsKIApkaWZmIC0tZ2l0IGEvZHJpdmVycy9j bGsvcWNvbS9nY2MtbXNtODk3NC5jIGIvZHJpdmVycy9jbGsvcWNvbS9nY2MtbXNtODk3NC5jCmlu ZGV4IDdhZjdjMTguLjgzMjZiMWYgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3Fjb20vZ2NjLW1z bTg5NzQuYworKysgYi9kcml2ZXJzL2Nsay9xY29tL2djYy1tc204OTc0LmMKQEAgLTI2OTksNyAr MjY5OSw3IEBAIHN0YXRpYyB2b2lkIG1zbTg5NzRfcHJvX2Nsb2NrX292ZXJyaWRlKHZvaWQpCiAK IHN0YXRpYyBpbnQgZ2NjX21zbTg5NzRfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRl dikKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0 IGRldmljZSAqZGV2ID0gJnBkZXYtPmRldjsKIAlib29sIHBybzsKIAljb25zdCBzdHJ1Y3Qgb2Zf ZGV2aWNlX2lkICppZDsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3Fjb20vbW1jYy1tc204OTYw LmMgYi9kcml2ZXJzL2Nsay9xY29tL21tY2MtbXNtODk2MC5jCmluZGV4IDJlODBhMjEuLmJiNjBk NjEgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3Fjb20vbW1jYy1tc204OTYwLmMKKysrIGIvZHJp dmVycy9jbGsvcWNvbS9tbWNjLW1zbTg5NjAuYwpAQCAtNTA1LDcgKzUwNSw3IEBAIHN0YXRpYyBp bnQgcGl4X3JkaV9zZXRfcGFyZW50KHN0cnVjdCBjbGtfaHcgKmh3LCB1OCBpbmRleCkKIAlpbnQg cmV0ID0gMDsKIAl1MzIgdmFsOwogCXN0cnVjdCBjbGtfcGl4X3JkaSAqcmRpID0gdG9fY2xrX3Bp eF9yZGkoaHcpOwotCXN0cnVjdCBjbGsgKmNsayA9IGh3LT5jbGs7CisJc3RydWN0IGNsa19jb3Jl ICpjbGsgPSBody0+Y2xrOwogCWludCBudW1fcGFyZW50cyA9IF9fY2xrX2dldF9udW1fcGFyZW50 cyhody0+Y2xrKTsKIAogCS8qCkBAIC01MTcsNyArNTE3LDcgQEAgc3RhdGljIGludCBwaXhfcmRp X3NldF9wYXJlbnQoc3RydWN0IGNsa19odyAqaHcsIHU4IGluZGV4KQogCSAqIG5lZWRzIHRvIGJl IG9uIGF0IHdoYXQgdGltZS4KIAkgKi8KIAlmb3IgKGkgPSAwOyBpIDwgbnVtX3BhcmVudHM7IGkr KykgewotCQlyZXQgPSBjbGtfcHJlcGFyZV9lbmFibGUoY2xrX2dldF9wYXJlbnRfYnlfaW5kZXgo Y2xrLCBpKSk7CisJCXJldCA9IGNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtfZ2V0X3Bh cmVudF9ieV9pbmRleChjbGssIGkpKTsKIAkJaWYgKHJldCkKIAkJCWdvdG8gZXJyOwogCX0KQEAg LTU0Niw3ICs1NDYsNyBAQCBzdGF0aWMgaW50IHBpeF9yZGlfc2V0X3BhcmVudChzdHJ1Y3QgY2xr X2h3ICpodywgdTggaW5kZXgpCiAKIGVycjoKIAlmb3IgKGktLTsgaSA+PSAwOyBpLS0pCi0JCWNs a19kaXNhYmxlX3VucHJlcGFyZShjbGtfZ2V0X3BhcmVudF9ieV9pbmRleChjbGssIGkpKTsKKwkJ Y2xrX3Byb3ZpZGVyX2Rpc2FibGVfdW5wcmVwYXJlKGNsa19nZXRfcGFyZW50X2J5X2luZGV4KGNs aywgaSkpOwogCiAJcmV0dXJuIHJldDsKIH0KZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3JvY2tj aGlwL2Nsay1wbGwuYyBiL2RyaXZlcnMvY2xrL3JvY2tjaGlwL2Nsay1wbGwuYwppbmRleCBmMmEx YzdhLi40MTRiZmYyIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9yb2NrY2hpcC9jbGstcGxsLmMK KysrIGIvZHJpdmVycy9jbGsvcm9ja2NoaXAvY2xrLXBsbC5jCkBAIC0xNyw3ICsxNyw2IEBACiAj aW5jbHVkZSA8bGludXgvc2xhYi5oPgogI2luY2x1ZGUgPGxpbnV4L2lvLmg+CiAjaW5jbHVkZSA8 bGludXgvZGVsYXkuaD4KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9j bGstcHJvdmlkZXIuaD4KICNpbmNsdWRlIDxsaW51eC9yZWdtYXAuaD4KICNpbmNsdWRlICJjbGsu aCIKQEAgLTI5Nyw3ICsyOTYsNyBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGNsa19vcHMgcm9ja2No aXBfcmszMDY2X3BsbF9jbGtfb3BzID0gewogICogQ29tbW9uIHJlZ2lzdGVyaW5nIG9mIHBsbCBj bG9ja3MKICAqLwogCi1zdHJ1Y3QgY2xrICpyb2NrY2hpcF9jbGtfcmVnaXN0ZXJfcGxsKGVudW0g cm9ja2NoaXBfcGxsX3R5cGUgcGxsX3R5cGUsCitzdHJ1Y3QgY2xrX2NvcmUgKnJvY2tjaGlwX2Ns a19yZWdpc3Rlcl9wbGwoZW51bSByb2NrY2hpcF9wbGxfdHlwZSBwbGxfdHlwZSwKIAkJY29uc3Qg Y2hhciAqbmFtZSwgY29uc3QgY2hhciAqKnBhcmVudF9uYW1lcywgdTggbnVtX3BhcmVudHMsCiAJ CXZvaWQgX19pb21lbSAqYmFzZSwgaW50IGNvbl9vZmZzZXQsIGludCBncmZfbG9ja19vZmZzZXQs CiAJCWludCBsb2NrX3NoaWZ0LCBpbnQgbW9kZV9vZmZzZXQsIGludCBtb2RlX3NoaWZ0LApAQCAt MzA4LDcgKzMwNyw3IEBAIHN0cnVjdCBjbGsgKnJvY2tjaGlwX2Nsa19yZWdpc3Rlcl9wbGwoZW51 bSByb2NrY2hpcF9wbGxfdHlwZSBwbGxfdHlwZSwKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0 OwogCXN0cnVjdCByb2NrY2hpcF9jbGtfcGxsICpwbGw7CiAJc3RydWN0IGNsa19tdXggKnBsbF9t dXg7Ci0Jc3RydWN0IGNsayAqcGxsX2NsaywgKm11eF9jbGs7CisJc3RydWN0IGNsa19jb3JlICpw bGxfY2xrLCAqbXV4X2NsazsKIAljaGFyIHBsbF9uYW1lWzIwXTsKIAlpbnQgcmV0OwogCkBAIC0z NzcsNyArMzc2LDcgQEAgc3RydWN0IGNsayAqcm9ja2NoaXBfY2xrX3JlZ2lzdGVyX3BsbChlbnVt IHJvY2tjaGlwX3BsbF90eXBlIHBsbF90eXBlLAogCQlnb3RvIGVycl9wbGw7CiAJfQogCi0JcmV0 ID0gY2xrX25vdGlmaWVyX3JlZ2lzdGVyKHBsbF9jbGssICZwbGwtPmNsa19uYik7CisJcmV0ID0g Y2xrX3Byb3ZpZGVyX25vdGlmaWVyX3JlZ2lzdGVyKHBsbF9jbGssICZwbGwtPmNsa19uYik7CiAJ aWYgKHJldCkgewogCQlwcl9lcnIoIiVzOiBmYWlsZWQgdG8gcmVnaXN0ZXIgY2xvY2sgbm90aWZp ZXIgZm9yICVzIDogJWRcbiIsCiAJCQkJX19mdW5jX18sIG5hbWUsIHJldCk7CkBAIC00MTcsNyAr NDE2LDcgQEAgc3RydWN0IGNsayAqcm9ja2NoaXBfY2xrX3JlZ2lzdGVyX3BsbChlbnVtIHJvY2tj aGlwX3BsbF90eXBlIHBsbF90eXBlLAogCXJldHVybiBtdXhfY2xrOwogCiBlcnJfbXV4OgotCXJl dCA9IGNsa19ub3RpZmllcl91bnJlZ2lzdGVyKHBsbF9jbGssICZwbGwtPmNsa19uYik7CisJcmV0 ID0gY2xrX3Byb3ZpZGVyX25vdGlmaWVyX3VucmVnaXN0ZXIocGxsX2NsaywgJnBsbC0+Y2xrX25i KTsKIAlpZiAocmV0KSB7CiAJCXByX2VycigiJXM6IGNvdWxkIG5vdCB1bnJlZ2lzdGVyIGNsb2Nr IG5vdGlmaWVyIGluIGVycm9yIHBhdGggOiAlZFxuIiwKIAkJICAgICAgIF9fZnVuY19fLCByZXQp OwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvcm9ja2NoaXAvY2xrLXJrMzE4OC5jIGIvZHJpdmVy cy9jbGsvcm9ja2NoaXAvY2xrLXJrMzE4OC5jCmluZGV4IDczMjExOGUuLmIwY2E2MDkgMTAwNjQ0 Ci0tLSBhL2RyaXZlcnMvY2xrL3JvY2tjaGlwL2Nsay1yazMxODguYworKysgYi9kcml2ZXJzL2Ns ay9yb2NrY2hpcC9jbGstcmszMTg4LmMKQEAgLTYwNyw3ICs2MDcsNyBAQCBzdGF0aWMgY29uc3Qg Y2hhciAqcmszMTg4X2NyaXRpY2FsX2Nsb2Nrc1tdIF9faW5pdGNvbnN0ID0gewogc3RhdGljIHZv aWQgX19pbml0IHJrMzE4OF9jb21tb25fY2xrX2luaXQoc3RydWN0IGRldmljZV9ub2RlICpucCkK IHsKIAl2b2lkIF9faW9tZW0gKnJlZ19iYXNlOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3Qg Y2xrX2NvcmUgKmNsazsKIAogCXJlZ19iYXNlID0gb2ZfaW9tYXAobnAsIDApOwogCWlmICghcmVn X2Jhc2UpIHsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3JvY2tjaGlwL2Nsay1yazMyODguYyBi L2RyaXZlcnMvY2xrL3JvY2tjaGlwL2Nsay1yazMyODguYwppbmRleCAwMzhiMWFhLi5iODk5MmRk IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9yb2NrY2hpcC9jbGstcmszMjg4LmMKKysrIGIvZHJp dmVycy9jbGsvcm9ja2NoaXAvY2xrLXJrMzI4OC5jCkBAIC02ODgsNyArNjg4LDcgQEAgc3RhdGlj IGNvbnN0IGNoYXIgKnJrMzI4OF9jcml0aWNhbF9jbG9ja3NbXSBfX2luaXRjb25zdCA9IHsKIHN0 YXRpYyB2b2lkIF9faW5pdCByazMyODhfY2xrX2luaXQoc3RydWN0IGRldmljZV9ub2RlICpucCkK IHsKIAl2b2lkIF9faW9tZW0gKnJlZ19iYXNlOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3Qg Y2xrX2NvcmUgKmNsazsKIAogCXJlZ19iYXNlID0gb2ZfaW9tYXAobnAsIDApOwogCWlmICghcmVn X2Jhc2UpIHsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3JvY2tjaGlwL2Nsay1yb2NrY2hpcC5j IGIvZHJpdmVycy9jbGsvcm9ja2NoaXAvY2xrLXJvY2tjaGlwLmMKaW5kZXggNGNmODM4ZDUuLmZh YThkZmEgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3JvY2tjaGlwL2Nsay1yb2NrY2hpcC5jCisr KyBiL2RyaXZlcnMvY2xrL3JvY2tjaGlwL2Nsay1yb2NrY2hpcC5jCkBAIC01NCw3ICs1NCw3IEBA IHN0YXRpYyB2b2lkIF9faW5pdCByazI5MjhfZ2F0ZV9jbGtfaW5pdChzdHJ1Y3QgZGV2aWNlX25v ZGUgKm5vZGUpCiAJaWYgKCFjbGtfZGF0YSkKIAkJcmV0dXJuOwogCi0JY2xrX2RhdGEtPmNsa3Mg PSBremFsbG9jKHF0eSAqIHNpemVvZihzdHJ1Y3QgY2xrICopLCBHRlBfS0VSTkVMKTsKKwljbGtf ZGF0YS0+Y2xrcyA9IGt6YWxsb2MocXR5ICogc2l6ZW9mKHN0cnVjdCBjbGtfY29yZSAqKSwgR0ZQ X0tFUk5FTCk7CiAJaWYgKCFjbGtfZGF0YS0+Y2xrcykgewogCQlrZnJlZShjbGtfZGF0YSk7CiAJ CXJldHVybjsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3JvY2tjaGlwL2Nsay5jIGIvZHJpdmVy cy9jbGsvcm9ja2NoaXAvY2xrLmMKaW5kZXggZDljNmRiMi4uZGZlM2RkYiAxMDA2NDQKLS0tIGEv ZHJpdmVycy9jbGsvcm9ja2NoaXAvY2xrLmMKKysrIGIvZHJpdmVycy9jbGsvcm9ja2NoaXAvY2xr LmMKQEAgLTIxLDcgKzIxLDYgQEAKICAqLwogCiAjaW5jbHVkZSA8bGludXgvc2xhYi5oPgotI2lu Y2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2lu Y2x1ZGUgPGxpbnV4L21mZC9zeXNjb24uaD4KICNpbmNsdWRlIDxsaW51eC9yZWdtYXAuaD4KQEAg LTM3LDcgKzM2LDcgQEAKICAqCiAgKiBzb21ldGltZXMgd2l0aG91dCBvbmUgb2YgdGhvc2UgY29t cG9uZW50cy4KICAqLwotc3RhdGljIHN0cnVjdCBjbGsgKnJvY2tjaGlwX2Nsa19yZWdpc3Rlcl9i cmFuY2goY29uc3QgY2hhciAqbmFtZSwKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKnJvY2tjaGlw X2Nsa19yZWdpc3Rlcl9icmFuY2goY29uc3QgY2hhciAqbmFtZSwKIAkJY29uc3QgY2hhciAqKnBh cmVudF9uYW1lcywgdTggbnVtX3BhcmVudHMsIHZvaWQgX19pb21lbSAqYmFzZSwKIAkJaW50IG11 eGRpdl9vZmZzZXQsIHU4IG11eF9zaGlmdCwgdTggbXV4X3dpZHRoLCB1OCBtdXhfZmxhZ3MsCiAJ CXU4IGRpdl9zaGlmdCwgdTggZGl2X3dpZHRoLCB1OCBkaXZfZmxhZ3MsCkBAIC00NSw3ICs0NCw3 IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrICpyb2NrY2hpcF9jbGtfcmVnaXN0ZXJfYnJhbmNoKGNvbnN0 IGNoYXIgKm5hbWUsCiAJCXU4IGdhdGVfc2hpZnQsIHU4IGdhdGVfZmxhZ3MsIHVuc2lnbmVkIGxv bmcgZmxhZ3MsCiAJCXNwaW5sb2NrX3QgKmxvY2spCiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0 cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfbXV4ICptdXggPSBOVUxMOwogCXN0cnVj dCBjbGtfZ2F0ZSAqZ2F0ZSA9IE5VTEw7CiAJc3RydWN0IGNsa19kaXZpZGVyICpkaXYgPSBOVUxM OwpAQCAtMTAzLDEzICsxMDIsMTMgQEAgc3RhdGljIHN0cnVjdCBjbGsgKnJvY2tjaGlwX2Nsa19y ZWdpc3Rlcl9icmFuY2goY29uc3QgY2hhciAqbmFtZSwKIAlyZXR1cm4gY2xrOwogfQogCi1zdGF0 aWMgc3RydWN0IGNsayAqcm9ja2NoaXBfY2xrX3JlZ2lzdGVyX2ZyYWNfYnJhbmNoKGNvbnN0IGNo YXIgKm5hbWUsCitzdGF0aWMgc3RydWN0IGNsa19jb3JlICpyb2NrY2hpcF9jbGtfcmVnaXN0ZXJf ZnJhY19icmFuY2goY29uc3QgY2hhciAqbmFtZSwKIAkJY29uc3QgY2hhciAqKnBhcmVudF9uYW1l cywgdTggbnVtX3BhcmVudHMsIHZvaWQgX19pb21lbSAqYmFzZSwKIAkJaW50IG11eGRpdl9vZmZz ZXQsIHU4IGRpdl9mbGFncywKIAkJaW50IGdhdGVfb2Zmc2V0LCB1OCBnYXRlX3NoaWZ0LCB1OCBn YXRlX2ZsYWdzLAogCQl1bnNpZ25lZCBsb25nIGZsYWdzLCBzcGlubG9ja190ICpsb2NrKQogewot CXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xrX2dh dGUgKmdhdGUgPSBOVUxMOwogCXN0cnVjdCBjbGtfZnJhY3Rpb25hbF9kaXZpZGVyICpkaXYgPSBO VUxMOwogCWNvbnN0IHN0cnVjdCBjbGtfb3BzICpkaXZfb3BzID0gTlVMTCwgKmdhdGVfb3BzID0g TlVMTDsKQEAgLTE1Miw3ICsxNTEsNyBAQCBzdGF0aWMgc3RydWN0IGNsayAqcm9ja2NoaXBfY2xr X3JlZ2lzdGVyX2ZyYWNfYnJhbmNoKGNvbnN0IGNoYXIgKm5hbWUsCiB9CiAKIHN0YXRpYyBERUZJ TkVfU1BJTkxPQ0soY2xrX2xvY2spOwotc3RhdGljIHN0cnVjdCBjbGsgKipjbGtfdGFibGU7Citz dGF0aWMgc3RydWN0IGNsa19jb3JlICoqY2xrX3RhYmxlOwogc3RhdGljIHZvaWQgX19pb21lbSAq cmVnX2Jhc2U7CiBzdGF0aWMgc3RydWN0IGNsa19vbmVjZWxsX2RhdGEgY2xrX2RhdGE7CiBzdGF0 aWMgc3RydWN0IGRldmljZV9ub2RlICpjcnVfbm9kZTsKQEAgLTE2NSw3ICsxNjQsNyBAQCB2b2lk IF9faW5pdCByb2NrY2hpcF9jbGtfaW5pdChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wLCB2b2lkIF9f aW9tZW0gKmJhc2UsCiAJY3J1X25vZGUgPSBucDsKIAlncmYgPSBFUlJfUFRSKC1FUFJPQkVfREVG RVIpOwogCi0JY2xrX3RhYmxlID0ga2NhbGxvYyhucl9jbGtzLCBzaXplb2Yoc3RydWN0IGNsayAq KSwgR0ZQX0tFUk5FTCk7CisJY2xrX3RhYmxlID0ga2NhbGxvYyhucl9jbGtzLCBzaXplb2Yoc3Ry dWN0IGNsa19jb3JlICopLCBHRlBfS0VSTkVMKTsKIAlpZiAoIWNsa190YWJsZSkKIAkJcHJfZXJy KCIlczogY291bGQgbm90IGFsbG9jYXRlIGNsb2NrIGxvb2t1cCB0YWJsZVxuIiwgX19mdW5jX18p OwogCkBAIC0xODEsNyArMTgwLDcgQEAgc3RydWN0IHJlZ21hcCAqcm9ja2NoaXBfY2xrX2dldF9n cmYodm9pZCkKIAlyZXR1cm4gZ3JmOwogfQogCi12b2lkIHJvY2tjaGlwX2Nsa19hZGRfbG9va3Vw KHN0cnVjdCBjbGsgKmNsaywgdW5zaWduZWQgaW50IGlkKQordm9pZCByb2NrY2hpcF9jbGtfYWRk X2xvb2t1cChzdHJ1Y3QgY2xrX2NvcmUgKmNsaywgdW5zaWduZWQgaW50IGlkKQogewogCWlmIChj bGtfdGFibGUgJiYgaWQpCiAJCWNsa190YWJsZVtpZF0gPSBjbGs7CkBAIC0xOTAsNyArMTg5LDcg QEAgdm9pZCByb2NrY2hpcF9jbGtfYWRkX2xvb2t1cChzdHJ1Y3QgY2xrICpjbGssIHVuc2lnbmVk IGludCBpZCkKIHZvaWQgX19pbml0IHJvY2tjaGlwX2Nsa19yZWdpc3Rlcl9wbGxzKHN0cnVjdCBy b2NrY2hpcF9wbGxfY2xvY2sgKmxpc3QsCiAJCQkJdW5zaWduZWQgaW50IG5yX3BsbCwgaW50IGdy Zl9sb2NrX29mZnNldCkKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpj bGs7CiAJaW50IGlkeDsKIAogCWZvciAoaWR4ID0gMDsgaWR4IDwgbnJfcGxsOyBpZHgrKywgbGlz dCsrKSB7CkBAIC0yMTMsNyArMjEyLDcgQEAgdm9pZCBfX2luaXQgcm9ja2NoaXBfY2xrX3JlZ2lz dGVyX2JyYW5jaGVzKAogCQkJCSAgICAgIHN0cnVjdCByb2NrY2hpcF9jbGtfYnJhbmNoICpsaXN0 LAogCQkJCSAgICAgIHVuc2lnbmVkIGludCBucl9jbGspCiB7Ci0Jc3RydWN0IGNsayAqY2xrID0g TlVMTDsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsayA9IE5VTEw7CiAJdW5zaWduZWQgaW50IGlkeDsK IAl1bnNpZ25lZCBsb25nIGZsYWdzOwogCkBAIC0zMDMsOSArMzAyLDkgQEAgdm9pZCBfX2luaXQg cm9ja2NoaXBfY2xrX3Byb3RlY3RfY3JpdGljYWwoY29uc3QgY2hhciAqY2xvY2tzW10sIGludCBu Y2xvY2tzKQogCiAJLyogUHJvdGVjdCB0aGUgY2xvY2tzIHRoYXQgbmVlZHMgdG8gc3RheSBvbiAq LwogCWZvciAoaSA9IDA7IGkgPCBuY2xvY2tzOyBpKyspIHsKLQkJc3RydWN0IGNsayAqY2xrID0g X19jbGtfbG9va3VwKGNsb2Nrc1tpXSk7CisJCXN0cnVjdCBjbGtfY29yZSAqY2xrID0gX19jbGtf bG9va3VwKGNsb2Nrc1tpXSk7CiAKIAkJaWYgKGNsaykKLQkJCWNsa19wcmVwYXJlX2VuYWJsZShj bGspOworCQkJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsayk7CiAJfQogfQpkaWZmIC0t Z2l0IGEvZHJpdmVycy9jbGsvcm9ja2NoaXAvY2xrLmggYi9kcml2ZXJzL2Nsay9yb2NrY2hpcC9j bGsuaAppbmRleCAyYjBiY2ExLi43ZjcxM2ViIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9yb2Nr Y2hpcC9jbGsuaAorKysgYi9kcml2ZXJzL2Nsay9yb2NrY2hpcC9jbGsuaApAQCAtMjQsNyArMjQs NiBAQAogI2RlZmluZSBDTEtfUk9DS0NISVBfQ0xLX0gKIAogI2luY2x1ZGUgPGxpbnV4L2lvLmg+ Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+ CiAKICNkZWZpbmUgSElXT1JEX1VQREFURSh2YWwsIG1hc2ssIHNoaWZ0KSBcCkBAIC0xMTMsNyAr MTEyLDcgQEAgc3RydWN0IHJvY2tjaGlwX3BsbF9jbG9jayB7CiAJCS5yYXRlX3RhYmxlCT0gX3J0 YWJsZSwJCQkJXAogCX0KIAotc3RydWN0IGNsayAqcm9ja2NoaXBfY2xrX3JlZ2lzdGVyX3BsbChl bnVtIHJvY2tjaGlwX3BsbF90eXBlIHBsbF90eXBlLAorc3RydWN0IGNsa19jb3JlICpyb2NrY2hp cF9jbGtfcmVnaXN0ZXJfcGxsKGVudW0gcm9ja2NoaXBfcGxsX3R5cGUgcGxsX3R5cGUsCiAJCWNv bnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKipwYXJlbnRfbmFtZXMsIHU4IG51bV9wYXJlbnRz LAogCQl2b2lkIF9faW9tZW0gKmJhc2UsIGludCBjb25fb2Zmc2V0LCBpbnQgZ3JmX2xvY2tfb2Zm c2V0LAogCQlpbnQgbG9ja19zaGlmdCwgaW50IHJlZ19tb2RlLCBpbnQgbW9kZV9zaGlmdCwKQEAg LTMyNCw3ICszMjMsNyBAQCBzdHJ1Y3Qgcm9ja2NoaXBfY2xrX2JyYW5jaCB7CiB2b2lkIHJvY2tj aGlwX2Nsa19pbml0KHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnAsIHZvaWQgX19pb21lbSAqYmFzZSwK IAkJICAgICAgIHVuc2lnbmVkIGxvbmcgbnJfY2xrcyk7CiBzdHJ1Y3QgcmVnbWFwICpyb2NrY2hp cF9jbGtfZ2V0X2dyZih2b2lkKTsKLXZvaWQgcm9ja2NoaXBfY2xrX2FkZF9sb29rdXAoc3RydWN0 IGNsayAqY2xrLCB1bnNpZ25lZCBpbnQgaWQpOwordm9pZCByb2NrY2hpcF9jbGtfYWRkX2xvb2t1 cChzdHJ1Y3QgY2xrX2NvcmUgKmNsaywgdW5zaWduZWQgaW50IGlkKTsKIHZvaWQgcm9ja2NoaXBf Y2xrX3JlZ2lzdGVyX2JyYW5jaGVzKHN0cnVjdCByb2NrY2hpcF9jbGtfYnJhbmNoICpjbGtfbGlz dCwKIAkJCQkgICAgdW5zaWduZWQgaW50IG5yX2Nsayk7CiB2b2lkIHJvY2tjaGlwX2Nsa19yZWdp c3Rlcl9wbGxzKHN0cnVjdCByb2NrY2hpcF9wbGxfY2xvY2sgKnBsbF9saXN0LApkaWZmIC0tZ2l0 IGEvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstZXh5bm9zLWF1ZHNzLmMgYi9kcml2ZXJzL2Nsay9z YW1zdW5nL2Nsay1leHlub3MtYXVkc3MuYwppbmRleCAxM2VhZTE0Yy4uZjU2MzliZiAxMDA2NDQK LS0tIGEvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstZXh5bm9zLWF1ZHNzLmMKKysrIGIvZHJpdmVy cy9jbGsvc2Ftc3VuZy9jbGstZXh5bm9zLWF1ZHNzLmMKQEAgLTI2LDcgKzI2LDcgQEAgZW51bSBl eHlub3NfYXVkc3NfY2xrX3R5cGUgewogfTsKIAogc3RhdGljIERFRklORV9TUElOTE9DSyhsb2Nr KTsKLXN0YXRpYyBzdHJ1Y3QgY2xrICoqY2xrX3RhYmxlOworc3RhdGljIHN0cnVjdCBjbGtfY29y ZSAqKmNsa190YWJsZTsKIHN0YXRpYyB2b2lkIF9faW9tZW0gKnJlZ19iYXNlOwogc3RhdGljIHN0 cnVjdCBjbGtfb25lY2VsbF9kYXRhIGNsa19kYXRhOwogCkBAIC04Myw3ICs4Myw3IEBAIHN0YXRp YyBpbnQgZXh5bm9zX2F1ZHNzX2Nsa19wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2 KQogCWNvbnN0IGNoYXIgKm1vdXRfYXVkc3NfcFtdID0geyJmaW5fcGxsIiwgImZvdXRfZXBsbCJ9 OwogCWNvbnN0IGNoYXIgKm1vdXRfaTJzX3BbXSA9IHsibW91dF9hdWRzcyIsICJjZGNsazAiLCAi c2Nsa19hdWRpbzAifTsKIAljb25zdCBjaGFyICpzY2xrX3BjbV9wID0gInNjbGtfcGNtMCI7Ci0J c3RydWN0IGNsayAqcGxsX3JlZiwgKnBsbF9pbiwgKmNkY2xrLCAqc2Nsa19hdWRpbywgKnNjbGtf cGNtX2luOworCXN0cnVjdCBjbGtfY29yZSAqcGxsX3JlZiwgKnBsbF9pbiwgKmNkY2xrLCAqc2Ns a19hdWRpbywgKnNjbGtfcGNtX2luOwogCWNvbnN0IHN0cnVjdCBvZl9kZXZpY2VfaWQgKm1hdGNo OwogCWVudW0gZXh5bm9zX2F1ZHNzX2Nsa190eXBlIHZhcmlhbnQ7CiAKQEAgLTEwMCw3ICsxMDAs NyBAQCBzdGF0aWMgaW50IGV4eW5vc19hdWRzc19jbGtfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2Rl dmljZSAqcGRldikKIAl9CiAKIAljbGtfdGFibGUgPSBkZXZtX2t6YWxsb2MoJnBkZXYtPmRldiwK LQkJCQlzaXplb2Yoc3RydWN0IGNsayAqKSAqIEVYWU5PU19BVURTU19NQVhfQ0xLUywKKwkJCQlz aXplb2Yoc3RydWN0IGNsa19jb3JlICopICogRVhZTk9TX0FVRFNTX01BWF9DTEtTLAogCQkJCUdG UF9LRVJORUwpOwogCWlmICghY2xrX3RhYmxlKQogCQlyZXR1cm4gLUVOT01FTTsKQEAgLTExMSw4 ICsxMTEsOCBAQCBzdGF0aWMgaW50IGV4eW5vc19hdWRzc19jbGtfcHJvYmUoc3RydWN0IHBsYXRm b3JtX2RldmljZSAqcGRldikKIAllbHNlCiAJCWNsa19kYXRhLmNsa19udW0gPSBFWFlOT1NfQVVE U1NfTUFYX0NMS1MgLSAxOwogCi0JcGxsX3JlZiA9IGRldm1fY2xrX2dldCgmcGRldi0+ZGV2LCAi cGxsX3JlZiIpOwotCXBsbF9pbiA9IGRldm1fY2xrX2dldCgmcGRldi0+ZGV2LCAicGxsX2luIik7 CisJcGxsX3JlZiA9IGRldm1fY2xrX3Byb3ZpZGVyX2dldCgmcGRldi0+ZGV2LCAicGxsX3JlZiIp OworCXBsbF9pbiA9IGRldm1fY2xrX3Byb3ZpZGVyX2dldCgmcGRldi0+ZGV2LCAicGxsX2luIik7 CiAJaWYgKCFJU19FUlIocGxsX3JlZikpCiAJCW1vdXRfYXVkc3NfcFswXSA9IF9fY2xrX2dldF9u YW1lKHBsbF9yZWYpOwogCWlmICghSVNfRVJSKHBsbF9pbikpCkBAIC0xMjIsOCArMTIyLDggQEAg c3RhdGljIGludCBleHlub3NfYXVkc3NfY2xrX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2Ug KnBkZXYpCiAJCQkJQ0xLX1NFVF9SQVRFX05PX1JFUEFSRU5ULAogCQkJCXJlZ19iYXNlICsgQVNT X0NMS19TUkMsIDAsIDEsIDAsICZsb2NrKTsKIAotCWNkY2xrID0gZGV2bV9jbGtfZ2V0KCZwZGV2 LT5kZXYsICJjZGNsayIpOwotCXNjbGtfYXVkaW8gPSBkZXZtX2Nsa19nZXQoJnBkZXYtPmRldiwg InNjbGtfYXVkaW8iKTsKKwljZGNsayA9IGRldm1fY2xrX3Byb3ZpZGVyX2dldCgmcGRldi0+ZGV2 LCAiY2RjbGsiKTsKKwlzY2xrX2F1ZGlvID0gZGV2bV9jbGtfcHJvdmlkZXJfZ2V0KCZwZGV2LT5k ZXYsICJzY2xrX2F1ZGlvIik7CiAJaWYgKCFJU19FUlIoY2RjbGspKQogCQltb3V0X2kyc19wWzFd ID0gX19jbGtfZ2V0X25hbWUoY2RjbGspOwogCWlmICghSVNfRVJSKHNjbGtfYXVkaW8pKQpAQCAt MTYxLDcgKzE2MSw3IEBAIHN0YXRpYyBpbnQgZXh5bm9zX2F1ZHNzX2Nsa19wcm9iZShzdHJ1Y3Qg cGxhdGZvcm1fZGV2aWNlICpwZGV2KQogCQkJCSAic2Nsa19wY20iLCBDTEtfU0VUX1JBVEVfUEFS RU5ULAogCQkJCXJlZ19iYXNlICsgQVNTX0NMS19HQVRFLCA0LCAwLCAmbG9jayk7CiAKLQlzY2xr X3BjbV9pbiA9IGRldm1fY2xrX2dldCgmcGRldi0+ZGV2LCAic2Nsa19wY21faW4iKTsKKwlzY2xr X3BjbV9pbiA9IGRldm1fY2xrX3Byb3ZpZGVyX2dldCgmcGRldi0+ZGV2LCAic2Nsa19wY21faW4i KTsKIAlpZiAoIUlTX0VSUihzY2xrX3BjbV9pbikpCiAJCXNjbGtfcGNtX3AgPSBfX2Nsa19nZXRf bmFtZShzY2xrX3BjbV9pbik7CiAJY2xrX3RhYmxlW0VYWU5PU19TQ0xLX1BDTV0gPSBjbGtfcmVn aXN0ZXJfZ2F0ZShOVUxMLCAic2Nsa19wY20iLApkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvc2Ft c3VuZy9jbGstZXh5bm9zLWNsa291dC5jIGIvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstZXh5bm9z LWNsa291dC5jCmluZGV4IDNhN2NiMjUuLjBhZDdkZWUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xr L3NhbXN1bmcvY2xrLWV4eW5vcy1jbGtvdXQuYworKysgYi9kcml2ZXJzL2Nsay9zYW1zdW5nL2Ns ay1leHlub3MtY2xrb3V0LmMKQEAgLTksNyArOSw2IEBACiAgKiBDbG9jayBkcml2ZXIgZm9yIEV4 eW5vcyBjbG9jayBvdXRwdXQKICAqLwogCi0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVk ZSA8bGludXgvY2xrZGV2Lmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5j bHVkZSA8bGludXgvb2YuaD4KQEAgLTMwLDcgKzI5LDcgQEAgc3RydWN0IGV4eW5vc19jbGtvdXQg ewogCXN0cnVjdCBjbGtfbXV4IG11eDsKIAlzcGlubG9ja190IHNsb2NrOwogCXN0cnVjdCBjbGtf b25lY2VsbF9kYXRhIGRhdGE7Ci0Jc3RydWN0IGNsayAqY2xrX3RhYmxlW0VYWU5PU19DTEtPVVRf TlJfQ0xLU107CisJc3RydWN0IGNsa19jb3JlICpjbGtfdGFibGVbRVhZTk9TX0NMS09VVF9OUl9D TEtTXTsKIAl2b2lkIF9faW9tZW0gKnJlZzsKIAl1MzIgcG11X2RlYnVnX3NhdmU7CiB9OwpAQCAt NTcsNyArNTYsNyBAQCBzdGF0aWMgc3RydWN0IHN5c2NvcmVfb3BzIGV4eW5vc19jbGtvdXRfc3lz Y29yZV9vcHMgPSB7CiBzdGF0aWMgdm9pZCBfX2luaXQgZXh5bm9zX2Nsa291dF9pbml0KHN0cnVj dCBkZXZpY2Vfbm9kZSAqbm9kZSwgdTMyIG11eF9tYXNrKQogewogCWNvbnN0IGNoYXIgKnBhcmVu dF9uYW1lc1tFWFlOT1NfQ0xLT1VUX1BBUkVOVFNdOwotCXN0cnVjdCBjbGsgKnBhcmVudHNbRVhZ Tk9TX0NMS09VVF9QQVJFTlRTXTsKKwlzdHJ1Y3QgY2xrX2NvcmUgKnBhcmVudHNbRVhZTk9TX0NM S09VVF9QQVJFTlRTXTsKIAlpbnQgcGFyZW50X2NvdW50OwogCWludCByZXQ7CiAJaW50IGk7CkBA IC03Myw3ICs3Miw3IEBAIHN0YXRpYyB2b2lkIF9faW5pdCBleHlub3NfY2xrb3V0X2luaXQoc3Ry dWN0IGRldmljZV9ub2RlICpub2RlLCB1MzIgbXV4X21hc2spCiAJCWNoYXIgbmFtZVtdID0gImNs a291dFhYIjsKIAogCQlzbnByaW50ZihuYW1lLCBzaXplb2YobmFtZSksICJjbGtvdXQlZCIsIGkp OwotCQlwYXJlbnRzW2ldID0gb2ZfY2xrX2dldF9ieV9uYW1lKG5vZGUsIG5hbWUpOworCQlwYXJl bnRzW2ldID0gb2ZfY2xrX3Byb3ZpZGVyX2dldF9ieV9uYW1lKG5vZGUsIG5hbWUpOwogCQlpZiAo SVNfRVJSKHBhcmVudHNbaV0pKSB7CiAJCQlwYXJlbnRfbmFtZXNbaV0gPSAibm9uZSI7CiAJCQlj b250aW51ZTsKQEAgLTEyNSw3ICsxMjQsNyBAQCBlcnJfdW5tYXA6CiBjbGtzX3B1dDoKIAlmb3Ig KGkgPSAwOyBpIDwgRVhZTk9TX0NMS09VVF9QQVJFTlRTOyArK2kpCiAJCWlmICghSVNfRVJSKHBh cmVudHNbaV0pKQotCQkJY2xrX3B1dChwYXJlbnRzW2ldKTsKKwkJCV9fY2xrX3B1dChwYXJlbnRz W2ldKTsKIGZyZWVfY2xrb3V0OgogCWtmcmVlKGNsa291dCk7CiAKZGlmZiAtLWdpdCBhL2RyaXZl cnMvY2xrL3NhbXN1bmcvY2xrLWV4eW5vczMyNTAuYyBiL2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xr LWV4eW5vczMyNTAuYwppbmRleCBkYzg1ZjhlLi41NzQyZTc2IDEwMDY0NAotLS0gYS9kcml2ZXJz L2Nsay9zYW1zdW5nL2Nsay1leHlub3MzMjUwLmMKKysrIGIvZHJpdmVycy9jbGsvc2Ftc3VuZy9j bGstZXh5bm9zMzI1MC5jCkBAIC04LDcgKzgsNiBAQAogICogQ29tbW9uIENsb2NrIEZyYW1ld29y ayBzdXBwb3J0IGZvciBFeHlub3MzMjUwIFNvQy4KICAqLwogCi0jaW5jbHVkZSA8bGludXgvY2xr Lmg+CiAjaW5jbHVkZSA8bGludXgvY2xrZGV2Lmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3Zp ZGVyLmg+CiAjaW5jbHVkZSA8bGludXgvb2YuaD4KZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3Nh bXN1bmcvY2xrLWV4eW5vczQuYyBiL2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLWV4eW5vczQuYwpp bmRleCBhYzE2M2Q3Li41ZDc3ZGEyIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9zYW1zdW5nL2Ns ay1leHlub3M0LmMKKysrIGIvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstZXh5bm9zNC5jCkBAIC0x MSw3ICsxMSw2IEBACiAqLwogCiAjaW5jbHVkZSA8ZHQtYmluZGluZ3MvY2xvY2svZXh5bm9zNC5o PgotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsa2Rldi5oPgogI2lu Y2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxpbnV4L29mLmg+CkBAIC0x MjMwLDE5ICsxMjI5LDE5IEBAIHN0YXRpYyB1bnNpZ25lZCBsb25nIGV4eW5vczRfZ2V0X3hvbSh2 b2lkKQogc3RhdGljIHZvaWQgX19pbml0IGV4eW5vczRfY2xrX3JlZ2lzdGVyX2ZpbnBsbChzdHJ1 Y3Qgc2Ftc3VuZ19jbGtfcHJvdmlkZXIgKmN0eCkKIHsKIAlzdHJ1Y3Qgc2Ftc3VuZ19maXhlZF9y YXRlX2Nsb2NrIGZjbGs7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xr OwogCXVuc2lnbmVkIGxvbmcgZmlucGxsX2YgPSAyNDAwMDAwMDsKIAljaGFyICpwYXJlbnRfbmFt ZTsKIAl1bnNpZ25lZCBpbnQgeG9tID0gZXh5bm9zNF9nZXRfeG9tKCk7CiAKIAlwYXJlbnRfbmFt ZSA9IHhvbSAmIDEgPyAieHVzYnh0aSIgOiAieHh0aSI7Ci0JY2xrID0gY2xrX2dldChOVUxMLCBw YXJlbnRfbmFtZSk7CisJY2xrID0gY2xrX3Byb3ZpZGVyX2dldChOVUxMLCBwYXJlbnRfbmFtZSk7 CiAJaWYgKElTX0VSUihjbGspKSB7CiAJCXByX2VycigiJXM6IGZhaWxlZCB0byBsb29rdXAgcGFy ZW50IGNsb2NrICVzLCBhc3N1bWluZyAiCiAJCQkiZmluX3BsbCBjbG9jayBmcmVxdWVuY3kgaXMg MjRNSHpcbiIsIF9fZnVuY19fLAogCQkJcGFyZW50X25hbWUpOwogCX0gZWxzZSB7Ci0JCWZpbnBs bF9mID0gY2xrX2dldF9yYXRlKGNsayk7CisJCWZpbnBsbF9mID0gY2xrX3Byb3ZpZGVyX2dldF9y YXRlKGNsayk7CiAJfQogCiAJZmNsay5pZCA9IENMS19GSU5fUExMOwpkaWZmIC0tZ2l0IGEvZHJp dmVycy9jbGsvc2Ftc3VuZy9jbGstZXh5bm9zNTI1MC5jIGIvZHJpdmVycy9jbGsvc2Ftc3VuZy9j bGstZXh5bm9zNTI1MC5jCmluZGV4IDcwZWMzZDIuLjYyM2U2OGYgMTAwNjQ0Ci0tLSBhL2RyaXZl cnMvY2xrL3NhbXN1bmcvY2xrLWV4eW5vczUyNTAuYworKysgYi9kcml2ZXJzL2Nsay9zYW1zdW5n L2Nsay1leHlub3M1MjUwLmMKQEAgLTExLDcgKzExLDYgQEAKICovCiAKICNpbmNsdWRlIDxkdC1i aW5kaW5ncy9jbG9jay9leHlub3M1MjUwLmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5j bHVkZSA8bGludXgvY2xrZGV2Lmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAj aW5jbHVkZSA8bGludXgvb2YuaD4KZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xr LWV4eW5vczUyNjAuYyBiL2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLWV4eW5vczUyNjAuYwppbmRl eCBjZTNkZTk3Li41YTNkNjIzIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9zYW1zdW5nL2Nsay1l eHlub3M1MjYwLmMKKysrIGIvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstZXh5bm9zNTI2MC5jCkBA IC05LDcgKzksNiBAQAogICogQ29tbW9uIENsb2NrIEZyYW1ld29yayBzdXBwb3J0IGZvciBFeHlu b3M1MjYwIFNvQy4KICAqLwogCi0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8bGlu dXgvY2xrZGV2Lmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5jbHVkZSA8 bGludXgvb2YuaD4KZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLWV4eW5vczU0 MTAuYyBiL2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLWV4eW5vczU0MTAuYwppbmRleCAyMzE0NzVi Li41NDZiMzJmIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9zYW1zdW5nL2Nsay1leHlub3M1NDEw LmMKKysrIGIvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstZXh5bm9zNTQxMC5jCkBAIC0xMSw3ICsx MSw2IEBACiAKICNpbmNsdWRlIDxkdC1iaW5kaW5ncy9jbG9jay9leHlub3M1NDEwLmg+CiAKLSNp bmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNpbmNsdWRl IDxsaW51eC9jbGstcHJvdmlkZXIuaD4KICNpbmNsdWRlIDxsaW51eC9vZi5oPgpkaWZmIC0tZ2l0 IGEvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstZXh5bm9zNTQyMC5jIGIvZHJpdmVycy9jbGsvc2Ft c3VuZy9jbGstZXh5bm9zNTQyMC5jCmluZGV4IDg0OGQ2MDIuLjAyMjljYzkgMTAwNjQ0Ci0tLSBh L2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLWV4eW5vczU0MjAuYworKysgYi9kcml2ZXJzL2Nsay9z YW1zdW5nL2Nsay1leHlub3M1NDIwLmMKQEAgLTExLDcgKzExLDYgQEAKICovCiAKICNpbmNsdWRl IDxkdC1iaW5kaW5ncy9jbG9jay9leHlub3M1NDIwLmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+ CiAjaW5jbHVkZSA8bGludXgvY2xrZGV2Lmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVy Lmg+CiAjaW5jbHVkZSA8bGludXgvb2YuaD4KZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3NhbXN1 bmcvY2xrLWV4eW5vczU0NDAuYyBiL2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLWV4eW5vczU0NDAu YwppbmRleCAwMGQxZDAwLi44YWRlYWExIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9zYW1zdW5n L2Nsay1leHlub3M1NDQwLmMKKysrIGIvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstZXh5bm9zNTQ0 MC5jCkBAIC0xMCw3ICsxMCw2IEBACiAqLwogCiAjaW5jbHVkZSA8ZHQtYmluZGluZ3MvY2xvY2sv ZXh5bm9zNTQ0MC5oPgotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Ns a2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxpbnV4 L29mLmg+CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9zYW1zdW5nL2Nsay1wbGwuYyBiL2RyaXZl cnMvY2xrL3NhbXN1bmcvY2xrLXBsbC5jCmluZGV4IGIwN2ZhZDIuLmFhZjIzNGEgMTAwNjQ0Ci0t LSBhL2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLXBsbC5jCisrKyBiL2RyaXZlcnMvY2xrL3NhbXN1 bmcvY2xrLXBsbC5jCkBAIC05MTAsMTIgKzkxMCwxMiBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGNs a19vcHMgc2Ftc3VuZ19wbGwyNTUweF9jbGtfb3BzID0gewogCS5yZWNhbGNfcmF0ZSA9IHNhbXN1 bmdfcGxsMjU1MHhfcmVjYWxjX3JhdGUsCiB9OwogCi1zdHJ1Y3QgY2xrICogX19pbml0IHNhbXN1 bmdfY2xrX3JlZ2lzdGVyX3BsbDI1NTB4KGNvbnN0IGNoYXIgKm5hbWUsCitzdHJ1Y3QgY2xrX2Nv cmUgKiBfX2luaXQgc2Ftc3VuZ19jbGtfcmVnaXN0ZXJfcGxsMjU1MHgoY29uc3QgY2hhciAqbmFt ZSwKIAkJCWNvbnN0IGNoYXIgKnBuYW1lLCBjb25zdCB2b2lkIF9faW9tZW0gKnJlZ19iYXNlLAog CQkJY29uc3QgdW5zaWduZWQgbG9uZyBvZmZzZXQpCiB7CiAJc3RydWN0IHNhbXN1bmdfY2xrX3Bs bDI1NTB4ICpwbGw7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwog CXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAlwbGwgPSBremFsbG9jKHNpemVvZigqcGxs KSwgR0ZQX0tFUk5FTCk7CkBAIC0xMTQ5LDcgKzExNDksNyBAQCBzdGF0aWMgdm9pZCBfX2luaXQg X3NhbXN1bmdfY2xrX3JlZ2lzdGVyX3BsbChzdHJ1Y3Qgc2Ftc3VuZ19jbGtfcHJvdmlkZXIgKmN0 eCwKIAkJCQl2b2lkIF9faW9tZW0gKmJhc2UpCiB7CiAJc3RydWN0IHNhbXN1bmdfY2xrX3BsbCAq cGxsOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3Qg Y2xrX2luaXRfZGF0YSBpbml0OwogCWludCByZXQsIGxlbjsKIApkaWZmIC0tZ2l0IGEvZHJpdmVy cy9jbGsvc2Ftc3VuZy9jbGstcGxsLmggYi9kcml2ZXJzL2Nsay9zYW1zdW5nL2Nsay1wbGwuaApp bmRleCBjMGVkNGQ0Li44MWFmMzQ0IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9zYW1zdW5nL2Ns ay1wbGwuaAorKysgYi9kcml2ZXJzL2Nsay9zYW1zdW5nL2Nsay1wbGwuaApAQCAtOTcsNyArOTcs NyBAQCBzdHJ1Y3Qgc2Ftc3VuZ19wbGxfcmF0ZV90YWJsZSB7CiAJdW5zaWduZWQgaW50IHZzZWw7 CiB9OwogCi1leHRlcm4gc3RydWN0IGNsayAqIF9faW5pdCBzYW1zdW5nX2Nsa19yZWdpc3Rlcl9w bGwyNTUweChjb25zdCBjaGFyICpuYW1lLAorZXh0ZXJuIHN0cnVjdCBjbGtfY29yZSAqIF9faW5p dCBzYW1zdW5nX2Nsa19yZWdpc3Rlcl9wbGwyNTUweChjb25zdCBjaGFyICpuYW1lLAogCQkJY29u c3QgY2hhciAqcG5hbWUsIGNvbnN0IHZvaWQgX19pb21lbSAqcmVnX2Jhc2UsCiAJCQljb25zdCB1 bnNpZ25lZCBsb25nIG9mZnNldCk7CiAKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3NhbXN1bmcv Y2xrLXMzYzI0MTAtZGNsay5jIGIvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstczNjMjQxMC1kY2xr LmMKaW5kZXggMDQ0OWNjMC4uMDUzNTRiZCAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvc2Ftc3Vu Zy9jbGstczNjMjQxMC1kY2xrLmMKKysrIGIvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstczNjMjQx MC1kY2xrLmMKQEAgLTg3LDEyICs4NywxMiBAQCBjb25zdCBzdHJ1Y3QgY2xrX29wcyBzM2MyNHh4 X2Nsa291dF9vcHMgPSB7CiAJLmRldGVybWluZV9yYXRlID0gX19jbGtfbXV4X2RldGVybWluZV9y YXRlLAogfTsKIAotc3RydWN0IGNsayAqczNjMjR4eF9yZWdpc3Rlcl9jbGtvdXQoc3RydWN0IGRl dmljZSAqZGV2LCBjb25zdCBjaGFyICpuYW1lLAorc3RydWN0IGNsa19jb3JlICpzM2MyNHh4X3Jl Z2lzdGVyX2Nsa291dChzdHJ1Y3QgZGV2aWNlICpkZXYsIGNvbnN0IGNoYXIgKm5hbWUsCiAJCWNv bnN0IGNoYXIgKipwYXJlbnRfbmFtZXMsIHU4IG51bV9wYXJlbnRzLAogCQl1OCBzaGlmdCwgdTMy IG1hc2spCiB7CiAJc3RydWN0IHMzYzI0eHhfY2xrb3V0ICpjbGtvdXQ7Ci0Jc3RydWN0IGNsayAq Y2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7 CiAKIAkvKiBhbGxvY2F0ZSB0aGUgY2xrb3V0ICovCkBAIC0yMzcsNyArMjM3LDcgQEAgc3RhdGlj IGludCBzM2MyNHh4X2RjbGtfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKIHsK IAlzdHJ1Y3QgczNjMjR4eF9kY2xrICpzM2MyNHh4X2RjbGs7CiAJc3RydWN0IHJlc291cmNlICpt ZW07Ci0Jc3RydWN0IGNsayAqKmNsa190YWJsZTsKKwlzdHJ1Y3QgY2xrX2NvcmUgKipjbGtfdGFi bGU7CiAJc3RydWN0IHMzYzI0eHhfZGNsa19kcnZfZGF0YSAqZGNsa192YXJpYW50OwogCWludCBy ZXQsIGk7CiAKQEAgLTI1MSw3ICsyNTEsNyBAQCBzdGF0aWMgaW50IHMzYzI0eHhfZGNsa19wcm9i ZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQogCXNwaW5fbG9ja19pbml0KCZzM2MyNHh4 X2RjbGstPmRjbGtfbG9jayk7CiAKIAljbGtfdGFibGUgPSBkZXZtX2t6YWxsb2MoJnBkZXYtPmRl diwKLQkJCQkgc2l6ZW9mKHN0cnVjdCBjbGsgKikgKiBEQ0xLX01BWF9DTEtTLAorCQkJCSBzaXpl b2Yoc3RydWN0IGNsa19jb3JlICopICogRENMS19NQVhfQ0xLUywKIAkJCQkgR0ZQX0tFUk5FTCk7 CiAJaWYgKCFjbGtfdGFibGUpCiAJCXJldHVybiAtRU5PTUVNOwpAQCAtMzI5LDIxICszMjksMjEg QEAgc3RhdGljIGludCBzM2MyNHh4X2RjbGtfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAq cGRldikKIAlzM2MyNHh4X2RjbGstPmRjbGsxX2Rpdl9jaGFuZ2VfbmIubm90aWZpZXJfY2FsbCA9 CiAJCQkJCQlzM2MyNHh4X2RjbGsxX2Rpdl9ub3RpZnk7CiAKLQlyZXQgPSBjbGtfbm90aWZpZXJf cmVnaXN0ZXIoY2xrX3RhYmxlW0RJVl9EQ0xLMF0sCi0JCQkJICAgICZzM2MyNHh4X2RjbGstPmRj bGswX2Rpdl9jaGFuZ2VfbmIpOworCXJldCA9IGNsa19wcm92aWRlcl9ub3RpZmllcl9yZWdpc3Rl cihjbGtfdGFibGVbRElWX0RDTEswXSwKKwkJCQkJICAgICAmczNjMjR4eF9kY2xrLT5kY2xrMF9k aXZfY2hhbmdlX25iKTsKIAlpZiAocmV0KQogCQlnb3RvIGVycl9jbGtfcmVnaXN0ZXI7CiAKLQly ZXQgPSBjbGtfbm90aWZpZXJfcmVnaXN0ZXIoY2xrX3RhYmxlW0RJVl9EQ0xLMV0sCi0JCQkJICAg ICZzM2MyNHh4X2RjbGstPmRjbGsxX2Rpdl9jaGFuZ2VfbmIpOworCXJldCA9IGNsa19wcm92aWRl cl9ub3RpZmllcl9yZWdpc3RlcihjbGtfdGFibGVbRElWX0RDTEsxXSwKKwkJCQkJICAgICAmczNj MjR4eF9kY2xrLT5kY2xrMV9kaXZfY2hhbmdlX25iKTsKIAlpZiAocmV0KQogCQlnb3RvIGVycl9k Y2xrX25vdGlmeTsKIAogCXJldHVybiAwOwogCiBlcnJfZGNsa19ub3RpZnk6Ci0JY2xrX25vdGlm aWVyX3VucmVnaXN0ZXIoY2xrX3RhYmxlW0RJVl9EQ0xLMF0sCi0JCQkJJnMzYzI0eHhfZGNsay0+ ZGNsazBfZGl2X2NoYW5nZV9uYik7CisJY2xrX3Byb3ZpZGVyX25vdGlmaWVyX3VucmVnaXN0ZXIo Y2xrX3RhYmxlW0RJVl9EQ0xLMF0sCisJCQkJCSAmczNjMjR4eF9kY2xrLT5kY2xrMF9kaXZfY2hh bmdlX25iKTsKIGVycl9jbGtfcmVnaXN0ZXI6CiAJZm9yIChpID0gMDsgaSA8IERDTEtfTUFYX0NM S1M7IGkrKykKIAkJaWYgKGNsa190YWJsZVtpXSAmJiAhSVNfRVJSKGNsa190YWJsZVtpXSkpCkBA IC0zNTUsMTMgKzM1NSwxMyBAQCBlcnJfY2xrX3JlZ2lzdGVyOgogc3RhdGljIGludCBzM2MyNHh4 X2RjbGtfcmVtb3ZlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCiB7CiAJc3RydWN0IHMz YzI0eHhfZGNsayAqczNjMjR4eF9kY2xrID0gcGxhdGZvcm1fZ2V0X2RydmRhdGEocGRldik7Ci0J c3RydWN0IGNsayAqKmNsa190YWJsZSA9IHMzYzI0eHhfZGNsay0+Y2xrX2RhdGEuY2xrczsKKwlz dHJ1Y3QgY2xrX2NvcmUgKipjbGtfdGFibGUgPSBzM2MyNHh4X2RjbGstPmNsa19kYXRhLmNsa3M7 CiAJaW50IGk7CiAKLQljbGtfbm90aWZpZXJfdW5yZWdpc3RlcihjbGtfdGFibGVbRElWX0RDTEsx XSwKLQkJCQkmczNjMjR4eF9kY2xrLT5kY2xrMV9kaXZfY2hhbmdlX25iKTsKLQljbGtfbm90aWZp ZXJfdW5yZWdpc3RlcihjbGtfdGFibGVbRElWX0RDTEswXSwKLQkJCQkmczNjMjR4eF9kY2xrLT5k Y2xrMF9kaXZfY2hhbmdlX25iKTsKKwljbGtfcHJvdmlkZXJfbm90aWZpZXJfdW5yZWdpc3Rlcihj bGtfdGFibGVbRElWX0RDTEsxXSwKKwkJCQkJICZzM2MyNHh4X2RjbGstPmRjbGsxX2Rpdl9jaGFu Z2VfbmIpOworCWNsa19wcm92aWRlcl9ub3RpZmllcl91bnJlZ2lzdGVyKGNsa190YWJsZVtESVZf RENMSzBdLAorCQkJCQkgJnMzYzI0eHhfZGNsay0+ZGNsazBfZGl2X2NoYW5nZV9uYik7CiAKIAlm b3IgKGkgPSAwOyBpIDwgRENMS19NQVhfQ0xLUzsgaSsrKQogCQljbGtfdW5yZWdpc3RlcihjbGtf dGFibGVbaV0pOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstczNjMjQxMC5j IGIvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstczNjMjQxMC5jCmluZGV4IDVkMmYwMzQuLmFmMTUx NTYgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLXMzYzI0MTAuYworKysgYi9k cml2ZXJzL2Nsay9zYW1zdW5nL2Nsay1zM2MyNDEwLmMKQEAgLTgsNyArOCw2IEBACiAgKiBDb21t b24gQ2xvY2sgRnJhbWV3b3JrIHN1cHBvcnQgZm9yIFMzQzI0MTAgYW5kIGZvbGxvd2luZyBTb0Nz LgogICovCiAKLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYu aD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIuaD4KICNpbmNsdWRlIDxsaW51eC9vZi5o PgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstczNjMjQxMi5jIGIvZHJpdmVy cy9jbGsvc2Ftc3VuZy9jbGstczNjMjQxMi5jCmluZGV4IDM0YWYwOWYuLjdlNmNjOTUgMTAwNjQ0 Ci0tLSBhL2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLXMzYzI0MTIuYworKysgYi9kcml2ZXJzL2Ns ay9zYW1zdW5nL2Nsay1zM2MyNDEyLmMKQEAgLTgsNyArOCw2IEBACiAgKiBDb21tb24gQ2xvY2sg RnJhbWV3b3JrIHN1cHBvcnQgZm9yIFMzQzI0MTIgYW5kIFMzQzI0MTMuCiAgKi8KIAotI2luY2x1 ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsa2Rldi5oPgogI2luY2x1ZGUgPGxp bnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxpbnV4L29mLmg+CmRpZmYgLS1naXQgYS9k cml2ZXJzL2Nsay9zYW1zdW5nL2Nsay1zM2MyNDQzLmMgYi9kcml2ZXJzL2Nsay9zYW1zdW5nL2Ns ay1zM2MyNDQzLmMKaW5kZXggYzkyZjg1My4uN2VhYWE2OCAxMDA2NDQKLS0tIGEvZHJpdmVycy9j bGsvc2Ftc3VuZy9jbGstczNjMjQ0My5jCisrKyBiL2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLXMz YzI0NDMuYwpAQCAtOCw3ICs4LDYgQEAKICAqIENvbW1vbiBDbG9jayBGcmFtZXdvcmsgc3VwcG9y dCBmb3IgUzNDMjQ0MyBhbmQgZm9sbG93aW5nIFNvQ3MuCiAgKi8KIAotI2luY2x1ZGUgPGxpbnV4 L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsa2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay1w cm92aWRlci5oPgogI2luY2x1ZGUgPGxpbnV4L29mLmg+CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Ns ay9zYW1zdW5nL2Nsay1zM2M2NHh4LmMgYi9kcml2ZXJzL2Nsay9zYW1zdW5nL2Nsay1zM2M2NHh4 LmMKaW5kZXggMGY1OTBlNS4uN2RhZDY3NSAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvc2Ftc3Vu Zy9jbGstczNjNjR4eC5jCisrKyBiL2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLXMzYzY0eHguYwpA QCAtOCw3ICs4LDYgQEAKICAqIENvbW1vbiBDbG9jayBGcmFtZXdvcmsgc3VwcG9ydCBmb3IgYWxs IFMzQzY0eHggU29Dcy4KICovCiAKLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxs aW51eC9jbGtkZXYuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIuaD4KICNpbmNsdWRl IDxsaW51eC9vZi5oPgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstczVwdjIx MC1hdWRzcy5jIGIvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGstczVwdjIxMC1hdWRzcy5jCmluZGV4 IGE4MDUzYjQuLmY3Yjc3ZTUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLXM1 cHYyMTAtYXVkc3MuYworKysgYi9kcml2ZXJzL2Nsay9zYW1zdW5nL2Nsay1zNXB2MjEwLWF1ZHNz LmMKQEAgLTI0LDcgKzI0LDcgQEAKICNpbmNsdWRlIDxkdC1iaW5kaW5ncy9jbG9jay9zNXB2MjEw LWF1ZHNzLmg+CiAKIHN0YXRpYyBERUZJTkVfU1BJTkxPQ0sobG9jayk7Ci1zdGF0aWMgc3RydWN0 IGNsayAqKmNsa190YWJsZTsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKipjbGtfdGFibGU7CiBz dGF0aWMgdm9pZCBfX2lvbWVtICpyZWdfYmFzZTsKIHN0YXRpYyBzdHJ1Y3QgY2xrX29uZWNlbGxf ZGF0YSBjbGtfZGF0YTsKIApAQCAtNzEsNyArNzEsNyBAQCBzdGF0aWMgaW50IHM1cHYyMTBfYXVk c3NfY2xrX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZpY2UgKnBkZXYpCiAJY29uc3QgY2hhciAq bW91dF9hdWRzc19wWzJdOwogCWNvbnN0IGNoYXIgKm1vdXRfaTJzX3BbM107CiAJY29uc3QgY2hh ciAqaGNsa19wOwotCXN0cnVjdCBjbGsgKmhjbGssICpwbGxfcmVmLCAqcGxsX2luLCAqY2RjbGss ICpzY2xrX2F1ZGlvOworCXN0cnVjdCBjbGtfY29yZSAqaGNsaywgKnBsbF9yZWYsICpwbGxfaW4s ICpjZGNsaywgKnNjbGtfYXVkaW87CiAKIAlyZXMgPSBwbGF0Zm9ybV9nZXRfcmVzb3VyY2UocGRl diwgSU9SRVNPVVJDRV9NRU0sIDApOwogCXJlZ19iYXNlID0gZGV2bV9pb3JlbWFwX3Jlc291cmNl KCZwZGV2LT5kZXYsIHJlcyk7CkBAIC04MSw3ICs4MSw3IEBAIHN0YXRpYyBpbnQgczVwdjIxMF9h dWRzc19jbGtfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKIAl9CiAKIAljbGtf dGFibGUgPSBkZXZtX2t6YWxsb2MoJnBkZXYtPmRldiwKLQkJCQlzaXplb2Yoc3RydWN0IGNsayAq KSAqIEFVRFNTX01BWF9DTEtTLAorCQkJCXNpemVvZihzdHJ1Y3QgY2xrX2NvcmUgKikgKiBBVURT U19NQVhfQ0xLUywKIAkJCQlHRlBfS0VSTkVMKTsKIAlpZiAoIWNsa190YWJsZSkKIAkJcmV0dXJu IC1FTk9NRU07CkBAIC04OSwyNyArODksMjcgQEAgc3RhdGljIGludCBzNXB2MjEwX2F1ZHNzX2Ns a19wcm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQogCWNsa19kYXRhLmNsa3MgPSBj bGtfdGFibGU7CiAJY2xrX2RhdGEuY2xrX251bSA9IEFVRFNTX01BWF9DTEtTOwogCi0JaGNsayA9 IGRldm1fY2xrX2dldCgmcGRldi0+ZGV2LCAiaGNsayIpOworCWhjbGsgPSBkZXZtX2Nsa19wcm92 aWRlcl9nZXQoJnBkZXYtPmRldiwgImhjbGsiKTsKIAlpZiAoSVNfRVJSKGhjbGspKSB7CiAJCWRl dl9lcnIoJnBkZXYtPmRldiwgImZhaWxlZCB0byBnZXQgaGNsayBjbG9ja1xuIik7CiAJCXJldHVy biBQVFJfRVJSKGhjbGspOwogCX0KIAotCXBsbF9pbiA9IGRldm1fY2xrX2dldCgmcGRldi0+ZGV2 LCAiZm91dF9lcGxsIik7CisJcGxsX2luID0gZGV2bV9jbGtfcHJvdmlkZXJfZ2V0KCZwZGV2LT5k ZXYsICJmb3V0X2VwbGwiKTsKIAlpZiAoSVNfRVJSKHBsbF9pbikpIHsKIAkJZGV2X2VycigmcGRl di0+ZGV2LCAiZmFpbGVkIHRvIGdldCBmb3V0X2VwbGwgY2xvY2tcbiIpOwogCQlyZXR1cm4gUFRS X0VSUihwbGxfaW4pOwogCX0KIAotCXNjbGtfYXVkaW8gPSBkZXZtX2Nsa19nZXQoJnBkZXYtPmRl diwgInNjbGtfYXVkaW8wIik7CisJc2Nsa19hdWRpbyA9IGRldm1fY2xrX3Byb3ZpZGVyX2dldCgm cGRldi0+ZGV2LCAic2Nsa19hdWRpbzAiKTsKIAlpZiAoSVNfRVJSKHNjbGtfYXVkaW8pKSB7CiAJ CWRldl9lcnIoJnBkZXYtPmRldiwgImZhaWxlZCB0byBnZXQgc2Nsa19hdWRpbzAgY2xvY2tcbiIp OwogCQlyZXR1cm4gUFRSX0VSUihzY2xrX2F1ZGlvKTsKIAl9CiAKIAkvKiBpaXNjZGNsazAgaXMg YW4gb3B0aW9uYWwgZXh0ZXJuYWwgSTJTIGNvZGVjIGNsb2NrICovCi0JY2RjbGsgPSBkZXZtX2Ns a19nZXQoJnBkZXYtPmRldiwgImlpc2NkY2xrMCIpOwotCXBsbF9yZWYgPSBkZXZtX2Nsa19nZXQo JnBkZXYtPmRldiwgInh4dGkiKTsKKwljZGNsayA9IGRldm1fY2xrX3Byb3ZpZGVyX2dldCgmcGRl di0+ZGV2LCAiaWlzY2RjbGswIik7CisJcGxsX3JlZiA9IGRldm1fY2xrX3Byb3ZpZGVyX2dldCgm cGRldi0+ZGV2LCAieHh0aSIpOwogCiAJaWYgKCFJU19FUlIocGxsX3JlZikpCiAJCW1vdXRfYXVk c3NfcFswXSA9IF9fY2xrX2dldF9uYW1lKHBsbF9yZWYpOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9j bGsvc2Ftc3VuZy9jbGsuYyBiL2RyaXZlcnMvY2xrL3NhbXN1bmcvY2xrLmMKaW5kZXggZGVhYjg0 ZC4uNjgxMzNmYSAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGsuYworKysgYi9k cml2ZXJzL2Nsay9zYW1zdW5nL2Nsay5jCkBAIC01MiwxNCArNTIsMTQgQEAgc3RydWN0IHNhbXN1 bmdfY2xrX3Byb3ZpZGVyICpfX2luaXQgc2Ftc3VuZ19jbGtfaW5pdChzdHJ1Y3QgZGV2aWNlX25v ZGUgKm5wLAogCQkJdm9pZCBfX2lvbWVtICpiYXNlLCB1bnNpZ25lZCBsb25nIG5yX2Nsa3MpCiB7 CiAJc3RydWN0IHNhbXN1bmdfY2xrX3Byb3ZpZGVyICpjdHg7Ci0Jc3RydWN0IGNsayAqKmNsa190 YWJsZTsKKwlzdHJ1Y3QgY2xrX2NvcmUgKipjbGtfdGFibGU7CiAJaW50IGk7CiAKIAljdHggPSBr emFsbG9jKHNpemVvZihzdHJ1Y3Qgc2Ftc3VuZ19jbGtfcHJvdmlkZXIpLCBHRlBfS0VSTkVMKTsK IAlpZiAoIWN0eCkKIAkJcGFuaWMoImNvdWxkIG5vdCBhbGxvY2F0ZSBjbG9jayBwcm92aWRlciBj b250ZXh0LlxuIik7CiAKLQljbGtfdGFibGUgPSBrY2FsbG9jKG5yX2Nsa3MsIHNpemVvZihzdHJ1 Y3QgY2xrICopLCBHRlBfS0VSTkVMKTsKKwljbGtfdGFibGUgPSBrY2FsbG9jKG5yX2Nsa3MsIHNp emVvZihzdHJ1Y3QgY2xrX2NvcmUgKiksIEdGUF9LRVJORUwpOwogCWlmICghY2xrX3RhYmxlKQog CQlwYW5pYygiY291bGQgbm90IGFsbG9jYXRlIGNsb2NrIGxvb2t1cCB0YWJsZVxuIik7CiAKQEAg LTg1LDcgKzg1LDcgQEAgdm9pZCBfX2luaXQgc2Ftc3VuZ19jbGtfb2ZfYWRkX3Byb3ZpZGVyKHN0 cnVjdCBkZXZpY2Vfbm9kZSAqbnAsCiB9CiAKIC8qIGFkZCBhIGNsb2NrIGluc3RhbmNlIHRvIHRo ZSBjbG9jayBsb29rdXAgdGFibGUgdXNlZCBmb3IgZHQgYmFzZWQgbG9va3VwICovCi12b2lkIHNh bXN1bmdfY2xrX2FkZF9sb29rdXAoc3RydWN0IHNhbXN1bmdfY2xrX3Byb3ZpZGVyICpjdHgsIHN0 cnVjdCBjbGsgKmNsaywKK3ZvaWQgc2Ftc3VuZ19jbGtfYWRkX2xvb2t1cChzdHJ1Y3Qgc2Ftc3Vu Z19jbGtfcHJvdmlkZXIgKmN0eCwgc3RydWN0IGNsa19jb3JlICpjbGssCiAJCQkJdW5zaWduZWQg aW50IGlkKQogewogCWlmIChjdHgtPmNsa19kYXRhLmNsa3MgJiYgaWQpCkBAIC05Nyw3ICs5Nyw3 IEBAIHZvaWQgX19pbml0IHNhbXN1bmdfY2xrX3JlZ2lzdGVyX2FsaWFzKHN0cnVjdCBzYW1zdW5n X2Nsa19wcm92aWRlciAqY3R4LAogCQkJCXN0cnVjdCBzYW1zdW5nX2Nsb2NrX2FsaWFzICpsaXN0 LAogCQkJCXVuc2lnbmVkIGludCBucl9jbGspCiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVj dCBjbGtfY29yZSAqY2xrOwogCXVuc2lnbmVkIGludCBpZHgsIHJldDsKIAogCWlmICghY3R4LT5j bGtfZGF0YS5jbGtzKSB7CkBAIC0xMzAsNyArMTMwLDcgQEAgdm9pZCBfX2luaXQgc2Ftc3VuZ19j bGtfcmVnaXN0ZXJfYWxpYXMoc3RydWN0IHNhbXN1bmdfY2xrX3Byb3ZpZGVyICpjdHgsCiB2b2lk IF9faW5pdCBzYW1zdW5nX2Nsa19yZWdpc3Rlcl9maXhlZF9yYXRlKHN0cnVjdCBzYW1zdW5nX2Ns a19wcm92aWRlciAqY3R4LAogCQlzdHJ1Y3Qgc2Ftc3VuZ19maXhlZF9yYXRlX2Nsb2NrICpsaXN0 LCB1bnNpZ25lZCBpbnQgbnJfY2xrKQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xr X2NvcmUgKmNsazsKIAl1bnNpZ25lZCBpbnQgaWR4LCByZXQ7CiAKIAlmb3IgKGlkeCA9IDA7IGlk eCA8IG5yX2NsazsgaWR4KyssIGxpc3QrKykgewpAQCAtMTU5LDcgKzE1OSw3IEBAIHZvaWQgX19p bml0IHNhbXN1bmdfY2xrX3JlZ2lzdGVyX2ZpeGVkX3JhdGUoc3RydWN0IHNhbXN1bmdfY2xrX3By b3ZpZGVyICpjdHgsCiB2b2lkIF9faW5pdCBzYW1zdW5nX2Nsa19yZWdpc3Rlcl9maXhlZF9mYWN0 b3Ioc3RydWN0IHNhbXN1bmdfY2xrX3Byb3ZpZGVyICpjdHgsCiAJCXN0cnVjdCBzYW1zdW5nX2Zp eGVkX2ZhY3Rvcl9jbG9jayAqbGlzdCwgdW5zaWduZWQgaW50IG5yX2NsaykKIHsKLQlzdHJ1Y3Qg Y2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJdW5zaWduZWQgaW50IGlkeDsKIAog CWZvciAoaWR4ID0gMDsgaWR4IDwgbnJfY2xrOyBpZHgrKywgbGlzdCsrKSB7CkBAIC0xODAsNyAr MTgwLDcgQEAgdm9pZCBfX2luaXQgc2Ftc3VuZ19jbGtfcmVnaXN0ZXJfbXV4KHN0cnVjdCBzYW1z dW5nX2Nsa19wcm92aWRlciAqY3R4LAogCQkJCXN0cnVjdCBzYW1zdW5nX211eF9jbG9jayAqbGlz dCwKIAkJCQl1bnNpZ25lZCBpbnQgbnJfY2xrKQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1 Y3QgY2xrX2NvcmUgKmNsazsKIAl1bnNpZ25lZCBpbnQgaWR4LCByZXQ7CiAKIAlmb3IgKGlkeCA9 IDA7IGlkeCA8IG5yX2NsazsgaWR4KyssIGxpc3QrKykgewpAQCAtMjEyLDcgKzIxMiw3IEBAIHZv aWQgX19pbml0IHNhbXN1bmdfY2xrX3JlZ2lzdGVyX2RpdihzdHJ1Y3Qgc2Ftc3VuZ19jbGtfcHJv dmlkZXIgKmN0eCwKIAkJCQlzdHJ1Y3Qgc2Ftc3VuZ19kaXZfY2xvY2sgKmxpc3QsCiAJCQkJdW5z aWduZWQgaW50IG5yX2NsaykKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3Jl ICpjbGs7CiAJdW5zaWduZWQgaW50IGlkeCwgcmV0OwogCiAJZm9yIChpZHggPSAwOyBpZHggPCBu cl9jbGs7IGlkeCsrLCBsaXN0KyspIHsKQEAgLTI1MSw3ICsyNTEsNyBAQCB2b2lkIF9faW5pdCBz YW1zdW5nX2Nsa19yZWdpc3Rlcl9nYXRlKHN0cnVjdCBzYW1zdW5nX2Nsa19wcm92aWRlciAqY3R4 LAogCQkJCXN0cnVjdCBzYW1zdW5nX2dhdGVfY2xvY2sgKmxpc3QsCiAJCQkJdW5zaWduZWQgaW50 IG5yX2NsaykKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJ dW5zaWduZWQgaW50IGlkeCwgcmV0OwogCiAJZm9yIChpZHggPSAwOyBpZHggPCBucl9jbGs7IGlk eCsrLCBsaXN0KyspIHsKQEAgLTMwMyw3ICszMDMsNyBAQCB2b2lkIF9faW5pdCBzYW1zdW5nX2Ns a19vZl9yZWdpc3Rlcl9maXhlZF9leHQoc3RydWN0IHNhbXN1bmdfY2xrX3Byb3ZpZGVyICpjdHgs CiAvKiB1dGlsaXR5IGZ1bmN0aW9uIHRvIGdldCB0aGUgcmF0ZSBvZiBhIHNwZWNpZmllZCBjbG9j ayAqLwogdW5zaWduZWQgbG9uZyBfZ2V0X3JhdGUoY29uc3QgY2hhciAqY2xrX25hbWUpCiB7Ci0J c3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCiAJY2xrID0gX19jbGtf bG9va3VwKGNsa19uYW1lKTsKIAlpZiAoIWNsaykgewpAQCAtMzExLDUgKzMxMSw1IEBAIHVuc2ln bmVkIGxvbmcgX2dldF9yYXRlKGNvbnN0IGNoYXIgKmNsa19uYW1lKQogCQlyZXR1cm4gMDsKIAl9 CiAKLQlyZXR1cm4gY2xrX2dldF9yYXRlKGNsayk7CisJcmV0dXJuIGNsa19wcm92aWRlcl9nZXRf cmF0ZShjbGspOwogfQpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGsuaCBiL2Ry aXZlcnMvY2xrL3NhbXN1bmcvY2xrLmgKaW5kZXggNjZhYjM2Yi4uNThiMTIxNSAxMDA2NDQKLS0t IGEvZHJpdmVycy9jbGsvc2Ftc3VuZy9jbGsuaAorKysgYi9kcml2ZXJzL2Nsay9zYW1zdW5nL2Ns ay5oCkBAIC0xMyw3ICsxMyw2IEBACiAjaWZuZGVmIF9fU0FNU1VOR19DTEtfSAogI2RlZmluZSBf X1NBTVNVTkdfQ0xLX0gKIAotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4 L2Nsa2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L2lvLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXBy b3ZpZGVyLmg+CkBAIC0zMzYsNyArMzM1LDcgQEAgZXh0ZXJuIHZvaWQgX19pbml0IHNhbXN1bmdf Y2xrX29mX3JlZ2lzdGVyX2ZpeGVkX2V4dCgKIAkJCWNvbnN0IHN0cnVjdCBvZl9kZXZpY2VfaWQg KmNsa19tYXRjaGVzKTsKIAogZXh0ZXJuIHZvaWQgc2Ftc3VuZ19jbGtfYWRkX2xvb2t1cChzdHJ1 Y3Qgc2Ftc3VuZ19jbGtfcHJvdmlkZXIgKmN0eCwKLQkJCXN0cnVjdCBjbGsgKmNsaywgdW5zaWdu ZWQgaW50IGlkKTsKKwkJCXN0cnVjdCBjbGtfY29yZSAqY2xrLCB1bnNpZ25lZCBpbnQgaWQpOwog CiBleHRlcm4gdm9pZCBzYW1zdW5nX2Nsa19yZWdpc3Rlcl9hbGlhcyhzdHJ1Y3Qgc2Ftc3VuZ19j bGtfcHJvdmlkZXIgKmN0eCwKIAkJCXN0cnVjdCBzYW1zdW5nX2Nsb2NrX2FsaWFzICpsaXN0LApk aWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvc2htb2JpbGUvY2xrLWRpdjYuYyBiL2RyaXZlcnMvY2xr L3NobW9iaWxlL2Nsay1kaXY2LmMKaW5kZXggZjA2NWY2OS4uYzY3MTJmYiAxMDA2NDQKLS0tIGEv ZHJpdmVycy9jbGsvc2htb2JpbGUvY2xrLWRpdjYuYworKysgYi9kcml2ZXJzL2Nsay9zaG1vYmls ZS9jbGstZGl2Ni5jCkBAIC0xMTksNyArMTE5LDcgQEAgc3RhdGljIHZvaWQgX19pbml0IGNwZ19k aXY2X2Nsb2NrX2luaXQoc3RydWN0IGRldmljZV9ub2RlICpucCkKIAlzdHJ1Y3QgZGl2Nl9jbG9j ayAqY2xvY2s7CiAJY29uc3QgY2hhciAqcGFyZW50X25hbWU7CiAJY29uc3QgY2hhciAqbmFtZTsK LQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJaW50IHJldDsKIAog CWNsb2NrID0ga3phbGxvYyhzaXplb2YoKmNsb2NrKSwgR0ZQX0tFUk5FTCk7CmRpZmYgLS1naXQg YS9kcml2ZXJzL2Nsay9zaG1vYmlsZS9jbGstZW1ldjIuYyBiL2RyaXZlcnMvY2xrL3NobW9iaWxl L2Nsay1lbWV2Mi5jCmluZGV4IDZjN2M5MjkuLjJlM2E0NWIgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMv Y2xrL3NobW9iaWxlL2Nsay1lbWV2Mi5jCisrKyBiL2RyaXZlcnMvY2xrL3NobW9iaWxlL2Nsay1l bWV2Mi5jCkBAIC03MSw3ICs3MSw3IEBAIHN0YXRpYyB2b2lkIF9faW5pdCBlbWV2Ml9zbXVfaW5p dCh2b2lkKQogc3RhdGljIHZvaWQgX19pbml0IGVtZXYyX3NtdV9jbGtkaXZfaW5pdChzdHJ1Y3Qg ZGV2aWNlX25vZGUgKm5wKQogewogCXUzMiByZWdbMl07Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0 cnVjdCBjbGtfY29yZSAqY2xrOwogCWNvbnN0IGNoYXIgKnBhcmVudF9uYW1lID0gb2ZfY2xrX2dl dF9wYXJlbnRfbmFtZShucCwgMCk7CiAJaWYgKFdBUk5fT04ob2ZfcHJvcGVydHlfcmVhZF91MzJf YXJyYXkobnAsICJyZWciLCByZWcsIDIpKSkKIAkJcmV0dXJuOwpAQCAtODksNyArODksNyBAQCBD TEtfT0ZfREVDTEFSRShlbWV2Ml9zbXVfY2xrZGl2LCAicmVuZXNhcyxlbWV2Mi1zbXUtY2xrZGl2 IiwKIHN0YXRpYyB2b2lkIF9faW5pdCBlbWV2Ml9zbXVfZ2Nsa19pbml0KHN0cnVjdCBkZXZpY2Vf bm9kZSAqbnApCiB7CiAJdTMyIHJlZ1syXTsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNs a19jb3JlICpjbGs7CiAJY29uc3QgY2hhciAqcGFyZW50X25hbWUgPSBvZl9jbGtfZ2V0X3BhcmVu dF9uYW1lKG5wLCAwKTsKIAlpZiAoV0FSTl9PTihvZl9wcm9wZXJ0eV9yZWFkX3UzMl9hcnJheShu cCwgInJlZyIsIHJlZywgMikpKQogCQlyZXR1cm47CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9z aG1vYmlsZS9jbGstbXN0cC5jIGIvZHJpdmVycy9jbGsvc2htb2JpbGUvY2xrLW1zdHAuYwppbmRl eCAyZDJmZTc3Li4yNjU5Njc2IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9zaG1vYmlsZS9jbGst bXN0cC5jCisrKyBiL2RyaXZlcnMvY2xrL3NobW9iaWxlL2Nsay1tc3RwLmMKQEAgLTEyMSwxMyAr MTIxLDEzIEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgY2xrX29wcyBjcGdfbXN0cF9jbG9ja19vcHMg PSB7CiAJLmlzX2VuYWJsZWQgPSBjcGdfbXN0cF9jbG9ja19pc19lbmFibGVkLAogfTsKIAotc3Rh dGljIHN0cnVjdCBjbGsgKiBfX2luaXQKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKiBfX2luaXQK IGNwZ19tc3RwX2Nsb2NrX3JlZ2lzdGVyKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBh cmVudF9uYW1lLAogCQkJdW5zaWduZWQgaW50IGluZGV4LCBzdHJ1Y3QgbXN0cF9jbG9ja19ncm91 cCAqZ3JvdXApCiB7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAlzdHJ1Y3QgbXN0cF9j bG9jayAqY2xvY2s7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwog CiAJY2xvY2sgPSBremFsbG9jKHNpemVvZigqY2xvY2spLCBHRlBfS0VSTkVMKTsKIAlpZiAoIWNs b2NrKSB7CkBAIC0xNTcsNyArMTU3LDcgQEAgc3RhdGljIHZvaWQgX19pbml0IGNwZ19tc3RwX2Ns b2Nrc19pbml0KHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnApCiB7CiAJc3RydWN0IG1zdHBfY2xvY2tf Z3JvdXAgKmdyb3VwOwogCWNvbnN0IGNoYXIgKmlkeG5hbWU7Ci0Jc3RydWN0IGNsayAqKmNsa3M7 CisJc3RydWN0IGNsa19jb3JlICoqY2xrczsKIAl1bnNpZ25lZCBpbnQgaTsKIAogCWdyb3VwID0g a3phbGxvYyhzaXplb2YoKmdyb3VwKSwgR0ZQX0tFUk5FTCk7CmRpZmYgLS1naXQgYS9kcml2ZXJz L2Nsay9zaG1vYmlsZS9jbGstcjhhNzc0MC5jIGIvZHJpdmVycy9jbGsvc2htb2JpbGUvY2xrLXI4 YTc3NDAuYwppbmRleCAxZTJlYWFlLi44ODg5ZTZhIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9z aG1vYmlsZS9jbGstcjhhNzc0MC5jCisrKyBiL2RyaXZlcnMvY2xrL3NobW9iaWxlL2Nsay1yOGE3 NzQwLmMKQEAgLTYxLDcgKzYxLDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfZGl2X3RhYmxl IGRpdjRfZGl2X3RhYmxlW10gPSB7CiAKIHN0YXRpYyB1MzIgY3BnX21vZGUgX19pbml0ZGF0YTsK IAotc3RhdGljIHN0cnVjdCBjbGsgKiBfX2luaXQKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKiBf X2luaXQKIHI4YTc3NDBfY3BnX3JlZ2lzdGVyX2Nsb2NrKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnAs IHN0cnVjdCByOGE3NzQwX2NwZyAqY3BnLAogCQkJICAgICBjb25zdCBjaGFyICpuYW1lKQogewpA QCAtMTQ3LDcgKzE0Nyw3IEBAIHI4YTc3NDBfY3BnX3JlZ2lzdGVyX2Nsb2NrKHN0cnVjdCBkZXZp Y2Vfbm9kZSAqbnAsIHN0cnVjdCByOGE3NzQwX2NwZyAqY3BnLAogc3RhdGljIHZvaWQgX19pbml0 IHI4YTc3NDBfY3BnX2Nsb2Nrc19pbml0KHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnApCiB7CiAJc3Ry dWN0IHI4YTc3NDBfY3BnICpjcGc7Ci0Jc3RydWN0IGNsayAqKmNsa3M7CisJc3RydWN0IGNsa19j b3JlICoqY2xrczsKIAl1bnNpZ25lZCBpbnQgaTsKIAlpbnQgbnVtX2Nsa3M7CiAKQEAgLTE4MCw3 ICsxODAsNyBAQCBzdGF0aWMgdm9pZCBfX2luaXQgcjhhNzc0MF9jcGdfY2xvY2tzX2luaXQoc3Ry dWN0IGRldmljZV9ub2RlICpucCkKIAogCWZvciAoaSA9IDA7IGkgPCBudW1fY2xrczsgKytpKSB7 CiAJCWNvbnN0IGNoYXIgKm5hbWU7Ci0JCXN0cnVjdCBjbGsgKmNsazsKKwkJc3RydWN0IGNsa19j b3JlICpjbGs7CiAKIAkJb2ZfcHJvcGVydHlfcmVhZF9zdHJpbmdfaW5kZXgobnAsICJjbG9jay1v dXRwdXQtbmFtZXMiLCBpLAogCQkJCQkgICAgICAmbmFtZSk7CmRpZmYgLS1naXQgYS9kcml2ZXJz L2Nsay9zaG1vYmlsZS9jbGstcjhhNzc3OS5jIGIvZHJpdmVycy9jbGsvc2htb2JpbGUvY2xrLXI4 YTc3NzkuYwppbmRleCA2NTJlY2FjLi45NmI1MWIxIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9z aG1vYmlsZS9jbGstcjhhNzc3OS5jCisrKyBiL2RyaXZlcnMvY2xrL3NobW9iaWxlL2Nsay1yOGE3 Nzc5LmMKQEAgLTkwLDcgKzkwLDcgQEAgc3RhdGljIGNvbnN0IHVuc2lnbmVkIGludCBjcGdfcGxs YV9tdWx0WzRdIF9faW5pdGNvbnN0ID0geyA0MiwgNDgsIDU2LCA2NCB9OwogCiBzdGF0aWMgdTMy IGNwZ19tb2RlIF9faW5pdGRhdGE7CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICogX19pbml0CitzdGF0 aWMgc3RydWN0IGNsa19jb3JlICogX19pbml0CiByOGE3Nzc5X2NwZ19yZWdpc3Rlcl9jbG9jayhz dHJ1Y3QgZGV2aWNlX25vZGUgKm5wLCBzdHJ1Y3QgcjhhNzc3OV9jcGcgKmNwZywKIAkJCSAgIGNv bnN0IHN0cnVjdCBjcGdfY2xrX2NvbmZpZyAqY29uZmlnLAogCQkJICAgdW5zaWduZWQgaW50IHBs bGFfbXVsdCwgY29uc3QgY2hhciAqbmFtZSkKQEAgLTEyNCw3ICsxMjQsNyBAQCBzdGF0aWMgdm9p ZCBfX2luaXQgcjhhNzc3OV9jcGdfY2xvY2tzX2luaXQoc3RydWN0IGRldmljZV9ub2RlICpucCkK IHsKIAljb25zdCBzdHJ1Y3QgY3BnX2Nsa19jb25maWcgKmNvbmZpZzsKIAlzdHJ1Y3QgcjhhNzc3 OV9jcGcgKmNwZzsKLQlzdHJ1Y3QgY2xrICoqY2xrczsKKwlzdHJ1Y3QgY2xrX2NvcmUgKipjbGtz OwogCXVuc2lnbmVkIGludCBpLCBwbGxhX211bHQ7CiAJaW50IG51bV9jbGtzOwogCkBAIC0xNTMs NyArMTUzLDcgQEAgc3RhdGljIHZvaWQgX19pbml0IHI4YTc3NzlfY3BnX2Nsb2Nrc19pbml0KHN0 cnVjdCBkZXZpY2Vfbm9kZSAqbnApCiAKIAlmb3IgKGkgPSAwOyBpIDwgbnVtX2Nsa3M7ICsraSkg ewogCQljb25zdCBjaGFyICpuYW1lOwotCQlzdHJ1Y3QgY2xrICpjbGs7CisJCXN0cnVjdCBjbGtf Y29yZSAqY2xrOwogCiAJCW9mX3Byb3BlcnR5X3JlYWRfc3RyaW5nX2luZGV4KG5wLCAiY2xvY2st b3V0cHV0LW5hbWVzIiwgaSwKIAkJCQkJICAgICAgJm5hbWUpOwpkaWZmIC0tZ2l0IGEvZHJpdmVy cy9jbGsvc2htb2JpbGUvY2xrLXJjYXItZ2VuMi5jIGIvZHJpdmVycy9jbGsvc2htb2JpbGUvY2xr LXJjYXItZ2VuMi5jCmluZGV4IGU5OTY0MjUuLjQ1YTA3MTIgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMv Y2xrL3NobW9iaWxlL2Nsay1yY2FyLWdlbjIuYworKysgYi9kcml2ZXJzL2Nsay9zaG1vYmlsZS9j bGstcmNhci1nZW4yLmMKQEAgLTEzMywxMiArMTMzLDEyIEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3Qg Y2xrX29wcyBjcGdfel9jbGtfb3BzID0gewogCS5zZXRfcmF0ZSA9IGNwZ196X2Nsa19zZXRfcmF0 ZSwKIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICogX19pbml0IGNwZ196X2Nsa19yZWdpc3Rlcihz dHJ1Y3QgcmNhcl9nZW4yX2NwZyAqY3BnKQorc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqIF9faW5p dCBjcGdfel9jbGtfcmVnaXN0ZXIoc3RydWN0IHJjYXJfZ2VuMl9jcGcgKmNwZykKIHsKIAlzdGF0 aWMgY29uc3QgY2hhciAqcGFyZW50X25hbWUgPSAicGxsMCI7CiAJc3RydWN0IGNsa19pbml0X2Rh dGEgaW5pdDsKIAlzdHJ1Y3QgY3BnX3pfY2xrICp6Y2xrOwotCXN0cnVjdCBjbGsgKmNsazsKKwlz dHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAogCXpjbGsgPSBremFsbG9jKHNpemVvZigqemNsayksIEdG UF9LRVJORUwpOwogCWlmICghemNsaykKQEAgLTIxMyw3ICsyMTMsNyBAQCBzdGF0aWMgY29uc3Qg c3RydWN0IGNsa19kaXZfdGFibGUgY3BnX3NkMDFfZGl2X3RhYmxlW10gPSB7CiAKIHN0YXRpYyB1 MzIgY3BnX21vZGUgX19pbml0ZGF0YTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKiBfX2luaXQKK3N0 YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKiBfX2luaXQKIHJjYXJfZ2VuMl9jcGdfcmVnaXN0ZXJfY2xv Y2soc3RydWN0IGRldmljZV9ub2RlICpucCwgc3RydWN0IHJjYXJfZ2VuMl9jcGcgKmNwZywKIAkJ CSAgICAgY29uc3Qgc3RydWN0IGNwZ19wbGxfY29uZmlnICpjb25maWcsCiAJCQkgICAgIGNvbnN0 IGNoYXIgKm5hbWUpCkBAIC0yODAsNyArMjgwLDcgQEAgc3RhdGljIHZvaWQgX19pbml0IHJjYXJf Z2VuMl9jcGdfY2xvY2tzX2luaXQoc3RydWN0IGRldmljZV9ub2RlICpucCkKIHsKIAljb25zdCBz dHJ1Y3QgY3BnX3BsbF9jb25maWcgKmNvbmZpZzsKIAlzdHJ1Y3QgcmNhcl9nZW4yX2NwZyAqY3Bn OwotCXN0cnVjdCBjbGsgKipjbGtzOworCXN0cnVjdCBjbGtfY29yZSAqKmNsa3M7CiAJdW5zaWdu ZWQgaW50IGk7CiAJaW50IG51bV9jbGtzOwogCkBAIC0zMTMsNyArMzEzLDcgQEAgc3RhdGljIHZv aWQgX19pbml0IHJjYXJfZ2VuMl9jcGdfY2xvY2tzX2luaXQoc3RydWN0IGRldmljZV9ub2RlICpu cCkKIAogCWZvciAoaSA9IDA7IGkgPCBudW1fY2xrczsgKytpKSB7CiAJCWNvbnN0IGNoYXIgKm5h bWU7Ci0JCXN0cnVjdCBjbGsgKmNsazsKKwkJc3RydWN0IGNsa19jb3JlICpjbGs7CiAKIAkJb2Zf cHJvcGVydHlfcmVhZF9zdHJpbmdfaW5kZXgobnAsICJjbG9jay1vdXRwdXQtbmFtZXMiLCBpLAog CQkJCQkgICAgICAmbmFtZSk7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9zaG1vYmlsZS9jbGst cnouYyBiL2RyaXZlcnMvY2xrL3NobW9iaWxlL2Nsay1yei5jCmluZGV4IDdlNjhlODYuLjQxNGUy MGUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3NobW9iaWxlL2Nsay1yei5jCisrKyBiL2RyaXZl cnMvY2xrL3NobW9iaWxlL2Nsay1yei5jCkBAIC0yOCw3ICsyOCw3IEBAIHN0cnVjdCByel9jcGcg ewogICogSW5pdGlhbGl6YXRpb24KICAqLwogCi1zdGF0aWMgc3RydWN0IGNsayAqIF9faW5pdAor c3RhdGljIHN0cnVjdCBjbGtfY29yZSAqIF9faW5pdAogcnpfY3BnX3JlZ2lzdGVyX2Nsb2NrKHN0 cnVjdCBkZXZpY2Vfbm9kZSAqbnAsIHN0cnVjdCByel9jcGcgKmNwZywgY29uc3QgY2hhciAqbmFt ZSkKIHsKIAl1MzIgdmFsOwpAQCAtNjcsNyArNjcsNyBAQCByel9jcGdfcmVnaXN0ZXJfY2xvY2so c3RydWN0IGRldmljZV9ub2RlICpucCwgc3RydWN0IHJ6X2NwZyAqY3BnLCBjb25zdCBjaGFyICpu YQogc3RhdGljIHZvaWQgX19pbml0IHJ6X2NwZ19jbG9ja3NfaW5pdChzdHJ1Y3QgZGV2aWNlX25v ZGUgKm5wKQogewogCXN0cnVjdCByel9jcGcgKmNwZzsKLQlzdHJ1Y3QgY2xrICoqY2xrczsKKwlz dHJ1Y3QgY2xrX2NvcmUgKipjbGtzOwogCXVuc2lnbmVkIGk7CiAJaW50IG51bV9jbGtzOwogCkBA IC04Niw3ICs4Niw3IEBAIHN0YXRpYyB2b2lkIF9faW5pdCByel9jcGdfY2xvY2tzX2luaXQoc3Ry dWN0IGRldmljZV9ub2RlICpucCkKIAogCWZvciAoaSA9IDA7IGkgPCBudW1fY2xrczsgKytpKSB7 CiAJCWNvbnN0IGNoYXIgKm5hbWU7Ci0JCXN0cnVjdCBjbGsgKmNsazsKKwkJc3RydWN0IGNsa19j b3JlICpjbGs7CiAKIAkJb2ZfcHJvcGVydHlfcmVhZF9zdHJpbmdfaW5kZXgobnAsICJjbG9jay1v dXRwdXQtbmFtZXMiLCBpLCAmbmFtZSk7CiAKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3NpcmYv Y2xrLWF0bGFzNi5jIGIvZHJpdmVycy9jbGsvc2lyZi9jbGstYXRsYXM2LmMKaW5kZXggZDYzYjc2 Yy4uM2IwN2EwMiAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvc2lyZi9jbGstYXRsYXM2LmMKKysr IGIvZHJpdmVycy9jbGsvc2lyZi9jbGstYXRsYXM2LmMKQEAgLTEwLDcgKzEwLDYgQEAKICNpbmNs dWRlIDxsaW51eC9tb2R1bGUuaD4KICNpbmNsdWRlIDxsaW51eC9iaXRvcHMuaD4KICNpbmNsdWRl IDxsaW51eC9pby5oPgotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Ns a2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxpbnV4 L29mX2FkZHJlc3MuaD4KQEAgLTExMyw3ICsxMTIsNyBAQCBzdGF0aWMgX19pbml0ZGF0YSBzdHJ1 Y3QgY2xrX2h3ICphdGxhczZfY2xrX2h3X2FycmF5W21heGNsa10gPSB7CiAJJmNsa19jcGhpZi5o dywKIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICphdGxhczZfY2xrc1ttYXhjbGtdOworc3RhdGlj IHN0cnVjdCBjbGtfY29yZSAqYXRsYXM2X2Nsa3NbbWF4Y2xrXTsKIAogc3RhdGljIHZvaWQgX19p bml0IGF0bGFzNl9jbGtfaW5pdChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wKQogewpkaWZmIC0tZ2l0 IGEvZHJpdmVycy9jbGsvc2lyZi9jbGstY29tbW9uLmMgYi9kcml2ZXJzL2Nsay9zaXJmL2Nsay1j b21tb24uYwppbmRleCAzN2FmNTFjLi4wNWY1MDQwIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9z aXJmL2Nsay1jb21tb24uYworKysgYi9kcml2ZXJzL2Nsay9zaXJmL2Nsay1jb21tb24uYwpAQCAt MTY1LDkgKzE2NSw5IEBAIHN0YXRpYyBsb25nIGNwdV9jbGtfcm91bmRfcmF0ZShzdHJ1Y3QgY2xr X2h3ICpodywgdW5zaWduZWQgbG9uZyByYXRlLAogCSAqIFNpUkYgU29DIGhhcyBub3QgY3B1IGNs b2NrIGNvbnRyb2wsCiAJICogU28gYnlwYXNzIHRvIGl0J3MgcGFyZW50IHBsbC4KIAkgKi8KLQlz dHJ1Y3QgY2xrICpwYXJlbnRfY2xrID0gY2xrX2dldF9wYXJlbnQoaHctPmNsayk7Ci0Jc3RydWN0 IGNsayAqcGxsX3BhcmVudF9jbGsgPSBjbGtfZ2V0X3BhcmVudChwYXJlbnRfY2xrKTsKLQl1bnNp Z25lZCBsb25nIHBsbF9wYXJlbnRfcmF0ZSA9IGNsa19nZXRfcmF0ZShwbGxfcGFyZW50X2Nsayk7 CisJc3RydWN0IGNsa19jb3JlICpwYXJlbnRfY2xrID0gY2xrX3Byb3ZpZGVyX2dldF9wYXJlbnQo aHctPmNsayk7CisJc3RydWN0IGNsa19jb3JlICpwbGxfcGFyZW50X2NsayA9IGNsa19wcm92aWRl cl9nZXRfcGFyZW50KHBhcmVudF9jbGspOworCXVuc2lnbmVkIGxvbmcgcGxsX3BhcmVudF9yYXRl ID0gY2xrX3Byb3ZpZGVyX2dldF9yYXRlKHBsbF9wYXJlbnRfY2xrKTsKIAlyZXR1cm4gcGxsX2Ns a19yb3VuZF9yYXRlKF9fY2xrX2dldF9odyhwYXJlbnRfY2xrKSwgcmF0ZSwgJnBsbF9wYXJlbnRf cmF0ZSk7CiB9CiAKQEAgLTE3OCw3ICsxNzgsNyBAQCBzdGF0aWMgdW5zaWduZWQgbG9uZyBjcHVf Y2xrX3JlY2FsY19yYXRlKHN0cnVjdCBjbGtfaHcgKmh3LAogCSAqIFNpUkYgU29DIGhhcyBub3Qg Y3B1IGNsb2NrIGNvbnRyb2wsCiAJICogU28gcmV0dXJuIHRoZSBwYXJlbnQgcGxsIHJhdGUuCiAJ ICovCi0Jc3RydWN0IGNsayAqcGFyZW50X2NsayA9IGNsa19nZXRfcGFyZW50KGh3LT5jbGspOwor CXN0cnVjdCBjbGtfY29yZSAqcGFyZW50X2NsayA9IGNsa19wcm92aWRlcl9nZXRfcGFyZW50KGh3 LT5jbGspOwogCXJldHVybiBfX2Nsa19nZXRfcmF0ZShwYXJlbnRfY2xrKTsKIH0KIApAQCAtNDAz LDM0ICs0MDMsMzQgQEAgc3RhdGljIGludCBjcHVfY2xrX3NldF9yYXRlKHN0cnVjdCBjbGtfaHcg Kmh3LCB1bnNpZ25lZCBsb25nIHJhdGUsCiAJCXVuc2lnbmVkIGxvbmcgcGFyZW50X3JhdGUpCiB7 CiAJaW50IHJldDEsIHJldDI7Ci0Jc3RydWN0IGNsayAqY3VyX3BhcmVudDsKKwlzdHJ1Y3QgY2xr X2NvcmUgKmN1cl9wYXJlbnQ7CiAKLQlpZiAocmF0ZSA9PSBjbGtfZ2V0X3JhdGUoY2xrX3BsbDEu aHcuY2xrKSkgewotCQlyZXQxID0gY2xrX3NldF9wYXJlbnQoaHctPmNsaywgY2xrX3BsbDEuaHcu Y2xrKTsKKwlpZiAocmF0ZSA9PSBjbGtfcHJvdmlkZXJfZ2V0X3JhdGUoY2xrX3BsbDEuaHcuY2xr KSkgeworCQlyZXQxID0gY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQoaHctPmNsaywgY2xrX3BsbDEu aHcuY2xrKTsKIAkJcmV0dXJuIHJldDE7CiAJfQogCi0JaWYgKHJhdGUgPT0gY2xrX2dldF9yYXRl KGNsa19wbGwyLmh3LmNsaykpIHsKLQkJcmV0MSA9IGNsa19zZXRfcGFyZW50KGh3LT5jbGssIGNs a19wbGwyLmh3LmNsayk7CisJaWYgKHJhdGUgPT0gY2xrX3Byb3ZpZGVyX2dldF9yYXRlKGNsa19w bGwyLmh3LmNsaykpIHsKKwkJcmV0MSA9IGNsa19wcm92aWRlcl9zZXRfcGFyZW50KGh3LT5jbGss IGNsa19wbGwyLmh3LmNsayk7CiAJCXJldHVybiByZXQxOwogCX0KIAotCWlmIChyYXRlID09IGNs a19nZXRfcmF0ZShjbGtfcGxsMy5ody5jbGspKSB7Ci0JCXJldDEgPSBjbGtfc2V0X3BhcmVudCho dy0+Y2xrLCBjbGtfcGxsMy5ody5jbGspOworCWlmIChyYXRlID09IGNsa19wcm92aWRlcl9nZXRf cmF0ZShjbGtfcGxsMy5ody5jbGspKSB7CisJCXJldDEgPSBjbGtfcHJvdmlkZXJfc2V0X3BhcmVu dChody0+Y2xrLCBjbGtfcGxsMy5ody5jbGspOwogCQlyZXR1cm4gcmV0MTsKIAl9CiAKLQljdXJf cGFyZW50ID0gY2xrX2dldF9wYXJlbnQoaHctPmNsayk7CisJY3VyX3BhcmVudCA9IGNsa19wcm92 aWRlcl9nZXRfcGFyZW50KGh3LT5jbGspOwogCiAJLyogc3dpdGNoIHRvIHRtcCBwbGwgYmVmb3Jl IHNldHRpbmcgcGFyZW50IGNsb2NrJ3MgcmF0ZSAqLwogCWlmIChjdXJfcGFyZW50ID09ICBjbGtf cGxsMS5ody5jbGspIHsKLQkJcmV0MSA9IGNsa19zZXRfcGFyZW50KGh3LT5jbGssIGNsa19wbGwy Lmh3LmNsayk7CisJCXJldDEgPSBjbGtfcHJvdmlkZXJfc2V0X3BhcmVudChody0+Y2xrLCBjbGtf cGxsMi5ody5jbGspOwogCQlCVUdfT04ocmV0MSk7CiAJfQogCi0JcmV0MiA9IGNsa19zZXRfcmF0 ZShjbGtfcGxsMS5ody5jbGssIHJhdGUpOworCXJldDIgPSBjbGtfcHJvdmlkZXJfc2V0X3JhdGUo Y2xrX3BsbDEuaHcuY2xrLCByYXRlKTsKIAotCXJldDEgPSBjbGtfc2V0X3BhcmVudChody0+Y2xr LCBjbGtfcGxsMS5ody5jbGspOworCXJldDEgPSBjbGtfcHJvdmlkZXJfc2V0X3BhcmVudChody0+ Y2xrLCBjbGtfcGxsMS5ody5jbGspOwogCiAJcmV0dXJuIHJldDIgPyByZXQyIDogcmV0MTsKIH0K ZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3NpcmYvY2xrLXByaW1hMi5jIGIvZHJpdmVycy9jbGsv c2lyZi9jbGstcHJpbWEyLmMKaW5kZXggNjk2OGUyZS4uODY5YmM4YyAxMDA2NDQKLS0tIGEvZHJp dmVycy9jbGsvc2lyZi9jbGstcHJpbWEyLmMKKysrIGIvZHJpdmVycy9jbGsvc2lyZi9jbGstcHJp bWEyLmMKQEAgLTEwLDcgKzEwLDYgQEAKICNpbmNsdWRlIDxsaW51eC9tb2R1bGUuaD4KICNpbmNs dWRlIDxsaW51eC9iaXRvcHMuaD4KICNpbmNsdWRlIDxsaW51eC9pby5oPgotI2luY2x1ZGUgPGxp bnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsa2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L2Ns ay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxpbnV4L29mX2FkZHJlc3MuaD4KQEAgLTExMiw3ICsx MTEsNyBAQCBzdGF0aWMgX19pbml0ZGF0YSBzdHJ1Y3QgY2xrX2h3ICpwcmltYTJfY2xrX2h3X2Fy cmF5W21heGNsa10gPSB7CiAJJmNsa19jcGhpZi5odywKIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xr ICpwcmltYTJfY2xrc1ttYXhjbGtdOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqcHJpbWEyX2Ns a3NbbWF4Y2xrXTsKIAogc3RhdGljIHZvaWQgX19pbml0IHByaW1hMl9jbGtfaW5pdChzdHJ1Y3Qg ZGV2aWNlX25vZGUgKm5wKQogewpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvc29jZnBnYS9jbGst Z2F0ZS5jIGIvZHJpdmVycy9jbGsvc29jZnBnYS9jbGstZ2F0ZS5jCmluZGV4IGRkM2E3OGMuLjVk MDBkZWUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3NvY2ZwZ2EvY2xrLWdhdGUuYworKysgYi9k cml2ZXJzL2Nsay9zb2NmcGdhL2Nsay1nYXRlLmMKQEAgLTE1LDcgKzE1LDYgQEAKICAqIEJhc2Vk IGZyb20gY2xrLWhpZ2hiYW5rLmMKICAqCiAgKi8KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNp bmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIuaD4K ICNpbmNsdWRlIDxsaW51eC9pby5oPgpAQCAtMTg4LDcgKzE4Nyw3IEBAIHN0YXRpYyB2b2lkIF9f aW5pdCBfX3NvY2ZwZ2FfZ2F0ZV9pbml0KHN0cnVjdCBkZXZpY2Vfbm9kZSAqbm9kZSwKIAl1MzIg ZGl2X3JlZ1szXTsKIAl1MzIgY2xrX3BoYXNlWzJdOwogCXUzMiBmaXhlZF9kaXY7Ci0Jc3RydWN0 IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBzb2NmcGdhX2dhdGVf Y2xrICpzb2NmcGdhX2NsazsKIAljb25zdCBjaGFyICpjbGtfbmFtZSA9IG5vZGUtPm5hbWU7CiAJ Y29uc3QgY2hhciAqcGFyZW50X25hbWVbU09DRlBHQV9NQVhfUEFSRU5UU107CmRpZmYgLS1naXQg YS9kcml2ZXJzL2Nsay9zb2NmcGdhL2Nsay1wZXJpcGguYyBiL2RyaXZlcnMvY2xrL3NvY2ZwZ2Ev Y2xrLXBlcmlwaC5jCmluZGV4IDQ2NTMxYzMuLjFiY2IyNzUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMv Y2xrL3NvY2ZwZ2EvY2xrLXBlcmlwaC5jCisrKyBiL2RyaXZlcnMvY2xrL3NvY2ZwZ2EvY2xrLXBl cmlwaC5jCkBAIC0xNSw3ICsxNSw2IEBACiAgKiBCYXNlZCBmcm9tIGNsay1oaWdoYmFuay5jCiAg KgogICovCi0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrZGV2Lmg+ CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5jbHVkZSA8bGludXgvaW8uaD4K QEAgLTUzLDcgKzUyLDcgQEAgc3RhdGljIF9faW5pdCB2b2lkIF9fc29jZnBnYV9wZXJpcGhfaW5p dChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUsCiAJY29uc3Qgc3RydWN0IGNsa19vcHMgKm9wcykK IHsKIAl1MzIgcmVnOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsK IAlzdHJ1Y3Qgc29jZnBnYV9wZXJpcGhfY2xrICpwZXJpcGhfY2xrOwogCWNvbnN0IGNoYXIgKmNs a19uYW1lID0gbm9kZS0+bmFtZTsKIAljb25zdCBjaGFyICpwYXJlbnRfbmFtZTsKZGlmZiAtLWdp dCBhL2RyaXZlcnMvY2xrL3NvY2ZwZ2EvY2xrLXBsbC5jIGIvZHJpdmVycy9jbGsvc29jZnBnYS9j bGstcGxsLmMKaW5kZXggZGU2ZGE5NS4uYmE3MDczZiAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsv c29jZnBnYS9jbGstcGxsLmMKKysrIGIvZHJpdmVycy9jbGsvc29jZnBnYS9jbGstcGxsLmMKQEAg LTE1LDcgKzE1LDYgQEAKICAqIEJhc2VkIGZyb20gY2xrLWhpZ2hiYW5rLmMKICAqCiAgKi8KLSNp bmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNpbmNsdWRl IDxsaW51eC9jbGstcHJvdmlkZXIuaD4KICNpbmNsdWRlIDxsaW51eC9pby5oPgpAQCAtODEsMTEg KzgwLDExIEBAIHN0YXRpYyBzdHJ1Y3QgY2xrX29wcyBjbGtfcGxsX29wcyA9IHsKIAkuZ2V0X3Bh cmVudCA9IGNsa19wbGxfZ2V0X3BhcmVudCwKIH07CiAKLXN0YXRpYyBfX2luaXQgc3RydWN0IGNs ayAqX19zb2NmcGdhX3BsbF9pbml0KHN0cnVjdCBkZXZpY2Vfbm9kZSAqbm9kZSwKK3N0YXRpYyBf X2luaXQgc3RydWN0IGNsa19jb3JlICpfX3NvY2ZwZ2FfcGxsX2luaXQoc3RydWN0IGRldmljZV9u b2RlICpub2RlLAogCWNvbnN0IHN0cnVjdCBjbGtfb3BzICpvcHMpCiB7CiAJdTMyIHJlZzsKLQlz dHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0IHNvY2ZwZ2Ff cGxsICpwbGxfY2xrOwogCWNvbnN0IGNoYXIgKmNsa19uYW1lID0gbm9kZS0+bmFtZTsKIAljb25z dCBjaGFyICpwYXJlbnRfbmFtZVtTT0NGUEdBX01BWF9QQVJFTlRTXTsKZGlmZiAtLWdpdCBhL2Ry aXZlcnMvY2xrL3NwZWFyL2Nsay1hdXgtc3ludGguYyBiL2RyaXZlcnMvY2xrL3NwZWFyL2Nsay1h dXgtc3ludGguYwppbmRleCBiZGZiNDQyLi4xODMzNGMzIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Ns ay9zcGVhci9jbGstYXV4LXN5bnRoLmMKKysrIGIvZHJpdmVycy9jbGsvc3BlYXIvY2xrLWF1eC1z eW50aC5jCkBAIC0xMzQsMTQgKzEzNCwxNCBAQCBzdGF0aWMgc3RydWN0IGNsa19vcHMgY2xrX2F1 eF9vcHMgPSB7CiAJLnNldF9yYXRlID0gY2xrX2F1eF9zZXRfcmF0ZSwKIH07CiAKLXN0cnVjdCBj bGsgKmNsa19yZWdpc3Rlcl9hdXgoY29uc3QgY2hhciAqYXV4X25hbWUsIGNvbnN0IGNoYXIgKmdh dGVfbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqY2xrX3JlZ2lzdGVyX2F1eChjb25zdCBjaGFyICph dXhfbmFtZSwgY29uc3QgY2hhciAqZ2F0ZV9uYW1lLAogCQljb25zdCBjaGFyICpwYXJlbnRfbmFt ZSwgdW5zaWduZWQgbG9uZyBmbGFncywgdm9pZCBfX2lvbWVtICpyZWcsCiAJCXN0cnVjdCBhdXhf Y2xrX21hc2tzICptYXNrcywgc3RydWN0IGF1eF9yYXRlX3RibCAqcnRibCwKLQkJdTggcnRibF9j bnQsIHNwaW5sb2NrX3QgKmxvY2ssIHN0cnVjdCBjbGsgKipnYXRlX2NsaykKKwkJdTggcnRibF9j bnQsIHNwaW5sb2NrX3QgKmxvY2ssIHN0cnVjdCBjbGtfY29yZSAqKmdhdGVfY2xrKQogewogCXN0 cnVjdCBjbGtfYXV4ICphdXg7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKLQlzdHJ1Y3Qg Y2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAKIAlpZiAoIWF1eF9uYW1lIHx8ICFw YXJlbnRfbmFtZSB8fCAhcmVnIHx8ICFydGJsIHx8ICFydGJsX2NudCkgewogCQlwcl9lcnIoIklu dmFsaWQgYXJndW1lbnRzIHBhc3NlZCIpOwpAQCAtMTc3LDcgKzE3Nyw3IEBAIHN0cnVjdCBjbGsg KmNsa19yZWdpc3Rlcl9hdXgoY29uc3QgY2hhciAqYXV4X25hbWUsIGNvbnN0IGNoYXIgKmdhdGVf bmFtZSwKIAkJZ290byBmcmVlX2F1eDsKIAogCWlmIChnYXRlX25hbWUpIHsKLQkJc3RydWN0IGNs ayAqdGdhdGVfY2xrOworCQlzdHJ1Y3QgY2xrX2NvcmUgKnRnYXRlX2NsazsKIAogCQl0Z2F0ZV9j bGsgPSBjbGtfcmVnaXN0ZXJfZ2F0ZShOVUxMLCBnYXRlX25hbWUsIGF1eF9uYW1lLAogCQkJCUNM S19TRVRfUkFURV9QQVJFTlQsIHJlZywKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3NwZWFyL2Ns ay1mcmFjLXN5bnRoLmMgYi9kcml2ZXJzL2Nsay9zcGVhci9jbGstZnJhYy1zeW50aC5jCmluZGV4 IGRmZmQ0Y2UuLmJjZTJjMGUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3NwZWFyL2Nsay1mcmFj LXN5bnRoLmMKKysrIGIvZHJpdmVycy9jbGsvc3BlYXIvY2xrLWZyYWMtc3ludGguYwpAQCAtMTIy LDEzICsxMjIsMTMgQEAgc3RhdGljIHN0cnVjdCBjbGtfb3BzIGNsa19mcmFjX29wcyA9IHsKIAku c2V0X3JhdGUgPSBjbGtfZnJhY19zZXRfcmF0ZSwKIH07CiAKLXN0cnVjdCBjbGsgKmNsa19yZWdp c3Rlcl9mcmFjKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAorc3Ry dWN0IGNsa19jb3JlICpjbGtfcmVnaXN0ZXJfZnJhYyhjb25zdCBjaGFyICpuYW1lLCBjb25zdCBj aGFyICpwYXJlbnRfbmFtZSwKIAkJdW5zaWduZWQgbG9uZyBmbGFncywgdm9pZCBfX2lvbWVtICpy ZWcsCiAJCXN0cnVjdCBmcmFjX3JhdGVfdGJsICpydGJsLCB1OCBydGJsX2NudCwgc3BpbmxvY2tf dCAqbG9jaykKIHsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwogCXN0cnVjdCBjbGtfZnJh YyAqZnJhYzsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAKIAlp ZiAoIW5hbWUgfHwgIXBhcmVudF9uYW1lIHx8ICFyZWcgfHwgIXJ0YmwgfHwgIXJ0YmxfY250KSB7 CiAJCXByX2VycigiSW52YWxpZCBhcmd1bWVudHMgcGFzc2VkIik7CmRpZmYgLS1naXQgYS9kcml2 ZXJzL2Nsay9zcGVhci9jbGstZ3B0LXN5bnRoLmMgYi9kcml2ZXJzL2Nsay9zcGVhci9jbGstZ3B0 LXN5bnRoLmMKaW5kZXggMWFmYzE4Yy4uZjhlMTNmMyAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsv c3BlYXIvY2xrLWdwdC1zeW50aC5jCisrKyBiL2RyaXZlcnMvY2xrL3NwZWFyL2Nsay1ncHQtc3lu dGguYwpAQCAtMTExLDEzICsxMTEsMTMgQEAgc3RhdGljIHN0cnVjdCBjbGtfb3BzIGNsa19ncHRf b3BzID0gewogCS5zZXRfcmF0ZSA9IGNsa19ncHRfc2V0X3JhdGUsCiB9OwogCi1zdHJ1Y3QgY2xr ICpjbGtfcmVnaXN0ZXJfZ3B0KGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9u YW1lLCB1bnNpZ25lZAorc3RydWN0IGNsa19jb3JlICpjbGtfcmVnaXN0ZXJfZ3B0KGNvbnN0IGNo YXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLCB1bnNpZ25lZAogCQlsb25nIGZsYWdz LCB2b2lkIF9faW9tZW0gKnJlZywgc3RydWN0IGdwdF9yYXRlX3RibCAqcnRibCwgdTgKIAkJcnRi bF9jbnQsIHNwaW5sb2NrX3QgKmxvY2spCiB7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsK IAlzdHJ1Y3QgY2xrX2dwdCAqZ3B0OwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2Nv cmUgKmNsazsKIAogCWlmICghbmFtZSB8fCAhcGFyZW50X25hbWUgfHwgIXJlZyB8fCAhcnRibCB8 fCAhcnRibF9jbnQpIHsKIAkJcHJfZXJyKCJJbnZhbGlkIGFyZ3VtZW50cyBwYXNzZWQiKTsKZGlm ZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3NwZWFyL2Nsay12Y28tcGxsLmMgYi9kcml2ZXJzL2Nsay9z cGVhci9jbGstdmNvLXBsbC5jCmluZGV4IDFiOWI2NWIuLjIyNmYyZWMgMTAwNjQ0Ci0tLSBhL2Ry aXZlcnMvY2xrL3NwZWFyL2Nsay12Y28tcGxsLmMKKysrIGIvZHJpdmVycy9jbGsvc3BlYXIvY2xr LXZjby1wbGwuYwpAQCAtMjcyLDE2ICsyNzIsMTYgQEAgc3RhdGljIHN0cnVjdCBjbGtfb3BzIGNs a192Y29fb3BzID0gewogCS5zZXRfcmF0ZSA9IGNsa192Y29fc2V0X3JhdGUsCiB9OwogCi1zdHJ1 Y3QgY2xrICpjbGtfcmVnaXN0ZXJfdmNvX3BsbChjb25zdCBjaGFyICp2Y29fbmFtZSwgY29uc3Qg Y2hhciAqcGxsX25hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdpc3Rlcl92Y29fcGxsKGNv bnN0IGNoYXIgKnZjb19uYW1lLCBjb25zdCBjaGFyICpwbGxfbmFtZSwKIAkJY29uc3QgY2hhciAq dmNvX2dhdGVfbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAJCXVuc2lnbmVkIGxvbmcg ZmxhZ3MsIHZvaWQgX19pb21lbSAqbW9kZV9yZWcsIHZvaWQgX19pb21lbQogCQkqY2ZnX3JlZywg c3RydWN0IHBsbF9yYXRlX3RibCAqcnRibCwgdTggcnRibF9jbnQsCi0JCXNwaW5sb2NrX3QgKmxv Y2ssIHN0cnVjdCBjbGsgKipwbGxfY2xrLAotCQlzdHJ1Y3QgY2xrICoqdmNvX2dhdGVfY2xrKQor CQlzcGlubG9ja190ICpsb2NrLCBzdHJ1Y3QgY2xrX2NvcmUgKipwbGxfY2xrLAorCQlzdHJ1Y3Qg Y2xrX2NvcmUgKip2Y29fZ2F0ZV9jbGspCiB7CiAJc3RydWN0IGNsa192Y28gKnZjbzsKIAlzdHJ1 Y3QgY2xrX3BsbCAqcGxsOwotCXN0cnVjdCBjbGsgKnZjb19jbGssICp0cGxsX2NsaywgKnR2Y29f Z2F0ZV9jbGs7CisJc3RydWN0IGNsa19jb3JlICp2Y29fY2xrLCAqdHBsbF9jbGssICp0dmNvX2dh dGVfY2xrOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIHZjb19pbml0LCBwbGxfaW5pdDsKIAljb25z dCBjaGFyICoqdmNvX3BhcmVudF9uYW1lOwogCmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9zcGVh ci9jbGsuaCBiL2RyaXZlcnMvY2xrL3NwZWFyL2Nsay5oCmluZGV4IDkzMTczNzYuLjc3NzMyMmUg MTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3NwZWFyL2Nsay5oCisrKyBiL2RyaXZlcnMvY2xrL3Nw ZWFyL2Nsay5oCkBAIC0xMTAsMjIgKzExMCwyMiBAQCB0eXBlZGVmIHVuc2lnbmVkIGxvbmcgKCpj bGtfY2FsY19yYXRlKShzdHJ1Y3QgY2xrX2h3ICpodywgdW5zaWduZWQgbG9uZyBwcmF0ZSwKIAkJ aW50IGluZGV4KTsKIAogLyogY2xrIHJlZ2lzdGVyIHJvdXRpbmVzICovCi1zdHJ1Y3QgY2xrICpj bGtfcmVnaXN0ZXJfYXV4KGNvbnN0IGNoYXIgKmF1eF9uYW1lLCBjb25zdCBjaGFyICpnYXRlX25h bWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdpc3Rlcl9hdXgoY29uc3QgY2hhciAqYXV4X25h bWUsIGNvbnN0IGNoYXIgKmdhdGVfbmFtZSwKIAkJY29uc3QgY2hhciAqcGFyZW50X25hbWUsIHVu c2lnbmVkIGxvbmcgZmxhZ3MsIHZvaWQgX19pb21lbSAqcmVnLAogCQlzdHJ1Y3QgYXV4X2Nsa19t YXNrcyAqbWFza3MsIHN0cnVjdCBhdXhfcmF0ZV90YmwgKnJ0YmwsCi0JCXU4IHJ0YmxfY250LCBz cGlubG9ja190ICpsb2NrLCBzdHJ1Y3QgY2xrICoqZ2F0ZV9jbGspOwotc3RydWN0IGNsayAqY2xr X3JlZ2lzdGVyX2ZyYWMoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUs CisJCXU4IHJ0YmxfY250LCBzcGlubG9ja190ICpsb2NrLCBzdHJ1Y3QgY2xrX2NvcmUgKipnYXRl X2Nsayk7CitzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdpc3Rlcl9mcmFjKGNvbnN0IGNoYXIgKm5h bWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAogCQl1bnNpZ25lZCBsb25nIGZsYWdzLCB2b2lk IF9faW9tZW0gKnJlZywKIAkJc3RydWN0IGZyYWNfcmF0ZV90YmwgKnJ0YmwsIHU4IHJ0YmxfY250 LCBzcGlubG9ja190ICpsb2NrKTsKLXN0cnVjdCBjbGsgKmNsa19yZWdpc3Rlcl9ncHQoY29uc3Qg Y2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsIHVuc2lnbmVkCitzdHJ1Y3QgY2xr X2NvcmUgKmNsa19yZWdpc3Rlcl9ncHQoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFy ZW50X25hbWUsIHVuc2lnbmVkCiAJCWxvbmcgZmxhZ3MsIHZvaWQgX19pb21lbSAqcmVnLCBzdHJ1 Y3QgZ3B0X3JhdGVfdGJsICpydGJsLCB1OAogCQlydGJsX2NudCwgc3BpbmxvY2tfdCAqbG9jayk7 Ci1zdHJ1Y3QgY2xrICpjbGtfcmVnaXN0ZXJfdmNvX3BsbChjb25zdCBjaGFyICp2Y29fbmFtZSwg Y29uc3QgY2hhciAqcGxsX25hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdpc3Rlcl92Y29f cGxsKGNvbnN0IGNoYXIgKnZjb19uYW1lLCBjb25zdCBjaGFyICpwbGxfbmFtZSwKIAkJY29uc3Qg Y2hhciAqdmNvX2dhdGVfbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAJCXVuc2lnbmVk IGxvbmcgZmxhZ3MsIHZvaWQgX19pb21lbSAqbW9kZV9yZWcsIHZvaWQgX19pb21lbQogCQkqY2Zn X3JlZywgc3RydWN0IHBsbF9yYXRlX3RibCAqcnRibCwgdTggcnRibF9jbnQsCi0JCXNwaW5sb2Nr X3QgKmxvY2ssIHN0cnVjdCBjbGsgKipwbGxfY2xrLAotCQlzdHJ1Y3QgY2xrICoqdmNvX2dhdGVf Y2xrKTsKKwkJc3BpbmxvY2tfdCAqbG9jaywgc3RydWN0IGNsa19jb3JlICoqcGxsX2NsaywKKwkJ c3RydWN0IGNsa19jb3JlICoqdmNvX2dhdGVfY2xrKTsKIAogbG9uZyBjbGtfcm91bmRfcmF0ZV9p bmRleChzdHJ1Y3QgY2xrX2h3ICpodywgdW5zaWduZWQgbG9uZyBkcmF0ZSwKIAkJdW5zaWduZWQg bG9uZyBwYXJlbnRfcmF0ZSwgY2xrX2NhbGNfcmF0ZSBjYWxjX3JhdGUsIHU4IHJ0YmxfY250LApk aWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvc3BlYXIvc3BlYXIxMzEwX2Nsb2NrLmMgYi9kcml2ZXJz L2Nsay9zcGVhci9zcGVhcjEzMTBfY2xvY2suYwppbmRleCA0ZGFhNTk3Li41ODIwNmUwIDEwMDY0 NAotLS0gYS9kcml2ZXJzL2Nsay9zcGVhci9zcGVhcjEzMTBfY2xvY2suYworKysgYi9kcml2ZXJz L2Nsay9zcGVhci9zcGVhcjEzMTBfY2xvY2suYwpAQCAtMTEsNyArMTEsNiBAQAogICogd2FycmFu dHkgb2YgYW55IGtpbmQsIHdoZXRoZXIgZXhwcmVzcyBvciBpbXBsaWVkLgogICovCiAKLSNpbmNs dWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNpbmNsdWRlIDxs aW51eC9lcnIuaD4KICNpbmNsdWRlIDxsaW51eC9pby5oPgpAQCAtMzg1LDcgKzM4NCw3IEBAIHN0 YXRpYyBjb25zdCBjaGFyICp0ZG1fcGFyZW50c1tdID0geyAicmFzX3BsbDNfY2xrIiwgImdlbl9z eW4xX2NsayIsIH07CiAKIHZvaWQgX19pbml0IHNwZWFyMTMxMF9jbGtfaW5pdCh2b2lkIF9faW9t ZW0gKm1pc2NfYmFzZSwgdm9pZCBfX2lvbWVtICpyYXNfYmFzZSkKIHsKLQlzdHJ1Y3QgY2xrICpj bGssICpjbGsxOworCXN0cnVjdCBjbGtfY29yZSAqY2xrLCAqY2xrMTsKIAogCWNsayA9IGNsa19y ZWdpc3Rlcl9maXhlZF9yYXRlKE5VTEwsICJvc2NfMzJrX2NsayIsIE5VTEwsIENMS19JU19ST09U LAogCQkJMzIwMDApOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvc3BlYXIvc3BlYXIxMzQwX2Ns b2NrLmMgYi9kcml2ZXJzL2Nsay9zcGVhci9zcGVhcjEzNDBfY2xvY2suYwppbmRleCA1YTVjNjY0 Li43MDQzMDFjIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9zcGVhci9zcGVhcjEzNDBfY2xvY2su YworKysgYi9kcml2ZXJzL2Nsay9zcGVhci9zcGVhcjEzNDBfY2xvY2suYwpAQCAtMTEsNyArMTEs NiBAQAogICogd2FycmFudHkgb2YgYW55IGtpbmQsIHdoZXRoZXIgZXhwcmVzcyBvciBpbXBsaWVk LgogICovCiAKLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYu aD4KICNpbmNsdWRlIDxsaW51eC9lcnIuaD4KICNpbmNsdWRlIDxsaW51eC9pby5oPgpAQCAtNDQy LDcgKzQ0MSw3IEBAIHN0YXRpYyBjb25zdCBjaGFyICpnZW5fc3ludGgyXzNfcGFyZW50c1tdID0g eyAidmNvMWRpdjRfY2xrIiwgInZjbzJkaXYyX2NsayIsCiAKIHZvaWQgX19pbml0IHNwZWFyMTM0 MF9jbGtfaW5pdCh2b2lkIF9faW9tZW0gKm1pc2NfYmFzZSkKIHsKLQlzdHJ1Y3QgY2xrICpjbGss ICpjbGsxOworCXN0cnVjdCBjbGtfY29yZSAqY2xrLCAqY2xrMTsKIAogCWNsayA9IGNsa19yZWdp c3Rlcl9maXhlZF9yYXRlKE5VTEwsICJvc2NfMzJrX2NsayIsIE5VTEwsIENMS19JU19ST09ULAog CQkJMzIwMDApOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvc3BlYXIvc3BlYXIzeHhfY2xvY2su YyBiL2RyaXZlcnMvY2xrL3NwZWFyL3NwZWFyM3h4X2Nsb2NrLmMKaW5kZXggYmI1ZjM4Ny4uNDBk MWIwOCAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvc3BlYXIvc3BlYXIzeHhfY2xvY2suYworKysg Yi9kcml2ZXJzL2Nsay9zcGVhci9zcGVhcjN4eF9jbG9jay5jCkBAIC05LDcgKzksNiBAQAogICog d2FycmFudHkgb2YgYW55IGtpbmQsIHdoZXRoZXIgZXhwcmVzcyBvciBpbXBsaWVkLgogICovCiAK LSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNpbmNs dWRlIDxsaW51eC9lcnIuaD4KICNpbmNsdWRlIDxsaW51eC9pby5oPgpAQCAtMTQwLDcgKzEzOSw3 IEBAIHN0YXRpYyBjb25zdCBjaGFyICpkZHJfcGFyZW50c1tdID0geyAiYWhiX2NsayIsICJhaGJt dWx0Ml9jbGsiLCAibm9uZSIsCiAjaWZkZWYgQ09ORklHX01BQ0hfU1BFQVIzMDAKIHN0YXRpYyB2 b2lkIF9faW5pdCBzcGVhcjMwMF9jbGtfaW5pdCh2b2lkKQogewotCXN0cnVjdCBjbGsgKmNsazsK KwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAogCWNsayA9IGNsa19yZWdpc3Rlcl9maXhlZF9mYWN0 b3IoTlVMTCwgImNsY2RfY2xrIiwgInJhc19wbGwzX2NsayIsIDAsCiAJCQkxLCAxKTsKQEAgLTE3 MCw3ICsxNjksNyBAQCBzdGF0aWMgaW5saW5lIHZvaWQgc3BlYXIzMDBfY2xrX2luaXQodm9pZCkg eyB9CiAjaWZkZWYgQ09ORklHX01BQ0hfU1BFQVIzMTAKIHN0YXRpYyB2b2lkIF9faW5pdCBzcGVh cjMxMF9jbGtfaW5pdCh2b2lkKQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2Nv cmUgKmNsazsKIAogCWNsayA9IGNsa19yZWdpc3Rlcl9maXhlZF9mYWN0b3IoTlVMTCwgImVtaV9j bGsiLCAicmFzX2FoYl9jbGsiLCAwLCAxLAogCQkJMSk7CkBAIC0yNDYsOSArMjQ1LDkgQEAgc3Rh dGljIGNvbnN0IGNoYXIgKnNtaWkwX3BhcmVudHNbXSA9IHsgInNtaWlfMTI1bV9wYWQiLCAicmFz X3BsbDJfY2xrIiwKIHN0YXRpYyBjb25zdCBjaGFyICp1YXJ0eF9wYXJlbnRzW10gPSB7ICJyYXNf c3luMV9nY2xrIiwgInJhc19hcGJfY2xrIiwgfTsKIAogc3RhdGljIHZvaWQgX19pbml0IHNwZWFy MzIwX2Nsa19pbml0KHZvaWQgX19pb21lbSAqc29jX2NvbmZpZ19iYXNlLAotCQkJCSAgICAgc3Ry dWN0IGNsayAqcmFzX2FwYl9jbGspCisJCQkJICAgICBzdHJ1Y3QgY2xrX2NvcmUgKnJhc19hcGJf Y2xrKQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAogCWNs ayA9IGNsa19yZWdpc3Rlcl9maXhlZF9yYXRlKE5VTEwsICJzbWlpXzEyNW1fcGFkX2NsayIsIE5V TEwsCiAJCQlDTEtfSVNfUk9PVCwgMTI1MDAwMDAwKTsKQEAgLTM0NCw3ICszNDMsNyBAQCBzdGF0 aWMgdm9pZCBfX2luaXQgc3BlYXIzMjBfY2xrX2luaXQodm9pZCBfX2lvbWVtICpzb2NfY29uZmln X2Jhc2UsCiAJCQkwLCAmX2xvY2spOwogCWNsa19yZWdpc3Rlcl9jbGtkZXYoY2xrLCBOVUxMLCAi YTMwMDAwMDAuc2VyaWFsIik7CiAJLyogRW5mb3JjZSByYXNfYXBiX2NsayAqLwotCWNsa19zZXRf cGFyZW50KGNsaywgcmFzX2FwYl9jbGspOworCWNsa19wcm92aWRlcl9zZXRfcGFyZW50KGNsaywg cmFzX2FwYl9jbGspOwogCiAJY2xrID0gY2xrX3JlZ2lzdGVyX211eChOVUxMLCAidWFydDJfY2xr IiwgdWFydHhfcGFyZW50cywKIAkJCUFSUkFZX1NJWkUodWFydHhfcGFyZW50cyksCkBAIC0zNTMs NyArMzUyLDcgQEAgc3RhdGljIHZvaWQgX19pbml0IHNwZWFyMzIwX2Nsa19pbml0KHZvaWQgX19p b21lbSAqc29jX2NvbmZpZ19iYXNlLAogCQkJU1BFQVIzMjBfVUFSVFhfUENMS19NQVNLLCAwLCAm X2xvY2spOwogCWNsa19yZWdpc3Rlcl9jbGtkZXYoY2xrLCBOVUxMLCAiYTQwMDAwMDAuc2VyaWFs Iik7CiAJLyogRW5mb3JjZSByYXNfYXBiX2NsayAqLwotCWNsa19zZXRfcGFyZW50KGNsaywgcmFz X2FwYl9jbGspOworCWNsa19wcm92aWRlcl9zZXRfcGFyZW50KGNsaywgcmFzX2FwYl9jbGspOwog CiAJY2xrID0gY2xrX3JlZ2lzdGVyX211eChOVUxMLCAidWFydDNfY2xrIiwgdWFydHhfcGFyZW50 cywKIAkJCUFSUkFZX1NJWkUodWFydHhfcGFyZW50cyksCkBAIC0zODQsMTIgKzM4MywxMiBAQCBz dGF0aWMgdm9pZCBfX2luaXQgc3BlYXIzMjBfY2xrX2luaXQodm9pZCBfX2lvbWVtICpzb2NfY29u ZmlnX2Jhc2UsCiAJY2xrX3JlZ2lzdGVyX2Nsa2RldihjbGssIE5VTEwsICI2MDEwMDAwMC5zZXJp YWwiKTsKIH0KICNlbHNlCi1zdGF0aWMgaW5saW5lIHZvaWQgc3BlYXIzMjBfY2xrX2luaXQodm9p ZCBfX2lvbWVtICpzYiwgc3RydWN0IGNsayAqcmMpIHsgfQorc3RhdGljIGlubGluZSB2b2lkIHNw ZWFyMzIwX2Nsa19pbml0KHZvaWQgX19pb21lbSAqc2IsIHN0cnVjdCBjbGtfY29yZSAqcmMpIHsg fQogI2VuZGlmCiAKIHZvaWQgX19pbml0IHNwZWFyM3h4X2Nsa19pbml0KHZvaWQgX19pb21lbSAq bWlzY19iYXNlLCB2b2lkIF9faW9tZW0gKnNvY19jb25maWdfYmFzZSkKIHsKLQlzdHJ1Y3QgY2xr ICpjbGssICpjbGsxLCAqcmFzX2FwYl9jbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGssICpjbGsx LCAqcmFzX2FwYl9jbGs7CiAKIAljbGsgPSBjbGtfcmVnaXN0ZXJfZml4ZWRfcmF0ZShOVUxMLCAi b3NjXzMya19jbGsiLCBOVUxMLCBDTEtfSVNfUk9PVCwKIAkJCTMyMDAwKTsKZGlmZiAtLWdpdCBh L2RyaXZlcnMvY2xrL3NwZWFyL3NwZWFyNnh4X2Nsb2NrLmMgYi9kcml2ZXJzL2Nsay9zcGVhci9z cGVhcjZ4eF9jbG9jay5jCmluZGV4IDRmNjQ5YzkuLjM2NGE4ZDMgMTAwNjQ0Ci0tLSBhL2RyaXZl cnMvY2xrL3NwZWFyL3NwZWFyNnh4X2Nsb2NrLmMKKysrIGIvZHJpdmVycy9jbGsvc3BlYXIvc3Bl YXI2eHhfY2xvY2suYwpAQCAtOSw3ICs5LDYgQEAKICAqIHdhcnJhbnR5IG9mIGFueSBraW5kLCB3 aGV0aGVyIGV4cHJlc3Mgb3IgaW1wbGllZC4KICAqLwogCi0jaW5jbHVkZSA8bGludXgvY2xrLmg+ CiAjaW5jbHVkZSA8bGludXgvY2xrZGV2Lmg+CiAjaW5jbHVkZSA8bGludXgvaW8uaD4KICNpbmNs dWRlIDxsaW51eC9zcGlubG9ja190eXBlcy5oPgpAQCAtMTE2LDcgKzExNSw3IEBAIHN0YXRpYyBz dHJ1Y3QgZ3B0X3JhdGVfdGJsIGdwdF9ydGJsW10gPSB7CiAKIHZvaWQgX19pbml0IHNwZWFyNnh4 X2Nsa19pbml0KHZvaWQgX19pb21lbSAqbWlzY19iYXNlKQogewotCXN0cnVjdCBjbGsgKmNsaywg KmNsazE7CisJc3RydWN0IGNsa19jb3JlICpjbGssICpjbGsxOwogCiAJY2xrID0gY2xrX3JlZ2lz dGVyX2ZpeGVkX3JhdGUoTlVMTCwgIm9zY18zMmtfY2xrIiwgTlVMTCwgQ0xLX0lTX1JPT1QsCiAJ CQkzMjAwMCk7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9zdC9jbGstZmxleGdlbi5jIGIvZHJp dmVycy9jbGsvc3QvY2xrLWZsZXhnZW4uYwppbmRleCAyMjgyY2VmLi42OTlmN2ExIDEwMDY0NAot LS0gYS9kcml2ZXJzL2Nsay9zdC9jbGstZmxleGdlbi5jCisrKyBiL2RyaXZlcnMvY2xrL3N0L2Ns ay1mbGV4Z2VuLmMKQEAgLTE2MywxMiArMTYzLDEyIEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgY2xr X29wcyBmbGV4Z2VuX29wcyA9IHsKIAkuc2V0X3JhdGUgPSBmbGV4Z2VuX3NldF9yYXRlLAogfTsK IAotc3RydWN0IGNsayAqY2xrX3JlZ2lzdGVyX2ZsZXhnZW4oY29uc3QgY2hhciAqbmFtZSwKK3N0 cnVjdCBjbGtfY29yZSAqY2xrX3JlZ2lzdGVyX2ZsZXhnZW4oY29uc3QgY2hhciAqbmFtZSwKIAkJ CQljb25zdCBjaGFyICoqcGFyZW50X25hbWVzLCB1OCBudW1fcGFyZW50cywKIAkJCQl2b2lkIF9f aW9tZW0gKnJlZywgc3BpbmxvY2tfdCAqbG9jaywgdTMyIGlkeCwKIAkJCQl1bnNpZ25lZCBsb25n IGZsZXhnZW5fZmxhZ3MpIHsKIAlzdHJ1Y3QgZmxleGdlbiAqZmd4YmFyOwotCXN0cnVjdCBjbGsg KmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0 OwogCXUzMiAgeGJhcl9zaGlmdDsKIAl2b2lkIF9faW9tZW0gKnhiYXJfcmVnLCAqZmRpdl9yZWc7 CkBAIC0yMjMsOCArMjIzLDggQEAgc3RydWN0IGNsayAqY2xrX3JlZ2lzdGVyX2ZsZXhnZW4oY29u c3QgY2hhciAqbmFtZSwKIAllbHNlCiAJCXByX2RlYnVnKCIlczogcGFyZW50ICVzIHJhdGUgJXVc biIsCiAJCQlfX2Nsa19nZXRfbmFtZShjbGspLAotCQkJX19jbGtfZ2V0X25hbWUoY2xrX2dldF9w YXJlbnQoY2xrKSksCi0JCQkodW5zaWduZWQgaW50KWNsa19nZXRfcmF0ZShjbGspKTsKKwkJCV9f Y2xrX2dldF9uYW1lKGNsa19wcm92aWRlcl9nZXRfcGFyZW50KGNsaykpLAorCQkJKHVuc2lnbmVk IGludCljbGtfcHJvdmlkZXJfZ2V0X3JhdGUoY2xrKSk7CiAJcmV0dXJuIGNsazsKIH0KIApAQCAt MjgzLDcgKzI4Myw3IEBAIHZvaWQgX19pbml0IHN0X29mX2ZsZXhnZW5fc2V0dXAoc3RydWN0IGRl dmljZV9ub2RlICpucCkKIAkJZ290byBlcnI7CiAJfQogCi0JY2xrX2RhdGEtPmNsa3MgPSBrY2Fs bG9jKGNsa19kYXRhLT5jbGtfbnVtLCBzaXplb2Yoc3RydWN0IGNsayAqKSwKKwljbGtfZGF0YS0+ Y2xrcyA9IGtjYWxsb2MoY2xrX2RhdGEtPmNsa19udW0sIHNpemVvZihzdHJ1Y3QgY2xrX2NvcmUg KiksCiAJCQlHRlBfS0VSTkVMKTsKIAlpZiAoIWNsa19kYXRhLT5jbGtzKQogCQlnb3RvIGVycjsK QEAgLTI5Myw3ICsyOTMsNyBAQCB2b2lkIF9faW5pdCBzdF9vZl9mbGV4Z2VuX3NldHVwKHN0cnVj dCBkZXZpY2Vfbm9kZSAqbnApCiAJCWdvdG8gZXJyOwogCiAJZm9yIChpID0gMDsgaSA8IGNsa19k YXRhLT5jbGtfbnVtOyBpKyspIHsKLQkJc3RydWN0IGNsayAqY2xrOworCQlzdHJ1Y3QgY2xrX2Nv cmUgKmNsazsKIAkJY29uc3QgY2hhciAqY2xrX25hbWU7CiAKIAkJaWYgKG9mX3Byb3BlcnR5X3Jl YWRfc3RyaW5nX2luZGV4KG5wLCAiY2xvY2stb3V0cHV0LW5hbWVzIiwKZGlmZiAtLWdpdCBhL2Ry aXZlcnMvY2xrL3N0L2Nsa2dlbi1mc3luLmMgYi9kcml2ZXJzL2Nsay9zdC9jbGtnZW4tZnN5bi5j CmluZGV4IGFmOTRlZDguLmNlZGExZjIgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3N0L2Nsa2dl bi1mc3luLmMKKysrIGIvZHJpdmVycy9jbGsvc3QvY2xrZ2VuLWZzeW4uYwpAQCAtNjE0LDEzICs2 MTQsMTMgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIHN0X3F1YWRmc19wbGxfYzMyX29w cyA9IHsKIAkuc2V0X3JhdGUJPSBxdWFkZnNfcGxsX2ZzNjYwYzMyX3NldF9yYXRlLAogfTsKIAot c3RhdGljIHN0cnVjdCBjbGsgKiBfX2luaXQgc3RfY2xrX3JlZ2lzdGVyX3F1YWRmc19wbGwoCitz dGF0aWMgc3RydWN0IGNsa19jb3JlICogX19pbml0IHN0X2Nsa19yZWdpc3Rlcl9xdWFkZnNfcGxs KAogCQljb25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJc3RydWN0 IGNsa2dlbl9xdWFkZnNfZGF0YSAqcXVhZGZzLCB2b2lkIF9faW9tZW0gKnJlZywKIAkJc3Bpbmxv Y2tfdCAqbG9jaykKIHsKIAlzdHJ1Y3Qgc3RfY2xrX3F1YWRmc19wbGwgKnBsbDsKLQlzdHJ1Y3Qg Y2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0IGNsa19pbml0X2RhdGEg aW5pdDsKIAogCS8qCkBAIC0xMDE4LDEzICsxMDE4LDEzIEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3Qg Y2xrX29wcyBzdF9xdWFkZnNfb3BzID0gewogCS5yZWNhbGNfcmF0ZQk9IHF1YWRmc19yZWNhbGNf cmF0ZSwKIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICogX19pbml0IHN0X2Nsa19yZWdpc3Rlcl9x dWFkZnNfZnN5bnRoKAorc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqIF9faW5pdCBzdF9jbGtfcmVn aXN0ZXJfcXVhZGZzX2ZzeW50aCgKIAkJY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFy ZW50X25hbWUsCiAJCXN0cnVjdCBjbGtnZW5fcXVhZGZzX2RhdGEgKnF1YWRmcywgdm9pZCBfX2lv bWVtICpyZWcsIHUzMiBjaGFuLAogCQlzcGlubG9ja190ICpsb2NrKQogewogCXN0cnVjdCBzdF9j bGtfcXVhZGZzX2ZzeW50aCAqZnM7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29y ZSAqY2xrOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAkvKgpAQCAtMTEwMiw3ICsx MTAyLDcgQEAgc3RhdGljIHZvaWQgX19pbml0IHN0X29mX2NyZWF0ZV9xdWFkZnNfZnN5bnRocygK IAkJcmV0dXJuOwogCiAJY2xrX2RhdGEtPmNsa19udW0gPSBRVUFERlNfTUFYX0NIQU47Ci0JY2xr X2RhdGEtPmNsa3MgPSBremFsbG9jKFFVQURGU19NQVhfQ0hBTiAqIHNpemVvZihzdHJ1Y3QgY2xr ICopLAorCWNsa19kYXRhLT5jbGtzID0ga3phbGxvYyhRVUFERlNfTUFYX0NIQU4gKiBzaXplb2Yo c3RydWN0IGNsa19jb3JlICopLAogCQkJCSBHRlBfS0VSTkVMKTsKIAogCWlmICghY2xrX2RhdGEt PmNsa3MpIHsKQEAgLTExMTEsNyArMTExMSw3IEBAIHN0YXRpYyB2b2lkIF9faW5pdCBzdF9vZl9j cmVhdGVfcXVhZGZzX2ZzeW50aHMoCiAJfQogCiAJZm9yIChmc2NoYW4gPSAwOyBmc2NoYW4gPCBR VUFERlNfTUFYX0NIQU47IGZzY2hhbisrKSB7Ci0JCXN0cnVjdCBjbGsgKmNsazsKKwkJc3RydWN0 IGNsa19jb3JlICpjbGs7CiAJCWNvbnN0IGNoYXIgKmNsa19uYW1lOwogCiAJCWlmIChvZl9wcm9w ZXJ0eV9yZWFkX3N0cmluZ19pbmRleChucCwgImNsb2NrLW91dHB1dC1uYW1lcyIsCkBAIC0xMTM2 LDggKzExMzYsOCBAQCBzdGF0aWMgdm9pZCBfX2luaXQgc3Rfb2ZfY3JlYXRlX3F1YWRmc19mc3lu dGhzKAogCQkJY2xrX2RhdGEtPmNsa3NbZnNjaGFuXSA9IGNsazsKIAkJCXByX2RlYnVnKCIlczog cGFyZW50ICVzIHJhdGUgJXVcbiIsCiAJCQkJX19jbGtfZ2V0X25hbWUoY2xrKSwKLQkJCQlfX2Ns a19nZXRfbmFtZShjbGtfZ2V0X3BhcmVudChjbGspKSwKLQkJCQkodW5zaWduZWQgaW50KWNsa19n ZXRfcmF0ZShjbGspKTsKKwkJCQlfX2Nsa19nZXRfbmFtZShjbGtfcHJvdmlkZXJfZ2V0X3BhcmVu dChjbGspKSwKKwkJCQkodW5zaWduZWQgaW50KWNsa19wcm92aWRlcl9nZXRfcmF0ZShjbGspKTsK IAkJfQogCX0KIApAQCAtMTE0Nyw3ICsxMTQ3LDcgQEAgc3RhdGljIHZvaWQgX19pbml0IHN0X29m X2NyZWF0ZV9xdWFkZnNfZnN5bnRocygKIHN0YXRpYyB2b2lkIF9faW5pdCBzdF9vZl9xdWFkZnNf c2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpucCkKIHsKIAljb25zdCBzdHJ1Y3Qgb2ZfZGV2aWNl X2lkICptYXRjaDsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJ Y29uc3QgY2hhciAqcGxsX25hbWUsICpjbGtfcGFyZW50X25hbWU7CiAJdm9pZCBfX2lvbWVtICpy ZWc7CiAJc3BpbmxvY2tfdCAqbG9jazsKQEAgLTExODEsOCArMTE4MSw4IEBAIHN0YXRpYyB2b2lk IF9faW5pdCBzdF9vZl9xdWFkZnNfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpucCkKIAllbHNl CiAJCXByX2RlYnVnKCIlczogcGFyZW50ICVzIHJhdGUgJXVcbiIsCiAJCQlfX2Nsa19nZXRfbmFt ZShjbGspLAotCQkJX19jbGtfZ2V0X25hbWUoY2xrX2dldF9wYXJlbnQoY2xrKSksCi0JCQkodW5z aWduZWQgaW50KWNsa19nZXRfcmF0ZShjbGspKTsKKwkJCV9fY2xrX2dldF9uYW1lKGNsa19wcm92 aWRlcl9nZXRfcGFyZW50KGNsaykpLAorCQkJKHVuc2lnbmVkIGludCljbGtfcHJvdmlkZXJfZ2V0 X3JhdGUoY2xrKSk7CiAKIAlzdF9vZl9jcmVhdGVfcXVhZGZzX2ZzeW50aHMobnAsIHBsbF9uYW1l LAogCQkJCSAgICAoc3RydWN0IGNsa2dlbl9xdWFkZnNfZGF0YSAqKW1hdGNoLT5kYXRhLApkaWZm IC0tZ2l0IGEvZHJpdmVycy9jbGsvc3QvY2xrZ2VuLW11eC5jIGIvZHJpdmVycy9jbGsvc3QvY2xr Z2VuLW11eC5jCmluZGV4IDc5ZGM0MGIuLmQyYTk1MWYgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xr L3N0L2Nsa2dlbi1tdXguYworKysgYi9kcml2ZXJzL2Nsay9zdC9jbGtnZW4tbXV4LmMKQEAgLTIx NSw3ICsyMTUsNyBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGNsa19vcHMgY2xrZ2VuYV9kaXZtdXhf b3BzID0gewogLyoqCiAgKiBjbGtfcmVnaXN0ZXJfZ2VuYW11eCAtIHJlZ2lzdGVyIGEgZ2VuYW11 eCBjbG9jayB3aXRoIHRoZSBjbG9jayBmcmFtZXdvcmsKICAqLwotc3RydWN0IGNsayAqY2xrX3Jl Z2lzdGVyX2dlbmFtdXgoY29uc3QgY2hhciAqbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqY2xrX3Jl Z2lzdGVyX2dlbmFtdXgoY29uc3QgY2hhciAqbmFtZSwKIAkJCQljb25zdCBjaGFyICoqcGFyZW50 X25hbWVzLCB1OCBudW1fcGFyZW50cywKIAkJCQl2b2lkIF9faW9tZW0gKnJlZywKIAkJCQljb25z dCBzdHJ1Y3QgY2xrZ2VuYV9kaXZtdXhfZGF0YSAqbXV4ZGF0YSwKQEAgLTIyNyw3ICsyMjcsNyBA QCBzdHJ1Y3QgY2xrICpjbGtfcmVnaXN0ZXJfZ2VuYW11eChjb25zdCBjaGFyICpuYW1lLAogCWNv bnN0IGludCBtdXhfd2lkdGggPSAyOwogCWNvbnN0IGludCBkaXZpZGVyX3dpZHRoID0gNTsKIAlz dHJ1Y3QgY2xrZ2VuYV9kaXZtdXggKmdlbmFtdXg7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVj dCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAJaW50IGk7CiAK QEAgLTI4MCw4ICsyODAsOCBAQCBzdHJ1Y3QgY2xrICpjbGtfcmVnaXN0ZXJfZ2VuYW11eChjb25z dCBjaGFyICpuYW1lLAogCiAJcHJfZGVidWcoIiVzOiBwYXJlbnQgJXMgcmF0ZSAlbHVcbiIsCiAJ CQlfX2Nsa19nZXRfbmFtZShjbGspLAotCQkJX19jbGtfZ2V0X25hbWUoY2xrX2dldF9wYXJlbnQo Y2xrKSksCi0JCQljbGtfZ2V0X3JhdGUoY2xrKSk7CisJCQlfX2Nsa19nZXRfbmFtZShjbGtfcHJv dmlkZXJfZ2V0X3BhcmVudChjbGspKSwKKwkJCWNsa19wcm92aWRlcl9nZXRfcmF0ZShjbGspKTsK IGVycjoKIAlyZXR1cm4gY2xrOwogfQpAQCAtNDEzLDE0ICs0MTMsMTQgQEAgdm9pZCBfX2luaXQg c3Rfb2ZfY2xrZ2VuYV9kaXZtdXhfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpucCkKIAkJZ290 byBlcnI7CiAKIAljbGtfZGF0YS0+Y2xrX251bSA9IGRhdGEtPm51bV9vdXRwdXRzOwotCWNsa19k YXRhLT5jbGtzID0ga3phbGxvYyhjbGtfZGF0YS0+Y2xrX251bSAqIHNpemVvZihzdHJ1Y3QgY2xr ICopLAorCWNsa19kYXRhLT5jbGtzID0ga3phbGxvYyhjbGtfZGF0YS0+Y2xrX251bSAqIHNpemVv ZihzdHJ1Y3QgY2xrX2NvcmUgKiksCiAJCQkJIEdGUF9LRVJORUwpOwogCiAJaWYgKCFjbGtfZGF0 YS0+Y2xrcykKIAkJZ290byBlcnI7CiAKIAlmb3IgKGkgPSAwOyBpIDwgY2xrX2RhdGEtPmNsa19u dW07IGkrKykgewotCQlzdHJ1Y3QgY2xrICpjbGs7CisJCXN0cnVjdCBjbGtfY29yZSAqY2xrOwog CQljb25zdCBjaGFyICpjbGtfbmFtZTsKIAogCQlpZiAob2ZfcHJvcGVydHlfcmVhZF9zdHJpbmdf aW5kZXgobnAsICJjbG9jay1vdXRwdXQtbmFtZXMiLApAQCAtNDkwLDcgKzQ5MCw3IEBAIHZvaWQg X19pbml0IHN0X29mX2Nsa2dlbmFfcHJlZGl2X3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnAp CiAJY29uc3Qgc3RydWN0IG9mX2RldmljZV9pZCAqbWF0Y2g7CiAJdm9pZCBfX2lvbWVtICpyZWc7 CiAJY29uc3QgY2hhciAqcGFyZW50X25hbWUsICpjbGtfbmFtZTsKLQlzdHJ1Y3QgY2xrICpjbGs7 CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0IGNsa2dlbmFfcHJlZGl2X2RhdGEgKmRh dGE7CiAKIAltYXRjaCA9IG9mX21hdGNoX25vZGUoY2xrZ2VuYV9wcmVkaXZfb2ZfbWF0Y2gsIG5w KTsKQEAgLTUyMiw4ICs1MjIsOCBAQCB2b2lkIF9faW5pdCBzdF9vZl9jbGtnZW5hX3ByZWRpdl9z ZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wKQogCW9mX2Nsa19hZGRfcHJvdmlkZXIobnAsIG9m X2Nsa19zcmNfc2ltcGxlX2dldCwgY2xrKTsKIAlwcl9kZWJ1ZygiJXM6IHBhcmVudCAlcyByYXRl ICV1XG4iLAogCQlfX2Nsa19nZXRfbmFtZShjbGspLAotCQlfX2Nsa19nZXRfbmFtZShjbGtfZ2V0 X3BhcmVudChjbGspKSwKLQkJKHVuc2lnbmVkIGludCljbGtfZ2V0X3JhdGUoY2xrKSk7CisJCV9f Y2xrX2dldF9uYW1lKGNsa19wcm92aWRlcl9nZXRfcGFyZW50KGNsaykpLAorCQkodW5zaWduZWQg aW50KWNsa19wcm92aWRlcl9nZXRfcmF0ZShjbGspKTsKIAogCXJldHVybjsKIH0KQEAgLTYyNSw3 ICs2MjUsNyBAQCBzdGF0aWMgc3RydWN0IG9mX2RldmljZV9pZCBtdXhfb2ZfbWF0Y2hbXSA9IHsK IHZvaWQgX19pbml0IHN0X29mX2Nsa2dlbl9tdXhfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpu cCkKIHsKIAljb25zdCBzdHJ1Y3Qgb2ZfZGV2aWNlX2lkICptYXRjaDsKLQlzdHJ1Y3QgY2xrICpj bGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJdm9pZCBfX2lvbWVtICpyZWc7CiAJY29uc3Qg Y2hhciAqKnBhcmVudHM7CiAJaW50IG51bV9wYXJlbnRzOwpAQCAtNjYyLDggKzY2Miw4IEBAIHZv aWQgX19pbml0IHN0X29mX2Nsa2dlbl9tdXhfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpucCkK IAogCXByX2RlYnVnKCIlczogcGFyZW50ICVzIHJhdGUgJXVcbiIsCiAJCQlfX2Nsa19nZXRfbmFt ZShjbGspLAotCQkJX19jbGtfZ2V0X25hbWUoY2xrX2dldF9wYXJlbnQoY2xrKSksCi0JCQkodW5z aWduZWQgaW50KWNsa19nZXRfcmF0ZShjbGspKTsKKwkJCV9fY2xrX2dldF9uYW1lKGNsa19wcm92 aWRlcl9nZXRfcGFyZW50KGNsaykpLAorCQkJKHVuc2lnbmVkIGludCljbGtfcHJvdmlkZXJfZ2V0 X3JhdGUoY2xrKSk7CiAKIAlvZl9jbGtfYWRkX3Byb3ZpZGVyKG5wLCBvZl9jbGtfc3JjX3NpbXBs ZV9nZXQsIGNsayk7CiAKQEAgLTcyNiwxNCArNzI2LDE0IEBAIHZvaWQgX19pbml0IHN0X29mX2Ns a2dlbl92Y2Nfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpucCkKIAkJZ290byBlcnI7CiAKIAlj bGtfZGF0YS0+Y2xrX251bSA9IFZDQ19NQVhfQ0hBTk5FTFM7Ci0JY2xrX2RhdGEtPmNsa3MgPSBr emFsbG9jKGNsa19kYXRhLT5jbGtfbnVtICogc2l6ZW9mKHN0cnVjdCBjbGsgKiksCisJY2xrX2Rh dGEtPmNsa3MgPSBremFsbG9jKGNsa19kYXRhLT5jbGtfbnVtICogc2l6ZW9mKHN0cnVjdCBjbGtf Y29yZSAqKSwKIAkJCQkgR0ZQX0tFUk5FTCk7CiAKIAlpZiAoIWNsa19kYXRhLT5jbGtzKQogCQln b3RvIGVycjsKIAogCWZvciAoaSA9IDA7IGkgPCBjbGtfZGF0YS0+Y2xrX251bTsgaSsrKSB7Ci0J CXN0cnVjdCBjbGsgKmNsazsKKwkJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJCWNvbnN0IGNoYXIg KmNsa19uYW1lOwogCQlzdHJ1Y3QgY2xrX2dhdGUgKmdhdGU7CiAJCXN0cnVjdCBjbGtfZGl2aWRl ciAqZGl2OwpAQCAtNzk2LDggKzc5Niw4IEBAIHZvaWQgX19pbml0IHN0X29mX2Nsa2dlbl92Y2Nf c2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpucCkKIAogCQlwcl9kZWJ1ZygiJXM6IHBhcmVudCAl cyByYXRlICV1XG4iLAogCQkJX19jbGtfZ2V0X25hbWUoY2xrKSwKLQkJCV9fY2xrX2dldF9uYW1l KGNsa19nZXRfcGFyZW50KGNsaykpLAotCQkJKHVuc2lnbmVkIGludCljbGtfZ2V0X3JhdGUoY2xr KSk7CisJCQlfX2Nsa19nZXRfbmFtZShjbGtfcHJvdmlkZXJfZ2V0X3BhcmVudChjbGspKSwKKwkJ CSh1bnNpZ25lZCBpbnQpY2xrX3Byb3ZpZGVyX2dldF9yYXRlKGNsaykpOwogCiAJCWNsa19kYXRh LT5jbGtzW2ldID0gY2xrOwogCX0KZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3N0L2Nsa2dlbi1w bGwuYyBiL2RyaXZlcnMvY2xrL3N0L2Nsa2dlbi1wbGwuYwppbmRleCAyOTc2OWQ3Li4zMmJhYzAy IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay9zdC9jbGtnZW4tcGxsLmMKKysrIGIvZHJpdmVycy9j bGsvc3QvY2xrZ2VuLXBsbC5jCkBAIC0zOTAsMTMgKzM5MCwxMyBAQCBzdGF0aWMgY29uc3Qgc3Ry dWN0IGNsa19vcHMgc3RfcGxsMTIwMGMzMl9vcHMgPSB7CiAJLnJlY2FsY19yYXRlCT0gcmVjYWxj X3N0bV9wbGwxMjAwYzMyLAogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKiBfX2luaXQgY2xrZ2Vu X3BsbF9yZWdpc3Rlcihjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKK3N0YXRpYyBzdHJ1Y3QgY2xr X2NvcmUgKiBfX2luaXQgY2xrZ2VuX3BsbF9yZWdpc3Rlcihjb25zdCBjaGFyICpwYXJlbnRfbmFt ZSwKIAkJCQlzdHJ1Y3QgY2xrZ2VuX3BsbF9kYXRhCSpwbGxfZGF0YSwKIAkJCQl2b2lkIF9faW9t ZW0gKnJlZywKIAkJCQljb25zdCBjaGFyICpjbGtfbmFtZSkKIHsKIAlzdHJ1Y3QgY2xrZ2VuX3Bs bCAqcGxsOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1 Y3QgY2xrX2luaXRfZGF0YSBpbml0OwogCiAJcGxsID0ga3phbGxvYyhzaXplb2YoKnBsbCksIEdG UF9LRVJORUwpOwpAQCAtNDIyLDE2ICs0MjIsMTYgQEAgc3RhdGljIHN0cnVjdCBjbGsgKiBfX2lu aXQgY2xrZ2VuX3BsbF9yZWdpc3Rlcihjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAogCXByX2Rl YnVnKCIlczogcGFyZW50ICVzIHJhdGUgJWx1XG4iLAogCQkJX19jbGtfZ2V0X25hbWUoY2xrKSwK LQkJCV9fY2xrX2dldF9uYW1lKGNsa19nZXRfcGFyZW50KGNsaykpLAotCQkJY2xrX2dldF9yYXRl KGNsaykpOworCQkJX19jbGtfZ2V0X25hbWUoY2xrX3Byb3ZpZGVyX2dldF9wYXJlbnQoY2xrKSks CisJCQljbGtfcHJvdmlkZXJfZ2V0X3JhdGUoY2xrKSk7CiAKIAlyZXR1cm4gY2xrOwogfQogCi1z dGF0aWMgc3RydWN0IGNsayAqIF9faW5pdCBjbGtnZW5fYzY1X2xzZGl2X3JlZ2lzdGVyKGNvbnN0 IGNoYXIgKnBhcmVudF9uYW1lLAorc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqIF9faW5pdCBjbGtn ZW5fYzY1X2xzZGl2X3JlZ2lzdGVyKGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAogCQkJCQkJICAg ICBjb25zdCBjaGFyICpjbGtfbmFtZSkKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNs a19jb3JlICpjbGs7CiAKIAljbGsgPSBjbGtfcmVnaXN0ZXJfZml4ZWRfZmFjdG9yKE5VTEwsIGNs a19uYW1lLCBwYXJlbnRfbmFtZSwgMCwgMSwgMik7CiAJaWYgKElTX0VSUihjbGspKQpAQCAtNDM5 LDggKzQzOSw4IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrICogX19pbml0IGNsa2dlbl9jNjVfbHNkaXZf cmVnaXN0ZXIoY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAKIAlwcl9kZWJ1ZygiJXM6IHBhcmVu dCAlcyByYXRlICVsdVxuIiwKIAkJCV9fY2xrX2dldF9uYW1lKGNsayksCi0JCQlfX2Nsa19nZXRf bmFtZShjbGtfZ2V0X3BhcmVudChjbGspKSwKLQkJCWNsa19nZXRfcmF0ZShjbGspKTsKKwkJCV9f Y2xrX2dldF9uYW1lKGNsa19wcm92aWRlcl9nZXRfcGFyZW50KGNsaykpLAorCQkJY2xrX3Byb3Zp ZGVyX2dldF9yYXRlKGNsaykpOwogCXJldHVybiBjbGs7CiB9CiAKQEAgLTQ4NCw3ICs0ODQsNyBA QCBzdGF0aWMgdm9pZCBfX2luaXQgY2xrZ2VuYV9jNjVfcGxsX3NldHVwKHN0cnVjdCBkZXZpY2Vf bm9kZSAqbnApCiAJCXJldHVybjsKIAogCWNsa19kYXRhLT5jbGtfbnVtID0gbnVtX3BsbF9vdXRw dXRzOwotCWNsa19kYXRhLT5jbGtzID0ga3phbGxvYyhjbGtfZGF0YS0+Y2xrX251bSAqIHNpemVv ZihzdHJ1Y3QgY2xrICopLAorCWNsa19kYXRhLT5jbGtzID0ga3phbGxvYyhjbGtfZGF0YS0+Y2xr X251bSAqIHNpemVvZihzdHJ1Y3QgY2xrX2NvcmUgKiksCiAJCQkJIEdGUF9LRVJORUwpOwogCiAJ aWYgKCFjbGtfZGF0YS0+Y2xrcykKQEAgLTU0MywxNCArNTQzLDE0IEBAIGVycjoKIENMS19PRl9E RUNMQVJFKGNsa2dlbmFfYzY1X3BsbHMsCiAJICAgICAgICJzdCxjbGtnZW5hLXBsbHMtYzY1Iiwg Y2xrZ2VuYV9jNjVfcGxsX3NldHVwKTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKiBfX2luaXQgY2xr Z2VuX29kZl9yZWdpc3Rlcihjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKK3N0YXRpYyBzdHJ1Y3Qg Y2xrX2NvcmUgKiBfX2luaXQgY2xrZ2VuX29kZl9yZWdpc3Rlcihjb25zdCBjaGFyICpwYXJlbnRf bmFtZSwKIAkJCQkJICAgICAgIHZvaWQgKiBfX2lvbWVtIHJlZywKIAkJCQkJICAgICAgIHN0cnVj dCBjbGtnZW5fcGxsX2RhdGEgKnBsbF9kYXRhLAogCQkJCQkgICAgICAgaW50IG9kZiwKIAkJCQkJ ICAgICAgIHNwaW5sb2NrX3QgKm9kZl9sb2NrLAogCQkJCQkgICAgICAgY29uc3QgY2hhciAqb2Rm X25hbWUpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXVu c2lnbmVkIGxvbmcgZmxhZ3M7CiAJc3RydWN0IGNsa19nYXRlICpnYXRlOwogCXN0cnVjdCBjbGtf ZGl2aWRlciAqZGl2OwpAQCAtNTg4LDggKzU4OCw4IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrICogX19p bml0IGNsa2dlbl9vZGZfcmVnaXN0ZXIoY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAKIAlwcl9k ZWJ1ZygiJXM6IHBhcmVudCAlcyByYXRlICVsdVxuIiwKIAkJCV9fY2xrX2dldF9uYW1lKGNsayks Ci0JCQlfX2Nsa19nZXRfbmFtZShjbGtfZ2V0X3BhcmVudChjbGspKSwKLQkJCWNsa19nZXRfcmF0 ZShjbGspKTsKKwkJCV9fY2xrX2dldF9uYW1lKGNsa19wcm92aWRlcl9nZXRfcGFyZW50KGNsaykp LAorCQkJY2xrX3Byb3ZpZGVyX2dldF9yYXRlKGNsaykpOwogCXJldHVybiBjbGs7CiB9CiAKQEAg LTY0MCw3ICs2NDAsNyBAQCBzdGF0aWMgc3RydWN0IG9mX2RldmljZV9pZCBjMzJfcGxsX29mX21h dGNoW10gPSB7CiBzdGF0aWMgdm9pZCBfX2luaXQgY2xrZ2VuX2MzMl9wbGxfc2V0dXAoc3RydWN0 IGRldmljZV9ub2RlICpucCkKIHsKIAljb25zdCBzdHJ1Y3Qgb2ZfZGV2aWNlX2lkICptYXRjaDsK LQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJY29uc3QgY2hhciAq cGFyZW50X25hbWUsICpwbGxfbmFtZTsKIAl2b2lkIF9faW9tZW0gKnBsbF9iYXNlOwogCWludCBu dW1fb2Rmcywgb2RmOwpAQCAtNjc2LDE0ICs2NzYsMTQgQEAgc3RhdGljIHZvaWQgX19pbml0IGNs a2dlbl9jMzJfcGxsX3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnApCiAJCXJldHVybjsKIAog CWNsa19kYXRhLT5jbGtfbnVtID0gbnVtX29kZnM7Ci0JY2xrX2RhdGEtPmNsa3MgPSBremFsbG9j KGNsa19kYXRhLT5jbGtfbnVtICogc2l6ZW9mKHN0cnVjdCBjbGsgKiksCisJY2xrX2RhdGEtPmNs a3MgPSBremFsbG9jKGNsa19kYXRhLT5jbGtfbnVtICogc2l6ZW9mKHN0cnVjdCBjbGtfY29yZSAq KSwKIAkJCQkgR0ZQX0tFUk5FTCk7CiAKIAlpZiAoIWNsa19kYXRhLT5jbGtzKQogCQlnb3RvIGVy cjsKIAogCWZvciAob2RmID0gMDsgb2RmIDwgbnVtX29kZnM7IG9kZisrKSB7Ci0JCXN0cnVjdCBj bGsgKmNsazsKKwkJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJCWNvbnN0IGNoYXIgKmNsa19uYW1l OwogCiAJCWlmIChvZl9wcm9wZXJ0eV9yZWFkX3N0cmluZ19pbmRleChucCwgImNsb2NrLW91dHB1 dC1uYW1lcyIsCkBAIC03MjMsNyArNzIzLDcgQEAgc3RhdGljIHN0cnVjdCBvZl9kZXZpY2VfaWQg YzMyX2dwdV9wbGxfb2ZfbWF0Y2hbXSA9IHsKIHN0YXRpYyB2b2lkIF9faW5pdCBjbGtnZW5ncHVf YzMyX3BsbF9zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wKQogewogCWNvbnN0IHN0cnVjdCBv Zl9kZXZpY2VfaWQgKm1hdGNoOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUg KmNsazsKIAljb25zdCBjaGFyICpwYXJlbnRfbmFtZTsKIAl2b2lkIF9faW9tZW0gKnJlZzsKIAlj b25zdCBjaGFyICpjbGtfbmFtZTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3N1bnhpL2Nsay1h MTAtaG9zYy5jIGIvZHJpdmVycy9jbGsvc3VueGkvY2xrLWExMC1ob3NjLmMKaW5kZXggMDQ4MWQ1 ZC4uYzVlNGM0MSAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvc3VueGkvY2xrLWExMC1ob3NjLmMK KysrIGIvZHJpdmVycy9jbGsvc3VueGkvY2xrLWExMC1ob3NjLmMKQEAgLTI1LDcgKzI1LDcgQEAg c3RhdGljIERFRklORV9TUElOTE9DSyhob3NjX2xvY2spOwogCiBzdGF0aWMgdm9pZCBfX2luaXQg c3VuNGlfb3NjX2Nsa19zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUpCiB7Ci0Jc3RydWN0 IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfZml4ZWRfcmF0 ZSAqZml4ZWQ7CiAJc3RydWN0IGNsa19nYXRlICpnYXRlOwogCWNvbnN0IGNoYXIgKmNsa19uYW1l ID0gbm9kZS0+bmFtZTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3N1bnhpL2Nsay1hMjAtZ21h Yy5jIGIvZHJpdmVycy9jbGsvc3VueGkvY2xrLWEyMC1nbWFjLmMKaW5kZXggNTI5NmZkNi4uNjNj N2RkNSAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvc3VueGkvY2xrLWEyMC1nbWFjLmMKKysrIGIv ZHJpdmVycy9jbGsvc3VueGkvY2xrLWEyMC1nbWFjLmMKQEAgLTU1LDcgKzU1LDcgQEAgc3RhdGlj IERFRklORV9TUElOTE9DSyhnbWFjX2xvY2spOwogCiBzdGF0aWMgdm9pZCBfX2luaXQgc3VuN2lf YTIwX2dtYWNfY2xrX3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbm9kZSkKIHsKLQlzdHJ1Y3Qg Y2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0IGNsa19tdXggKm11eDsK IAlzdHJ1Y3QgY2xrX2dhdGUgKmdhdGU7CiAJY29uc3QgY2hhciAqY2xrX25hbWUgPSBub2RlLT5u YW1lOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvc3VueGkvY2xrLWZhY3RvcnMuYyBiL2RyaXZl cnMvY2xrL3N1bnhpL2Nsay1mYWN0b3JzLmMKaW5kZXggMjA1N2M4YS4uYmIyZDRiMiAxMDA2NDQK LS0tIGEvZHJpdmVycy9jbGsvc3VueGkvY2xrLWZhY3RvcnMuYworKysgYi9kcml2ZXJzL2Nsay9z dW54aS9jbGstZmFjdG9ycy5jCkBAIC03OSw5ICs3OSw5IEBAIHN0YXRpYyBsb25nIGNsa19mYWN0 b3JzX3JvdW5kX3JhdGUoc3RydWN0IGNsa19odyAqaHcsIHVuc2lnbmVkIGxvbmcgcmF0ZSwKIAog c3RhdGljIGxvbmcgY2xrX2ZhY3RvcnNfZGV0ZXJtaW5lX3JhdGUoc3RydWN0IGNsa19odyAqaHcs IHVuc2lnbmVkIGxvbmcgcmF0ZSwKIAkJCQkgICAgICAgdW5zaWduZWQgbG9uZyAqYmVzdF9wYXJl bnRfcmF0ZSwKLQkJCQkgICAgICAgc3RydWN0IGNsayAqKmJlc3RfcGFyZW50X3ApCisJCQkJICAg ICAgIHN0cnVjdCBjbGtfY29yZSAqKmJlc3RfcGFyZW50X3ApCiB7Ci0Jc3RydWN0IGNsayAqY2xr ID0gaHctPmNsaywgKnBhcmVudCwgKmJlc3RfcGFyZW50ID0gTlVMTDsKKwlzdHJ1Y3QgY2xrX2Nv cmUgKmNsayA9IGh3LT5jbGssICpwYXJlbnQsICpiZXN0X3BhcmVudCA9IE5VTEw7CiAJaW50IGks IG51bV9wYXJlbnRzOwogCXVuc2lnbmVkIGxvbmcgcGFyZW50X3JhdGUsIGJlc3QgPSAwLCBjaGls ZF9yYXRlLCBiZXN0X2NoaWxkX3JhdGUgPSAwOwogCmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9z dW54aS9jbGstc3VuNmktYXBiMC1nYXRlcy5jIGIvZHJpdmVycy9jbGsvc3VueGkvY2xrLXN1bjZp LWFwYjAtZ2F0ZXMuYwppbmRleCBlMTBkMDUyLi5mMjliMDZlIDEwMDY0NAotLS0gYS9kcml2ZXJz L2Nsay9zdW54aS9jbGstc3VuNmktYXBiMC1nYXRlcy5jCisrKyBiL2RyaXZlcnMvY2xrL3N1bnhp L2Nsay1zdW42aS1hcGIwLWdhdGVzLmMKQEAgLTc0LDcgKzc0LDcgQEAgc3RhdGljIGludCBzdW42 aV9hMzFfYXBiMF9nYXRlc19jbGtfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikK IAkvKiBXb3JzdC1jYXNlIHNpemUgYXBwcm94aW1hdGlvbiBhbmQgbWVtb3J5IGFsbG9jYXRpb24g Ki8KIAluZ2F0ZXMgPSBmaW5kX2xhc3RfYml0KGRhdGEtPm1hc2ssIFNVTjZJX0FQQjBfR0FURVNf TUFYX1NJWkUpOwogCWNsa19kYXRhLT5jbGtzID0gZGV2bV9rY2FsbG9jKCZwZGV2LT5kZXYsIChu Z2F0ZXMgKyAxKSwKLQkJCQkgICAgICBzaXplb2Yoc3RydWN0IGNsayAqKSwgR0ZQX0tFUk5FTCk7 CisJCQkJICAgICAgc2l6ZW9mKHN0cnVjdCBjbGtfY29yZSAqKSwgR0ZQX0tFUk5FTCk7CiAJaWYg KCFjbGtfZGF0YS0+Y2xrcykKIAkJcmV0dXJuIC1FTk9NRU07CiAKZGlmZiAtLWdpdCBhL2RyaXZl cnMvY2xrL3N1bnhpL2Nsay1zdW42aS1hcGIwLmMgYi9kcml2ZXJzL2Nsay9zdW54aS9jbGstc3Vu NmktYXBiMC5jCmluZGV4IDFmYTIzMzcuLjVlNDY0OWUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xr L3N1bnhpL2Nsay1zdW42aS1hcGIwLmMKKysrIGIvZHJpdmVycy9jbGsvc3VueGkvY2xrLXN1bjZp LWFwYjAuYwpAQCAtMzUsNyArMzUsNyBAQCBzdGF0aWMgaW50IHN1bjZpX2EzMV9hcGIwX2Nsa19w cm9iZShzdHJ1Y3QgcGxhdGZvcm1fZGV2aWNlICpwZGV2KQogCWNvbnN0IGNoYXIgKmNsa19wYXJl bnQ7CiAJc3RydWN0IHJlc291cmNlICpyOwogCXZvaWQgX19pb21lbSAqcmVnOwotCXN0cnVjdCBj bGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAogCXIgPSBwbGF0Zm9ybV9nZXRfcmVz b3VyY2UocGRldiwgSU9SRVNPVVJDRV9NRU0sIDApOwogCXJlZyA9IGRldm1faW9yZW1hcF9yZXNv dXJjZSgmcGRldi0+ZGV2LCByKTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3N1bnhpL2Nsay1z dW42aS1hcjEwMC5jIGIvZHJpdmVycy9jbGsvc3VueGkvY2xrLXN1bjZpLWFyMTAwLmMKaW5kZXgg ZWNhOGNhMC4uOTg0ZDVkMCAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvc3VueGkvY2xrLXN1bjZp LWFyMTAwLmMKKysrIGIvZHJpdmVycy9jbGsvc3VueGkvY2xrLXN1bjZpLWFyMTAwLmMKQEAgLTQ2 LDcgKzQ2LDcgQEAgc3RhdGljIHVuc2lnbmVkIGxvbmcgYXIxMDBfcmVjYWxjX3JhdGUoc3RydWN0 IGNsa19odyAqaHcsCiAKIHN0YXRpYyBsb25nIGFyMTAwX2RldGVybWluZV9yYXRlKHN0cnVjdCBj bGtfaHcgKmh3LCB1bnNpZ25lZCBsb25nIHJhdGUsCiAJCQkJIHVuc2lnbmVkIGxvbmcgKmJlc3Rf cGFyZW50X3JhdGUsCi0JCQkJIHN0cnVjdCBjbGsgKipiZXN0X3BhcmVudF9jbGspCisJCQkJIHN0 cnVjdCBjbGtfY29yZSAqKmJlc3RfcGFyZW50X2NsaykKIHsKIAlpbnQgbnBhcmVudHMgPSBfX2Ns a19nZXRfbnVtX3BhcmVudHMoaHctPmNsayk7CiAJbG9uZyBiZXN0X3JhdGUgPSAtRUlOVkFMOwpA QCAtNTcsNyArNTcsNyBAQCBzdGF0aWMgbG9uZyBhcjEwMF9kZXRlcm1pbmVfcmF0ZShzdHJ1Y3Qg Y2xrX2h3ICpodywgdW5zaWduZWQgbG9uZyByYXRlLAogCWZvciAoaSA9IDA7IGkgPCBucGFyZW50 czsgaSsrKSB7CiAJCXVuc2lnbmVkIGxvbmcgcGFyZW50X3JhdGU7CiAJCXVuc2lnbmVkIGxvbmcg dG1wX3JhdGU7Ci0JCXN0cnVjdCBjbGsgKnBhcmVudDsKKwkJc3RydWN0IGNsa19jb3JlICpwYXJl bnQ7CiAJCXVuc2lnbmVkIGxvbmcgZGl2OwogCQlpbnQgc2hpZnQ7CiAKQEAgLTE3Niw3ICsxNzYs NyBAQCBzdGF0aWMgaW50IHN1bjZpX2EzMV9hcjEwMF9jbGtfcHJvYmUoc3RydWN0IHBsYXRmb3Jt X2RldmljZSAqcGRldikKIAlzdHJ1Y3QgY2xrX2luaXRfZGF0YSBpbml0OwogCXN0cnVjdCBhcjEw MF9jbGsgKmFyMTAwOwogCXN0cnVjdCByZXNvdXJjZSAqcjsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJ c3RydWN0IGNsa19jb3JlICpjbGs7CiAJaW50IG5wYXJlbnRzOwogCWludCBpOwogCmRpZmYgLS1n aXQgYS9kcml2ZXJzL2Nsay9zdW54aS9jbGstc3VuOGktYXBiMC5jIGIvZHJpdmVycy9jbGsvc3Vu eGkvY2xrLXN1bjhpLWFwYjAuYwppbmRleCAxZjViYTliLi5mYTMwOGZkIDEwMDY0NAotLS0gYS9k cml2ZXJzL2Nsay9zdW54aS9jbGstc3VuOGktYXBiMC5jCisrKyBiL2RyaXZlcnMvY2xrL3N1bnhp L2Nsay1zdW44aS1hcGIwLmMKQEAgLTI2LDcgKzI2LDcgQEAgc3RhdGljIGludCBzdW44aV9hMjNf YXBiMF9jbGtfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldikKIAljb25zdCBjaGFy ICpjbGtfcGFyZW50OwogCXN0cnVjdCByZXNvdXJjZSAqcjsKIAl2b2lkIF9faW9tZW0gKnJlZzsK LQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAKIAlyID0gcGxhdGZv cm1fZ2V0X3Jlc291cmNlKHBkZXYsIElPUkVTT1VSQ0VfTUVNLCAwKTsKIAlyZWcgPSBkZXZtX2lv cmVtYXBfcmVzb3VyY2UoJnBkZXYtPmRldiwgcik7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay9z dW54aS9jbGstc3VueGkuYyBiL2RyaXZlcnMvY2xrL3N1bnhpL2Nsay1zdW54aS5jCmluZGV4IGI2 NTRiN2IuLjQ0YzQ0NzAgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3N1bnhpL2Nsay1zdW54aS5j CisrKyBiL2RyaXZlcnMvY2xrL3N1bnhpL2Nsay1zdW54aS5jCkBAIC00MDMsNyArNDAzLDcgQEAg c3RhdGljIHZvaWQgc3VuN2lfYTIwX2dldF9vdXRfZmFjdG9ycyh1MzIgKmZyZXEsIHUzMiBwYXJl bnRfcmF0ZSwKICAqIGNsa19zdW54aV9tbWNfcGhhc2VfY29udHJvbCgpIC0gY29uZmlndXJlcyBN TUMgY2xvY2sgcGhhc2UgY29udHJvbAogICovCiAKLXZvaWQgY2xrX3N1bnhpX21tY19waGFzZV9j b250cm9sKHN0cnVjdCBjbGsgKmNsaywgdTggc2FtcGxlLCB1OCBvdXRwdXQpCit2b2lkIGNsa19z dW54aV9tbWNfcGhhc2VfY29udHJvbChzdHJ1Y3QgY2xrX2NvcmUgKmNsaywgdTggc2FtcGxlLCB1 OCBvdXRwdXQpCiB7CiAJI2RlZmluZSB0b19jbGtfY29tcG9zaXRlKF9odykgY29udGFpbmVyX29m KF9odywgc3RydWN0IGNsa19jb21wb3NpdGUsIGh3KQogCSNkZWZpbmUgdG9fY2xrX2ZhY3RvcnMo X2h3KSBjb250YWluZXJfb2YoX2h3LCBzdHJ1Y3QgY2xrX2ZhY3RvcnMsIGh3KQpAQCAtNTgyLDEw ICs1ODIsMTAgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBmYWN0b3JzX2RhdGEgc3VuN2lfYTIwX291 dF9kYXRhIF9faW5pdGNvbnN0ID0gewogCS5nZXR0ZXIgPSBzdW43aV9hMjBfZ2V0X291dF9mYWN0 b3JzLAogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKiBfX2luaXQgc3VueGlfZmFjdG9yc19jbGtf c2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpub2RlLAorc3RhdGljIHN0cnVjdCBjbGtfY29yZSAq IF9faW5pdCBzdW54aV9mYWN0b3JzX2Nsa19zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUs CiAJCQkJCQljb25zdCBzdHJ1Y3QgZmFjdG9yc19kYXRhICpkYXRhKQogewotCXN0cnVjdCBjbGsg KmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xrX2ZhY3RvcnMgKmZhY3Rv cnM7CiAJc3RydWN0IGNsa19nYXRlICpnYXRlID0gTlVMTDsKIAlzdHJ1Y3QgY2xrX211eCAqbXV4 ID0gTlVMTDsKQEAgLTY5NSw3ICs2OTUsNyBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IG11eF9kYXRh IHN1bjRpX2FwYjFfbXV4X2RhdGEgX19pbml0Y29uc3QgPSB7CiBzdGF0aWMgdm9pZCBfX2luaXQg c3VueGlfbXV4X2Nsa19zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUsCiAJCQkJICAgICAg IHN0cnVjdCBtdXhfZGF0YSAqZGF0YSkKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNs a19jb3JlICpjbGs7CiAJY29uc3QgY2hhciAqY2xrX25hbWUgPSBub2RlLT5uYW1lOwogCWNvbnN0 IGNoYXIgKnBhcmVudHNbU1VOWElfTUFYX1BBUkVOVFNdOwogCXZvaWQgX19pb21lbSAqcmVnOwpA QCAtNzc3LDcgKzc3Nyw3IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgZGl2X2RhdGEgc3VuNmlfYTMx X2FwYjJfZGl2X2RhdGEgX19pbml0Y29uc3QgPSB7CiBzdGF0aWMgdm9pZCBfX2luaXQgc3VueGlf ZGl2aWRlcl9jbGtfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpub2RlLAogCQkJCQkgICBzdHJ1 Y3QgZGl2X2RhdGEgKmRhdGEpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29y ZSAqY2xrOwogCWNvbnN0IGNoYXIgKmNsa19uYW1lID0gbm9kZS0+bmFtZTsKIAljb25zdCBjaGFy ICpjbGtfcGFyZW50OwogCXZvaWQgX19pb21lbSAqcmVnOwpAQCAtOTc2LDcgKzk3Niw3IEBAIHN0 YXRpYyB2b2lkIF9faW5pdCBzdW54aV9nYXRlc19jbGtfc2V0dXAoc3RydWN0IGRldmljZV9ub2Rl ICpub2RlLAogCWNsa19kYXRhID0ga21hbGxvYyhzaXplb2Yoc3RydWN0IGNsa19vbmVjZWxsX2Rh dGEpLCBHRlBfS0VSTkVMKTsKIAlpZiAoIWNsa19kYXRhKQogCQlyZXR1cm47Ci0JY2xrX2RhdGEt PmNsa3MgPSBremFsbG9jKChxdHkrMSkgKiBzaXplb2Yoc3RydWN0IGNsayAqKSwgR0ZQX0tFUk5F TCk7CisJY2xrX2RhdGEtPmNsa3MgPSBremFsbG9jKChxdHkrMSkgKiBzaXplb2Yoc3RydWN0IGNs a19jb3JlICopLCBHRlBfS0VSTkVMKTsKIAlpZiAoIWNsa19kYXRhLT5jbGtzKSB7CiAJCWtmcmVl KGNsa19kYXRhKTsKIAkJcmV0dXJuOwpAQCAtMTA3OCw3ICsxMDc4LDcgQEAgc3RhdGljIHZvaWQg X19pbml0IHN1bnhpX2RpdnNfY2xrX3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbm9kZSwKIAlz dHJ1Y3QgY2xrX29uZWNlbGxfZGF0YSAqY2xrX2RhdGE7CiAJY29uc3QgY2hhciAqcGFyZW50Owog CWNvbnN0IGNoYXIgKmNsa19uYW1lOwotCXN0cnVjdCBjbGsgKipjbGtzLCAqcGNsazsKKwlzdHJ1 Y3QgY2xrX2NvcmUgKipjbGtzLCAqcGNsazsKIAlzdHJ1Y3QgY2xrX2h3ICpnYXRlX2h3LCAqcmF0 ZV9odzsKIAljb25zdCBzdHJ1Y3QgY2xrX29wcyAqcmF0ZV9vcHM7CiAJc3RydWN0IGNsa19nYXRl ICpnYXRlID0gTlVMTDsKQEAgLTEyOTEsMTAgKzEyOTEsMTAgQEAgc3RhdGljIHZvaWQgX19pbml0 IHN1bnhpX2luaXRfY2xvY2tzKGNvbnN0IGNoYXIgKmNsb2Nrc1tdLCBpbnQgbmNsb2NrcykKIAog CS8qIFByb3RlY3QgdGhlIGNsb2NrcyB0aGF0IG5lZWRzIHRvIHN0YXkgb24gKi8KIAlmb3IgKGkg PSAwOyBpIDwgbmNsb2NrczsgaSsrKSB7Ci0JCXN0cnVjdCBjbGsgKmNsayA9IGNsa19nZXQoTlVM TCwgY2xvY2tzW2ldKTsKKwkJc3RydWN0IGNsa19jb3JlICpjbGsgPSBjbGtfcHJvdmlkZXJfZ2V0 KE5VTEwsIGNsb2Nrc1tpXSk7CiAKIAkJaWYgKCFJU19FUlIoY2xrKSkKLQkJCWNsa19wcmVwYXJl X2VuYWJsZShjbGspOworCQkJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsayk7CiAJfQog fQogCmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay90ZWdyYS9jbGstYXVkaW8tc3luYy5jIGIvZHJp dmVycy9jbGsvdGVncmEvY2xrLWF1ZGlvLXN5bmMuYwppbmRleCBjMGY3ODQzLi41M2MzNDg4IDEw MDY0NAotLS0gYS9kcml2ZXJzL2Nsay90ZWdyYS9jbGstYXVkaW8tc3luYy5jCisrKyBiL2RyaXZl cnMvY2xrL3RlZ3JhL2Nsay1hdWRpby1zeW5jLmMKQEAgLTU0LDEyICs1NCwxMiBAQCBjb25zdCBz dHJ1Y3QgY2xrX29wcyB0ZWdyYV9jbGtfc3luY19zb3VyY2Vfb3BzID0gewogCS5yZWNhbGNfcmF0 ZSA9IGNsa19zeW5jX3NvdXJjZV9yZWNhbGNfcmF0ZSwKIH07CiAKLXN0cnVjdCBjbGsgKnRlZ3Jh X2Nsa19yZWdpc3Rlcl9zeW5jX3NvdXJjZShjb25zdCBjaGFyICpuYW1lLAorc3RydWN0IGNsa19j b3JlICp0ZWdyYV9jbGtfcmVnaXN0ZXJfc3luY19zb3VyY2UoY29uc3QgY2hhciAqbmFtZSwKIAkJ dW5zaWduZWQgbG9uZyByYXRlLCB1bnNpZ25lZCBsb25nIG1heF9yYXRlKQogewogCXN0cnVjdCB0 ZWdyYV9jbGtfc3luY19zb3VyY2UgKnN5bmM7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsK LQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAKIAlzeW5jID0ga3ph bGxvYyhzaXplb2YoKnN5bmMpLCBHRlBfS0VSTkVMKTsKIAlpZiAoIXN5bmMpIHsKZGlmZiAtLWdp dCBhL2RyaXZlcnMvY2xrL3RlZ3JhL2Nsay1kaXZpZGVyLmMgYi9kcml2ZXJzL2Nsay90ZWdyYS9j bGstZGl2aWRlci5jCmluZGV4IDI5MGY5YzEuLmM2OWE3MjggMTAwNjQ0Ci0tLSBhL2RyaXZlcnMv Y2xrL3RlZ3JhL2Nsay1kaXZpZGVyLmMKKysrIGIvZHJpdmVycy9jbGsvdGVncmEvY2xrLWRpdmlk ZXIuYwpAQCAtMTksNyArMTksNiBAQAogI2luY2x1ZGUgPGxpbnV4L2Vyci5oPgogI2luY2x1ZGUg PGxpbnV4L3NsYWIuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIuaD4KLSNpbmNsdWRl IDxsaW51eC9jbGsuaD4KIAogI2luY2x1ZGUgImNsay5oIgogCkBAIC0xNDcsMTMgKzE0NiwxMyBA QCBjb25zdCBzdHJ1Y3QgY2xrX29wcyB0ZWdyYV9jbGtfZnJhY19kaXZfb3BzID0gewogCS5yb3Vu ZF9yYXRlID0gY2xrX2ZyYWNfZGl2X3JvdW5kX3JhdGUsCiB9OwogCi1zdHJ1Y3QgY2xrICp0ZWdy YV9jbGtfcmVnaXN0ZXJfZGl2aWRlcihjb25zdCBjaGFyICpuYW1lLAorc3RydWN0IGNsa19jb3Jl ICp0ZWdyYV9jbGtfcmVnaXN0ZXJfZGl2aWRlcihjb25zdCBjaGFyICpuYW1lLAogCQljb25zdCBj aGFyICpwYXJlbnRfbmFtZSwgdm9pZCBfX2lvbWVtICpyZWcsCiAJCXVuc2lnbmVkIGxvbmcgZmxh Z3MsIHU4IGNsa19kaXZpZGVyX2ZsYWdzLCB1OCBzaGlmdCwgdTggd2lkdGgsCiAJCXU4IGZyYWNf d2lkdGgsIHNwaW5sb2NrX3QgKmxvY2spCiB7CiAJc3RydWN0IHRlZ3JhX2Nsa19mcmFjX2RpdiAq ZGl2aWRlcjsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3Ry dWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAogCWRpdmlkZXIgPSBremFsbG9jKHNpemVvZigqZGl2 aWRlciksIEdGUF9LRVJORUwpOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvdGVncmEvY2xrLXBl cmlwaC1nYXRlLmMgYi9kcml2ZXJzL2Nsay90ZWdyYS9jbGstcGVyaXBoLWdhdGUuYwppbmRleCAw YWE4ODMwLi5kNTkyMDBmIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay90ZWdyYS9jbGstcGVyaXBo LWdhdGUuYworKysgYi9kcml2ZXJzL2Nsay90ZWdyYS9jbGstcGVyaXBoLWdhdGUuYwpAQCAtMTQs NyArMTQsNiBAQAogICogYWxvbmcgd2l0aCB0aGlzIHByb2dyYW0uICBJZiBub3QsIHNlZSA8aHR0 cDovL3d3dy5nbnUub3JnL2xpY2Vuc2VzLz4uCiAgKi8KIAotI2luY2x1ZGUgPGxpbnV4L2Nsay5o PgogI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxpbnV4L3NsYWIu aD4KICNpbmNsdWRlIDxsaW51eC9pby5oPgpAQCAtMTI4LDEyICsxMjcsMTIgQEAgY29uc3Qgc3Ry dWN0IGNsa19vcHMgdGVncmFfY2xrX3BlcmlwaF9nYXRlX29wcyA9IHsKIAkuZGlzYWJsZSA9IGNs a19wZXJpcGhfZGlzYWJsZSwKIH07CiAKLXN0cnVjdCBjbGsgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9w ZXJpcGhfZ2F0ZShjb25zdCBjaGFyICpuYW1lLAorc3RydWN0IGNsa19jb3JlICp0ZWdyYV9jbGtf cmVnaXN0ZXJfcGVyaXBoX2dhdGUoY29uc3QgY2hhciAqbmFtZSwKIAkJY29uc3QgY2hhciAqcGFy ZW50X25hbWUsIHU4IGdhdGVfZmxhZ3MsIHZvaWQgX19pb21lbSAqY2xrX2Jhc2UsCiAJCXVuc2ln bmVkIGxvbmcgZmxhZ3MsIGludCBjbGtfbnVtLCBpbnQgKmVuYWJsZV9yZWZjbnQpCiB7CiAJc3Ry dWN0IHRlZ3JhX2Nsa19wZXJpcGhfZ2F0ZSAqZ2F0ZTsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3Ry dWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAlzdHJ1Y3Qg dGVncmFfY2xrX3BlcmlwaF9yZWdzICpwcmVnczsKIApkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsv dGVncmEvY2xrLXBlcmlwaC5jIGIvZHJpdmVycy9jbGsvdGVncmEvY2xrLXBlcmlwaC5jCmluZGV4 IDllODk5YzE4Li4zNGE2MGZkIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay90ZWdyYS9jbGstcGVy aXBoLmMKKysrIGIvZHJpdmVycy9jbGsvdGVncmEvY2xrLXBlcmlwaC5jCkBAIC0xNCw3ICsxNCw2 IEBACiAgKiBhbG9uZyB3aXRoIHRoaXMgcHJvZ3JhbS4gIElmIG5vdCwgc2VlIDxodHRwOi8vd3d3 LmdudS5vcmcvbGljZW5zZXMvPi4KICAqLwogCi0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5j bHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5jbHVkZSA8bGludXgvZXhwb3J0Lmg+CiAj aW5jbHVkZSA8bGludXgvc2xhYi5oPgpAQCAtMTM4LDEzICsxMzcsMTMgQEAgc3RhdGljIGNvbnN0 IHN0cnVjdCBjbGtfb3BzIHRlZ3JhX2Nsa19wZXJpcGhfbm9fZ2F0ZV9vcHMgPSB7CiAJLnNldF9y YXRlID0gY2xrX3BlcmlwaF9zZXRfcmF0ZSwKIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICpfdGVn cmFfY2xrX3JlZ2lzdGVyX3BlcmlwaChjb25zdCBjaGFyICpuYW1lLAorc3RhdGljIHN0cnVjdCBj bGtfY29yZSAqX3RlZ3JhX2Nsa19yZWdpc3Rlcl9wZXJpcGgoY29uc3QgY2hhciAqbmFtZSwKIAkJ CWNvbnN0IGNoYXIgKipwYXJlbnRfbmFtZXMsIGludCBudW1fcGFyZW50cywKIAkJCXN0cnVjdCB0 ZWdyYV9jbGtfcGVyaXBoICpwZXJpcGgsCiAJCQl2b2lkIF9faW9tZW0gKmNsa19iYXNlLCB1MzIg b2Zmc2V0LAogCQkJdW5zaWduZWQgbG9uZyBmbGFncykKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJ c3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAlzdHJ1 Y3QgdGVncmFfY2xrX3BlcmlwaF9yZWdzICpiYW5rOwogCWJvb2wgZGl2ID0gIShwZXJpcGgtPmdh dGUuZmxhZ3MgJiBURUdSQV9QRVJJUEhfTk9fRElWKTsKQEAgLTE4Niw3ICsxODUsNyBAQCBzdGF0 aWMgc3RydWN0IGNsayAqX3RlZ3JhX2Nsa19yZWdpc3Rlcl9wZXJpcGgoY29uc3QgY2hhciAqbmFt ZSwKIAlyZXR1cm4gY2xrOwogfQogCi1zdHJ1Y3QgY2xrICp0ZWdyYV9jbGtfcmVnaXN0ZXJfcGVy aXBoKGNvbnN0IGNoYXIgKm5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKnRlZ3JhX2Nsa19yZWdpc3Rl cl9wZXJpcGgoY29uc3QgY2hhciAqbmFtZSwKIAkJY29uc3QgY2hhciAqKnBhcmVudF9uYW1lcywg aW50IG51bV9wYXJlbnRzLAogCQlzdHJ1Y3QgdGVncmFfY2xrX3BlcmlwaCAqcGVyaXBoLCB2b2lk IF9faW9tZW0gKmNsa19iYXNlLAogCQl1MzIgb2Zmc2V0LCB1bnNpZ25lZCBsb25nIGZsYWdzKQpA QCAtMTk1LDcgKzE5NCw3IEBAIHN0cnVjdCBjbGsgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9wZXJpcGgo Y29uc3QgY2hhciAqbmFtZSwKIAkJCXBlcmlwaCwgY2xrX2Jhc2UsIG9mZnNldCwgZmxhZ3MpOwog fQogCi1zdHJ1Y3QgY2xrICp0ZWdyYV9jbGtfcmVnaXN0ZXJfcGVyaXBoX25vZGl2KGNvbnN0IGNo YXIgKm5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9wZXJpcGhfbm9k aXYoY29uc3QgY2hhciAqbmFtZSwKIAkJY29uc3QgY2hhciAqKnBhcmVudF9uYW1lcywgaW50IG51 bV9wYXJlbnRzLAogCQlzdHJ1Y3QgdGVncmFfY2xrX3BlcmlwaCAqcGVyaXBoLCB2b2lkIF9faW9t ZW0gKmNsa19iYXNlLAogCQl1MzIgb2Zmc2V0KQpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvdGVn cmEvY2xrLXBsbC1vdXQuYyBiL2RyaXZlcnMvY2xrL3RlZ3JhL2Nsay1wbGwtb3V0LmMKaW5kZXgg MzU5ODk4Ny4uM2FkYmMyNCAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvdGVncmEvY2xrLXBsbC1v dXQuYworKysgYi9kcml2ZXJzL2Nsay90ZWdyYS9jbGstcGxsLW91dC5jCkBAIC0yMCw3ICsyMCw2 IEBACiAjaW5jbHVkZSA8bGludXgvZGVsYXkuaD4KICNpbmNsdWRlIDxsaW51eC9zbGFiLmg+CiAj aW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAK ICNpbmNsdWRlICJjbGsuaCIKIApAQCAtODcsMTMgKzg2LDEzIEBAIGNvbnN0IHN0cnVjdCBjbGtf b3BzIHRlZ3JhX2Nsa19wbGxfb3V0X29wcyA9IHsKIAkuZGlzYWJsZSA9IGNsa19wbGxfb3V0X2Rp c2FibGUsCiB9OwogCi1zdHJ1Y3QgY2xrICp0ZWdyYV9jbGtfcmVnaXN0ZXJfcGxsX291dChjb25z dCBjaGFyICpuYW1lLAorc3RydWN0IGNsa19jb3JlICp0ZWdyYV9jbGtfcmVnaXN0ZXJfcGxsX291 dChjb25zdCBjaGFyICpuYW1lLAogCQljb25zdCBjaGFyICpwYXJlbnRfbmFtZSwgdm9pZCBfX2lv bWVtICpyZWcsIHU4IGVuYl9iaXRfaWR4LAogCQl1OCByc3RfYml0X2lkeCwgdW5zaWduZWQgbG9u ZyBmbGFncywgdTggcGxsX291dF9mbGFncywKIAkJc3BpbmxvY2tfdCAqbG9jaykKIHsKIAlzdHJ1 Y3QgdGVncmFfY2xrX3BsbF9vdXQgKnBsbF9vdXQ7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVj dCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAKIAlwbGxfb3V0 ID0ga3phbGxvYyhzaXplb2YoKnBsbF9vdXQpLCBHRlBfS0VSTkVMKTsKZGlmZiAtLWdpdCBhL2Ry aXZlcnMvY2xrL3RlZ3JhL2Nsay1wbGwuYyBiL2RyaXZlcnMvY2xrL3RlZ3JhL2Nsay1wbGwuYwpp bmRleCBjN2M2ZDhmLi5hYTE4ZWFiIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay90ZWdyYS9jbGst cGxsLmMKKysrIGIvZHJpdmVycy9jbGsvdGVncmEvY2xrLXBsbC5jCkBAIC0xOSw3ICsxOSw2IEBA CiAjaW5jbHVkZSA8bGludXgvZGVsYXkuaD4KICNpbmNsdWRlIDxsaW51eC9lcnIuaD4KICNpbmNs dWRlIDxsaW51eC9jbGstcHJvdmlkZXIuaD4KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KIAogI2lu Y2x1ZGUgImNsay5oIgogCkBAIC03MjksNyArNzI4LDcgQEAgc3RhdGljIGludCBjbGtfcGxsZV90 cmFpbmluZyhzdHJ1Y3QgdGVncmFfY2xrX3BsbCAqcGxsKQogc3RhdGljIGludCBjbGtfcGxsZV9l bmFibGUoc3RydWN0IGNsa19odyAqaHcpCiB7CiAJc3RydWN0IHRlZ3JhX2Nsa19wbGwgKnBsbCA9 IHRvX2Nsa19wbGwoaHcpOwotCXVuc2lnbmVkIGxvbmcgaW5wdXRfcmF0ZSA9IGNsa19nZXRfcmF0 ZShjbGtfZ2V0X3BhcmVudChody0+Y2xrKSk7CisJdW5zaWduZWQgbG9uZyBpbnB1dF9yYXRlID0g Y2xrX3Byb3ZpZGVyX2dldF9yYXRlKGNsa19wcm92aWRlcl9nZXRfcGFyZW50KGh3LT5jbGspKTsK IAlzdHJ1Y3QgdGVncmFfY2xrX3BsbF9mcmVxX3RhYmxlIHNlbDsKIAl1MzIgdmFsOwogCWludCBl cnI7CkBAIC0xMDMzLDcgKzEwMzIsNyBAQCBzdGF0aWMgaW50IGNsa19wbGxtX3NldF9yYXRlKHN0 cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25lZCBsb25nIHJhdGUsCiAKIAlzdGF0ZSA9IGNsa19wbGxf aXNfZW5hYmxlZChodyk7CiAJaWYgKHN0YXRlKSB7Ci0JCWlmIChyYXRlICE9IGNsa19nZXRfcmF0 ZShody0+Y2xrKSkgeworCQlpZiAocmF0ZSAhPSBjbGtfcHJvdmlkZXJfZ2V0X3JhdGUoaHctPmNs aykpIHsKIAkJCXByX2VycigiJXM6IENhbm5vdCBjaGFuZ2UgYWN0aXZlIFBMTE1cbiIsIF9fZnVu Y19fKTsKIAkJCXJldCA9IC1FSU5WQUw7CiAJCQlnb3RvIG91dDsKQEAgLTEyODUsNyArMTI4NCw3 IEBAIHN0YXRpYyBpbnQgY2xrX3BsbGVfdGVncmExMTRfZW5hYmxlKHN0cnVjdCBjbGtfaHcgKmh3 KQogCXUzMiB2YWw7CiAJaW50IHJldDsKIAl1bnNpZ25lZCBsb25nIGZsYWdzID0gMDsKLQl1bnNp Z25lZCBsb25nIGlucHV0X3JhdGUgPSBjbGtfZ2V0X3JhdGUoY2xrX2dldF9wYXJlbnQoaHctPmNs aykpOworCXVuc2lnbmVkIGxvbmcgaW5wdXRfcmF0ZSA9IGNsa19wcm92aWRlcl9nZXRfcmF0ZShj bGtfcHJvdmlkZXJfZ2V0X3BhcmVudChody0+Y2xrKSk7CiAKIAlpZiAoX2dldF90YWJsZV9yYXRl KGh3LCAmc2VsLCBwbGwtPnBhcmFtcy0+Zml4ZWRfcmF0ZSwgaW5wdXRfcmF0ZSkpCiAJCXJldHVy biAtRUlOVkFMOwpAQCAtMTQzMCw3ICsxNDI5LDcgQEAgc3RhdGljIHN0cnVjdCB0ZWdyYV9jbGtf cGxsICpfdGVncmFfaW5pdF9wbGwodm9pZCBfX2lvbWVtICpjbGtfYmFzZSwKIAlyZXR1cm4gcGxs OwogfQogCi1zdGF0aWMgc3RydWN0IGNsayAqX3RlZ3JhX2Nsa19yZWdpc3Rlcl9wbGwoc3RydWN0 IHRlZ3JhX2Nsa19wbGwgKnBsbCwKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKl90ZWdyYV9jbGtf cmVnaXN0ZXJfcGxsKHN0cnVjdCB0ZWdyYV9jbGtfcGxsICpwbGwsCiAJCWNvbnN0IGNoYXIgKm5h bWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLCB1bnNpZ25lZCBsb25nIGZsYWdzLAogCQljb25z dCBzdHJ1Y3QgY2xrX29wcyAqb3BzKQogewpAQCAtMTQ0OCwxMyArMTQ0NywxMyBAQCBzdGF0aWMg c3RydWN0IGNsayAqX3RlZ3JhX2Nsa19yZWdpc3Rlcl9wbGwoc3RydWN0IHRlZ3JhX2Nsa19wbGwg KnBsbCwKIAlyZXR1cm4gY2xrX3JlZ2lzdGVyKE5VTEwsICZwbGwtPmh3KTsKIH0KIAotc3RydWN0 IGNsayAqdGVncmFfY2xrX3JlZ2lzdGVyX3BsbChjb25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFy ICpwYXJlbnRfbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqdGVncmFfY2xrX3JlZ2lzdGVyX3BsbChj b25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJdm9pZCBfX2lvbWVt ICpjbGtfYmFzZSwgdm9pZCBfX2lvbWVtICpwbWMsCiAJCXVuc2lnbmVkIGxvbmcgZmxhZ3MsIHN0 cnVjdCB0ZWdyYV9jbGtfcGxsX3BhcmFtcyAqcGxsX3BhcmFtcywKIAkJc3BpbmxvY2tfdCAqbG9j aykKIHsKIAlzdHJ1Y3QgdGVncmFfY2xrX3BsbCAqcGxsOwotCXN0cnVjdCBjbGsgKmNsazsKKwlz dHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAogCXBsbF9wYXJhbXMtPmZsYWdzIHw9IFRFR1JBX1BMTF9C WVBBU1M7CiAJcGxsX3BhcmFtcy0+ZmxhZ3MgfD0gVEVHUkFfUExMX0hBU19MT0NLX0VOQUJMRTsK QEAgLTE0NzksMTMgKzE0NzgsMTMgQEAgc3RhdGljIHN0cnVjdCBkaXZfbm1wIHBsbF9lX25tcCA9 IHsKIAkuZGl2cF93aWR0aCA9IFBMTEVfQkFTRV9ESVZQX1dJRFRILAogfTsKIAotc3RydWN0IGNs ayAqdGVncmFfY2xrX3JlZ2lzdGVyX3BsbGUoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAq cGFyZW50X25hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9wbGxlKGNv bnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAogCQl2b2lkIF9faW9tZW0g KmNsa19iYXNlLCB2b2lkIF9faW9tZW0gKnBtYywKIAkJdW5zaWduZWQgbG9uZyBmbGFncywgc3Ry dWN0IHRlZ3JhX2Nsa19wbGxfcGFyYW1zICpwbGxfcGFyYW1zLAogCQlzcGlubG9ja190ICpsb2Nr KQogewogCXN0cnVjdCB0ZWdyYV9jbGtfcGxsICpwbGw7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0 cnVjdCBjbGtfY29yZSAqY2xrOwogCiAJcGxsX3BhcmFtcy0+ZmxhZ3MgfD0gVEVHUkFfUExMX0xP Q0tfTUlTQyB8IFRFR1JBX1BMTF9CWVBBU1M7CiAJcGxsX3BhcmFtcy0+ZmxhZ3MgfD0gVEVHUkFf UExMX0hBU19MT0NLX0VOQUJMRTsKQEAgLTE1NTAsMTQgKzE1NDksMTQgQEAgc3RhdGljIGNvbnN0 IHN0cnVjdCBjbGtfb3BzIHRlZ3JhX2Nsa19wbGxlX3RlZ3JhMTE0X29wcyA9IHsKIH07CiAKIAot c3RydWN0IGNsayAqdGVncmFfY2xrX3JlZ2lzdGVyX3BsbHhjKGNvbnN0IGNoYXIgKm5hbWUsIGNv bnN0IGNoYXIgKnBhcmVudF9uYW1lLAorc3RydWN0IGNsa19jb3JlICp0ZWdyYV9jbGtfcmVnaXN0 ZXJfcGxseGMoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAJCQkg IHZvaWQgX19pb21lbSAqY2xrX2Jhc2UsIHZvaWQgX19pb21lbSAqcG1jLAogCQkJICB1bnNpZ25l ZCBsb25nIGZsYWdzLAogCQkJICBzdHJ1Y3QgdGVncmFfY2xrX3BsbF9wYXJhbXMgKnBsbF9wYXJh bXMsCiAJCQkgIHNwaW5sb2NrX3QgKmxvY2spCiB7CiAJc3RydWN0IHRlZ3JhX2Nsa19wbGwgKnBs bDsKLQlzdHJ1Y3QgY2xrICpjbGssICpwYXJlbnQ7CisJc3RydWN0IGNsa19jb3JlICpjbGssICpw YXJlbnQ7CiAJdW5zaWduZWQgbG9uZyBwYXJlbnRfcmF0ZTsKIAlpbnQgZXJyOwogCXUzMiB2YWws IHZhbF9pZGRxOwpAQCAtMTYwMyw3ICsxNjAyLDcgQEAgc3RydWN0IGNsayAqdGVncmFfY2xrX3Jl Z2lzdGVyX3BsbHhjKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAog CXJldHVybiBjbGs7CiB9CiAKLXN0cnVjdCBjbGsgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9wbGxyZShj b25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKK3N0cnVjdCBjbGtfY29y ZSAqdGVncmFfY2xrX3JlZ2lzdGVyX3BsbHJlKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIg KnBhcmVudF9uYW1lLAogCQkJICB2b2lkIF9faW9tZW0gKmNsa19iYXNlLCB2b2lkIF9faW9tZW0g KnBtYywKIAkJCSAgdW5zaWduZWQgbG9uZyBmbGFncywKIAkJCSAgc3RydWN0IHRlZ3JhX2Nsa19w bGxfcGFyYW1zICpwbGxfcGFyYW1zLApAQCAtMTYxMSw3ICsxNjEwLDcgQEAgc3RydWN0IGNsayAq dGVncmFfY2xrX3JlZ2lzdGVyX3BsbHJlKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBh cmVudF9uYW1lLAogewogCXUzMiB2YWw7CiAJc3RydWN0IHRlZ3JhX2Nsa19wbGwgKnBsbDsKLQlz dHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAKIAlwbGxfcGFyYW1zLT5m bGFncyB8PSBURUdSQV9QTExfSEFTX0xPQ0tfRU5BQkxFIHwgVEVHUkFfUExMX0xPQ0tfTUlTQzsK IApAQCAtMTY0OSwxNCArMTY0OCwxNCBAQCBzdHJ1Y3QgY2xrICp0ZWdyYV9jbGtfcmVnaXN0ZXJf cGxscmUoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAJcmV0dXJu IGNsazsKIH0KIAotc3RydWN0IGNsayAqdGVncmFfY2xrX3JlZ2lzdGVyX3BsbG0oY29uc3QgY2hh ciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKnRlZ3Jh X2Nsa19yZWdpc3Rlcl9wbGxtKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9u YW1lLAogCQkJICB2b2lkIF9faW9tZW0gKmNsa19iYXNlLCB2b2lkIF9faW9tZW0gKnBtYywKIAkJ CSAgdW5zaWduZWQgbG9uZyBmbGFncywKIAkJCSAgc3RydWN0IHRlZ3JhX2Nsa19wbGxfcGFyYW1z ICpwbGxfcGFyYW1zLAogCQkJICBzcGlubG9ja190ICpsb2NrKQogewogCXN0cnVjdCB0ZWdyYV9j bGtfcGxsICpwbGw7Ci0Jc3RydWN0IGNsayAqY2xrLCAqcGFyZW50OworCXN0cnVjdCBjbGtfY29y ZSAqY2xrLCAqcGFyZW50OwogCXVuc2lnbmVkIGxvbmcgcGFyZW50X3JhdGU7CiAKIAlpZiAoIXBs bF9wYXJhbXMtPnBkaXZfdG9odykKQEAgLTE2ODgsMTMgKzE2ODcsMTMgQEAgc3RydWN0IGNsayAq dGVncmFfY2xrX3JlZ2lzdGVyX3BsbG0oY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFy ZW50X25hbWUsCiAJcmV0dXJuIGNsazsKIH0KIAotc3RydWN0IGNsayAqdGVncmFfY2xrX3JlZ2lz dGVyX3BsbGMoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCitzdHJ1 Y3QgY2xrX2NvcmUgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9wbGxjKGNvbnN0IGNoYXIgKm5hbWUsIGNv bnN0IGNoYXIgKnBhcmVudF9uYW1lLAogCQkJICB2b2lkIF9faW9tZW0gKmNsa19iYXNlLCB2b2lk IF9faW9tZW0gKnBtYywKIAkJCSAgdW5zaWduZWQgbG9uZyBmbGFncywKIAkJCSAgc3RydWN0IHRl Z3JhX2Nsa19wbGxfcGFyYW1zICpwbGxfcGFyYW1zLAogCQkJICBzcGlubG9ja190ICpsb2NrKQog ewotCXN0cnVjdCBjbGsgKnBhcmVudCwgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKnBhcmVudCwg KmNsazsKIAlzdHJ1Y3QgcGRpdl9tYXAgKnBfdG9odyA9IHBsbF9wYXJhbXMtPnBkaXZfdG9odzsK IAlzdHJ1Y3QgdGVncmFfY2xrX3BsbCAqcGxsOwogCXN0cnVjdCB0ZWdyYV9jbGtfcGxsX2ZyZXFf dGFibGUgY2ZnOwpAQCAtMTc2MiwxNCArMTc2MSwxNCBAQCBzdHJ1Y3QgY2xrICp0ZWdyYV9jbGtf cmVnaXN0ZXJfcGxsYyhjb25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwK IAlyZXR1cm4gY2xrOwogfQogCi1zdHJ1Y3QgY2xrICp0ZWdyYV9jbGtfcmVnaXN0ZXJfcGxsZV90 ZWdyYTExNChjb25zdCBjaGFyICpuYW1lLAorc3RydWN0IGNsa19jb3JlICp0ZWdyYV9jbGtfcmVn aXN0ZXJfcGxsZV90ZWdyYTExNChjb25zdCBjaGFyICpuYW1lLAogCQkJCWNvbnN0IGNoYXIgKnBh cmVudF9uYW1lLAogCQkJCXZvaWQgX19pb21lbSAqY2xrX2Jhc2UsIHVuc2lnbmVkIGxvbmcgZmxh Z3MsCiAJCQkJc3RydWN0IHRlZ3JhX2Nsa19wbGxfcGFyYW1zICpwbGxfcGFyYW1zLAogCQkJCXNw aW5sb2NrX3QgKmxvY2spCiB7CiAJc3RydWN0IHRlZ3JhX2Nsa19wbGwgKnBsbDsKLQlzdHJ1Y3Qg Y2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJdTMyIHZhbCwgdmFsX2F1eDsKIAog CXBsbF9wYXJhbXMtPmZsYWdzIHw9IFRFR1JBX1BMTF9IQVNfTE9DS19FTkFCTEU7CkBAIC0xODEy LDEzICsxODExLDEzIEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgY2xrX29wcyB0ZWdyYV9jbGtfcGxs c3Nfb3BzID0gewogCS5zZXRfcmF0ZSA9IGNsa19wbGx4Y19zZXRfcmF0ZSwKIH07CiAKLXN0cnVj dCBjbGsgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9wbGxzcyhjb25zdCBjaGFyICpuYW1lLCBjb25zdCBj aGFyICpwYXJlbnRfbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqdGVncmFfY2xrX3JlZ2lzdGVyX3Bs bHNzKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAogCQkJCXZvaWQg X19pb21lbSAqY2xrX2Jhc2UsIHVuc2lnbmVkIGxvbmcgZmxhZ3MsCiAJCQkJc3RydWN0IHRlZ3Jh X2Nsa19wbGxfcGFyYW1zICpwbGxfcGFyYW1zLAogCQkJCXNwaW5sb2NrX3QgKmxvY2spCiB7CiAJ c3RydWN0IHRlZ3JhX2Nsa19wbGwgKnBsbDsKLQlzdHJ1Y3QgY2xrICpjbGssICpwYXJlbnQ7CisJ c3RydWN0IGNsa19jb3JlICpjbGssICpwYXJlbnQ7CiAJc3RydWN0IHRlZ3JhX2Nsa19wbGxfZnJl cV90YWJsZSBjZmc7CiAJdW5zaWduZWQgbG9uZyBwYXJlbnRfcmF0ZTsKIAl1MzIgdmFsOwpkaWZm IC0tZ2l0IGEvZHJpdmVycy9jbGsvdGVncmEvY2xrLXN1cGVyLmMgYi9kcml2ZXJzL2Nsay90ZWdy YS9jbGstc3VwZXIuYwppbmRleCAyZmQ5MjRkLi4wZDExMzQ2IDEwMDY0NAotLS0gYS9kcml2ZXJz L2Nsay90ZWdyYS9jbGstc3VwZXIuYworKysgYi9kcml2ZXJzL2Nsay90ZWdyYS9jbGstc3VwZXIu YwpAQCAtMjAsNyArMjAsNiBAQAogI2luY2x1ZGUgPGxpbnV4L2Vyci5oPgogI2luY2x1ZGUgPGxp bnV4L3NsYWIuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIuaD4KLSNpbmNsdWRlIDxs aW51eC9jbGsuaD4KIAogI2luY2x1ZGUgImNsay5oIgogCkBAIC0xMjcsMTMgKzEyNiwxMyBAQCBj b25zdCBzdHJ1Y3QgY2xrX29wcyB0ZWdyYV9jbGtfc3VwZXJfb3BzID0gewogCS5zZXRfcGFyZW50 ID0gY2xrX3N1cGVyX3NldF9wYXJlbnQsCiB9OwogCi1zdHJ1Y3QgY2xrICp0ZWdyYV9jbGtfcmVn aXN0ZXJfc3VwZXJfbXV4KGNvbnN0IGNoYXIgKm5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKnRlZ3Jh X2Nsa19yZWdpc3Rlcl9zdXBlcl9tdXgoY29uc3QgY2hhciAqbmFtZSwKIAkJY29uc3QgY2hhciAq KnBhcmVudF9uYW1lcywgdTggbnVtX3BhcmVudHMsCiAJCXVuc2lnbmVkIGxvbmcgZmxhZ3MsIHZv aWQgX19pb21lbSAqcmVnLCB1OCBjbGtfc3VwZXJfZmxhZ3MsCiAJCXU4IHdpZHRoLCB1OCBwbGx4 X2luZGV4LCB1OCBkaXYyX2luZGV4LCBzcGlubG9ja190ICpsb2NrKQogewogCXN0cnVjdCB0ZWdy YV9jbGtfc3VwZXJfbXV4ICpzdXBlcjsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19j b3JlICpjbGs7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgaW5pdDsKIAogCXN1cGVyID0ga3phbGxv YyhzaXplb2YoKnN1cGVyKSwgR0ZQX0tFUk5FTCk7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay90 ZWdyYS9jbGstdGVncmEtYXVkaW8uYyBiL2RyaXZlcnMvY2xrL3RlZ3JhL2Nsay10ZWdyYS1hdWRp by5jCmluZGV4IDVjMzhhYWIuLjAzOGEyMmUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3RlZ3Jh L2Nsay10ZWdyYS1hdWRpby5jCisrKyBiL2RyaXZlcnMvY2xrL3RlZ3JhL2Nsay10ZWdyYS1hdWRp by5jCkBAIC0xNSw3ICsxNSw2IEBACiAgKi8KIAogI2luY2x1ZGUgPGxpbnV4L2lvLmg+Ci0jaW5j bHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5j bHVkZSA8bGludXgvb2YuaD4KICNpbmNsdWRlIDxsaW51eC9vZl9hZGRyZXNzLmg+CkBAIC0xMjgs OCArMTI3LDggQEAgdm9pZCBfX2luaXQgdGVncmFfYXVkaW9fY2xrX2luaXQodm9pZCBfX2lvbWVt ICpjbGtfYmFzZSwKIAkJCXZvaWQgX19pb21lbSAqcG1jX2Jhc2UsIHN0cnVjdCB0ZWdyYV9jbGsg KnRlZ3JhX2Nsa3MsCiAJCQlzdHJ1Y3QgdGVncmFfY2xrX3BsbF9wYXJhbXMgKnBsbF9hX3BhcmFt cykKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7Ci0Jc3RydWN0IGNsayAqKmR0X2NsazsKKwlzdHJ1Y3Qg Y2xrX2NvcmUgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKipkdF9jbGs7CiAJaW50IGk7CiAKIAkv KiBQTExBICovCmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay90ZWdyYS9jbGstdGVncmEtZml4ZWQu YyBiL2RyaXZlcnMvY2xrL3RlZ3JhL2Nsay10ZWdyYS1maXhlZC5jCmluZGV4IGYzYjc3MzguLjVl ZTQ4NmEgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3RlZ3JhL2Nsay10ZWdyYS1maXhlZC5jCisr KyBiL2RyaXZlcnMvY2xrL3RlZ3JhL2Nsay10ZWdyYS1maXhlZC5jCkBAIC0xNSw3ICsxNSw2IEBA CiAgKi8KIAogI2luY2x1ZGUgPGxpbnV4L2lvLmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAj aW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5jbHVkZSA8bGludXgvb2YuaD4KICNp bmNsdWRlIDxsaW51eC9vZl9hZGRyZXNzLmg+CkBAIC0zNiw4ICszNSw4IEBAIGludCBfX2luaXQg dGVncmFfb3NjX2Nsa19pbml0KHZvaWQgX19pb21lbSAqY2xrX2Jhc2UsCiAJCQkJdW5zaWduZWQg bG9uZyAqb3NjX2ZyZXEsCiAJCQkJdW5zaWduZWQgbG9uZyAqcGxsX3JlZl9mcmVxKQogewotCXN0 cnVjdCBjbGsgKmNsazsKLQlzdHJ1Y3QgY2xrICoqZHRfY2xrOworCXN0cnVjdCBjbGtfY29yZSAq Y2xrOworCXN0cnVjdCBjbGtfY29yZSAqKmR0X2NsazsKIAl1MzIgdmFsLCBwbGxfcmVmX2RpdjsK IAl1bnNpZ25lZCBvc2NfaWR4OwogCkBAIC04MSw4ICs4MCw4IEBAIGludCBfX2luaXQgdGVncmFf b3NjX2Nsa19pbml0KHZvaWQgX19pb21lbSAqY2xrX2Jhc2UsCiAKIHZvaWQgX19pbml0IHRlZ3Jh X2ZpeGVkX2Nsa19pbml0KHN0cnVjdCB0ZWdyYV9jbGsgKnRlZ3JhX2Nsa3MpCiB7Ci0Jc3RydWN0 IGNsayAqY2xrOwotCXN0cnVjdCBjbGsgKipkdF9jbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7 CisJc3RydWN0IGNsa19jb3JlICoqZHRfY2xrOwogCiAJLyogY2xrXzMyayAqLwogCWR0X2NsayA9 IHRlZ3JhX2xvb2t1cF9kdF9pZCh0ZWdyYV9jbGtfY2xrXzMyaywgdGVncmFfY2xrcyk7CmRpZmYg LS1naXQgYS9kcml2ZXJzL2Nsay90ZWdyYS9jbGstdGVncmEtcGVyaXBoLmMgYi9kcml2ZXJzL2Ns ay90ZWdyYS9jbGstdGVncmEtcGVyaXBoLmMKaW5kZXggMzdmMzJjNC4uNWUxN2FkNCAxMDA2NDQK LS0tIGEvZHJpdmVycy9jbGsvdGVncmEvY2xrLXRlZ3JhLXBlcmlwaC5jCisrKyBiL2RyaXZlcnMv Y2xrL3RlZ3JhL2Nsay10ZWdyYS1wZXJpcGguYwpAQCAtMTUsNyArMTUsNiBAQAogICovCiAKICNp bmNsdWRlIDxsaW51eC9pby5oPgotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxp bnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsa2Rldi5oPgogI2luY2x1ZGUg PGxpbnV4L29mLmg+CkBAIC01ODUsOCArNTg0LDggQEAgc3RhdGljIHZvaWQgX19pbml0IHBlcmlw aF9jbGtfaW5pdCh2b2lkIF9faW9tZW0gKmNsa19iYXNlLAogCQkJCXN0cnVjdCB0ZWdyYV9jbGsg KnRlZ3JhX2Nsa3MpCiB7CiAJaW50IGk7Ci0Jc3RydWN0IGNsayAqY2xrOwotCXN0cnVjdCBjbGsg KipkdF9jbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CisJc3RydWN0IGNsa19jb3JlICoqZHRf Y2xrOwogCiAJZm9yIChpID0gMDsgaSA8IEFSUkFZX1NJWkUocGVyaXBoX2Nsa3MpOyBpKyspIHsK IAkJc3RydWN0IHRlZ3JhX2Nsa19wZXJpcGhfcmVncyAqYmFuazsKQEAgLTYxNSw4ICs2MTQsOCBA QCBzdGF0aWMgdm9pZCBfX2luaXQgZ2F0ZV9jbGtfaW5pdCh2b2lkIF9faW9tZW0gKmNsa19iYXNl LAogCQkJCXN0cnVjdCB0ZWdyYV9jbGsgKnRlZ3JhX2Nsa3MpCiB7CiAJaW50IGk7Ci0Jc3RydWN0 IGNsayAqY2xrOwotCXN0cnVjdCBjbGsgKipkdF9jbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7 CisJc3RydWN0IGNsa19jb3JlICoqZHRfY2xrOwogCiAJZm9yIChpID0gMDsgaSA8IEFSUkFZX1NJ WkUoZ2F0ZV9jbGtzKTsgaSsrKSB7CiAJCXN0cnVjdCB0ZWdyYV9wZXJpcGhfaW5pdF9kYXRhICpk YXRhOwpAQCAtNjQwLDggKzYzOSw4IEBAIHN0YXRpYyB2b2lkIF9faW5pdCBpbml0X3BsbHAodm9p ZCBfX2lvbWVtICpjbGtfYmFzZSwgdm9pZCBfX2lvbWVtICpwbWNfYmFzZSwKIAkJCQlzdHJ1Y3Qg dGVncmFfY2xrICp0ZWdyYV9jbGtzLAogCQkJCXN0cnVjdCB0ZWdyYV9jbGtfcGxsX3BhcmFtcyAq cGxsX3BhcmFtcykKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7Ci0Jc3RydWN0IGNsayAqKmR0X2NsazsK KwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKipkdF9jbGs7CiAJaW50 IGk7CiAKIAlkdF9jbGsgPSB0ZWdyYV9sb29rdXBfZHRfaWQodGVncmFfY2xrX3BsbF9wLCB0ZWdy YV9jbGtzKTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3RlZ3JhL2Nsay10ZWdyYS1wbWMuYyBi L2RyaXZlcnMvY2xrL3RlZ3JhL2Nsay10ZWdyYS1wbWMuYwppbmRleCAwOGIyMWMxLi5kZGQzOWNh IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay90ZWdyYS9jbGstdGVncmEtcG1jLmMKKysrIGIvZHJp dmVycy9jbGsvdGVncmEvY2xrLXRlZ3JhLXBtYy5jCkBAIC0xNSw3ICsxNSw2IEBACiAgKi8KIAog I2luY2x1ZGUgPGxpbnV4L2lvLmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8 bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrZGV2Lmg+CiAjaW5jbHVk ZSA8bGludXgvb2YuaD4KQEAgLTgyLDggKzgxLDggQEAgc3RhdGljIHN0cnVjdCBwbWNfY2xrX2lu aXRfZGF0YSBwbWNfY2xrc1tdID0gewogdm9pZCBfX2luaXQgdGVncmFfcG1jX2Nsa19pbml0KHZv aWQgX19pb21lbSAqcG1jX2Jhc2UsCiAJCQkJc3RydWN0IHRlZ3JhX2NsayAqdGVncmFfY2xrcykK IHsKLQlzdHJ1Y3QgY2xrICpjbGs7Ci0Jc3RydWN0IGNsayAqKmR0X2NsazsKKwlzdHJ1Y3QgY2xr X2NvcmUgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKipkdF9jbGs7CiAJaW50IGk7CiAKIAlmb3Ig KGkgPSAwOyBpIDwgQVJSQVlfU0laRShwbWNfY2xrcyk7IGkrKykgewpkaWZmIC0tZ2l0IGEvZHJp dmVycy9jbGsvdGVncmEvY2xrLXRlZ3JhLXN1cGVyLWdlbjQuYyBiL2RyaXZlcnMvY2xrL3RlZ3Jh L2Nsay10ZWdyYS1zdXBlci1nZW40LmMKaW5kZXggZmViMzIwMS4uOWQxY2RhYSAxMDA2NDQKLS0t IGEvZHJpdmVycy9jbGsvdGVncmEvY2xrLXRlZ3JhLXN1cGVyLWdlbjQuYworKysgYi9kcml2ZXJz L2Nsay90ZWdyYS9jbGstdGVncmEtc3VwZXItZ2VuNC5jCkBAIC0xNSw3ICsxNSw2IEBACiAgKi8K IAogI2luY2x1ZGUgPGxpbnV4L2lvLmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVk ZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5jbHVkZSA8bGludXgvb2YuaD4KICNpbmNsdWRl IDxsaW51eC9vZl9hZGRyZXNzLmg+CkBAIC01Myw4ICs1Miw4IEBAIHN0YXRpYyBjb25zdCBjaGFy ICpjY2xrX2xwX3BhcmVudHNbXSA9IHsgImNsa19tIiwgInBsbF9jIiwgImNsa18zMmsiLCAicGxs X20iLAogc3RhdGljIHZvaWQgX19pbml0IHRlZ3JhX3NjbGtfaW5pdCh2b2lkIF9faW9tZW0gKmNs a19iYXNlLAogCQkJCXN0cnVjdCB0ZWdyYV9jbGsgKnRlZ3JhX2Nsa3MpCiB7Ci0Jc3RydWN0IGNs ayAqY2xrOwotCXN0cnVjdCBjbGsgKipkdF9jbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CisJ c3RydWN0IGNsa19jb3JlICoqZHRfY2xrOwogCiAJLyogU0NMSyAqLwogCWR0X2NsayA9IHRlZ3Jh X2xvb2t1cF9kdF9pZCh0ZWdyYV9jbGtfc2NsaywgdGVncmFfY2xrcyk7CkBAIC05OSw4ICs5OCw4 IEBAIHZvaWQgX19pbml0IHRlZ3JhX3N1cGVyX2Nsa19nZW40X2luaXQodm9pZCBfX2lvbWVtICpj bGtfYmFzZSwKIAkJCQlzdHJ1Y3QgdGVncmFfY2xrICp0ZWdyYV9jbGtzLAogCQkJCXN0cnVjdCB0 ZWdyYV9jbGtfcGxsX3BhcmFtcyAqcGFyYW1zKQogewotCXN0cnVjdCBjbGsgKmNsazsKLQlzdHJ1 Y3QgY2xrICoqZHRfY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOworCXN0cnVjdCBjbGtfY29y ZSAqKmR0X2NsazsKIAogCS8qIENDTEtHICovCiAJZHRfY2xrID0gdGVncmFfbG9va3VwX2R0X2lk KHRlZ3JhX2Nsa19jY2xrX2csIHRlZ3JhX2Nsa3MpOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsv dGVncmEvY2xrLXRlZ3JhMTE0LmMgYi9kcml2ZXJzL2Nsay90ZWdyYS9jbGstdGVncmExMTQuYwpp bmRleCBmNzYwZjMxLi4wMGEyODk3IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay90ZWdyYS9jbGst dGVncmExMTQuYworKysgYi9kcml2ZXJzL2Nsay90ZWdyYS9jbGstdGVncmExMTQuYwpAQCAtMTUs NyArMTUsNiBAQAogICovCiAKICNpbmNsdWRlIDxsaW51eC9pby5oPgotI2luY2x1ZGUgPGxpbnV4 L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxpbnV4 L2Nsa2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L29mLmg+CkBAIC05MzYsMTQgKzkzNSwxNCBAQCBz dGF0aWMgdTMyIG11eF9wbGxtX3BsbGMyX2NfYzNfcGxscF9wbGxhX2lkeFtdID0gewogCVswXSA9 IDAsIFsxXSA9IDEsIFsyXSA9IDIsIFszXSA9IDMsIFs0XSA9IDQsIFs1XSA9IDYsCiB9OwogCi1z dGF0aWMgc3RydWN0IGNsayAqKmNsa3M7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlICoqY2xrczsK IAogc3RhdGljIHVuc2lnbmVkIGxvbmcgb3NjX2ZyZXE7CiBzdGF0aWMgdW5zaWduZWQgbG9uZyBw bGxfcmVmX2ZyZXE7CiAKIHN0YXRpYyBpbnQgX19pbml0IHRlZ3JhMTE0X29zY19jbGtfaW5pdCh2 b2lkIF9faW9tZW0gKmNsa19iYXNlKQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xr X2NvcmUgKmNsazsKIAl1MzIgdmFsLCBwbGxfcmVmX2RpdjsKIAogCXZhbCA9IHJlYWRsX3JlbGF4 ZWQoY2xrX2Jhc2UgKyBPU0NfQ1RSTCk7CkBAIC05NzMsNyArOTcyLDcgQEAgc3RhdGljIGludCBf X2luaXQgdGVncmExMTRfb3NjX2Nsa19pbml0KHZvaWQgX19pb21lbSAqY2xrX2Jhc2UpCiAKIHN0 YXRpYyB2b2lkIF9faW5pdCB0ZWdyYTExNF9maXhlZF9jbGtfaW5pdCh2b2lkIF9faW9tZW0gKmNs a19iYXNlKQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAog CS8qIGNsa18zMmsgKi8KIAljbGsgPSBjbGtfcmVnaXN0ZXJfZml4ZWRfcmF0ZShOVUxMLCAiY2xr XzMyayIsIE5VTEwsIENMS19JU19ST09ULApAQCAtMTA3OCw3ICsxMDc3LDcgQEAgc3RhdGljIHZv aWQgX19pbml0IHRlZ3JhMTE0X3BsbF9pbml0KHZvaWQgX19pb21lbSAqY2xrX2Jhc2UsCiAJCQkJ ICAgICB2b2lkIF9faW9tZW0gKnBtYykKIHsKIAl1MzIgdmFsOwotCXN0cnVjdCBjbGsgKmNsazsK KwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAogCS8qIFBMTEMgKi8KIAljbGsgPSB0ZWdyYV9jbGtf cmVnaXN0ZXJfcGxseGMoInBsbF9jIiwgInBsbF9yZWYiLCBjbGtfYmFzZSwKQEAgLTEyMDAsNyAr MTE5OSw3IEBAIHN0YXRpYyBzdHJ1Y3QgdGVncmFfcGVyaXBoX2luaXRfZGF0YSB0ZWdyYV9wZXJp cGhfY2xrX2xpc3RbXSA9IHsKIHN0YXRpYyBfX2luaXQgdm9pZCB0ZWdyYTExNF9wZXJpcGhfY2xr X2luaXQodm9pZCBfX2lvbWVtICpjbGtfYmFzZSwKIAkJCQkJICAgIHZvaWQgX19pb21lbSAqcG1j X2Jhc2UpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0 cnVjdCB0ZWdyYV9wZXJpcGhfaW5pdF9kYXRhICpkYXRhOwogCWludCBpOwogCmRpZmYgLS1naXQg YS9kcml2ZXJzL2Nsay90ZWdyYS9jbGstdGVncmExMjQuYyBiL2RyaXZlcnMvY2xrL3RlZ3JhL2Ns ay10ZWdyYTEyNC5jCmluZGV4IDk1MjVjNjguLmJmNDgxYzggMTAwNjQ0Ci0tLSBhL2RyaXZlcnMv Y2xrL3RlZ3JhL2Nsay10ZWdyYTEyNC5jCisrKyBiL2RyaXZlcnMvY2xrL3RlZ3JhL2Nsay10ZWdy YTEyNC5jCkBAIC0xNSw3ICsxNSw2IEBACiAgKi8KIAogI2luY2x1ZGUgPGxpbnV4L2lvLmg+Ci0j aW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAj aW5jbHVkZSA8bGludXgvY2xrZGV2Lmg+CiAjaW5jbHVkZSA8bGludXgvb2YuaD4KQEAgLTEwMTcs NyArMTAxNiw3IEBAIHN0YXRpYyBzdHJ1Y3QgdGVncmFfZGV2Y2xrIGRldmNsa3NbXSBfX2luaXRk YXRhID0gewogCXsgLmRldl9pZCA9ICJ0aW1lciIsIC5kdF9pZCA9IFRFR1JBMTI0X0NMS19USU1F UiB9LAogfTsKIAotc3RhdGljIHN0cnVjdCBjbGsgKipjbGtzOworc3RhdGljIHN0cnVjdCBjbGtf Y29yZSAqKmNsa3M7CiAKIHN0YXRpYyB2b2lkIHRlZ3JhMTI0X3V0bWlfcGFyYW1fY29uZmlndXJl KHZvaWQgX19pb21lbSAqY2xrX2Jhc2UpCiB7CkBAIC0xMTA0LDcgKzExMDMsNyBAQCBzdGF0aWMg dm9pZCB0ZWdyYTEyNF91dG1pX3BhcmFtX2NvbmZpZ3VyZSh2b2lkIF9faW9tZW0gKmNsa19iYXNl KQogc3RhdGljIF9faW5pdCB2b2lkIHRlZ3JhMTI0X3BlcmlwaF9jbGtfaW5pdCh2b2lkIF9faW9t ZW0gKmNsa19iYXNlLAogCQkJCQkgICAgdm9pZCBfX2lvbWVtICpwbWNfYmFzZSkKIHsKLQlzdHJ1 Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAKIAkvKiB4dXNiX3NzX2RpdjIg Ki8KIAljbGsgPSBjbGtfcmVnaXN0ZXJfZml4ZWRfZmFjdG9yKE5VTEwsICJ4dXNiX3NzX2RpdjIi LCAieHVzYl9zc19zcmMiLCAwLApAQCAtMTE0OCw3ICsxMTQ3LDcgQEAgc3RhdGljIHZvaWQgX19p bml0IHRlZ3JhMTI0X3BsbF9pbml0KHZvaWQgX19pb21lbSAqY2xrX2Jhc2UsCiAJCQkJICAgICB2 b2lkIF9faW9tZW0gKnBtYykKIHsKIAl1MzIgdmFsOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1 Y3QgY2xrX2NvcmUgKmNsazsKIAogCS8qIFBMTEMgKi8KIAljbGsgPSB0ZWdyYV9jbGtfcmVnaXN0 ZXJfcGxseGMoInBsbF9jIiwgInBsbF9yZWYiLCBjbGtfYmFzZSwKZGlmZiAtLWdpdCBhL2RyaXZl cnMvY2xrL3RlZ3JhL2Nsay10ZWdyYTIwLmMgYi9kcml2ZXJzL2Nsay90ZWdyYS9jbGstdGVncmEy MC5jCmluZGV4IGRhY2UyYjEuLjZlN2Q1ZTIgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3RlZ3Jh L2Nsay10ZWdyYTIwLmMKKysrIGIvZHJpdmVycy9jbGsvdGVncmEvY2xrLXRlZ3JhMjAuYwpAQCAt MTUsNyArMTUsNiBAQAogICovCiAKICNpbmNsdWRlIDxsaW51eC9pby5oPgotI2luY2x1ZGUgPGxp bnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxp bnV4L2Nsa2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L29mLmg+CkBAIC0xNjIsNyArMTYxLDcgQEAg c3RhdGljIHZvaWQgX19pb21lbSAqcG1jX2Jhc2U7CiAJCQlfY2xrX251bSwgX2dhdGVfZmxhZ3Ms CVwKIAkJCV9jbGtfaWQpCiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICoqY2xrczsKK3N0YXRpYyBzdHJ1 Y3QgY2xrX2NvcmUgKipjbGtzOwogCiBzdGF0aWMgc3RydWN0IHRlZ3JhX2Nsa19wbGxfZnJlcV90 YWJsZSBwbGxfY19mcmVxX3RhYmxlW10gPSB7CiAJeyAxMjAwMDAwMCwgNjAwMDAwMDAwLCA2MDAs IDEyLCAwLCA4IH0sCkBAIC02MzMsNyArNjMyLDcgQEAgc3RhdGljIHVuc2lnbmVkIGludCB0ZWdy YTIwX2dldF9wbGxfcmVmX2Rpdih2b2lkKQogCiBzdGF0aWMgdm9pZCB0ZWdyYTIwX3BsbF9pbml0 KHZvaWQpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCiAJ LyogUExMQyAqLwogCWNsayA9IHRlZ3JhX2Nsa19yZWdpc3Rlcl9wbGwoInBsbF9jIiwgInBsbF9y ZWYiLCBjbGtfYmFzZSwgTlVMTCwgMCwKQEAgLTcxMyw3ICs3MTIsNyBAQCBzdGF0aWMgY29uc3Qg Y2hhciAqc2Nsa19wYXJlbnRzW10gPSB7ICJjbGtfbSIsICJwbGxfY19vdXQxIiwgInBsbF9wX291 dDQiLAogCiBzdGF0aWMgdm9pZCB0ZWdyYTIwX3N1cGVyX2Nsa19pbml0KHZvaWQpCiB7Ci0Jc3Ry dWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCiAJLyogQ0NMSyAqLwogCWNs ayA9IHRlZ3JhX2Nsa19yZWdpc3Rlcl9zdXBlcl9tdXgoImNjbGsiLCBjY2xrX3BhcmVudHMsCkBA IC03MzgsNyArNzM3LDcgQEAgc3RhdGljIGNvbnN0IGNoYXIgKmF1ZGlvX3BhcmVudHNbXSA9IHsi c3BkaWZfaW4iLCAiaTJzMSIsICJpMnMyIiwgInVudXNlZCIsCiAKIHN0YXRpYyB2b2lkIF9faW5p dCB0ZWdyYTIwX2F1ZGlvX2Nsa19pbml0KHZvaWQpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0 cnVjdCBjbGtfY29yZSAqY2xrOwogCiAJLyogYXVkaW8gKi8KIAljbGsgPSBjbGtfcmVnaXN0ZXJf bXV4KE5VTEwsICJhdWRpb19tdXgiLCBhdWRpb19wYXJlbnRzLApAQCAtODAwLDcgKzc5OSw3IEBA IHN0YXRpYyBzdHJ1Y3QgdGVncmFfcGVyaXBoX2luaXRfZGF0YSB0ZWdyYV9wZXJpcGhfbm9kaXZf Y2xrX2xpc3RbXSA9IHsKIHN0YXRpYyB2b2lkIF9faW5pdCB0ZWdyYTIwX3BlcmlwaF9jbGtfaW5p dCh2b2lkKQogewogCXN0cnVjdCB0ZWdyYV9wZXJpcGhfaW5pdF9kYXRhICpkYXRhOwotCXN0cnVj dCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlpbnQgaTsKIAogCS8qIGFjOTcg Ki8KQEAgLTg3MSw3ICs4NzAsNyBAQCBzdGF0aWMgdm9pZCBfX2luaXQgdGVncmEyMF9wZXJpcGhf Y2xrX2luaXQodm9pZCkKIAogc3RhdGljIHZvaWQgX19pbml0IHRlZ3JhMjBfb3NjX2Nsa19pbml0 KHZvaWQpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXVu c2lnbmVkIGxvbmcgaW5wdXRfZnJlcTsKIAl1bnNpZ25lZCBpbnQgcGxsX3JlZl9kaXY7CiAKZGlm ZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3RlZ3JhL2Nsay10ZWdyYTMwLmMgYi9kcml2ZXJzL2Nsay90 ZWdyYS9jbGstdGVncmEzMC5jCmluZGV4IDViYmFjZDAuLjFlOWY3MzMgMTAwNjQ0Ci0tLSBhL2Ry aXZlcnMvY2xrL3RlZ3JhL2Nsay10ZWdyYTMwLmMKKysrIGIvZHJpdmVycy9jbGsvdGVncmEvY2xr LXRlZ3JhMzAuYwpAQCAtMTYsNyArMTYsNiBAQAogCiAjaW5jbHVkZSA8bGludXgvaW8uaD4KICNp bmNsdWRlIDxsaW51eC9kZWxheS5oPgotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUg PGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsa2Rldi5oPgogI2luY2x1 ZGUgPGxpbnV4L29mLmg+CkBAIC0yMDUsNyArMjA0LDcgQEAgc3RhdGljIERFRklORV9TUElOTE9D SyhwbGxfZF9sb2NrKTsKIAkJCV9jbGtfbnVtLCBfZ2F0ZV9mbGFncywJXAogCQkJX2Nsa19pZCkK IAotc3RhdGljIHN0cnVjdCBjbGsgKipjbGtzOworc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqKmNs a3M7CiAKIC8qCiAgKiBTdHJ1Y3R1cmUgZGVmaW5pbmcgdGhlIGZpZWxkcyBmb3IgVVNCIFVUTUkg Y2xvY2tzIFBhcmFtZXRlcnMuCkBAIC05MjEsNyArOTIwLDcgQEAgc3RhdGljIGNvbnN0IGNoYXIg KnBsbF9lX3BhcmVudHNbXSA9IHsicGxsX3JlZiIsICJwbGxfcCJ9OwogCiBzdGF0aWMgdm9pZCBf X2luaXQgdGVncmEzMF9wbGxfaW5pdCh2b2lkKQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1 Y3QgY2xrX2NvcmUgKmNsazsKIAogCS8qIFBMTEMgKi8KIAljbGsgPSB0ZWdyYV9jbGtfcmVnaXN0 ZXJfcGxsKCJwbGxfYyIsICJwbGxfcmVmIiwgY2xrX2Jhc2UsIHBtY19iYXNlLCAwLApAQCAtMTAx Miw3ICsxMDExLDcgQEAgc3RhdGljIGNvbnN0IGNoYXIgKnNjbGtfcGFyZW50c1tdID0geyAiY2xr X20iLCAicGxsX2Nfb3V0MSIsICJwbGxfcF9vdXQ0IiwKIAogc3RhdGljIHZvaWQgX19pbml0IHRl Z3JhMzBfc3VwZXJfY2xrX2luaXQodm9pZCkKIHsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0 IGNsa19jb3JlICpjbGs7CiAKIAkvKgogCSAqIENsb2NrIGlucHV0IHRvIGNjbGtfZyBkaXZpZGVk IGZyb20gcGxsX3AgdXNpbmcKQEAgLTExMzQsNyArMTEzMyw3IEBAIHN0YXRpYyBzdHJ1Y3QgdGVn cmFfcGVyaXBoX2luaXRfZGF0YSB0ZWdyYV9wZXJpcGhfbm9kaXZfY2xrX2xpc3RbXSA9IHsKIHN0 YXRpYyB2b2lkIF9faW5pdCB0ZWdyYTMwX3BlcmlwaF9jbGtfaW5pdCh2b2lkKQogewogCXN0cnVj dCB0ZWdyYV9wZXJpcGhfaW5pdF9kYXRhICpkYXRhOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1 Y3QgY2xrX2NvcmUgKmNsazsKIAlpbnQgaTsKIAogCS8qIGRzaWEgKi8KZGlmZiAtLWdpdCBhL2Ry aXZlcnMvY2xrL3RlZ3JhL2Nsay5jIGIvZHJpdmVycy9jbGsvdGVncmEvY2xrLmMKaW5kZXggZjg3 YzYwOS4uZDU5NjNmNiAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvdGVncmEvY2xrLmMKKysrIGIv ZHJpdmVycy9jbGsvdGVncmEvY2xrLmMKQEAgLTE0LDcgKzE0LDYgQEAKICAqIGFsb25nIHdpdGgg dGhpcyBwcm9ncmFtLiAgSWYgbm90LCBzZWUgPGh0dHA6Ly93d3cuZ251Lm9yZy9saWNlbnNlcy8+ LgogICovCiAKLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJv dmlkZXIuaD4KICNpbmNsdWRlIDxsaW51eC9vZi5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay90ZWdy YS5oPgpAQCAtNjksNyArNjgsNyBAQCBzdHJ1Y3QgdGVncmFfY3B1X2Nhcl9vcHMgKnRlZ3JhX2Nw dV9jYXJfb3BzID0gJmR1bW15X2Nhcl9vcHM7CiAKIGludCAqcGVyaXBoX2Nsa19lbmJfcmVmY250 Owogc3RhdGljIGludCBwZXJpcGhfYmFua3M7Ci1zdGF0aWMgc3RydWN0IGNsayAqKmNsa3M7Citz dGF0aWMgc3RydWN0IGNsa19jb3JlICoqY2xrczsKIHN0YXRpYyBpbnQgY2xrX251bTsKIHN0YXRp YyBzdHJ1Y3QgY2xrX29uZWNlbGxfZGF0YSBjbGtfZGF0YTsKIApAQCAtMTY1LDcgKzE2NCw3IEBA IHN0cnVjdCB0ZWdyYV9jbGtfcGVyaXBoX3JlZ3MgKmdldF9yZWdfYmFuayhpbnQgY2xraWQpCiAJ fQogfQogCi1zdHJ1Y3QgY2xrICoqIF9faW5pdCB0ZWdyYV9jbGtfaW5pdCh2b2lkIF9faW9tZW0g KnJlZ3MsIGludCBudW0sIGludCBiYW5rcykKK3N0cnVjdCBjbGtfY29yZSAqKiBfX2luaXQgdGVn cmFfY2xrX2luaXQodm9pZCBfX2lvbWVtICpyZWdzLCBpbnQgbnVtLCBpbnQgYmFua3MpCiB7CiAJ Y2xrX2Jhc2UgPSByZWdzOwogCkBAIC0xNzksNyArMTc4LDcgQEAgc3RydWN0IGNsayAqKiBfX2lu aXQgdGVncmFfY2xrX2luaXQodm9pZCBfX2lvbWVtICpyZWdzLCBpbnQgbnVtLCBpbnQgYmFua3Mp CiAKIAlwZXJpcGhfYmFua3MgPSBiYW5rczsKIAotCWNsa3MgPSBremFsbG9jKG51bSAqIHNpemVv ZihzdHJ1Y3QgY2xrICopLCBHRlBfS0VSTkVMKTsKKwljbGtzID0ga3phbGxvYyhudW0gKiBzaXpl b2Yoc3RydWN0IGNsa19jb3JlICopLCBHRlBfS0VSTkVMKTsKIAlpZiAoIWNsa3MpCiAJCWtmcmVl KHBlcmlwaF9jbGtfZW5iX3JlZmNudCk7CiAKQEAgLTE4OSw5ICsxODgsOSBAQCBzdHJ1Y3QgY2xr ICoqIF9faW5pdCB0ZWdyYV9jbGtfaW5pdCh2b2lkIF9faW9tZW0gKnJlZ3MsIGludCBudW0sIGlu dCBiYW5rcykKIH0KIAogdm9pZCBfX2luaXQgdGVncmFfaW5pdF9kdXBfY2xrcyhzdHJ1Y3QgdGVn cmFfY2xrX2R1cGxpY2F0ZSAqZHVwX2xpc3QsCi0JCQkJc3RydWN0IGNsayAqY2xrc1tdLCBpbnQg Y2xrX21heCkKKwkJCQlzdHJ1Y3QgY2xrX2NvcmUgKmNsa3NbXSwgaW50IGNsa19tYXgpCiB7Ci0J c3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCiAJZm9yICg7IGR1cF9s aXN0LT5jbGtfaWQgPCBjbGtfbWF4OyBkdXBfbGlzdCsrKSB7CiAJCWNsayA9IGNsa3NbZHVwX2xp c3QtPmNsa19pZF07CkBAIC0yMDEsOSArMjAwLDkgQEAgdm9pZCBfX2luaXQgdGVncmFfaW5pdF9k dXBfY2xrcyhzdHJ1Y3QgdGVncmFfY2xrX2R1cGxpY2F0ZSAqZHVwX2xpc3QsCiB9CiAKIHZvaWQg X19pbml0IHRlZ3JhX2luaXRfZnJvbV90YWJsZShzdHJ1Y3QgdGVncmFfY2xrX2luaXRfdGFibGUg KnRibCwKLQkJCQkgIHN0cnVjdCBjbGsgKmNsa3NbXSwgaW50IGNsa19tYXgpCisJCQkJICBzdHJ1 Y3QgY2xrX2NvcmUgKmNsa3NbXSwgaW50IGNsa19tYXgpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOwor CXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCiAJZm9yICg7IHRibC0+Y2xrX2lkIDwgY2xrX21heDsg dGJsKyspIHsKIAkJY2xrID0gY2xrc1t0YmwtPmNsa19pZF07CkBAIC0yMTEsOCArMjEwLDggQEAg dm9pZCBfX2luaXQgdGVncmFfaW5pdF9mcm9tX3RhYmxlKHN0cnVjdCB0ZWdyYV9jbGtfaW5pdF90 YWJsZSAqdGJsLAogCQkJcmV0dXJuOwogCiAJCWlmICh0YmwtPnBhcmVudF9pZCA8IGNsa19tYXgp IHsKLQkJCXN0cnVjdCBjbGsgKnBhcmVudCA9IGNsa3NbdGJsLT5wYXJlbnRfaWRdOwotCQkJaWYg KGNsa19zZXRfcGFyZW50KGNsaywgcGFyZW50KSkgeworCQkJc3RydWN0IGNsa19jb3JlICpwYXJl bnQgPSBjbGtzW3RibC0+cGFyZW50X2lkXTsKKwkJCWlmIChjbGtfcHJvdmlkZXJfc2V0X3BhcmVu dChjbGssIHBhcmVudCkpIHsKIAkJCQlwcl9lcnIoIiVzOiBGYWlsZWQgdG8gc2V0IHBhcmVudCAl cyBvZiAlc1xuIiwKIAkJCQkgICAgICAgX19mdW5jX18sIF9fY2xrX2dldF9uYW1lKHBhcmVudCks CiAJCQkJICAgICAgIF9fY2xrX2dldF9uYW1lKGNsaykpOwpAQCAtMjIxLDcgKzIyMCw3IEBAIHZv aWQgX19pbml0IHRlZ3JhX2luaXRfZnJvbV90YWJsZShzdHJ1Y3QgdGVncmFfY2xrX2luaXRfdGFi bGUgKnRibCwKIAkJfQogCiAJCWlmICh0YmwtPnJhdGUpCi0JCQlpZiAoY2xrX3NldF9yYXRlKGNs aywgdGJsLT5yYXRlKSkgeworCQkJaWYgKGNsa19wcm92aWRlcl9zZXRfcmF0ZShjbGssIHRibC0+ cmF0ZSkpIHsKIAkJCQlwcl9lcnIoIiVzOiBGYWlsZWQgdG8gc2V0IHJhdGUgJWx1IG9mICVzXG4i LAogCQkJCSAgICAgICBfX2Z1bmNfXywgdGJsLT5yYXRlLAogCQkJCSAgICAgICBfX2Nsa19nZXRf bmFtZShjbGspKTsKQEAgLTIyOSw3ICsyMjgsNyBAQCB2b2lkIF9faW5pdCB0ZWdyYV9pbml0X2Zy b21fdGFibGUoc3RydWN0IHRlZ3JhX2Nsa19pbml0X3RhYmxlICp0YmwsCiAJCQl9CiAKIAkJaWYg KHRibC0+c3RhdGUpCi0JCQlpZiAoY2xrX3ByZXBhcmVfZW5hYmxlKGNsaykpIHsKKwkJCWlmIChj bGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUoY2xrKSkgewogCQkJCXByX2VycigiJXM6IEZhaWxl ZCB0byBlbmFibGUgJXNcbiIsIF9fZnVuY19fLAogCQkJCSAgICAgICBfX2Nsa19nZXRfbmFtZShj bGspKTsKIAkJCQlXQVJOX09OKDEpOwpAQCAtMjg2LDcgKzI4NSw3IEBAIHZvaWQgX19pbml0IHRl Z3JhX3JlZ2lzdGVyX2RldmNsa3Moc3RydWN0IHRlZ3JhX2RldmNsayAqZGV2X2Nsa3MsIGludCBu dW0pCiAJfQogfQogCi1zdHJ1Y3QgY2xrICoqIF9faW5pdCB0ZWdyYV9sb29rdXBfZHRfaWQoaW50 IGNsa19pZCwKK3N0cnVjdCBjbGtfY29yZSAqKiBfX2luaXQgdGVncmFfbG9va3VwX2R0X2lkKGlu dCBjbGtfaWQsCiAJCQkJCXN0cnVjdCB0ZWdyYV9jbGsgKnRlZ3JhX2NsaykKIHsKIAlpZiAodGVn cmFfY2xrW2Nsa19pZF0ucHJlc2VudCkKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3RlZ3JhL2Ns ay5oIGIvZHJpdmVycy9jbGsvdGVncmEvY2xrLmgKaW5kZXggMTZlYzhkNi4uMzA5M2FhNCAxMDA2 NDQKLS0tIGEvZHJpdmVycy9jbGsvdGVncmEvY2xrLmgKKysrIGIvZHJpdmVycy9jbGsvdGVncmEv Y2xrLmgKQEAgLTM5LDcgKzM5LDcgQEAgc3RydWN0IHRlZ3JhX2Nsa19zeW5jX3NvdXJjZSB7CiBl eHRlcm4gY29uc3Qgc3RydWN0IGNsa19vcHMgdGVncmFfY2xrX3N5bmNfc291cmNlX29wczsKIGV4 dGVybiBpbnQgKnBlcmlwaF9jbGtfZW5iX3JlZmNudDsKIAotc3RydWN0IGNsayAqdGVncmFfY2xr X3JlZ2lzdGVyX3N5bmNfc291cmNlKGNvbnN0IGNoYXIgKm5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUg KnRlZ3JhX2Nsa19yZWdpc3Rlcl9zeW5jX3NvdXJjZShjb25zdCBjaGFyICpuYW1lLAogCQl1bnNp Z25lZCBsb25nIGZpeGVkX3JhdGUsIHVuc2lnbmVkIGxvbmcgbWF4X3JhdGUpOwogCiAvKioKQEAg LTgyLDcgKzgyLDcgQEAgc3RydWN0IHRlZ3JhX2Nsa19mcmFjX2RpdiB7CiAjZGVmaW5lIFRFR1JB X0RJVklERVJfVUFSVCBCSVQoMykKIAogZXh0ZXJuIGNvbnN0IHN0cnVjdCBjbGtfb3BzIHRlZ3Jh X2Nsa19mcmFjX2Rpdl9vcHM7Ci1zdHJ1Y3QgY2xrICp0ZWdyYV9jbGtfcmVnaXN0ZXJfZGl2aWRl cihjb25zdCBjaGFyICpuYW1lLAorc3RydWN0IGNsa19jb3JlICp0ZWdyYV9jbGtfcmVnaXN0ZXJf ZGl2aWRlcihjb25zdCBjaGFyICpuYW1lLAogCQljb25zdCBjaGFyICpwYXJlbnRfbmFtZSwgdm9p ZCBfX2lvbWVtICpyZWcsCiAJCXVuc2lnbmVkIGxvbmcgZmxhZ3MsIHU4IGNsa19kaXZpZGVyX2Zs YWdzLCB1OCBzaGlmdCwgdTggd2lkdGgsCiAJCXU4IGZyYWNfd2lkdGgsIHNwaW5sb2NrX3QgKmxv Y2spOwpAQCAtMjU4LDQ3ICsyNTgsNDcgQEAgc3RydWN0IHRlZ3JhX2Nsa19wbGwgewogCiBleHRl cm4gY29uc3Qgc3RydWN0IGNsa19vcHMgdGVncmFfY2xrX3BsbF9vcHM7CiBleHRlcm4gY29uc3Qg c3RydWN0IGNsa19vcHMgdGVncmFfY2xrX3BsbGVfb3BzOwotc3RydWN0IGNsayAqdGVncmFfY2xr X3JlZ2lzdGVyX3BsbChjb25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwK K3N0cnVjdCBjbGtfY29yZSAqdGVncmFfY2xrX3JlZ2lzdGVyX3BsbChjb25zdCBjaGFyICpuYW1l LCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJdm9pZCBfX2lvbWVtICpjbGtfYmFzZSwgdm9p ZCBfX2lvbWVtICpwbWMsCiAJCXVuc2lnbmVkIGxvbmcgZmxhZ3MsIHN0cnVjdCB0ZWdyYV9jbGtf cGxsX3BhcmFtcyAqcGxsX3BhcmFtcywKIAkJc3BpbmxvY2tfdCAqbG9jayk7CiAKLXN0cnVjdCBj bGsgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9wbGxlKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIg KnBhcmVudF9uYW1lLAorc3RydWN0IGNsa19jb3JlICp0ZWdyYV9jbGtfcmVnaXN0ZXJfcGxsZShj b25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJdm9pZCBfX2lvbWVt ICpjbGtfYmFzZSwgdm9pZCBfX2lvbWVtICpwbWMsCiAJCXVuc2lnbmVkIGxvbmcgZmxhZ3MsIHN0 cnVjdCB0ZWdyYV9jbGtfcGxsX3BhcmFtcyAqcGxsX3BhcmFtcywKIAkJc3BpbmxvY2tfdCAqbG9j ayk7CiAKLXN0cnVjdCBjbGsgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9wbGx4Yyhjb25zdCBjaGFyICpu YW1lLCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqdGVncmFfY2xr X3JlZ2lzdGVyX3BsbHhjKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1l LAogCQkJICAgIHZvaWQgX19pb21lbSAqY2xrX2Jhc2UsIHZvaWQgX19pb21lbSAqcG1jLAogCQkJ ICAgIHVuc2lnbmVkIGxvbmcgZmxhZ3MsCiAJCQkgICAgc3RydWN0IHRlZ3JhX2Nsa19wbGxfcGFy YW1zICpwbGxfcGFyYW1zLAogCQkJICAgIHNwaW5sb2NrX3QgKmxvY2spOwogCi1zdHJ1Y3QgY2xr ICp0ZWdyYV9jbGtfcmVnaXN0ZXJfcGxsbShjb25zdCBjaGFyICpuYW1lLCBjb25zdCBjaGFyICpw YXJlbnRfbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqdGVncmFfY2xrX3JlZ2lzdGVyX3BsbG0oY29u c3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAJCQkgICB2b2lkIF9faW9t ZW0gKmNsa19iYXNlLCB2b2lkIF9faW9tZW0gKnBtYywKIAkJCSAgIHVuc2lnbmVkIGxvbmcgZmxh Z3MsCiAJCQkgICBzdHJ1Y3QgdGVncmFfY2xrX3BsbF9wYXJhbXMgKnBsbF9wYXJhbXMsCiAJCQkg ICBzcGlubG9ja190ICpsb2NrKTsKIAotc3RydWN0IGNsayAqdGVncmFfY2xrX3JlZ2lzdGVyX3Bs bGMoY29uc3QgY2hhciAqbmFtZSwgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCitzdHJ1Y3QgY2xr X2NvcmUgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9wbGxjKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNo YXIgKnBhcmVudF9uYW1lLAogCQkJICAgdm9pZCBfX2lvbWVtICpjbGtfYmFzZSwgdm9pZCBfX2lv bWVtICpwbWMsCiAJCQkgICB1bnNpZ25lZCBsb25nIGZsYWdzLAogCQkJICAgc3RydWN0IHRlZ3Jh X2Nsa19wbGxfcGFyYW1zICpwbGxfcGFyYW1zLAogCQkJICAgc3BpbmxvY2tfdCAqbG9jayk7CiAK LXN0cnVjdCBjbGsgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9wbGxyZShjb25zdCBjaGFyICpuYW1lLCBj b25zdCBjaGFyICpwYXJlbnRfbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqdGVncmFfY2xrX3JlZ2lz dGVyX3BsbHJlKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAogCQkJ ICAgdm9pZCBfX2lvbWVtICpjbGtfYmFzZSwgdm9pZCBfX2lvbWVtICpwbWMsCiAJCQkgICB1bnNp Z25lZCBsb25nIGZsYWdzLAogCQkJICAgc3RydWN0IHRlZ3JhX2Nsa19wbGxfcGFyYW1zICpwbGxf cGFyYW1zLAogCQkJICAgc3BpbmxvY2tfdCAqbG9jaywgdW5zaWduZWQgbG9uZyBwYXJlbnRfcmF0 ZSk7CiAKLXN0cnVjdCBjbGsgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9wbGxlX3RlZ3JhMTE0KGNvbnN0 IGNoYXIgKm5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9wbGxlX3Rl Z3JhMTE0KGNvbnN0IGNoYXIgKm5hbWUsCiAJCQkJY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAJ CQkJdm9pZCBfX2lvbWVtICpjbGtfYmFzZSwgdW5zaWduZWQgbG9uZyBmbGFncywKIAkJCQlzdHJ1 Y3QgdGVncmFfY2xrX3BsbF9wYXJhbXMgKnBsbF9wYXJhbXMsCiAJCQkJc3BpbmxvY2tfdCAqbG9j ayk7CiAKLXN0cnVjdCBjbGsgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9wbGxzcyhjb25zdCBjaGFyICpu YW1lLCBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqdGVncmFfY2xr X3JlZ2lzdGVyX3BsbHNzKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1l LAogCQkJICAgdm9pZCBfX2lvbWVtICpjbGtfYmFzZSwgdW5zaWduZWQgbG9uZyBmbGFncywKIAkJ CSAgIHN0cnVjdCB0ZWdyYV9jbGtfcGxsX3BhcmFtcyAqcGxsX3BhcmFtcywKIAkJCSAgIHNwaW5s b2NrX3QgKmxvY2spOwpAQCAtMzI1LDcgKzMyNSw3IEBAIHN0cnVjdCB0ZWdyYV9jbGtfcGxsX291 dCB7CiAjZGVmaW5lIHRvX2Nsa19wbGxfb3V0KF9odykgY29udGFpbmVyX29mKF9odywgc3RydWN0 IHRlZ3JhX2Nsa19wbGxfb3V0LCBodykKIAogZXh0ZXJuIGNvbnN0IHN0cnVjdCBjbGtfb3BzIHRl Z3JhX2Nsa19wbGxfb3V0X29wczsKLXN0cnVjdCBjbGsgKnRlZ3JhX2Nsa19yZWdpc3Rlcl9wbGxf b3V0KGNvbnN0IGNoYXIgKm5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKnRlZ3JhX2Nsa19yZWdpc3Rl cl9wbGxfb3V0KGNvbnN0IGNoYXIgKm5hbWUsCiAJCWNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLCB2 b2lkIF9faW9tZW0gKnJlZywgdTggZW5iX2JpdF9pZHgsCiAJCXU4IHJzdF9iaXRfaWR4LCB1bnNp Z25lZCBsb25nIGZsYWdzLCB1OCBwbGxfZGl2X2ZsYWdzLAogCQlzcGlubG9ja190ICpsb2NrKTsK QEAgLTM5NCw3ICszOTQsNyBAQCBzdHJ1Y3QgdGVncmFfY2xrX3BlcmlwaF9nYXRlIHsKICNkZWZp bmUgVEVHUkFfUEVSSVBIX05PX0dBVEUgQklUKDUpCiAKIGV4dGVybiBjb25zdCBzdHJ1Y3QgY2xr X29wcyB0ZWdyYV9jbGtfcGVyaXBoX2dhdGVfb3BzOwotc3RydWN0IGNsayAqdGVncmFfY2xrX3Jl Z2lzdGVyX3BlcmlwaF9nYXRlKGNvbnN0IGNoYXIgKm5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKnRl Z3JhX2Nsa19yZWdpc3Rlcl9wZXJpcGhfZ2F0ZShjb25zdCBjaGFyICpuYW1lLAogCQljb25zdCBj aGFyICpwYXJlbnRfbmFtZSwgdTggZ2F0ZV9mbGFncywgdm9pZCBfX2lvbWVtICpjbGtfYmFzZSwK IAkJdW5zaWduZWQgbG9uZyBmbGFncywgaW50IGNsa19udW0sIGludCAqZW5hYmxlX3JlZmNudCk7 CiAKQEAgLTQyNywxMSArNDI3LDExIEBAIHN0cnVjdCB0ZWdyYV9jbGtfcGVyaXBoIHsKICNkZWZp bmUgVEVHUkFfQ0xLX1BFUklQSF9NQUdJQyAweDE4MjIxMjIzCiAKIGV4dGVybiBjb25zdCBzdHJ1 Y3QgY2xrX29wcyB0ZWdyYV9jbGtfcGVyaXBoX29wczsKLXN0cnVjdCBjbGsgKnRlZ3JhX2Nsa19y ZWdpc3Rlcl9wZXJpcGgoY29uc3QgY2hhciAqbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqdGVncmFf Y2xrX3JlZ2lzdGVyX3BlcmlwaChjb25zdCBjaGFyICpuYW1lLAogCQljb25zdCBjaGFyICoqcGFy ZW50X25hbWVzLCBpbnQgbnVtX3BhcmVudHMsCiAJCXN0cnVjdCB0ZWdyYV9jbGtfcGVyaXBoICpw ZXJpcGgsIHZvaWQgX19pb21lbSAqY2xrX2Jhc2UsCiAJCXUzMiBvZmZzZXQsIHVuc2lnbmVkIGxv bmcgZmxhZ3MpOwotc3RydWN0IGNsayAqdGVncmFfY2xrX3JlZ2lzdGVyX3BlcmlwaF9ub2Rpdihj b25zdCBjaGFyICpuYW1lLAorc3RydWN0IGNsa19jb3JlICp0ZWdyYV9jbGtfcmVnaXN0ZXJfcGVy aXBoX25vZGl2KGNvbnN0IGNoYXIgKm5hbWUsCiAJCWNvbnN0IGNoYXIgKipwYXJlbnRfbmFtZXMs IGludCBudW1fcGFyZW50cywKIAkJc3RydWN0IHRlZ3JhX2Nsa19wZXJpcGggKnBlcmlwaCwgdm9p ZCBfX2lvbWVtICpjbGtfYmFzZSwKIAkJdTMyIG9mZnNldCk7CkBAIC01NDAsNyArNTQwLDcgQEAg c3RydWN0IHRlZ3JhX2Nsa19zdXBlcl9tdXggewogI2RlZmluZSBURUdSQV9ESVZJREVSXzIgQklU KDApCiAKIGV4dGVybiBjb25zdCBzdHJ1Y3QgY2xrX29wcyB0ZWdyYV9jbGtfc3VwZXJfb3BzOwot c3RydWN0IGNsayAqdGVncmFfY2xrX3JlZ2lzdGVyX3N1cGVyX211eChjb25zdCBjaGFyICpuYW1l LAorc3RydWN0IGNsa19jb3JlICp0ZWdyYV9jbGtfcmVnaXN0ZXJfc3VwZXJfbXV4KGNvbnN0IGNo YXIgKm5hbWUsCiAJCWNvbnN0IGNoYXIgKipwYXJlbnRfbmFtZXMsIHU4IG51bV9wYXJlbnRzLAog CQl1bnNpZ25lZCBsb25nIGZsYWdzLCB2b2lkIF9faW9tZW0gKnJlZywgdTggY2xrX3N1cGVyX2Zs YWdzLAogCQl1OCB3aWR0aCwgdTggcGxseF9pbmRleCwgdTggZGl2Ml9pbmRleCwgc3BpbmxvY2tf dCAqbG9jayk7CkBAIC01OTAsMTUgKzU5MCwxNSBAQCBzdHJ1Y3QgdGVncmFfZGV2Y2xrIHsKIH07 CiAKIHZvaWQgdGVncmFfaW5pdF9mcm9tX3RhYmxlKHN0cnVjdCB0ZWdyYV9jbGtfaW5pdF90YWJs ZSAqdGJsLAotCQlzdHJ1Y3QgY2xrICpjbGtzW10sIGludCBjbGtfbWF4KTsKKwkJc3RydWN0IGNs a19jb3JlICpjbGtzW10sIGludCBjbGtfbWF4KTsKIAogdm9pZCB0ZWdyYV9pbml0X2R1cF9jbGtz KHN0cnVjdCB0ZWdyYV9jbGtfZHVwbGljYXRlICpkdXBfbGlzdCwKLQkJc3RydWN0IGNsayAqY2xr c1tdLCBpbnQgY2xrX21heCk7CisJCXN0cnVjdCBjbGtfY29yZSAqY2xrc1tdLCBpbnQgY2xrX21h eCk7CiAKIHN0cnVjdCB0ZWdyYV9jbGtfcGVyaXBoX3JlZ3MgKmdldF9yZWdfYmFuayhpbnQgY2xr aWQpOwotc3RydWN0IGNsayAqKnRlZ3JhX2Nsa19pbml0KHZvaWQgX19pb21lbSAqY2xrX2Jhc2Us IGludCBudW0sIGludCBwZXJpcGhfYmFua3MpOworc3RydWN0IGNsa19jb3JlICoqdGVncmFfY2xr X2luaXQodm9pZCBfX2lvbWVtICpjbGtfYmFzZSwgaW50IG51bSwgaW50IHBlcmlwaF9iYW5rcyk7 CiAKLXN0cnVjdCBjbGsgKip0ZWdyYV9sb29rdXBfZHRfaWQoaW50IGNsa19pZCwgc3RydWN0IHRl Z3JhX2NsayAqdGVncmFfY2xrKTsKK3N0cnVjdCBjbGtfY29yZSAqKnRlZ3JhX2xvb2t1cF9kdF9p ZChpbnQgY2xrX2lkLCBzdHJ1Y3QgdGVncmFfY2xrICp0ZWdyYV9jbGspOwogCiB2b2lkIHRlZ3Jh X2FkZF9vZl9wcm92aWRlcihzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wKTsKIHZvaWQgdGVncmFfcmVn aXN0ZXJfZGV2Y2xrcyhzdHJ1Y3QgdGVncmFfZGV2Y2xrICpkZXZfY2xrcywgaW50IG51bSk7CmRp ZmYgLS1naXQgYS9kcml2ZXJzL2Nsay90aS9hcGxsLmMgYi9kcml2ZXJzL2Nsay90aS9hcGxsLmMK aW5kZXggNzJkOTcyNy4uYTE2MmMyMSAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvdGkvYXBsbC5j CisrKyBiL2RyaXZlcnMvY2xrL3RpL2FwbGwuYwpAQCAtMTM1LDEwICsxMzUsMTAgQEAgc3RhdGlj IHZvaWQgX19pbml0IG9tYXBfY2xrX3JlZ2lzdGVyX2FwbGwoc3RydWN0IGNsa19odyAqaHcsCiB7 CiAJc3RydWN0IGNsa19od19vbWFwICpjbGtfaHcgPSB0b19jbGtfaHdfb21hcChodyk7CiAJc3Ry dWN0IGRwbGxfZGF0YSAqYWQgPSBjbGtfaHctPmRwbGxfZGF0YTsKLQlzdHJ1Y3QgY2xrICpjbGs7 CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAKLQlhZC0+Y2xrX3JlZiA9IG9mX2Nsa19nZXQobm9k ZSwgMCk7Ci0JYWQtPmNsa19ieXBhc3MgPSBvZl9jbGtfZ2V0KG5vZGUsIDEpOworCWFkLT5jbGtf cmVmID0gb2ZfY2xrX3Byb3ZpZGVyX2dldChub2RlLCAwKTsKKwlhZC0+Y2xrX2J5cGFzcyA9IG9m X2Nsa19wcm92aWRlcl9nZXQobm9kZSwgMSk7CiAKIAlpZiAoSVNfRVJSKGFkLT5jbGtfcmVmKSB8 fCBJU19FUlIoYWQtPmNsa19ieXBhc3MpKSB7CiAJCXByX2RlYnVnKCJjbGstcmVmIG9yIGNsay1i eXBhc3MgZm9yICVzIG5vdCByZWFkeSwgcmV0cnlcbiIsCkBAIC0zMzIsNyArMzMyLDcgQEAgc3Rh dGljIHZvaWQgX19pbml0IG9mX29tYXAyX2FwbGxfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpu b2RlKQogCXN0cnVjdCBkcGxsX2RhdGEgKmFkID0gTlVMTDsKIAlzdHJ1Y3QgY2xrX2h3X29tYXAg KmNsa19odyA9IE5VTEw7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgKmluaXQgPSBOVUxMOwotCXN0 cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAljb25zdCBjaGFyICpwYXJl bnRfbmFtZTsKIAl1MzIgdmFsOwogCmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay90aS9jbGstMnh4 eC5jIGIvZHJpdmVycy9jbGsvdGkvY2xrLTJ4eHguYwppbmRleCBjODA4YWIzLi5hNDhmZTZmIDEw MDY0NAotLS0gYS9kcml2ZXJzL2Nsay90aS9jbGstMnh4eC5jCisrKyBiL2RyaXZlcnMvY2xrL3Rp L2Nsay0yeHh4LmMKQEAgLTIzNywxMCArMjM3LDEwIEBAIHN0YXRpYyBpbnQgX19pbml0IG9tYXAy eHh4X2R0X2Nsa19pbml0KGludCBzb2NfdHlwZSkKIAkJCQkgICAgIEFSUkFZX1NJWkUoZW5hYmxl X2luaXRfY2xrcykpOwogCiAJcHJfaW5mbygiQ2xvY2tpbmcgcmF0ZSAoQ3J5c3RhbC9EUExML01Q VSk6ICVsZC4lMDFsZC8lbGQvJWxkIE1IelxuIiwKLQkJKGNsa19nZXRfcmF0ZShjbGtfZ2V0X3N5 cyhOVUxMLCAic3lzX2NrIikpIC8gMTAwMDAwMCksCi0JCShjbGtfZ2V0X3JhdGUoY2xrX2dldF9z eXMoTlVMTCwgInN5c19jayIpKSAvIDEwMDAwMCkgJSAxMCwKLQkJKGNsa19nZXRfcmF0ZShjbGtf Z2V0X3N5cyhOVUxMLCAiZHBsbF9jayIpKSAvIDEwMDAwMDApLAotCQkoY2xrX2dldF9yYXRlKGNs a19nZXRfc3lzKE5VTEwsICJtcHVfY2siKSkgLyAxMDAwMDAwKSk7CisJCShjbGtfcHJvdmlkZXJf Z2V0X3JhdGUoY2xrX3Byb3ZpZGVyX2dldF9zeXMoTlVMTCwgInN5c19jayIpKSAvIDEwMDAwMDAp LAorCQkoY2xrX3Byb3ZpZGVyX2dldF9yYXRlKGNsa19wcm92aWRlcl9nZXRfc3lzKE5VTEwsICJz eXNfY2siKSkgLyAxMDAwMDApICUgMTAsCisJCShjbGtfcHJvdmlkZXJfZ2V0X3JhdGUoY2xrX3By b3ZpZGVyX2dldF9zeXMoTlVMTCwgImRwbGxfY2siKSkgLyAxMDAwMDAwKSwKKwkJKGNsa19wcm92 aWRlcl9nZXRfcmF0ZShjbGtfcHJvdmlkZXJfZ2V0X3N5cyhOVUxMLCAibXB1X2NrIikpIC8gMTAw MDAwMCkpOwogCiAJcmV0dXJuIDA7CiB9CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay90aS9jbGst MzN4eC5jIGIvZHJpdmVycy9jbGsvdGkvY2xrLTMzeHguYwppbmRleCAwMjhiMzM3Li4wOTg4ZjFl IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay90aS9jbGstMzN4eC5jCisrKyBiL2RyaXZlcnMvY2xr L3RpL2Nsay0zM3h4LmMKQEAgLTEyMSw3ICsxMjEsNyBAQCBzdGF0aWMgY29uc3QgY2hhciAqZW5h YmxlX2luaXRfY2xrc1tdID0gewogCiBpbnQgX19pbml0IGFtMzN4eF9kdF9jbGtfaW5pdCh2b2lk KQogewotCXN0cnVjdCBjbGsgKmNsazEsICpjbGsyOworCXN0cnVjdCBjbGtfY29yZSAqY2xrMSwg KmNsazI7CiAKIAl0aV9kdF9jbG9ja3NfcmVnaXN0ZXIoYW0zM3h4X2Nsa3MpOwogCkBAIC0xMzks MTIgKzEzOSwxMiBAQCBpbnQgX19pbml0IGFtMzN4eF9kdF9jbGtfaW5pdCh2b2lkKQogCSAqICAg IG9zY2lsbGF0b3IgY2xvY2suCiAJICovCiAKLQljbGsxID0gY2xrX2dldF9zeXMoTlVMTCwgInN5 c19jbGtpbl9jayIpOwotCWNsazIgPSBjbGtfZ2V0X3N5cyhOVUxMLCAidGltZXIzX2ZjayIpOwot CWNsa19zZXRfcGFyZW50KGNsazIsIGNsazEpOworCWNsazEgPSBjbGtfcHJvdmlkZXJfZ2V0X3N5 cyhOVUxMLCAic3lzX2Nsa2luX2NrIik7CisJY2xrMiA9IGNsa19wcm92aWRlcl9nZXRfc3lzKE5V TEwsICJ0aW1lcjNfZmNrIik7CisJY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQoY2xrMiwgY2xrMSk7 CiAKLQljbGsyID0gY2xrX2dldF9zeXMoTlVMTCwgInRpbWVyNl9mY2siKTsKLQljbGtfc2V0X3Bh cmVudChjbGsyLCBjbGsxKTsKKwljbGsyID0gY2xrX3Byb3ZpZGVyX2dldF9zeXMoTlVMTCwgInRp bWVyNl9mY2siKTsKKwljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChjbGsyLCBjbGsxKTsKIAkvKgog CSAqIFRoZSBPbi1DaGlwIDMySyBSQyBPc2MgY2xvY2sgaXMgbm90IGFuIGFjY3VyYXRlIGNsb2Nr LXNvdXJjZSBhcyBwZXIKIAkgKiB0aGUgZGVzaWduL3NwZWMsIHNvIGFzIGEgcmVzdWx0LCBmb3Ig ZXhhbXBsZSwgdGltZXIgd2hpY2ggc3VwcG9zZWQKQEAgLTE1Miw5ICsxNTIsOSBAQCBpbnQgX19p bml0IGFtMzN4eF9kdF9jbGtfaW5pdCh2b2lkKQogCSAqIG5vdCBleHBlY3RlZCBieSBhbnkgdXNl LWNhc2UsIHNvIGNoYW5nZSBXRFQxIGNsb2NrIHNvdXJjZSB0byBQUkNNCiAJICogMzJLSHogY2xv Y2suCiAJICovCi0JY2xrMSA9IGNsa19nZXRfc3lzKE5VTEwsICJ3ZHQxX2ZjayIpOwotCWNsazIg PSBjbGtfZ2V0X3N5cyhOVUxMLCAiY2xrZGl2MzJrX2ljayIpOwotCWNsa19zZXRfcGFyZW50KGNs azEsIGNsazIpOworCWNsazEgPSBjbGtfcHJvdmlkZXJfZ2V0X3N5cyhOVUxMLCAid2R0MV9mY2si KTsKKwljbGsyID0gY2xrX3Byb3ZpZGVyX2dldF9zeXMoTlVMTCwgImNsa2RpdjMya19pY2siKTsK KwljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChjbGsxLCBjbGsyKTsKIAogCXJldHVybiAwOwogfQpk aWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvdGkvY2xrLTN4eHguYyBiL2RyaXZlcnMvY2xrL3RpL2Ns ay0zeHh4LmMKaW5kZXggMGQxNzUwYS4uNThlZjIwZSAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsv dGkvY2xrLTN4eHguYworKysgYi9kcml2ZXJzL2Nsay90aS9jbGstM3h4eC5jCkBAIC0zNjUsMTAg KzM2NSwxMCBAQCBzdGF0aWMgaW50IF9faW5pdCBvbWFwM3h4eF9kdF9jbGtfaW5pdChpbnQgc29j X3R5cGUpCiAJCQkJICAgICBBUlJBWV9TSVpFKGVuYWJsZV9pbml0X2Nsa3MpKTsKIAogCXByX2lu Zm8oIkNsb2NraW5nIHJhdGUgKENyeXN0YWwvQ29yZS9NUFUpOiAlbGQuJTAxbGQvJWxkLyVsZCBN SHpcbiIsCi0JCShjbGtfZ2V0X3JhdGUoY2xrX2dldF9zeXMoTlVMTCwgIm9zY19zeXNfY2siKSkg LyAxMDAwMDAwKSwKLQkJKGNsa19nZXRfcmF0ZShjbGtfZ2V0X3N5cyhOVUxMLCAib3NjX3N5c19j ayIpKSAvIDEwMDAwMCkgJSAxMCwKLQkJKGNsa19nZXRfcmF0ZShjbGtfZ2V0X3N5cyhOVUxMLCAi Y29yZV9jayIpKSAvIDEwMDAwMDApLAotCQkoY2xrX2dldF9yYXRlKGNsa19nZXRfc3lzKE5VTEws ICJhcm1fZmNrIikpIC8gMTAwMDAwMCkpOworCQkoY2xrX3Byb3ZpZGVyX2dldF9yYXRlKGNsa19w cm92aWRlcl9nZXRfc3lzKE5VTEwsICJvc2Nfc3lzX2NrIikpIC8gMTAwMDAwMCksCisJCShjbGtf cHJvdmlkZXJfZ2V0X3JhdGUoY2xrX3Byb3ZpZGVyX2dldF9zeXMoTlVMTCwgIm9zY19zeXNfY2si KSkgLyAxMDAwMDApICUgMTAsCisJCShjbGtfcHJvdmlkZXJfZ2V0X3JhdGUoY2xrX3Byb3ZpZGVy X2dldF9zeXMoTlVMTCwgImNvcmVfY2siKSkgLyAxMDAwMDAwKSwKKwkJKGNsa19wcm92aWRlcl9n ZXRfcmF0ZShjbGtfcHJvdmlkZXJfZ2V0X3N5cyhOVUxMLCAiYXJtX2ZjayIpKSAvIDEwMDAwMDAp KTsKIAogCWlmIChzb2NfdHlwZSAhPSBPTUFQM19TT0NfVEk4MVhYICYmIHNvY190eXBlICE9IE9N QVAzX1NPQ19PTUFQMzQzMF9FUzEpCiAJCW9tYXAzX2Nsa19sb2NrX2RwbGw1KCk7CmRpZmYgLS1n aXQgYS9kcml2ZXJzL2Nsay90aS9jbGstNDN4eC5jIGIvZHJpdmVycy9jbGsvdGkvY2xrLTQzeHgu YwppbmRleCAzNzk1ZmNlLi4xMjc3NDUyIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay90aS9jbGst NDN4eC5jCisrKyBiL2RyaXZlcnMvY2xrL3RpL2Nsay00M3h4LmMKQEAgLTExNiw3ICsxMTYsNyBA QCBzdGF0aWMgc3RydWN0IHRpX2R0X2NsayBhbTQzeHhfY2xrc1tdID0gewogCiBpbnQgX19pbml0 IGFtNDN4eF9kdF9jbGtfaW5pdCh2b2lkKQogewotCXN0cnVjdCBjbGsgKmNsazEsICpjbGsyOwor CXN0cnVjdCBjbGtfY29yZSAqY2xrMSwgKmNsazI7CiAKIAl0aV9kdF9jbG9ja3NfcmVnaXN0ZXIo YW00M3h4X2Nsa3MpOwogCkBAIC0xMzIsOSArMTMyLDkgQEAgaW50IF9faW5pdCBhbTQzeHhfZHRf Y2xrX2luaXQodm9pZCkKIAkgKiBCeSBzZWxlY3RpbmcgZHBsbF9jb3JlX201X2NrIGFzIHRoZSBj bG9ja3NvdXJjZSBmaXhlcyB0aGlzIGlzc3VlLgogCSAqIEluIEFNMzM1eCBkcGxsX2NvcmVfbTVf Y2sgaXMgdGhlIGRlZmF1bHQgY2xvY2tzb3VyY2UuCiAJICovCi0JY2xrMSA9IGNsa19nZXRfc3lz KE5VTEwsICJjcHN3X2NwdHNfcmZ0X2NsayIpOwotCWNsazIgPSBjbGtfZ2V0X3N5cyhOVUxMLCAi ZHBsbF9jb3JlX201X2NrIik7Ci0JY2xrX3NldF9wYXJlbnQoY2xrMSwgY2xrMik7CisJY2xrMSA9 IGNsa19wcm92aWRlcl9nZXRfc3lzKE5VTEwsICJjcHN3X2NwdHNfcmZ0X2NsayIpOworCWNsazIg PSBjbGtfcHJvdmlkZXJfZ2V0X3N5cyhOVUxMLCAiZHBsbF9jb3JlX201X2NrIik7CisJY2xrX3By b3ZpZGVyX3NldF9wYXJlbnQoY2xrMSwgY2xrMik7CiAKIAlyZXR1cm4gMDsKIH0KZGlmZiAtLWdp dCBhL2RyaXZlcnMvY2xrL3RpL2Nsay00NHh4LmMgYi9kcml2ZXJzL2Nsay90aS9jbGstNDR4eC5j CmluZGV4IDAyNTE3YTguLjFhZGMzOTkgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3RpL2Nsay00 NHh4LmMKKysrIGIvZHJpdmVycy9jbGsvdGkvY2xrLTQ0eHguYwpAQCAtMjgxLDcgKzI4MSw3IEBA IHN0YXRpYyBzdHJ1Y3QgdGlfZHRfY2xrIG9tYXA0NHh4X2Nsa3NbXSA9IHsKIGludCBfX2luaXQg b21hcDR4eHhfZHRfY2xrX2luaXQodm9pZCkKIHsKIAlpbnQgcmM7Ci0Jc3RydWN0IGNsayAqYWJl X2RwbGxfcmVmLCAqYWJlX2RwbGwsICpzeXNfMzJrX2NrLCAqdXNiX2RwbGw7CisJc3RydWN0IGNs a19jb3JlICphYmVfZHBsbF9yZWYsICphYmVfZHBsbCwgKnN5c18zMmtfY2ssICp1c2JfZHBsbDsK IAogCXRpX2R0X2Nsb2Nrc19yZWdpc3RlcihvbWFwNDR4eF9jbGtzKTsKIApAQCAtMjkxLDggKzI5 MSw4IEBAIGludCBfX2luaXQgb21hcDR4eHhfZHRfY2xrX2luaXQodm9pZCkKIAkgKiBMb2NrIFVT QiBEUExMIG9uIE9NQVA0IGRldmljZXMgc28gdGhhdCB0aGUgTDNJTklUIHBvd2VyCiAJICogZG9t YWluIGNhbiB0cmFuc2l0aW9uIHRvIHJldGVudGlvbiBzdGF0ZSB3aGVuIG5vdCBpbiB1c2UuCiAJ ICovCi0JdXNiX2RwbGwgPSBjbGtfZ2V0X3N5cyhOVUxMLCAiZHBsbF91c2JfY2siKTsKLQlyYyA9 IGNsa19zZXRfcmF0ZSh1c2JfZHBsbCwgT01BUDRfRFBMTF9VU0JfREVGRlJFUSk7CisJdXNiX2Rw bGwgPSBjbGtfcHJvdmlkZXJfZ2V0X3N5cyhOVUxMLCAiZHBsbF91c2JfY2siKTsKKwlyYyA9IGNs a19wcm92aWRlcl9zZXRfcmF0ZSh1c2JfZHBsbCwgT01BUDRfRFBMTF9VU0JfREVGRlJFUSk7CiAJ aWYgKHJjKQogCQlwcl9lcnIoIiVzOiBmYWlsZWQgdG8gY29uZmlndXJlIFVTQiBEUExMIVxuIiwg X19mdW5jX18pOwogCkBAIC0zMDIsMTIgKzMwMiwxMiBAQCBpbnQgX19pbml0IG9tYXA0eHh4X2R0 X2Nsa19pbml0KHZvaWQpCiAJICogbG9ja2luZyB0aGUgQUJFIERQTEwgb24gYm9vdC4KIAkgKiBM b2NrIHRoZSBBQkUgRFBMTCBpbiBhbnkgY2FzZSB0byBhdm9pZCBpc3N1ZXMgd2l0aCBhdWRpby4K IAkgKi8KLQlhYmVfZHBsbF9yZWYgPSBjbGtfZ2V0X3N5cyhOVUxMLCAiYWJlX2RwbGxfcmVmY2xr X211eF9jayIpOwotCXN5c18zMmtfY2sgPSBjbGtfZ2V0X3N5cyhOVUxMLCAic3lzXzMya19jayIp OwotCXJjID0gY2xrX3NldF9wYXJlbnQoYWJlX2RwbGxfcmVmLCBzeXNfMzJrX2NrKTsKLQlhYmVf ZHBsbCA9IGNsa19nZXRfc3lzKE5VTEwsICJkcGxsX2FiZV9jayIpOworCWFiZV9kcGxsX3JlZiA9 IGNsa19wcm92aWRlcl9nZXRfc3lzKE5VTEwsICJhYmVfZHBsbF9yZWZjbGtfbXV4X2NrIik7CisJ c3lzXzMya19jayA9IGNsa19wcm92aWRlcl9nZXRfc3lzKE5VTEwsICJzeXNfMzJrX2NrIik7CisJ cmMgPSBjbGtfcHJvdmlkZXJfc2V0X3BhcmVudChhYmVfZHBsbF9yZWYsIHN5c18zMmtfY2spOwor CWFiZV9kcGxsID0gY2xrX3Byb3ZpZGVyX2dldF9zeXMoTlVMTCwgImRwbGxfYWJlX2NrIik7CiAJ aWYgKCFyYykKLQkJcmMgPSBjbGtfc2V0X3JhdGUoYWJlX2RwbGwsIE9NQVA0X0RQTExfQUJFX0RF RkZSRVEpOworCQlyYyA9IGNsa19wcm92aWRlcl9zZXRfcmF0ZShhYmVfZHBsbCwgT01BUDRfRFBM TF9BQkVfREVGRlJFUSk7CiAJaWYgKHJjKQogCQlwcl9lcnIoIiVzOiBmYWlsZWQgdG8gY29uZmln dXJlIEFCRSBEUExMIVxuIiwgX19mdW5jX18pOwogCmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay90 aS9jbGstNTR4eC5jIGIvZHJpdmVycy9jbGsvdGkvY2xrLTU0eHguYwppbmRleCA1ZTE4Mzk5Li41 YjYwM2I1IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay90aS9jbGstNTR4eC5jCisrKyBiL2RyaXZl cnMvY2xrL3RpL2Nsay01NHh4LmMKQEAgLTIyNSwzNCArMjI1LDM1IEBAIHN0YXRpYyBzdHJ1Y3Qg dGlfZHRfY2xrIG9tYXA1NHh4X2Nsa3NbXSA9IHsKIGludCBfX2luaXQgb21hcDV4eHhfZHRfY2xr X2luaXQodm9pZCkKIHsKIAlpbnQgcmM7Ci0Jc3RydWN0IGNsayAqYWJlX2RwbGxfcmVmLCAqYWJl X2RwbGwsICpzeXNfMzJrX2NrLCAqdXNiX2RwbGw7CisJc3RydWN0IGNsa19jb3JlICphYmVfZHBs bF9yZWYsICphYmVfZHBsbCwgKnN5c18zMmtfY2ssICp1c2JfZHBsbDsKIAogCXRpX2R0X2Nsb2Nr c19yZWdpc3RlcihvbWFwNTR4eF9jbGtzKTsKIAogCW9tYXAyX2Nsa19kaXNhYmxlX2F1dG9pZGxl X2FsbCgpOwogCi0JYWJlX2RwbGxfcmVmID0gY2xrX2dldF9zeXMoTlVMTCwgImFiZV9kcGxsX2Ns a19tdXgiKTsKLQlzeXNfMzJrX2NrID0gY2xrX2dldF9zeXMoTlVMTCwgInN5c18zMmtfY2siKTsK LQlyYyA9IGNsa19zZXRfcGFyZW50KGFiZV9kcGxsX3JlZiwgc3lzXzMya19jayk7Ci0JYWJlX2Rw bGwgPSBjbGtfZ2V0X3N5cyhOVUxMLCAiZHBsbF9hYmVfY2siKTsKKwlhYmVfZHBsbF9yZWYgPSBj bGtfcHJvdmlkZXJfZ2V0X3N5cyhOVUxMLCAiYWJlX2RwbGxfY2xrX211eCIpOworCXN5c18zMmtf Y2sgPSBjbGtfcHJvdmlkZXJfZ2V0X3N5cyhOVUxMLCAic3lzXzMya19jayIpOworCXJjID0gY2xr X3Byb3ZpZGVyX3NldF9wYXJlbnQoYWJlX2RwbGxfcmVmLCBzeXNfMzJrX2NrKTsKKwlhYmVfZHBs bCA9IGNsa19wcm92aWRlcl9nZXRfc3lzKE5VTEwsICJkcGxsX2FiZV9jayIpOwogCWlmICghcmMp Ci0JCXJjID0gY2xrX3NldF9yYXRlKGFiZV9kcGxsLCBPTUFQNV9EUExMX0FCRV9ERUZGUkVRKTsK KwkJcmMgPSBjbGtfcHJvdmlkZXJfc2V0X3JhdGUoYWJlX2RwbGwsIE9NQVA1X0RQTExfQUJFX0RF RkZSRVEpOwogCWlmIChyYykKIAkJcHJfZXJyKCIlczogZmFpbGVkIHRvIGNvbmZpZ3VyZSBBQkUg RFBMTCFcbiIsIF9fZnVuY19fKTsKIAotCWFiZV9kcGxsID0gY2xrX2dldF9zeXMoTlVMTCwgImRw bGxfYWJlX20yeDJfY2siKTsKKwlhYmVfZHBsbCA9IGNsa19wcm92aWRlcl9nZXRfc3lzKE5VTEws ICJkcGxsX2FiZV9tMngyX2NrIik7CiAJaWYgKCFyYykKLQkJcmMgPSBjbGtfc2V0X3JhdGUoYWJl X2RwbGwsIE9NQVA1X0RQTExfQUJFX0RFRkZSRVEgKiAyKTsKKwkJcmMgPSBjbGtfcHJvdmlkZXJf c2V0X3JhdGUoYWJlX2RwbGwsCisJCQkJCSAgIE9NQVA1X0RQTExfQUJFX0RFRkZSRVEgKiAyKTsK IAlpZiAocmMpCiAJCXByX2VycigiJXM6IGZhaWxlZCB0byBjb25maWd1cmUgQUJFIG0yeDIgRFBM TCFcbiIsIF9fZnVuY19fKTsKIAotCXVzYl9kcGxsID0gY2xrX2dldF9zeXMoTlVMTCwgImRwbGxf dXNiX2NrIik7Ci0JcmMgPSBjbGtfc2V0X3JhdGUodXNiX2RwbGwsIE9NQVA1X0RQTExfVVNCX0RF RkZSRVEpOworCXVzYl9kcGxsID0gY2xrX3Byb3ZpZGVyX2dldF9zeXMoTlVMTCwgImRwbGxfdXNi X2NrIik7CisJcmMgPSBjbGtfcHJvdmlkZXJfc2V0X3JhdGUodXNiX2RwbGwsIE9NQVA1X0RQTExf VVNCX0RFRkZSRVEpOwogCWlmIChyYykKIAkJcHJfZXJyKCIlczogZmFpbGVkIHRvIGNvbmZpZ3Vy ZSBVU0IgRFBMTCFcbiIsIF9fZnVuY19fKTsKIAotCXVzYl9kcGxsID0gY2xrX2dldF9zeXMoTlVM TCwgImRwbGxfdXNiX20yX2NrIik7Ci0JcmMgPSBjbGtfc2V0X3JhdGUodXNiX2RwbGwsIE9NQVA1 X0RQTExfVVNCX0RFRkZSRVEvMik7CisJdXNiX2RwbGwgPSBjbGtfcHJvdmlkZXJfZ2V0X3N5cyhO VUxMLCAiZHBsbF91c2JfbTJfY2siKTsKKwlyYyA9IGNsa19wcm92aWRlcl9zZXRfcmF0ZSh1c2Jf ZHBsbCwgT01BUDVfRFBMTF9VU0JfREVGRlJFUSAvIDIpOwogCWlmIChyYykKIAkJcHJfZXJyKCIl czogZmFpbGVkIHRvIHNldCBVU0JfRFBMTCBNMiBPVVRcbiIsIF9fZnVuY19fKTsKIApkaWZmIC0t Z2l0IGEvZHJpdmVycy9jbGsvdGkvY2xrLTd4eC5jIGIvZHJpdmVycy9jbGsvdGkvY2xrLTd4eC5j CmluZGV4IDYyYWM4ZjYuLjlkYmEwYmIgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3RpL2Nsay03 eHguYworKysgYi9kcml2ZXJzL2Nsay90aS9jbGstN3h4LmMKQEAgLTMwNywzOSArMzA3LDM5IEBA IHN0YXRpYyBzdHJ1Y3QgdGlfZHRfY2xrIGRyYTd4eF9jbGtzW10gPSB7CiBpbnQgX19pbml0IGRy YTd4eF9kdF9jbGtfaW5pdCh2b2lkKQogewogCWludCByYzsKLQlzdHJ1Y3QgY2xrICphYmVfZHBs bF9tdXgsICpzeXNfY2xraW4yLCAqZHBsbF9jazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmFiZV9kcGxs X211eCwgKnN5c19jbGtpbjIsICpkcGxsX2NrOwogCiAJdGlfZHRfY2xvY2tzX3JlZ2lzdGVyKGRy YTd4eF9jbGtzKTsKIAogCW9tYXAyX2Nsa19kaXNhYmxlX2F1dG9pZGxlX2FsbCgpOwogCi0JYWJl X2RwbGxfbXV4ID0gY2xrX2dldF9zeXMoTlVMTCwgImFiZV9kcGxsX3N5c19jbGtfbXV4Iik7Ci0J c3lzX2Nsa2luMiA9IGNsa19nZXRfc3lzKE5VTEwsICJzeXNfY2xraW4yIik7Ci0JZHBsbF9jayA9 IGNsa19nZXRfc3lzKE5VTEwsICJkcGxsX2FiZV9jayIpOworCWFiZV9kcGxsX211eCA9IGNsa19w cm92aWRlcl9nZXRfc3lzKE5VTEwsICJhYmVfZHBsbF9zeXNfY2xrX211eCIpOworCXN5c19jbGtp bjIgPSBjbGtfcHJvdmlkZXJfZ2V0X3N5cyhOVUxMLCAic3lzX2Nsa2luMiIpOworCWRwbGxfY2sg PSBjbGtfcHJvdmlkZXJfZ2V0X3N5cyhOVUxMLCAiZHBsbF9hYmVfY2siKTsKIAotCXJjID0gY2xr X3NldF9wYXJlbnQoYWJlX2RwbGxfbXV4LCBzeXNfY2xraW4yKTsKKwlyYyA9IGNsa19wcm92aWRl cl9zZXRfcGFyZW50KGFiZV9kcGxsX211eCwgc3lzX2Nsa2luMik7CiAJaWYgKCFyYykKLQkJcmMg PSBjbGtfc2V0X3JhdGUoZHBsbF9jaywgRFJBN19EUExMX0FCRV9ERUZGUkVRKTsKKwkJcmMgPSBj bGtfcHJvdmlkZXJfc2V0X3JhdGUoZHBsbF9jaywgRFJBN19EUExMX0FCRV9ERUZGUkVRKTsKIAlp ZiAocmMpCiAJCXByX2VycigiJXM6IGZhaWxlZCB0byBjb25maWd1cmUgQUJFIERQTEwhXG4iLCBf X2Z1bmNfXyk7CiAKLQlkcGxsX2NrID0gY2xrX2dldF9zeXMoTlVMTCwgImRwbGxfYWJlX20yeDJf Y2siKTsKLQlyYyA9IGNsa19zZXRfcmF0ZShkcGxsX2NrLCBEUkE3X0RQTExfQUJFX0RFRkZSRVEg KiAyKTsKKwlkcGxsX2NrID0gY2xrX3Byb3ZpZGVyX2dldF9zeXMoTlVMTCwgImRwbGxfYWJlX20y eDJfY2siKTsKKwlyYyA9IGNsa19wcm92aWRlcl9zZXRfcmF0ZShkcGxsX2NrLCBEUkE3X0RQTExf QUJFX0RFRkZSRVEgKiAyKTsKIAlpZiAocmMpCiAJCXByX2VycigiJXM6IGZhaWxlZCB0byBjb25m aWd1cmUgQUJFIERQTEwgbTJ4MiFcbiIsIF9fZnVuY19fKTsKIAotCWRwbGxfY2sgPSBjbGtfZ2V0 X3N5cyhOVUxMLCAiZHBsbF9nbWFjX2NrIik7Ci0JcmMgPSBjbGtfc2V0X3JhdGUoZHBsbF9jaywg RFJBN19EUExMX0dNQUNfREVGRlJFUSk7CisJZHBsbF9jayA9IGNsa19wcm92aWRlcl9nZXRfc3lz KE5VTEwsICJkcGxsX2dtYWNfY2siKTsKKwlyYyA9IGNsa19wcm92aWRlcl9zZXRfcmF0ZShkcGxs X2NrLCBEUkE3X0RQTExfR01BQ19ERUZGUkVRKTsKIAlpZiAocmMpCiAJCXByX2VycigiJXM6IGZh aWxlZCB0byBjb25maWd1cmUgR01BQyBEUExMIVxuIiwgX19mdW5jX18pOwogCi0JZHBsbF9jayA9 IGNsa19nZXRfc3lzKE5VTEwsICJkcGxsX3VzYl9jayIpOwotCXJjID0gY2xrX3NldF9yYXRlKGRw bGxfY2ssIERSQTdfRFBMTF9VU0JfREVGRlJFUSk7CisJZHBsbF9jayA9IGNsa19wcm92aWRlcl9n ZXRfc3lzKE5VTEwsICJkcGxsX3VzYl9jayIpOworCXJjID0gY2xrX3Byb3ZpZGVyX3NldF9yYXRl KGRwbGxfY2ssIERSQTdfRFBMTF9VU0JfREVGRlJFUSk7CiAJaWYgKHJjKQogCQlwcl9lcnIoIiVz OiBmYWlsZWQgdG8gY29uZmlndXJlIFVTQiBEUExMIVxuIiwgX19mdW5jX18pOwogCi0JZHBsbF9j ayA9IGNsa19nZXRfc3lzKE5VTEwsICJkcGxsX3VzYl9tMl9jayIpOwotCXJjID0gY2xrX3NldF9y YXRlKGRwbGxfY2ssIERSQTdfRFBMTF9VU0JfREVGRlJFUS8yKTsKKwlkcGxsX2NrID0gY2xrX3By b3ZpZGVyX2dldF9zeXMoTlVMTCwgImRwbGxfdXNiX20yX2NrIik7CisJcmMgPSBjbGtfcHJvdmlk ZXJfc2V0X3JhdGUoZHBsbF9jaywgRFJBN19EUExMX1VTQl9ERUZGUkVRIC8gMik7CiAJaWYgKHJj KQogCQlwcl9lcnIoIiVzOiBmYWlsZWQgdG8gc2V0IFVTQl9EUExMIE0yIE9VVFxuIiwgX19mdW5j X18pOwogCmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay90aS9jbGstZHJhNy1hdGwuYyBiL2RyaXZl cnMvY2xrL3RpL2Nsay1kcmE3LWF0bC5jCmluZGV4IDRhNjViNDEuLjAyOWEwZDMgMTAwNjQ0Ci0t LSBhL2RyaXZlcnMvY2xrL3RpL2Nsay1kcmE3LWF0bC5jCisrKyBiL2RyaXZlcnMvY2xrL3RpL2Ns ay1kcmE3LWF0bC5jCkBAIC00MCw3ICs0MCw3IEBACiBzdHJ1Y3QgZHJhN19hdGxfY2xvY2tfaW5m bzsKIAogc3RydWN0IGRyYTdfYXRsX2Rlc2MgewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3Qg Y2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xrX2h3IGh3OwogCXN0cnVjdCBkcmE3X2F0bF9jbG9j a19pbmZvICpjaW5mbzsKIAlpbnQgaWQ7CkBAIC0xNjUsNyArMTY1LDcgQEAgc3RhdGljIHZvaWQg X19pbml0IG9mX2RyYTdfYXRsX2Nsb2NrX3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbm9kZSkK IAlzdHJ1Y3QgZHJhN19hdGxfZGVzYyAqY2xrX2h3ID0gTlVMTDsKIAlzdHJ1Y3QgY2xrX2luaXRf ZGF0YSBpbml0ID0geyAwIH07CiAJY29uc3QgY2hhciAqKnBhcmVudF9uYW1lcyA9IE5VTEw7Ci0J c3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCiAJY2xrX2h3ID0ga3ph bGxvYyhzaXplb2YoKmNsa19odyksIEdGUF9LRVJORUwpOwogCWlmICghY2xrX2h3KSB7CkBAIC0y MzMsNyArMjMzLDcgQEAgc3RhdGljIGludCBvZl9kcmE3X2F0bF9jbGtfcHJvYmUoc3RydWN0IHBs YXRmb3JtX2RldmljZSAqcGRldikKIAkJY2hhciBwcm9wWzVdOwogCQlzdHJ1Y3QgZHJhN19hdGxf ZGVzYyAqY2Rlc2M7CiAJCXN0cnVjdCBvZl9waGFuZGxlX2FyZ3MgY2xrc3BlYzsKLQkJc3RydWN0 IGNsayAqY2xrOworCQlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAkJaW50IHJjOwogCiAJCXJjID0g b2ZfcGFyc2VfcGhhbmRsZV93aXRoX2FyZ3Mobm9kZSwgInRpLHByb3ZpZGVkLWNsb2NrcyIsCmRp ZmYgLS1naXQgYS9kcml2ZXJzL2Nsay90aS9jbGsuYyBiL2RyaXZlcnMvY2xrL3RpL2Nsay5jCmlu ZGV4IGIxYTZmNzEuLmQ4OGE3MGQwIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay90aS9jbGsuYwor KysgYi9kcml2ZXJzL2Nsay90aS9jbGsuYwpAQCAtNDEsNyArNDEsNyBAQCB2b2lkIF9faW5pdCB0 aV9kdF9jbG9ja3NfcmVnaXN0ZXIoc3RydWN0IHRpX2R0X2NsayBvY2xrc1tdKQogewogCXN0cnVj dCB0aV9kdF9jbGsgKmM7CiAJc3RydWN0IGRldmljZV9ub2RlICpub2RlOwotCXN0cnVjdCBjbGsg KmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3Qgb2ZfcGhhbmRsZV9hcmdzIGNs a3NwZWM7CiAKIAlmb3IgKGMgPSBvY2xrczsgYy0+bm9kZV9uYW1lICE9IE5VTEw7IGMrKykgewpk aWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvdGkvY2xvY2tkb21haW4uYyBiL2RyaXZlcnMvY2xrL3Rp L2Nsb2NrZG9tYWluLmMKaW5kZXggZjFlMDAzOC4uNmJjNzVkOCAxMDA2NDQKLS0tIGEvZHJpdmVy cy9jbGsvdGkvY2xvY2tkb21haW4uYworKysgYi9kcml2ZXJzL2Nsay90aS9jbG9ja2RvbWFpbi5j CkBAIC0yNiw3ICsyNiw3IEBACiAKIHN0YXRpYyB2b2lkIF9faW5pdCBvZl90aV9jbG9ja2RvbWFp bl9zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOwor CXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfaHcgKmNsa19odzsKIAljb25zdCBj aGFyICpjbGtkbV9uYW1lID0gbm9kZS0+bmFtZTsKIAlpbnQgaTsKQEAgLTM1LDcgKzM1LDcgQEAg c3RhdGljIHZvaWQgX19pbml0IG9mX3RpX2Nsb2NrZG9tYWluX3NldHVwKHN0cnVjdCBkZXZpY2Vf bm9kZSAqbm9kZSkKIAludW1fY2xrcyA9IG9mX2NvdW50X3BoYW5kbGVfd2l0aF9hcmdzKG5vZGUs ICJjbG9ja3MiLCAiI2Nsb2NrLWNlbGxzIik7CiAKIAlmb3IgKGkgPSAwOyBpIDwgbnVtX2Nsa3M7 IGkrKykgewotCQljbGsgPSBvZl9jbGtfZ2V0KG5vZGUsIGkpOworCQljbGsgPSBvZl9jbGtfcHJv dmlkZXJfZ2V0KG5vZGUsIGkpOwogCQlpZiAoX19jbGtfZ2V0X2ZsYWdzKGNsaykgJiBDTEtfSVNf QkFTSUMpIHsKIAkJCXByX3dhcm4oImNhbid0IHNldHVwIGNsa2RtIGZvciBiYXNpYyBjbGsgJXNc biIsCiAJCQkJX19jbGtfZ2V0X25hbWUoY2xrKSk7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay90 aS9jb21wb3NpdGUuYyBiL2RyaXZlcnMvY2xrL3RpL2NvbXBvc2l0ZS5jCmluZGV4IDE5ZDg5ODAu LjJjYmVlMzQgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3RpL2NvbXBvc2l0ZS5jCisrKyBiL2Ry aXZlcnMvY2xrL3RpL2NvbXBvc2l0ZS5jCkBAIC0xMTksNyArMTE5LDcgQEAgc3RhdGljIGlubGlu ZSBzdHJ1Y3QgY2xrX2h3ICpfZ2V0X2h3KHN0cnVjdCBjbGtfaHdfb21hcF9jb21wICpjbGssIGlu dCBpZHgpCiBzdGF0aWMgdm9pZCBfX2luaXQgdGlfY2xrX3JlZ2lzdGVyX2NvbXBvc2l0ZShzdHJ1 Y3QgY2xrX2h3ICpodywKIAkJCQkJICAgICBzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUpCiB7Ci0J c3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfaHdf b21hcF9jb21wICpjY2xrID0gdG9fY2xrX2h3X2NvbXAoaHcpOwogCXN0cnVjdCBjb21wb25lbnRf Y2xrICpjb21wOwogCWludCBudW1fcGFyZW50cyA9IDA7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Ns ay90aS9kaXZpZGVyLmMgYi9kcml2ZXJzL2Nsay90aS9kaXZpZGVyLmMKaW5kZXggZTZhYTEwZC4u MWM0MTUxNSAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvdGkvZGl2aWRlci5jCisrKyBiL2RyaXZl cnMvY2xrL3RpL2RpdmlkZXIuYwpAQCAtMjQ2LDcgKzI0Niw3IEBAIGNvbnN0IHN0cnVjdCBjbGtf b3BzIHRpX2Nsa19kaXZpZGVyX29wcyA9IHsKIAkuc2V0X3JhdGUgPSB0aV9jbGtfZGl2aWRlcl9z ZXRfcmF0ZSwKIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICpfcmVnaXN0ZXJfZGl2aWRlcihzdHJ1 Y3QgZGV2aWNlICpkZXYsIGNvbnN0IGNoYXIgKm5hbWUsCitzdGF0aWMgc3RydWN0IGNsa19jb3Jl ICpfcmVnaXN0ZXJfZGl2aWRlcihzdHJ1Y3QgZGV2aWNlICpkZXYsIGNvbnN0IGNoYXIgKm5hbWUs CiAJCQkJICAgICBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJCQkgICAgIHVuc2lnbmVkIGxv bmcgZmxhZ3MsIHZvaWQgX19pb21lbSAqcmVnLAogCQkJCSAgICAgdTggc2hpZnQsIHU4IHdpZHRo LCB1OCBjbGtfZGl2aWRlcl9mbGFncywKQEAgLTI1NCw3ICsyNTQsNyBAQCBzdGF0aWMgc3RydWN0 IGNsayAqX3JlZ2lzdGVyX2RpdmlkZXIoc3RydWN0IGRldmljZSAqZGV2LCBjb25zdCBjaGFyICpu YW1lLAogCQkJCSAgICAgc3BpbmxvY2tfdCAqbG9jaykKIHsKIAlzdHJ1Y3QgY2xrX2RpdmlkZXIg KmRpdjsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0 IGNsa19pbml0X2RhdGEgaW5pdDsKIAogCWlmIChjbGtfZGl2aWRlcl9mbGFncyAmIENMS19ESVZJ REVSX0hJV09SRF9NQVNLKSB7CkBAIC00MzQsNyArNDM0LDcgQEAgc3RhdGljIGludCBfX2luaXQg dGlfY2xrX2RpdmlkZXJfcG9wdWxhdGUoc3RydWN0IGRldmljZV9ub2RlICpub2RlLAogICovCiBz dGF0aWMgdm9pZCBfX2luaXQgb2ZfdGlfZGl2aWRlcl9jbGtfc2V0dXAoc3RydWN0IGRldmljZV9u b2RlICpub2RlKQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsK IAljb25zdCBjaGFyICpwYXJlbnRfbmFtZTsKIAl2b2lkIF9faW9tZW0gKnJlZzsKIAl1OCBjbGtf ZGl2aWRlcl9mbGFncyA9IDA7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay90aS9kcGxsLmMgYi9k cml2ZXJzL2Nsay90aS9kcGxsLmMKaW5kZXggNzk3OTFlMS4uZTFmNzRjYyAxMDA2NDQKLS0tIGEv ZHJpdmVycy9jbGsvdGkvZHBsbC5jCisrKyBiL2RyaXZlcnMvY2xrL3RpL2RwbGwuYwpAQCAtMTI4 LDEwICsxMjgsMTAgQEAgc3RhdGljIHZvaWQgX19pbml0IHRpX2Nsa19yZWdpc3Rlcl9kcGxsKHN0 cnVjdCBjbGtfaHcgKmh3LAogewogCXN0cnVjdCBjbGtfaHdfb21hcCAqY2xrX2h3ID0gdG9fY2xr X2h3X29tYXAoaHcpOwogCXN0cnVjdCBkcGxsX2RhdGEgKmRkID0gY2xrX2h3LT5kcGxsX2RhdGE7 Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCi0JZGQtPmNsa19y ZWYgPSBvZl9jbGtfZ2V0KG5vZGUsIDApOwotCWRkLT5jbGtfYnlwYXNzID0gb2ZfY2xrX2dldChu b2RlLCAxKTsKKwlkZC0+Y2xrX3JlZiA9IG9mX2Nsa19wcm92aWRlcl9nZXQobm9kZSwgMCk7CisJ ZGQtPmNsa19ieXBhc3MgPSBvZl9jbGtfcHJvdmlkZXJfZ2V0KG5vZGUsIDEpOwogCiAJaWYgKElT X0VSUihkZC0+Y2xrX3JlZikgfHwgSVNfRVJSKGRkLT5jbGtfYnlwYXNzKSkgewogCQlwcl9kZWJ1 ZygiY2xrLXJlZiBvciBjbGstYnlwYXNzIG1pc3NpbmcgZm9yICVzLCByZXRyeSBsYXRlclxuIiwK QEAgLTE3NSw3ICsxNzUsNyBAQCBzdGF0aWMgdm9pZCB0aV9jbGtfcmVnaXN0ZXJfZHBsbF94Mihz dHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUsCiAJCQkJICAgIGNvbnN0IHN0cnVjdCBjbGtfb3BzICpv cHMsCiAJCQkJICAgIGNvbnN0IHN0cnVjdCBjbGtfaHdfb21hcF9vcHMgKmh3X29wcykKIHsKLQlz dHJ1Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0IGNsa19pbml0 X2RhdGEgaW5pdCA9IHsgTlVMTCB9OwogCXN0cnVjdCBjbGtfaHdfb21hcCAqY2xrX2h3OwogCWNv bnN0IGNoYXIgKm5hbWUgPSBub2RlLT5uYW1lOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvdGkv Zml4ZWQtZmFjdG9yLmMgYi9kcml2ZXJzL2Nsay90aS9maXhlZC1mYWN0b3IuYwppbmRleCBjMmM4 YTI4Li4yYWEyNzAxIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay90aS9maXhlZC1mYWN0b3IuYwor KysgYi9kcml2ZXJzL2Nsay90aS9maXhlZC1mYWN0b3IuYwpAQCAtMzMsNyArMzMsNyBAQAogICov CiBzdGF0aWMgdm9pZCBfX2luaXQgb2ZfdGlfZml4ZWRfZmFjdG9yX2Nsa19zZXR1cChzdHJ1Y3Qg ZGV2aWNlX25vZGUgKm5vZGUpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29y ZSAqY2xrOwogCWNvbnN0IGNoYXIgKmNsa19uYW1lID0gbm9kZS0+bmFtZTsKIAljb25zdCBjaGFy ICpwYXJlbnRfbmFtZTsKIAl1MzIgZGl2LCBtdWx0OwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsv dGkvZ2F0ZS5jIGIvZHJpdmVycy9jbGsvdGkvZ2F0ZS5jCmluZGV4IGIzMjZkMjcuLmRkMWI4MTMg MTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3RpL2dhdGUuYworKysgYi9kcml2ZXJzL2Nsay90aS9n YXRlLmMKQEAgLTk0LDcgKzk0LDcgQEAgc3RhdGljIHZvaWQgX19pbml0IF9vZl90aV9nYXRlX2Ns a19zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUsCiAJCQkJCSBjb25zdCBzdHJ1Y3QgY2xr X29wcyAqb3BzLAogCQkJCQkgY29uc3Qgc3RydWN0IGNsa19od19vbWFwX29wcyAqaHdfb3BzKQog ewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xr X2luaXRfZGF0YSBpbml0ID0geyBOVUxMIH07CiAJc3RydWN0IGNsa19od19vbWFwICpjbGtfaHc7 CiAJY29uc3QgY2hhciAqY2xrX25hbWUgPSBub2RlLT5uYW1lOwpkaWZmIC0tZ2l0IGEvZHJpdmVy cy9jbGsvdGkvaW50ZXJmYWNlLmMgYi9kcml2ZXJzL2Nsay90aS9pbnRlcmZhY2UuYwppbmRleCA5 YzNlOGM0Li5lMmYyYmMwIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay90aS9pbnRlcmZhY2UuYwor KysgYi9kcml2ZXJzL2Nsay90aS9pbnRlcmZhY2UuYwpAQCAtMzQsNyArMzQsNyBAQCBzdGF0aWMg Y29uc3Qgc3RydWN0IGNsa19vcHMgdGlfaW50ZXJmYWNlX2Nsa19vcHMgPSB7CiBzdGF0aWMgdm9p ZCBfX2luaXQgX29mX3RpX2ludGVyZmFjZV9jbGtfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpu b2RlLAogCQkJCQkgICAgICBjb25zdCBzdHJ1Y3QgY2xrX2h3X29tYXBfb3BzICpvcHMpCiB7Ci0J c3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCXN0cnVjdCBjbGtfaW5p dF9kYXRhIGluaXQgPSB7IE5VTEwgfTsKIAlzdHJ1Y3QgY2xrX2h3X29tYXAgKmNsa19odzsKIAlj b25zdCBjaGFyICpwYXJlbnRfbmFtZTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3RpL211eC5j IGIvZHJpdmVycy9jbGsvdGkvbXV4LmMKaW5kZXggZTlkNjUwZS4uNzQ1NjE5OCAxMDA2NDQKLS0t IGEvZHJpdmVycy9jbGsvdGkvbXV4LmMKKysrIGIvZHJpdmVycy9jbGsvdGkvbXV4LmMKQEAgLTEw NCwxNCArMTA0LDE0IEBAIGNvbnN0IHN0cnVjdCBjbGtfb3BzIHRpX2Nsa19tdXhfb3BzID0gewog CS5kZXRlcm1pbmVfcmF0ZSA9IF9fY2xrX211eF9kZXRlcm1pbmVfcmF0ZSwKIH07CiAKLXN0YXRp YyBzdHJ1Y3QgY2xrICpfcmVnaXN0ZXJfbXV4KHN0cnVjdCBkZXZpY2UgKmRldiwgY29uc3QgY2hh ciAqbmFtZSwKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKl9yZWdpc3Rlcl9tdXgoc3RydWN0IGRl dmljZSAqZGV2LCBjb25zdCBjaGFyICpuYW1lLAogCQkJCSBjb25zdCBjaGFyICoqcGFyZW50X25h bWVzLCB1OCBudW1fcGFyZW50cywKIAkJCQkgdW5zaWduZWQgbG9uZyBmbGFncywgdm9pZCBfX2lv bWVtICpyZWcsCiAJCQkJIHU4IHNoaWZ0LCB1MzIgbWFzaywgdTggY2xrX211eF9mbGFncywKIAkJ CQkgdTMyICp0YWJsZSwgc3BpbmxvY2tfdCAqbG9jaykKIHsKIAlzdHJ1Y3QgY2xrX211eCAqbXV4 OwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xr X2luaXRfZGF0YSBpbml0OwogCiAJLyogYWxsb2NhdGUgdGhlIG11eCAqLwpAQCAtMTUyLDcgKzE1 Miw3IEBAIHN0YXRpYyBzdHJ1Y3QgY2xrICpfcmVnaXN0ZXJfbXV4KHN0cnVjdCBkZXZpY2UgKmRl diwgY29uc3QgY2hhciAqbmFtZSwKICAqLwogc3RhdGljIHZvaWQgb2ZfbXV4X2Nsa19zZXR1cChz dHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBj bGtfY29yZSAqY2xrOwogCXZvaWQgX19pb21lbSAqcmVnOwogCWludCBudW1fcGFyZW50czsKIAlj b25zdCBjaGFyICoqcGFyZW50X25hbWVzOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvdXg1MDAv YWJ4NTAwLWNsay5jIGIvZHJpdmVycy9jbGsvdXg1MDAvYWJ4NTAwLWNsay5jCmluZGV4IGU3YmQ2 MmMuLmYyN2JlNzggMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3V4NTAwL2FieDUwMC1jbGsuYwor KysgYi9kcml2ZXJzL2Nsay91eDUwMC9hYng1MDAtY2xrLmMKQEAgLTEzLDcgKzEzLDYgQEAKICNp bmNsdWRlIDxsaW51eC9wbGF0Zm9ybV9kZXZpY2UuaD4KICNpbmNsdWRlIDxsaW51eC9tZmQvYWJ4 NTAwL2FiODUwMC5oPgogI2luY2x1ZGUgPGxpbnV4L21mZC9hYng1MDAvYWI4NTAwLXN5c2N0cmwu aD4KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNp bmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIuaD4KICNpbmNsdWRlIDxsaW51eC9tZmQvZGJ4NTAw LXByY211Lmg+CkBAIC0yMyw3ICsyMiw3IEBACiBzdGF0aWMgaW50IGFiODUwMF9yZWdfY2xrcyhz dHJ1Y3QgZGV2aWNlICpkZXYpCiB7CiAJaW50IHJldDsKLQlzdHJ1Y3QgY2xrICpjbGs7CisJc3Ry dWN0IGNsa19jb3JlICpjbGs7CiAKIAljb25zdCBjaGFyICppbnRjbGtfcGFyZW50c1tdID0geyJh Yjg1MDBfc3lzY2xrIiwgInVscGNsayJ9OwogCXUxNiBpbnRjbGtfcmVnX3NlbFtdID0gezAgLCBB Qjg1MDBfU1lTVUxQQ0xLQ1RSTDF9OwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvdXg1MDAvY2xr LXByY2MuYyBiL2RyaXZlcnMvY2xrL3V4NTAwL2Nsay1wcmNjLmMKaW5kZXggYmQ0NzY5YS4uN2Vi MDU1ZiAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvdXg1MDAvY2xrLXByY2MuYworKysgYi9kcml2 ZXJzL2Nsay91eDUwMC9jbGstcHJjYy5jCkBAIC05Miw3ICs5Miw3IEBAIHN0YXRpYyBzdHJ1Y3Qg Y2xrX29wcyBjbGtfcHJjY19rY2xrX29wcyA9IHsKIAkuaXNfZW5hYmxlZCA9IGNsa19wcmNjX2lz X2VuYWJsZWQsCiB9OwogCi1zdGF0aWMgc3RydWN0IGNsayAqY2xrX3JlZ19wcmNjKGNvbnN0IGNo YXIgKm5hbWUsCitzdGF0aWMgc3RydWN0IGNsa19jb3JlICpjbGtfcmVnX3ByY2MoY29uc3QgY2hh ciAqbmFtZSwKIAkJCQljb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJCQlyZXNvdXJjZV9zaXpl X3QgcGh5X2Jhc2UsCiAJCQkJdTMyIGNnX3NlbCwKQEAgLTEwMSw3ICsxMDEsNyBAQCBzdGF0aWMg c3RydWN0IGNsayAqY2xrX3JlZ19wcmNjKGNvbnN0IGNoYXIgKm5hbWUsCiB7CiAJc3RydWN0IGNs a19wcmNjICpjbGs7CiAJc3RydWN0IGNsa19pbml0X2RhdGEgY2xrX3ByY2NfaW5pdDsKLQlzdHJ1 Y3QgY2xrICpjbGtfcmVnOworCXN0cnVjdCBjbGtfY29yZSAqY2xrX3JlZzsKIAogCWlmICghbmFt ZSkgewogCQlwcl9lcnIoImNsa19wcmNjOiAlcyBpbnZhbGlkIGFyZ3VtZW50cyBwYXNzZWRcbiIs IF9fZnVuY19fKTsKQEAgLTE0Miw3ICsxNDIsNyBAQCBmcmVlX2NsazoKIAlyZXR1cm4gRVJSX1BU UigtRU5PTUVNKTsKIH0KIAotc3RydWN0IGNsayAqY2xrX3JlZ19wcmNjX3BjbGsoY29uc3QgY2hh ciAqbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqY2xrX3JlZ19wcmNjX3BjbGsoY29uc3QgY2hhciAq bmFtZSwKIAkJCSAgICAgIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAogCQkJICAgICAgcmVzb3Vy Y2Vfc2l6ZV90IHBoeV9iYXNlLAogCQkJICAgICAgdTMyIGNnX3NlbCwKQEAgLTE1Miw3ICsxNTIs NyBAQCBzdHJ1Y3QgY2xrICpjbGtfcmVnX3ByY2NfcGNsayhjb25zdCBjaGFyICpuYW1lLAogCQkJ JmNsa19wcmNjX3BjbGtfb3BzKTsKIH0KIAotc3RydWN0IGNsayAqY2xrX3JlZ19wcmNjX2tjbGso Y29uc3QgY2hhciAqbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqY2xrX3JlZ19wcmNjX2tjbGsoY29u c3QgY2hhciAqbmFtZSwKIAkJCSAgICAgIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAogCQkJICAg ICAgcmVzb3VyY2Vfc2l6ZV90IHBoeV9iYXNlLAogCQkJICAgICAgdTMyIGNnX3NlbCwKZGlmZiAt LWdpdCBhL2RyaXZlcnMvY2xrL3V4NTAwL2Nsay1wcmNtdS5jIGIvZHJpdmVycy9jbGsvdXg1MDAv Y2xrLXByY211LmMKaW5kZXggZTJkNjNiYy4uYmFjNTRjOSAxMDA2NDQKLS0tIGEvZHJpdmVycy9j bGsvdXg1MDAvY2xrLXByY211LmMKKysrIGIvZHJpdmVycy9jbGsvdXg1MDAvY2xrLXByY211LmMK QEAgLTI0Myw3ICsyNDMsNyBAQCBzdGF0aWMgc3RydWN0IGNsa19vcHMgY2xrX3ByY211X29wcF92 b2x0X3NjYWxhYmxlX29wcyA9IHsKIAkuc2V0X3JhdGUgPSBjbGtfcHJjbXVfc2V0X3JhdGUsCiB9 OwogCi1zdGF0aWMgc3RydWN0IGNsayAqY2xrX3JlZ19wcmNtdShjb25zdCBjaGFyICpuYW1lLAor c3RhdGljIHN0cnVjdCBjbGtfY29yZSAqY2xrX3JlZ19wcmNtdShjb25zdCBjaGFyICpuYW1lLAog CQkJCSBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJCQkgdTggY2dfc2VsLAogCQkJCSB1bnNp Z25lZCBsb25nIHJhdGUsCkBAIC0yNTIsNyArMjUyLDcgQEAgc3RhdGljIHN0cnVjdCBjbGsgKmNs a19yZWdfcHJjbXUoY29uc3QgY2hhciAqbmFtZSwKIHsKIAlzdHJ1Y3QgY2xrX3ByY211ICpjbGs7 CiAJc3RydWN0IGNsa19pbml0X2RhdGEgY2xrX3ByY211X2luaXQ7Ci0Jc3RydWN0IGNsayAqY2xr X3JlZzsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWc7CiAKIAlpZiAoIW5hbWUpIHsKIAkJcHJf ZXJyKCJjbGtfcHJjbXU6ICVzIGludmFsaWQgYXJndW1lbnRzIHBhc3NlZFxuIiwgX19mdW5jX18p OwpAQCAtMjkyLDcgKzI5Miw3IEBAIGZyZWVfY2xrOgogCXJldHVybiBFUlJfUFRSKC1FTk9NRU0p OwogfQogCi1zdHJ1Y3QgY2xrICpjbGtfcmVnX3ByY211X3NjYWxhYmxlKGNvbnN0IGNoYXIgKm5h bWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdfcHJjbXVfc2NhbGFibGUoY29uc3QgY2hhciAq bmFtZSwKIAkJCQkgICBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJCQkgICB1OCBjZ19zZWws CiAJCQkJICAgdW5zaWduZWQgbG9uZyByYXRlLApAQCAtMzAyLDcgKzMwMiw3IEBAIHN0cnVjdCBj bGsgKmNsa19yZWdfcHJjbXVfc2NhbGFibGUoY29uc3QgY2hhciAqbmFtZSwKIAkJCSZjbGtfcHJj bXVfc2NhbGFibGVfb3BzKTsKIH0KIAotc3RydWN0IGNsayAqY2xrX3JlZ19wcmNtdV9nYXRlKGNv bnN0IGNoYXIgKm5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdfcHJjbXVfZ2F0ZShjb25z dCBjaGFyICpuYW1lLAogCQkJICAgICAgIGNvbnN0IGNoYXIgKnBhcmVudF9uYW1lLAogCQkJICAg ICAgIHU4IGNnX3NlbCwKIAkJCSAgICAgICB1bnNpZ25lZCBsb25nIGZsYWdzKQpAQCAtMzExLDcg KzMxMSw3IEBAIHN0cnVjdCBjbGsgKmNsa19yZWdfcHJjbXVfZ2F0ZShjb25zdCBjaGFyICpuYW1l LAogCQkJJmNsa19wcmNtdV9nYXRlX29wcyk7CiB9CiAKLXN0cnVjdCBjbGsgKmNsa19yZWdfcHJj bXVfc2NhbGFibGVfcmF0ZShjb25zdCBjaGFyICpuYW1lLAorc3RydWN0IGNsa19jb3JlICpjbGtf cmVnX3ByY211X3NjYWxhYmxlX3JhdGUoY29uc3QgY2hhciAqbmFtZSwKIAkJCQkJY29uc3QgY2hh ciAqcGFyZW50X25hbWUsCiAJCQkJCXU4IGNnX3NlbCwKIAkJCQkJdW5zaWduZWQgbG9uZyByYXRl LApAQCAtMzIxLDcgKzMyMSw3IEBAIHN0cnVjdCBjbGsgKmNsa19yZWdfcHJjbXVfc2NhbGFibGVf cmF0ZShjb25zdCBjaGFyICpuYW1lLAogCQkJJmNsa19wcmNtdV9zY2FsYWJsZV9yYXRlX29wcyk7 CiB9CiAKLXN0cnVjdCBjbGsgKmNsa19yZWdfcHJjbXVfcmF0ZShjb25zdCBjaGFyICpuYW1lLAor c3RydWN0IGNsa19jb3JlICpjbGtfcmVnX3ByY211X3JhdGUoY29uc3QgY2hhciAqbmFtZSwKIAkJ CSAgICAgICBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJCSAgICAgICB1OCBjZ19zZWwsCiAJ CQkgICAgICAgdW5zaWduZWQgbG9uZyBmbGFncykKQEAgLTMzMCw3ICszMzAsNyBAQCBzdHJ1Y3Qg Y2xrICpjbGtfcmVnX3ByY211X3JhdGUoY29uc3QgY2hhciAqbmFtZSwKIAkJCSZjbGtfcHJjbXVf cmF0ZV9vcHMpOwogfQogCi1zdHJ1Y3QgY2xrICpjbGtfcmVnX3ByY211X29wcF9nYXRlKGNvbnN0 IGNoYXIgKm5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdfcHJjbXVfb3BwX2dhdGUoY29u c3QgY2hhciAqbmFtZSwKIAkJCQkgICBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJCQkgICB1 OCBjZ19zZWwsCiAJCQkJICAgdW5zaWduZWQgbG9uZyBmbGFncykKQEAgLTMzOSw3ICszMzksNyBA QCBzdHJ1Y3QgY2xrICpjbGtfcmVnX3ByY211X29wcF9nYXRlKGNvbnN0IGNoYXIgKm5hbWUsCiAJ CQkmY2xrX3ByY211X29wcF9nYXRlX29wcyk7CiB9CiAKLXN0cnVjdCBjbGsgKmNsa19yZWdfcHJj bXVfb3BwX3ZvbHRfc2NhbGFibGUoY29uc3QgY2hhciAqbmFtZSwKK3N0cnVjdCBjbGtfY29yZSAq Y2xrX3JlZ19wcmNtdV9vcHBfdm9sdF9zY2FsYWJsZShjb25zdCBjaGFyICpuYW1lLAogCQkJCQkg ICAgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAJCQkJCSAgICB1OCBjZ19zZWwsCiAJCQkJCSAg ICB1bnNpZ25lZCBsb25nIHJhdGUsCmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay91eDUwMC9jbGst c3lzY3RybC5jIGIvZHJpdmVycy9jbGsvdXg1MDAvY2xrLXN5c2N0cmwuYwppbmRleCBlMzY0Yzlk Li5kYzY2MDhhIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay91eDUwMC9jbGstc3lzY3RybC5jCisr KyBiL2RyaXZlcnMvY2xrL3V4NTAwL2Nsay1zeXNjdHJsLmMKQEAgLTExNCw3ICsxMTQsNyBAQCBz dGF0aWMgc3RydWN0IGNsa19vcHMgY2xrX3N5c2N0cmxfc2V0X3BhcmVudF9vcHMgPSB7CiAJLmdl dF9wYXJlbnQgPSBjbGtfc3lzY3RybF9nZXRfcGFyZW50LAogfTsKIAotc3RhdGljIHN0cnVjdCBj bGsgKmNsa19yZWdfc3lzY3RybChzdHJ1Y3QgZGV2aWNlICpkZXYsCitzdGF0aWMgc3RydWN0IGNs a19jb3JlICpjbGtfcmVnX3N5c2N0cmwoc3RydWN0IGRldmljZSAqZGV2LAogCQkJCWNvbnN0IGNo YXIgKm5hbWUsCiAJCQkJY29uc3QgY2hhciAqKnBhcmVudF9uYW1lcywKIAkJCQl1OCBudW1fcGFy ZW50cywKQEAgLTEyOCw3ICsxMjgsNyBAQCBzdGF0aWMgc3RydWN0IGNsayAqY2xrX3JlZ19zeXNj dHJsKHN0cnVjdCBkZXZpY2UgKmRldiwKIHsKIAlzdHJ1Y3QgY2xrX3N5c2N0cmwgKmNsazsKIAlz dHJ1Y3QgY2xrX2luaXRfZGF0YSBjbGtfc3lzY3RybF9pbml0OwotCXN0cnVjdCBjbGsgKmNsa19y ZWc7CisJc3RydWN0IGNsa19jb3JlICpjbGtfcmVnOwogCWludCBpOwogCiAJaWYgKCFkZXYpCkBA IC0xNzYsNyArMTc2LDcgQEAgc3RhdGljIHN0cnVjdCBjbGsgKmNsa19yZWdfc3lzY3RybChzdHJ1 Y3QgZGV2aWNlICpkZXYsCiAJcmV0dXJuIGNsa19yZWc7CiB9CiAKLXN0cnVjdCBjbGsgKmNsa19y ZWdfc3lzY3RybF9nYXRlKHN0cnVjdCBkZXZpY2UgKmRldiwKK3N0cnVjdCBjbGtfY29yZSAqY2xr X3JlZ19zeXNjdHJsX2dhdGUoc3RydWN0IGRldmljZSAqZGV2LAogCQkJCWNvbnN0IGNoYXIgKm5h bWUsCiAJCQkJY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAJCQkJdTE2IHJlZ19zZWwsCkBAIC0x OTMsNyArMTkzLDcgQEAgc3RydWN0IGNsayAqY2xrX3JlZ19zeXNjdHJsX2dhdGUoc3RydWN0IGRl dmljZSAqZGV2LAogCQkJZmxhZ3MsICZjbGtfc3lzY3RybF9nYXRlX29wcyk7CiB9CiAKLXN0cnVj dCBjbGsgKmNsa19yZWdfc3lzY3RybF9nYXRlX2ZpeGVkX3JhdGUoc3RydWN0IGRldmljZSAqZGV2 LAorc3RydWN0IGNsa19jb3JlICpjbGtfcmVnX3N5c2N0cmxfZ2F0ZV9maXhlZF9yYXRlKHN0cnVj dCBkZXZpY2UgKmRldiwKIAkJCQkJY29uc3QgY2hhciAqbmFtZSwKIAkJCQkJY29uc3QgY2hhciAq cGFyZW50X25hbWUsCiAJCQkJCXUxNiByZWdfc2VsLApAQCAtMjEyLDcgKzIxMiw3IEBAIHN0cnVj dCBjbGsgKmNsa19yZWdfc3lzY3RybF9nYXRlX2ZpeGVkX3JhdGUoc3RydWN0IGRldmljZSAqZGV2 LAogCQkJJmNsa19zeXNjdHJsX2dhdGVfZml4ZWRfcmF0ZV9vcHMpOwogfQogCi1zdHJ1Y3QgY2xr ICpjbGtfcmVnX3N5c2N0cmxfc2V0X3BhcmVudChzdHJ1Y3QgZGV2aWNlICpkZXYsCitzdHJ1Y3Qg Y2xrX2NvcmUgKmNsa19yZWdfc3lzY3RybF9zZXRfcGFyZW50KHN0cnVjdCBkZXZpY2UgKmRldiwK IAkJCQljb25zdCBjaGFyICpuYW1lLAogCQkJCWNvbnN0IGNoYXIgKipwYXJlbnRfbmFtZXMsCiAJ CQkJdTggbnVtX3BhcmVudHMsCmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay91eDUwMC9jbGsuaCBi L2RyaXZlcnMvY2xrL3V4NTAwL2Nsay5oCmluZGV4IGEyYmI5MmQuLmFjYjUwZjggMTAwNjQ0Ci0t LSBhL2RyaXZlcnMvY2xrL3V4NTAwL2Nsay5oCisrKyBiL2RyaXZlcnMvY2xrL3V4NTAwL2Nsay5o CkBAIC0xMCw1NiArMTAsNTUgQEAKICNpZm5kZWYgX19VWDUwMF9DTEtfSAogI2RlZmluZSBfX1VY NTAwX0NMS19ICiAKLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9kZXZp Y2UuaD4KICNpbmNsdWRlIDxsaW51eC90eXBlcy5oPgogCi1zdHJ1Y3QgY2xrICpjbGtfcmVnX3By Y2NfcGNsayhjb25zdCBjaGFyICpuYW1lLAorc3RydWN0IGNsa19jb3JlICpjbGtfcmVnX3ByY2Nf cGNsayhjb25zdCBjaGFyICpuYW1lLAogCQkJICAgICAgY29uc3QgY2hhciAqcGFyZW50X25hbWUs CiAJCQkgICAgICByZXNvdXJjZV9zaXplX3QgcGh5X2Jhc2UsCiAJCQkgICAgICB1MzIgY2dfc2Vs LAogCQkJICAgICAgdW5zaWduZWQgbG9uZyBmbGFncyk7CiAKLXN0cnVjdCBjbGsgKmNsa19yZWdf cHJjY19rY2xrKGNvbnN0IGNoYXIgKm5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdfcHJj Y19rY2xrKGNvbnN0IGNoYXIgKm5hbWUsCiAJCQkgICAgICBjb25zdCBjaGFyICpwYXJlbnRfbmFt ZSwKIAkJCSAgICAgIHJlc291cmNlX3NpemVfdCBwaHlfYmFzZSwKIAkJCSAgICAgIHUzMiBjZ19z ZWwsCiAJCQkgICAgICB1bnNpZ25lZCBsb25nIGZsYWdzKTsKIAotc3RydWN0IGNsayAqY2xrX3Jl Z19wcmNtdV9zY2FsYWJsZShjb25zdCBjaGFyICpuYW1lLAorc3RydWN0IGNsa19jb3JlICpjbGtf cmVnX3ByY211X3NjYWxhYmxlKGNvbnN0IGNoYXIgKm5hbWUsCiAJCQkJICAgY29uc3QgY2hhciAq cGFyZW50X25hbWUsCiAJCQkJICAgdTggY2dfc2VsLAogCQkJCSAgIHVuc2lnbmVkIGxvbmcgcmF0 ZSwKIAkJCQkgICB1bnNpZ25lZCBsb25nIGZsYWdzKTsKIAotc3RydWN0IGNsayAqY2xrX3JlZ19w cmNtdV9nYXRlKGNvbnN0IGNoYXIgKm5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdfcHJj bXVfZ2F0ZShjb25zdCBjaGFyICpuYW1lLAogCQkJICAgICAgIGNvbnN0IGNoYXIgKnBhcmVudF9u YW1lLAogCQkJICAgICAgIHU4IGNnX3NlbCwKIAkJCSAgICAgICB1bnNpZ25lZCBsb25nIGZsYWdz KTsKIAotc3RydWN0IGNsayAqY2xrX3JlZ19wcmNtdV9zY2FsYWJsZV9yYXRlKGNvbnN0IGNoYXIg Km5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdfcHJjbXVfc2NhbGFibGVfcmF0ZShjb25z dCBjaGFyICpuYW1lLAogCQkJCQljb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJCQkJdTggY2df c2VsLAogCQkJCQl1bnNpZ25lZCBsb25nIHJhdGUsCiAJCQkJCXVuc2lnbmVkIGxvbmcgZmxhZ3Mp OwogCi1zdHJ1Y3QgY2xrICpjbGtfcmVnX3ByY211X3JhdGUoY29uc3QgY2hhciAqbmFtZSwKK3N0 cnVjdCBjbGtfY29yZSAqY2xrX3JlZ19wcmNtdV9yYXRlKGNvbnN0IGNoYXIgKm5hbWUsCiAJCQkg ICAgICAgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAJCQkgICAgICAgdTggY2dfc2VsLAogCQkJ ICAgICAgIHVuc2lnbmVkIGxvbmcgZmxhZ3MpOwogCi1zdHJ1Y3QgY2xrICpjbGtfcmVnX3ByY211 X29wcF9nYXRlKGNvbnN0IGNoYXIgKm5hbWUsCitzdHJ1Y3QgY2xrX2NvcmUgKmNsa19yZWdfcHJj bXVfb3BwX2dhdGUoY29uc3QgY2hhciAqbmFtZSwKIAkJCQkgICBjb25zdCBjaGFyICpwYXJlbnRf bmFtZSwKIAkJCQkgICB1OCBjZ19zZWwsCiAJCQkJICAgdW5zaWduZWQgbG9uZyBmbGFncyk7CiAK LXN0cnVjdCBjbGsgKmNsa19yZWdfcHJjbXVfb3BwX3ZvbHRfc2NhbGFibGUoY29uc3QgY2hhciAq bmFtZSwKK3N0cnVjdCBjbGtfY29yZSAqY2xrX3JlZ19wcmNtdV9vcHBfdm9sdF9zY2FsYWJsZShj b25zdCBjaGFyICpuYW1lLAogCQkJCQkgICAgY29uc3QgY2hhciAqcGFyZW50X25hbWUsCiAJCQkJ CSAgICB1OCBjZ19zZWwsCiAJCQkJCSAgICB1bnNpZ25lZCBsb25nIHJhdGUsCiAJCQkJCSAgICB1 bnNpZ25lZCBsb25nIGZsYWdzKTsKIAotc3RydWN0IGNsayAqY2xrX3JlZ19zeXNjdHJsX2dhdGUo c3RydWN0IGRldmljZSAqZGV2LAorc3RydWN0IGNsa19jb3JlICpjbGtfcmVnX3N5c2N0cmxfZ2F0 ZShzdHJ1Y3QgZGV2aWNlICpkZXYsCiAJCQkJIGNvbnN0IGNoYXIgKm5hbWUsCiAJCQkJIGNvbnN0 IGNoYXIgKnBhcmVudF9uYW1lLAogCQkJCSB1MTYgcmVnX3NlbCwKQEAgLTY4LDcgKzY3LDcgQEAg c3RydWN0IGNsayAqY2xrX3JlZ19zeXNjdHJsX2dhdGUoc3RydWN0IGRldmljZSAqZGV2LAogCQkJ CSB1bnNpZ25lZCBsb25nIGVuYWJsZV9kZWxheV91cywKIAkJCQkgdW5zaWduZWQgbG9uZyBmbGFn cyk7CiAKLXN0cnVjdCBjbGsgKmNsa19yZWdfc3lzY3RybF9nYXRlX2ZpeGVkX3JhdGUoc3RydWN0 IGRldmljZSAqZGV2LAorc3RydWN0IGNsa19jb3JlICpjbGtfcmVnX3N5c2N0cmxfZ2F0ZV9maXhl ZF9yYXRlKHN0cnVjdCBkZXZpY2UgKmRldiwKIAkJCQkJICAgIGNvbnN0IGNoYXIgKm5hbWUsCiAJ CQkJCSAgICBjb25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJCQkJICAgIHUxNiByZWdfc2VsLApA QCAtNzgsNyArNzcsNyBAQCBzdHJ1Y3QgY2xrICpjbGtfcmVnX3N5c2N0cmxfZ2F0ZV9maXhlZF9y YXRlKHN0cnVjdCBkZXZpY2UgKmRldiwKIAkJCQkJICAgIHVuc2lnbmVkIGxvbmcgZW5hYmxlX2Rl bGF5X3VzLAogCQkJCQkgICAgdW5zaWduZWQgbG9uZyBmbGFncyk7CiAKLXN0cnVjdCBjbGsgKmNs a19yZWdfc3lzY3RybF9zZXRfcGFyZW50KHN0cnVjdCBkZXZpY2UgKmRldiwKK3N0cnVjdCBjbGtf Y29yZSAqY2xrX3JlZ19zeXNjdHJsX3NldF9wYXJlbnQoc3RydWN0IGRldmljZSAqZGV2LAogCQkJ CSAgICAgICBjb25zdCBjaGFyICpuYW1lLAogCQkJCSAgICAgICBjb25zdCBjaGFyICoqcGFyZW50 X25hbWVzLAogCQkJCSAgICAgICB1OCBudW1fcGFyZW50cywKZGlmZiAtLWdpdCBhL2RyaXZlcnMv Y2xrL3V4NTAwL3U4NTAwX2Nsay5jIGIvZHJpdmVycy9jbGsvdXg1MDAvdTg1MDBfY2xrLmMKaW5k ZXggODAwNjljMy4uNzA4NTg5ZiAxMDA2NDQKLS0tIGEvZHJpdmVycy9jbGsvdXg1MDAvdTg1MDBf Y2xrLmMKKysrIGIvZHJpdmVycy9jbGsvdXg1MDAvdTg1MDBfY2xrLmMKQEAgLTcsNyArNyw2IEBA CiAgKiBMaWNlbnNlIHRlcm1zOiBHTlUgR2VuZXJhbCBQdWJsaWMgTGljZW5zZSAoR1BMKSB2ZXJz aW9uIDIKICAqLwogCi0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvY2xr ZGV2Lmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5jbHVkZSA8bGludXgv bWZkL2RieDUwMC1wcmNtdS5oPgpAQCAtMTksNyArMTgsNyBAQCB2b2lkIHU4NTAwX2Nsa19pbml0 KHUzMiBjbGtyc3QxX2Jhc2UsIHUzMiBjbGtyc3QyX2Jhc2UsIHUzMiBjbGtyc3QzX2Jhc2UsCiB7 CiAJc3RydWN0IHByY211X2Z3X3ZlcnNpb24gKmZ3X3ZlcnNpb247CiAJY29uc3QgY2hhciAqc2dh Y2xrX3BhcmVudCA9IE5VTEw7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAq Y2xrOwogCiAJLyogQ2xvY2sgc291cmNlcyAqLwogCWNsayA9IGNsa19yZWdfcHJjbXVfZ2F0ZSgi c29jMF9wbGwiLCBOVUxMLCBQUkNNVV9QTExTT0MwLApkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsv dXg1MDAvdTg1MDBfb2ZfY2xrLmMgYi9kcml2ZXJzL2Nsay91eDUwMC91ODUwMF9vZl9jbGsuYwpp bmRleCA3YjU1ZWY4Li42MWVmYjg1IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay91eDUwMC91ODUw MF9vZl9jbGsuYworKysgYi9kcml2ZXJzL2Nsay91eDUwMC91ODUwMF9vZl9jbGsuYwpAQCAtOCw3 ICs4LDYgQEAKICAqLwogCiAjaW5jbHVkZSA8bGludXgvb2YuaD4KLSNpbmNsdWRlIDxsaW51eC9j bGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNpbmNsdWRlIDxsaW51eC9jbGstcHJv dmlkZXIuaD4KICNpbmNsdWRlIDxsaW51eC9tZmQvZGJ4NTAwLXByY211Lmg+CkBAIC0xOCw5ICsx Nyw5IEBACiAjZGVmaW5lIFBSQ0NfTlVNX1BFUklQSF9DTFVTVEVSUyA2CiAjZGVmaW5lIFBSQ0Nf UEVSSVBIU19QRVJfQ0xVU1RFUiAzMgogCi1zdGF0aWMgc3RydWN0IGNsayAqcHJjbXVfY2xrW1BS Q01VX05VTV9DTEtTXTsKLXN0YXRpYyBzdHJ1Y3QgY2xrICpwcmNjX3BjbGtbKFBSQ0NfTlVNX1BF UklQSF9DTFVTVEVSUyArIDEpICogUFJDQ19QRVJJUEhTX1BFUl9DTFVTVEVSXTsKLXN0YXRpYyBz dHJ1Y3QgY2xrICpwcmNjX2tjbGtbKFBSQ0NfTlVNX1BFUklQSF9DTFVTVEVSUyArIDEpICogUFJD Q19QRVJJUEhTX1BFUl9DTFVTVEVSXTsKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKnByY211X2Ns a1tQUkNNVV9OVU1fQ0xLU107CitzdGF0aWMgc3RydWN0IGNsa19jb3JlICpwcmNjX3BjbGtbKFBS Q0NfTlVNX1BFUklQSF9DTFVTVEVSUyArIDEpICogUFJDQ19QRVJJUEhTX1BFUl9DTFVTVEVSXTsK K3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKnByY2Nfa2Nsa1soUFJDQ19OVU1fUEVSSVBIX0NMVVNU RVJTICsgMSkgKiBQUkNDX1BFUklQSFNfUEVSX0NMVVNURVJdOwogCiAjZGVmaW5lIFBSQ0NfU0hP VyhjbGssIGJhc2UsIGJpdCkgXAogCWNsa1soYmFzZSAqIFBSQ0NfUEVSSVBIU19QRVJfQ0xVU1RF UikgKyBiaXRdCkBAIC0yOSwxMCArMjgsMTAgQEAgc3RhdGljIHN0cnVjdCBjbGsgKnByY2Nfa2Ns a1soUFJDQ19OVU1fUEVSSVBIX0NMVVNURVJTICsgMSkgKiBQUkNDX1BFUklQSFNfUEVSX0MKICNk ZWZpbmUgUFJDQ19LQ0xLX1NUT1JFKGNsaywgYmFzZSwgYml0KSAgICAgICAgXAogCXByY2Nfa2Ns a1soYmFzZSAqIFBSQ0NfUEVSSVBIU19QRVJfQ0xVU1RFUikgKyBiaXRdID0gY2xrCiAKLXN0YXRp YyBzdHJ1Y3QgY2xrICp1eDUwMF90d29jZWxsX2dldChzdHJ1Y3Qgb2ZfcGhhbmRsZV9hcmdzICpj bGtzcGVjLAorc3RhdGljIHN0cnVjdCBjbGtfY29yZSAqdXg1MDBfdHdvY2VsbF9nZXQoc3RydWN0 IG9mX3BoYW5kbGVfYXJncyAqY2xrc3BlYywKIAkJCQkgICAgIHZvaWQgKmRhdGEpCiB7Ci0Jc3Ry dWN0IGNsayAqKmNsa19kYXRhID0gZGF0YTsKKwlzdHJ1Y3QgY2xrX2NvcmUgKipjbGtfZGF0YSA9 IGRhdGE7CiAJdW5zaWduZWQgaW50IGJhc2UsIGJpdDsKIAogCWlmIChjbGtzcGVjLT5hcmdzX2Nv dW50ICE9IDIpCkBAIC02MSw3ICs2MCw3IEBAIHZvaWQgdTg1MDBfb2ZfY2xrX2luaXQodTMyIGNs a3JzdDFfYmFzZSwgdTMyIGNsa3JzdDJfYmFzZSwgdTMyIGNsa3JzdDNfYmFzZSwKIAlzdHJ1Y3Qg ZGV2aWNlX25vZGUgKm5wID0gTlVMTDsKIAlzdHJ1Y3QgZGV2aWNlX25vZGUgKmNoaWxkID0gTlVM TDsKIAljb25zdCBjaGFyICpzZ2FjbGtfcGFyZW50ID0gTlVMTDsKLQlzdHJ1Y3QgY2xrICpjbGss ICpydGNfY2xrLCAqdHdkX2NsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsaywgKnJ0Y19jbGssICp0 d2RfY2xrOwogCiAJaWYgKG9mX2hhdmVfcG9wdWxhdGVkX2R0KCkpCiAJCW5wID0gb2ZfZmluZF9t YXRjaGluZ19ub2RlKE5VTEwsIHU4NTAwX2Nsa19vZl9tYXRjaCk7CmRpZmYgLS1naXQgYS9kcml2 ZXJzL2Nsay91eDUwMC91ODU0MF9jbGsuYyBiL2RyaXZlcnMvY2xrL3V4NTAwL3U4NTQwX2Nsay5j CmluZGV4IDIwYzhhZGQuLmE1MDg4NDUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3V4NTAwL3U4 NTQwX2Nsay5jCisrKyBiL2RyaXZlcnMvY2xrL3V4NTAwL3U4NTQwX2Nsay5jCkBAIC03LDcgKzcs NiBAQAogICogTGljZW5zZSB0ZXJtczogR05VIEdlbmVyYWwgUHVibGljIExpY2Vuc2UgKEdQTCkg dmVyc2lvbiAyCiAgKi8KIAotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4 L2Nsa2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxp bnV4L21mZC9kYng1MDAtcHJjbXUuaD4KQEAgLTE3LDcgKzE2LDcgQEAKIHZvaWQgdTg1NDBfY2xr X2luaXQodTMyIGNsa3JzdDFfYmFzZSwgdTMyIGNsa3JzdDJfYmFzZSwgdTMyIGNsa3JzdDNfYmFz ZSwKIAkJICAgIHUzMiBjbGtyc3Q1X2Jhc2UsIHUzMiBjbGtyc3Q2X2Jhc2UpCiB7Ci0Jc3RydWN0 IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCiAJLyogQ2xvY2sgc291cmNlcy4g Ki8KIAkvKiBGaXhlZCBDbG9ja0dlbiAqLwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvdXg1MDAv dTk1NDBfY2xrLmMgYi9kcml2ZXJzL2Nsay91eDUwMC91OTU0MF9jbGsuYwppbmRleCA0NDc5NDc4 Li44OTA1NWFlIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay91eDUwMC91OTU0MF9jbGsuYworKysg Yi9kcml2ZXJzL2Nsay91eDUwMC91OTU0MF9jbGsuYwpAQCAtNyw3ICs3LDYgQEAKICAqIExpY2Vu c2UgdGVybXM6IEdOVSBHZW5lcmFsIFB1YmxpYyBMaWNlbnNlIChHUEwpIHZlcnNpb24gMgogICov CiAKLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNp bmNsdWRlIDxsaW51eC9jbGstcHJvdmlkZXIuaD4KICNpbmNsdWRlIDxsaW51eC9tZmQvZGJ4NTAw LXByY211Lmg+CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay92ZXJzYXRpbGUvY2xrLWljc3QuYyBi L2RyaXZlcnMvY2xrL3ZlcnNhdGlsZS9jbGstaWNzdC5jCmluZGV4IGJjOTZmMTAuLmQ1NzE5ZTAg MTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3ZlcnNhdGlsZS9jbGstaWNzdC5jCisrKyBiL2RyaXZl cnMvY2xrL3ZlcnNhdGlsZS9jbGstaWNzdC5jCkBAIC0xMyw3ICsxMyw2IEBACiAgKiBJQ1NUIGNs b2NrIGNvZGUgZnJvbSB0aGUgQVJNIHRyZWUgc2hvdWxkIHByb2JhYmx5IGJlIG1lcmdlZCBpbnRv IHRoaXMKICAqIGZpbGUuCiAgKi8KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxs aW51eC9jbGtkZXYuaD4KICNpbmNsdWRlIDxsaW51eC9lcnIuaD4KICNpbmNsdWRlIDxsaW51eC9j bGstcHJvdmlkZXIuaD4KQEAgLTEyMSwxMyArMTIwLDEzIEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3Qg Y2xrX29wcyBpY3N0X29wcyA9IHsKIAkuc2V0X3JhdGUgPSBpY3N0X3NldF9yYXRlLAogfTsKIAot c3RydWN0IGNsayAqaWNzdF9jbGtfcmVnaXN0ZXIoc3RydWN0IGRldmljZSAqZGV2LAorc3RydWN0 IGNsa19jb3JlICppY3N0X2Nsa19yZWdpc3RlcihzdHJ1Y3QgZGV2aWNlICpkZXYsCiAJCQljb25z dCBzdHJ1Y3QgY2xrX2ljc3RfZGVzYyAqZGVzYywKIAkJCWNvbnN0IGNoYXIgKm5hbWUsCiAJCQlj b25zdCBjaGFyICpwYXJlbnRfbmFtZSwKIAkJCXZvaWQgX19pb21lbSAqYmFzZSkKIHsKLQlzdHJ1 Y3QgY2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJc3RydWN0IGNsa19pY3N0ICpp Y3N0OwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAJc3RydWN0IGljc3RfcGFyYW1zICpw Y2xvbmU7CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay92ZXJzYXRpbGUvY2xrLWljc3QuaCBiL2Ry aXZlcnMvY2xrL3ZlcnNhdGlsZS9jbGstaWNzdC5oCmluZGV4IDA0ZTZmMGEuLmVkZTg2N2IgMTAw NjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3ZlcnNhdGlsZS9jbGstaWNzdC5oCisrKyBiL2RyaXZlcnMv Y2xrL3ZlcnNhdGlsZS9jbGstaWNzdC5oCkBAIC0xMyw3ICsxMyw3IEBAIHN0cnVjdCBjbGtfaWNz dF9kZXNjIHsKIAl1MzIgbG9ja19vZmZzZXQ7CiB9OwogCi1zdHJ1Y3QgY2xrICppY3N0X2Nsa19y ZWdpc3RlcihzdHJ1Y3QgZGV2aWNlICpkZXYsCitzdHJ1Y3QgY2xrX2NvcmUgKmljc3RfY2xrX3Jl Z2lzdGVyKHN0cnVjdCBkZXZpY2UgKmRldiwKIAkJCSAgICAgIGNvbnN0IHN0cnVjdCBjbGtfaWNz dF9kZXNjICpkZXNjLAogCQkJICAgICAgY29uc3QgY2hhciAqbmFtZSwKIAkJCSAgICAgIGNvbnN0 IGNoYXIgKnBhcmVudF9uYW1lLApkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvdmVyc2F0aWxlL2Ns ay1pbXBkMS5jIGIvZHJpdmVycy9jbGsvdmVyc2F0aWxlL2Nsay1pbXBkMS5jCmluZGV4IDFjYzEz MzAuLjQ2NjgwZGIgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3ZlcnNhdGlsZS9jbGstaW1wZDEu YworKysgYi9kcml2ZXJzL2Nsay92ZXJzYXRpbGUvY2xrLWltcGQxLmMKQEAgLTcsNyArNyw2IEBA CiAgKiBwdWJsaXNoZWQgYnkgdGhlIEZyZWUgU29mdHdhcmUgRm91bmRhdGlvbi4KICAqLwogI2lu Y2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgotI2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2lu Y2x1ZGUgPGxpbnV4L2Nsa2Rldi5oPgogI2luY2x1ZGUgPGxpbnV4L2Vyci5oPgogI2luY2x1ZGUg PGxpbnV4L2lvLmg+CkBAIC0yMSwxOCArMjAsMTggQEAKIAogc3RydWN0IGltcGQxX2NsayB7CiAJ Y2hhciAqcGNsa25hbWU7Ci0Jc3RydWN0IGNsayAqcGNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKnBj bGs7CiAJY2hhciAqdmNvMW5hbWU7Ci0Jc3RydWN0IGNsayAqdmNvMWNsazsKKwlzdHJ1Y3QgY2xr X2NvcmUgKnZjbzFjbGs7CiAJY2hhciAqdmNvMm5hbWU7Ci0Jc3RydWN0IGNsayAqdmNvMmNsazsK LQlzdHJ1Y3QgY2xrICptbWNpY2xrOworCXN0cnVjdCBjbGtfY29yZSAqdmNvMmNsazsKKwlzdHJ1 Y3QgY2xrX2NvcmUgKm1tY2ljbGs7CiAJY2hhciAqdWFydG5hbWU7Ci0Jc3RydWN0IGNsayAqdWFy dGNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKnVhcnRjbGs7CiAJY2hhciAqc3BpbmFtZTsKLQlzdHJ1 Y3QgY2xrICpzcGljbGs7CisJc3RydWN0IGNsa19jb3JlICpzcGljbGs7CiAJY2hhciAqc2NuYW1l OwotCXN0cnVjdCBjbGsgKnNjY2xrOworCXN0cnVjdCBjbGtfY29yZSAqc2NjbGs7CiAJc3RydWN0 IGNsa19sb29rdXAgKmNsa3NbMTVdOwogfTsKIApAQCAtODcsOCArODYsOCBAQCBzdGF0aWMgY29u c3Qgc3RydWN0IGNsa19pY3N0X2Rlc2MgaW1wZDFfaWNzdDJfZGVzYyA9IHsKIHZvaWQgaW50ZWdy YXRvcl9pbXBkMV9jbGtfaW5pdCh2b2lkIF9faW9tZW0gKmJhc2UsIHVuc2lnbmVkIGludCBpZCkK IHsKIAlzdHJ1Y3QgaW1wZDFfY2xrICppbWM7Ci0Jc3RydWN0IGNsayAqY2xrOwotCXN0cnVjdCBj bGsgKnBjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpwY2xr OwogCWludCBpOwogCiAJaWYgKGlkID4gMykgewpkaWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvdmVy c2F0aWxlL2Nsay1yZWFsdmlldy5jIGIvZHJpdmVycy9jbGsvdmVyc2F0aWxlL2Nsay1yZWFsdmll dy5jCmluZGV4IGM4YjUyMzEuLjUyNGNiYTUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3ZlcnNh dGlsZS9jbGstcmVhbHZpZXcuYworKysgYi9kcml2ZXJzL2Nsay92ZXJzYXRpbGUvY2xrLXJlYWx2 aWV3LmMKQEAgLTYsNyArNiw2IEBACiAgKiBpdCB1bmRlciB0aGUgdGVybXMgb2YgdGhlIEdOVSBH ZW5lcmFsIFB1YmxpYyBMaWNlbnNlIHZlcnNpb24gMiBhcwogICogcHVibGlzaGVkIGJ5IHRoZSBG cmVlIFNvZnR3YXJlIEZvdW5kYXRpb24uCiAgKi8KLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNp bmNsdWRlIDxsaW51eC9jbGtkZXYuaD4KICNpbmNsdWRlIDxsaW51eC9lcnIuaD4KICNpbmNsdWRl IDxsaW51eC9pby5oPgpAQCAtNTAsNyArNDksNyBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGNsa19p Y3N0X2Rlc2MgX19pbml0ZGF0YSByZWFsdmlld19vc2M0X2Rlc2MgPSB7CiAgKi8KIHZvaWQgX19p bml0IHJlYWx2aWV3X2Nsa19pbml0KHZvaWQgX19pb21lbSAqc3lzYmFzZSwgYm9vbCBpc19wYjEx NzYpCiB7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCiAJLyog QVBCIGNsb2NrIGR1bW15ICovCiAJY2xrID0gY2xrX3JlZ2lzdGVyX2ZpeGVkX3JhdGUoTlVMTCwg ImFwYl9wY2xrIiwgTlVMTCwgQ0xLX0lTX1JPT1QsIDApOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9j bGsvdmVyc2F0aWxlL2Nsay1zcDgxMC5jIGIvZHJpdmVycy9jbGsvdmVyc2F0aWxlL2Nsay1zcDgx MC5jCmluZGV4IGM2ZTg2YTkuLjkyNTZkMjUgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3ZlcnNh dGlsZS9jbGstc3A4MTAuYworKysgYi9kcml2ZXJzL2Nsay92ZXJzYXRpbGUvY2xrLXNwODEwLmMK QEAgLTI1LDcgKzI1LDcgQEAgc3RydWN0IGNsa19zcDgxMDsKIAogc3RydWN0IGNsa19zcDgxMF90 aW1lcmNsa2VuIHsKIAlzdHJ1Y3QgY2xrX2h3IGh3OwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1 Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xrX3NwODEwICpzcDgxMDsKIAlpbnQgY2hhbm5l bDsKIH07CkBAIC0zNiw4ICszNiw4IEBAIHN0cnVjdCBjbGtfc3A4MTAgewogCXZvaWQgX19pb21l bSAqYmFzZTsKIAlzcGlubG9ja190IGxvY2s7CiAJc3RydWN0IGNsa19zcDgxMF90aW1lcmNsa2Vu IHRpbWVyY2xrZW5bNF07Ci0Jc3RydWN0IGNsayAqcmVmY2xrOwotCXN0cnVjdCBjbGsgKnRpbWNs azsKKwlzdHJ1Y3QgY2xrX2NvcmUgKnJlZmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKnRpbWNsazsK IH07CiAKIHN0YXRpYyB1OCBjbGtfc3A4MTBfdGltZXJjbGtlbl9nZXRfcGFyZW50KHN0cnVjdCBj bGtfaHcgKmh3KQpAQCAtNzksMjkgKzc5LDMxIEBAIHN0YXRpYyBpbnQgY2xrX3NwODEwX3RpbWVy Y2xrZW5fcHJlcGFyZShzdHJ1Y3QgY2xrX2h3ICpodykKIHsKIAlzdHJ1Y3QgY2xrX3NwODEwX3Rp bWVyY2xrZW4gKnRpbWVyY2xrZW4gPSB0b19jbGtfc3A4MTBfdGltZXJjbGtlbihodyk7CiAJc3Ry dWN0IGNsa19zcDgxMCAqc3A4MTAgPSB0aW1lcmNsa2VuLT5zcDgxMDsKLQlzdHJ1Y3QgY2xrICpv bGRfcGFyZW50ID0gX19jbGtfZ2V0X3BhcmVudChody0+Y2xrKTsKLQlzdHJ1Y3QgY2xrICpuZXdf cGFyZW50OworCXN0cnVjdCBjbGtfY29yZSAqb2xkX3BhcmVudCA9IF9fY2xrX2dldF9wYXJlbnQo aHctPmNsayk7CisJc3RydWN0IGNsa19jb3JlICpuZXdfcGFyZW50OwogCiAJaWYgKCFzcDgxMC0+ cmVmY2xrKQotCQlzcDgxMC0+cmVmY2xrID0gb2ZfY2xrX2dldChzcDgxMC0+bm9kZSwgc3A4MTAt PnJlZmNsa19pbmRleCk7CisJCXNwODEwLT5yZWZjbGsgPSBvZl9jbGtfcHJvdmlkZXJfZ2V0KHNw ODEwLT5ub2RlLAorCQkJCQkJICAgIHNwODEwLT5yZWZjbGtfaW5kZXgpOwogCiAJaWYgKCFzcDgx MC0+dGltY2xrKQotCQlzcDgxMC0+dGltY2xrID0gb2ZfY2xrX2dldChzcDgxMC0+bm9kZSwgc3A4 MTAtPnRpbWNsa19pbmRleCk7CisJCXNwODEwLT50aW1jbGsgPSBvZl9jbGtfcHJvdmlkZXJfZ2V0 KHNwODEwLT5ub2RlLAorCQkJCQkJICAgIHNwODEwLT50aW1jbGtfaW5kZXgpOwogCiAJaWYgKFdB Uk5fT04oSVNfRVJSKHNwODEwLT5yZWZjbGspIHx8IElTX0VSUihzcDgxMC0+dGltY2xrKSkpCiAJ CXJldHVybiAtRU5PRU5UOwogCiAJLyogU2VsZWN0IGZhc3Rlc3QgcGFyZW50ICovCi0JaWYgKGNs a19nZXRfcmF0ZShzcDgxMC0+cmVmY2xrKSA+IGNsa19nZXRfcmF0ZShzcDgxMC0+dGltY2xrKSkK KwlpZiAoY2xrX3Byb3ZpZGVyX2dldF9yYXRlKHNwODEwLT5yZWZjbGspID4gY2xrX3Byb3ZpZGVy X2dldF9yYXRlKHNwODEwLT50aW1jbGspKQogCQluZXdfcGFyZW50ID0gc3A4MTAtPnJlZmNsazsK IAllbHNlCiAJCW5ld19wYXJlbnQgPSBzcDgxMC0+dGltY2xrOwogCiAJLyogU3dpdGNoIHRoZSBw YXJlbnQgaWYgbmVjZXNzYXJ5ICovCiAJaWYgKG9sZF9wYXJlbnQgIT0gbmV3X3BhcmVudCkgewot CQljbGtfcHJlcGFyZShuZXdfcGFyZW50KTsKLQkJY2xrX3NldF9wYXJlbnQoaHctPmNsaywgbmV3 X3BhcmVudCk7Ci0JCWNsa191bnByZXBhcmUob2xkX3BhcmVudCk7CisJCWNsa19wcm92aWRlcl9w cmVwYXJlKG5ld19wYXJlbnQpOworCQljbGtfcHJvdmlkZXJfc2V0X3BhcmVudChody0+Y2xrLCBu ZXdfcGFyZW50KTsKKwkJY2xrX3Byb3ZpZGVyX3VucHJlcGFyZShvbGRfcGFyZW50KTsKIAl9CiAK IAlyZXR1cm4gMDsKQEAgLTExMiw4ICsxMTQsOCBAQCBzdGF0aWMgdm9pZCBjbGtfc3A4MTBfdGlt ZXJjbGtlbl91bnByZXBhcmUoc3RydWN0IGNsa19odyAqaHcpCiAJc3RydWN0IGNsa19zcDgxMF90 aW1lcmNsa2VuICp0aW1lcmNsa2VuID0gdG9fY2xrX3NwODEwX3RpbWVyY2xrZW4oaHcpOwogCXN0 cnVjdCBjbGtfc3A4MTAgKnNwODEwID0gdGltZXJjbGtlbi0+c3A4MTA7CiAKLQljbGtfcHV0KHNw ODEwLT50aW1jbGspOwotCWNsa19wdXQoc3A4MTAtPnJlZmNsayk7CisJX19jbGtfcHV0KHNwODEw LT50aW1jbGspOworCV9fY2xrX3B1dChzcDgxMC0+cmVmY2xrKTsKIH0KIAogc3RhdGljIGNvbnN0 IHN0cnVjdCBjbGtfb3BzIGNsa19zcDgxMF90aW1lcmNsa2VuX29wcyA9IHsKQEAgLTEyMyw3ICsx MjUsNyBAQCBzdGF0aWMgY29uc3Qgc3RydWN0IGNsa19vcHMgY2xrX3NwODEwX3RpbWVyY2xrZW5f b3BzID0gewogCS5zZXRfcGFyZW50ID0gY2xrX3NwODEwX3RpbWVyY2xrZW5fc2V0X3BhcmVudCwK IH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICpjbGtfc3A4MTBfdGltZXJjbGtlbl9vZl9nZXQoc3Ry dWN0IG9mX3BoYW5kbGVfYXJncyAqY2xrc3BlYywKK3N0YXRpYyBzdHJ1Y3QgY2xrX2NvcmUgKmNs a19zcDgxMF90aW1lcmNsa2VuX29mX2dldChzdHJ1Y3Qgb2ZfcGhhbmRsZV9hcmdzICpjbGtzcGVj LAogCQl2b2lkICpkYXRhKQogewogCXN0cnVjdCBjbGtfc3A4MTAgKnNwODEwID0gZGF0YTsKZGlm ZiAtLWdpdCBhL2RyaXZlcnMvY2xrL3ZlcnNhdGlsZS9jbGstdmVyc2F0aWxlLmMgYi9kcml2ZXJz L2Nsay92ZXJzYXRpbGUvY2xrLXZlcnNhdGlsZS5jCmluZGV4IGE3Njk4MWUuLjFiZGQ1NDIgMTAw NjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3ZlcnNhdGlsZS9jbGstdmVyc2F0aWxlLmMKKysrIGIvZHJp dmVycy9jbGsvdmVyc2F0aWxlL2Nsay12ZXJzYXRpbGUuYwpAQCAtOCw3ICs4LDYgQEAKICAqIHB1 Ymxpc2hlZCBieSB0aGUgRnJlZSBTb2Z0d2FyZSBGb3VuZGF0aW9uLgogICovCiAjaW5jbHVkZSA8 bGludXgvY2xrLXByb3ZpZGVyLmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8 bGludXgvY2xrZGV2Lmg+CiAjaW5jbHVkZSA8bGludXgvZXJyLmg+CiAjaW5jbHVkZSA8bGludXgv b2YuaD4KQEAgLTYwLDcgKzU5LDcgQEAgc3RhdGljIGNvbnN0IHN0cnVjdCBjbGtfaWNzdF9kZXNj IHZlcnNhdGlsZV9hdXhvc2NfZGVzYyBfX2luaXRjb25zdCA9IHsKIHN0YXRpYyB2b2lkIF9faW5p dCBjbV9vc2Nfc2V0dXAoc3RydWN0IGRldmljZV9ub2RlICpucCwKIAkJCQljb25zdCBzdHJ1Y3Qg Y2xrX2ljc3RfZGVzYyAqZGVzYykKIHsKLQlzdHJ1Y3QgY2xrICpjbGsgPSBFUlJfUFRSKC1FSU5W QUwpOworCXN0cnVjdCBjbGtfY29yZSAqY2xrID0gRVJSX1BUUigtRUlOVkFMKTsKIAljb25zdCBj aGFyICpjbGtfbmFtZSA9IG5wLT5uYW1lOwogCWNvbnN0IGNoYXIgKnBhcmVudF9uYW1lOwogCmRp ZmYgLS1naXQgYS9kcml2ZXJzL2Nsay92ZXJzYXRpbGUvY2xrLXZleHByZXNzLW9zYy5jIGIvZHJp dmVycy9jbGsvdmVyc2F0aWxlL2Nsay12ZXhwcmVzcy1vc2MuYwppbmRleCA1MjlhNTljLi5jOWUx NzVmIDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay92ZXJzYXRpbGUvY2xrLXZleHByZXNzLW9zYy5j CisrKyBiL2RyaXZlcnMvY2xrL3ZlcnNhdGlsZS9jbGstdmV4cHJlc3Mtb3NjLmMKQEAgLTczLDcg KzczLDcgQEAgc3RhdGljIGludCB2ZXhwcmVzc19vc2NfcHJvYmUoc3RydWN0IHBsYXRmb3JtX2Rl dmljZSAqcGRldikKIAlzdHJ1Y3QgY2xrX2xvb2t1cCAqY2wgPSBwZGV2LT5kZXYucGxhdGZvcm1f ZGF0YTsgLyogTm9uLURUIGxvb2t1cCAqLwogCXN0cnVjdCBjbGtfaW5pdF9kYXRhIGluaXQ7CiAJ c3RydWN0IHZleHByZXNzX29zYyAqb3NjOwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xr X2NvcmUgKmNsazsKIAl1MzIgcmFuZ2VbMl07CiAKIAlvc2MgPSBkZXZtX2t6YWxsb2MoJnBkZXYt PmRldiwgc2l6ZW9mKCpvc2MpLCBHRlBfS0VSTkVMKTsKZGlmZiAtLWdpdCBhL2RyaXZlcnMvY2xr L3ZlcnNhdGlsZS9jbGstdmV4cHJlc3MuYyBiL2RyaXZlcnMvY2xrL3ZlcnNhdGlsZS9jbGstdmV4 cHJlc3MuYwppbmRleCAyZDVlMWI0Li5lNzdmM2Q1IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay92 ZXJzYXRpbGUvY2xrLXZleHByZXNzLmMKKysrIGIvZHJpdmVycy9jbGsvdmVyc2F0aWxlL2Nsay12 ZXhwcmVzcy5jCkBAIC0xNyw3ICsxNyw3IEBACiAjaW5jbHVkZSA8bGludXgvZXJyLmg+CiAjaW5j bHVkZSA8bGludXgvdmV4cHJlc3MuaD4KIAotc3RhdGljIHN0cnVjdCBjbGsgKnZleHByZXNzX3Nw ODEwX3RpbWVyY2xrZW5bNF07CitzdGF0aWMgc3RydWN0IGNsa19jb3JlICp2ZXhwcmVzc19zcDgx MF90aW1lcmNsa2VuWzRdOwogc3RhdGljIERFRklORV9TUElOTE9DSyh2ZXhwcmVzc19zcDgxMF9s b2NrKTsKIAogc3RhdGljIHZvaWQgX19pbml0IHZleHByZXNzX3NwODEwX2luaXQodm9pZCBfX2lv bWVtICpiYXNlKQpAQCAtNTQsNyArNTQsNyBAQCBzdGF0aWMgY29uc3QgY2hhciAqIGNvbnN0IHZl eHByZXNzX2Nsa18yNG1oel9wZXJpcGhzW10gX19pbml0Y29uc3QgPSB7CiAKIHZvaWQgX19pbml0 IHZleHByZXNzX2Nsa19pbml0KHZvaWQgX19pb21lbSAqc3A4MTBfYmFzZSkKIHsKLQlzdHJ1Y3Qg Y2xrICpjbGs7CisJc3RydWN0IGNsa19jb3JlICpjbGs7CiAJaW50IGk7CiAKIAljbGsgPSBjbGtf cmVnaXN0ZXJfZml4ZWRfcmF0ZShOVUxMLCAiZHVtbXlfYXBiX3BjbGsiLCBOVUxMLApAQCAtNzcs NyArNzcsNyBAQCB2b2lkIF9faW5pdCB2ZXhwcmVzc19jbGtfaW5pdCh2b2lkIF9faW9tZW0gKnNw ODEwX2Jhc2UpCiAJdmV4cHJlc3Nfc3A4MTBfaW5pdChzcDgxMF9iYXNlKTsKIAogCWZvciAoaSA9 IDA7IGkgPCBBUlJBWV9TSVpFKHZleHByZXNzX3NwODEwX3RpbWVyY2xrZW4pOyBpKyspCi0JCVdB Uk5fT04oY2xrX3NldF9wYXJlbnQodmV4cHJlc3Nfc3A4MTBfdGltZXJjbGtlbltpXSwgY2xrKSk7 CisJCVdBUk5fT04oY2xrX3Byb3ZpZGVyX3NldF9wYXJlbnQodmV4cHJlc3Nfc3A4MTBfdGltZXJj bGtlbltpXSwgY2xrKSk7CiAKIAlXQVJOX09OKGNsa19yZWdpc3Rlcl9jbGtkZXYodmV4cHJlc3Nf c3A4MTBfdGltZXJjbGtlblswXSwKIAkJCQkidjJtLXRpbWVyMCIsICJzcDgwNCIpKTsKZGlmZiAt LWdpdCBhL2RyaXZlcnMvY2xrL3g4Ni9jbGstbHB0LmMgYi9kcml2ZXJzL2Nsay94ODYvY2xrLWxw dC5jCmluZGV4IDgxMmY4M2YuLmZiYjY4MDcgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xrL3g4Ni9j bGstbHB0LmMKKysrIGIvZHJpdmVycy9jbGsveDg2L2Nsay1scHQuYwpAQCAtMTAsNyArMTAsNiBA QAogICogcHVibGlzaGVkIGJ5IHRoZSBGcmVlIFNvZnR3YXJlIEZvdW5kYXRpb24uCiAgKi8KIAot I2luY2x1ZGUgPGxpbnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsa2Rldi5oPgogI2luY2x1 ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxpbnV4L2Vyci5oPgpAQCAtMjEs NyArMjAsNyBAQAogc3RhdGljIGludCBscHRfY2xrX3Byb2JlKHN0cnVjdCBwbGF0Zm9ybV9kZXZp Y2UgKnBkZXYpCiB7CiAJc3RydWN0IGxwc3NfY2xrX2RhdGEgKmRydmRhdGE7Ci0Jc3RydWN0IGNs ayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCiAJZHJ2ZGF0YSA9IGRldm1fa3phbGxv YygmcGRldi0+ZGV2LCBzaXplb2YoKmRydmRhdGEpLCBHRlBfS0VSTkVMKTsKIAlpZiAoIWRydmRh dGEpCmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay96eW5xL2Nsa2MuYyBiL2RyaXZlcnMvY2xrL3p5 bnEvY2xrYy5jCmluZGV4IDI0NmNmMTIuLjBlZmRkOWEgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvY2xr L3p5bnEvY2xrYy5jCisrKyBiL2RyaXZlcnMvY2xrL3p5bnEvY2xrYy5jCkBAIC02Nyw4ICs2Nyw4 IEBAIGVudW0genlucV9jbGsgewogCWkyYzBfYXBlciwgaTJjMV9hcGVyLCB1YXJ0MF9hcGVyLCB1 YXJ0MV9hcGVyLCBncGlvX2FwZXIsIGxxc3BpX2FwZXIsCiAJc21jX2FwZXIsIHN3ZHQsIGRiZ190 cmMsIGRiZ19hcGIsIGNsa19tYXh9OwogCi1zdGF0aWMgc3RydWN0IGNsayAqcHNfY2xrOwotc3Rh dGljIHN0cnVjdCBjbGsgKmNsa3NbY2xrX21heF07CitzdGF0aWMgc3RydWN0IGNsa19jb3JlICpw c19jbGs7CitzdGF0aWMgc3RydWN0IGNsa19jb3JlICpjbGtzW2Nsa19tYXhdOwogc3RhdGljIHN0 cnVjdCBjbGtfb25lY2VsbF9kYXRhIGNsa19kYXRhOwogCiBzdGF0aWMgREVGSU5FX1NQSU5MT0NL KGFybXBsbF9sb2NrKTsKQEAgLTEwOCw3ICsxMDgsNyBAQCBzdGF0aWMgdm9pZCBfX2luaXQgenlu cV9jbGtfcmVnaXN0ZXJfZmNsayhlbnVtIHp5bnFfY2xrIGZjbGssCiAJCWNvbnN0IGNoYXIgKmNs a19uYW1lLCB2b2lkIF9faW9tZW0gKmZjbGtfY3RybF9yZWcsCiAJCWNvbnN0IGNoYXIgKipwYXJl bnRzLCBpbnQgZW5hYmxlKQogewotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUg KmNsazsKIAl1MzIgZW5hYmxlX3JlZzsKIAljaGFyICptdXhfbmFtZTsKIAljaGFyICpkaXYwX25h bWU7CkBAIC0xNTQsNyArMTU0LDcgQEAgc3RhdGljIHZvaWQgX19pbml0IHp5bnFfY2xrX3JlZ2lz dGVyX2ZjbGsoZW51bSB6eW5xX2NsayBmY2xrLAogCQkJMCwgQ0xLX0dBVEVfU0VUX1RPX0RJU0FC TEUsIGZjbGtfZ2F0ZV9sb2NrKTsKIAllbmFibGVfcmVnID0gY2xrX3JlYWRsKGZjbGtfZ2F0ZV9y ZWcpICYgMTsKIAlpZiAoZW5hYmxlICYmICFlbmFibGVfcmVnKSB7Ci0JCWlmIChjbGtfcHJlcGFy ZV9lbmFibGUoY2xrc1tmY2xrXSkpCisJCWlmIChjbGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUo Y2xrc1tmY2xrXSkpCiAJCQlwcl93YXJuKCIlczogRkNMSyV1IGVuYWJsZSBmYWlsZWRcbiIsIF9f ZnVuY19fLAogCQkJCQlmY2xrIC0gZmNsazApOwogCX0KQEAgLTE4MSw3ICsxODEsNyBAQCBzdGF0 aWMgdm9pZCBfX2luaXQgenlucV9jbGtfcmVnaXN0ZXJfcGVyaXBoX2NsayhlbnVtIHp5bnFfY2xr IGNsazAsCiAJCWNvbnN0IGNoYXIgKmNsa19uYW1lMSwgdm9pZCBfX2lvbWVtICpjbGtfY3RybCwK IAkJY29uc3QgY2hhciAqKnBhcmVudHMsIHVuc2lnbmVkIGludCB0d29fZ2F0ZXMpCiB7Ci0Jc3Ry dWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCWNoYXIgKm11eF9uYW1lOwog CWNoYXIgKmRpdl9uYW1lOwogCXNwaW5sb2NrX3QgKmxvY2s7CkBAIC0yMjIsNyArMjIyLDcgQEAg c3RhdGljIHZvaWQgX19pbml0IHp5bnFfY2xrX3NldHVwKHN0cnVjdCBkZXZpY2Vfbm9kZSAqbnAp CiAJaW50IGk7CiAJdTMyIHRtcDsKIAlpbnQgcmV0OwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1 Y3QgY2xrX2NvcmUgKmNsazsKIAljaGFyICpjbGtfbmFtZTsKIAl1bnNpZ25lZCBpbnQgZmNsa19l bmFibGUgPSAwOwogCWNvbnN0IGNoYXIgKmNsa19vdXRwdXRfbmFtZVtjbGtfbWF4XTsKQEAgLTMz MywxMyArMzMzLDEzIEBAIHN0YXRpYyB2b2lkIF9faW5pdCB6eW5xX2Nsa19zZXR1cChzdHJ1Y3Qg ZGV2aWNlX25vZGUgKm5wKQogCQkJQ0xLX0RJVklERVJfQUxMT1dfWkVSTywgJmRkcmNsa19sb2Nr KTsKIAljbGtzW2RkcjJ4XSA9IGNsa19yZWdpc3Rlcl9nYXRlKE5VTEwsIGNsa19vdXRwdXRfbmFt ZVtkZHIyeF0sCiAJCQkiZGRyMnhfZGl2IiwgMCwgU0xDUl9ERFJfQ0xLX0NUUkwsIDEsIDAsICZk ZHJjbGtfbG9jayk7Ci0JY2xrX3ByZXBhcmVfZW5hYmxlKGNsa3NbZGRyMnhdKTsKKwljbGtfcHJv dmlkZXJfcHJlcGFyZV9lbmFibGUoY2xrc1tkZHIyeF0pOwogCWNsayA9IGNsa19yZWdpc3Rlcl9k aXZpZGVyKE5VTEwsICJkZHIzeF9kaXYiLCAiZGRycGxsIiwgMCwKIAkJCVNMQ1JfRERSX0NMS19D VFJMLCAyMCwgNiwgQ0xLX0RJVklERVJfT05FX0JBU0VEIHwKIAkJCUNMS19ESVZJREVSX0FMTE9X X1pFUk8sICZkZHJjbGtfbG9jayk7CiAJY2xrc1tkZHIzeF0gPSBjbGtfcmVnaXN0ZXJfZ2F0ZShO VUxMLCBjbGtfb3V0cHV0X25hbWVbZGRyM3hdLAogCQkJImRkcjN4X2RpdiIsIDAsIFNMQ1JfRERS X0NMS19DVFJMLCAwLCAwLCAmZGRyY2xrX2xvY2spOwotCWNsa19wcmVwYXJlX2VuYWJsZShjbGtz W2RkcjN4XSk7CisJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsa3NbZGRyM3hdKTsKIAog CWNsayA9IGNsa19yZWdpc3Rlcl9kaXZpZGVyKE5VTEwsICJkY2lfZGl2MCIsICJkZHJwbGwiLCAw LAogCQkJU0xDUl9EQ0lfQ0xLX0NUUkwsIDgsIDYsIENMS19ESVZJREVSX09ORV9CQVNFRCB8CkBA IC0zNTEsNyArMzUxLDcgQEAgc3RhdGljIHZvaWQgX19pbml0IHp5bnFfY2xrX3NldHVwKHN0cnVj dCBkZXZpY2Vfbm9kZSAqbnApCiAJY2xrc1tkY2ldID0gY2xrX3JlZ2lzdGVyX2dhdGUoTlVMTCwg Y2xrX291dHB1dF9uYW1lW2RjaV0sICJkY2lfZGl2MSIsCiAJCQlDTEtfU0VUX1JBVEVfUEFSRU5U LCBTTENSX0RDSV9DTEtfQ1RSTCwgMCwgMCwKIAkJCSZkY2ljbGtfbG9jayk7Ci0JY2xrX3ByZXBh cmVfZW5hYmxlKGNsa3NbZGNpXSk7CisJY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsa3Nb ZGNpXSk7CiAKIAkvKiBQZXJpcGhlcmFsIGNsb2NrcyAqLwogCWZvciAoaSA9IGZjbGswOyBpIDw9 IGZjbGszOyBpKyspIHsKQEAgLTUwNSwxMCArNTA1LDEwIEBAIHN0YXRpYyB2b2lkIF9faW5pdCB6 eW5xX2Nsa19zZXR1cChzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wKQogCS8qIGxlYXZlIGRlYnVnIGNs b2NrcyBpbiB0aGUgc3RhdGUgdGhlIGJvb3Rsb2FkZXIgc2V0IHRoZW0gdXAgdG8gKi8KIAl0bXAg PSBjbGtfcmVhZGwoU0xDUl9EQkdfQ0xLX0NUUkwpOwogCWlmICh0bXAgJiBEQkdfQ0xLX0NUUkxf Q0xLQUNUX1RSQykKLQkJaWYgKGNsa19wcmVwYXJlX2VuYWJsZShjbGtzW2RiZ190cmNdKSkKKwkJ aWYgKGNsa19wcm92aWRlcl9wcmVwYXJlX2VuYWJsZShjbGtzW2RiZ190cmNdKSkKIAkJCXByX3dh cm4oIiVzOiB0cmFjZSBjbGsgZW5hYmxlIGZhaWxlZFxuIiwgX19mdW5jX18pOwogCWlmICh0bXAg JiBEQkdfQ0xLX0NUUkxfQ1BVXzFYQ0xLQUNUKQotCQlpZiAoY2xrX3ByZXBhcmVfZW5hYmxlKGNs a3NbZGJnX2FwYl0pKQorCQlpZiAoY2xrX3Byb3ZpZGVyX3ByZXBhcmVfZW5hYmxlKGNsa3NbZGJn X2FwYl0pKQogCQkJcHJfd2FybigiJXM6IGRlYnVnIEFQQiBjbGsgZW5hYmxlIGZhaWxlZFxuIiwg X19mdW5jX18pOwogCiAJLyogT25lIGdhdGVkIGNsb2NrIGZvciBhbGwgQVBFUiBjbG9ja3MuICov CmRpZmYgLS1naXQgYS9kcml2ZXJzL2Nsay96eW5xL3BsbC5jIGIvZHJpdmVycy9jbGsvenlucS9w bGwuYwppbmRleCBjZWM5NzU5Li41MTc2ZjY1IDEwMDY0NAotLS0gYS9kcml2ZXJzL2Nsay96eW5x L3BsbC5jCisrKyBiL2RyaXZlcnMvY2xrL3p5bnEvcGxsLmMKQEAgLTE5MywxMiArMTkzLDEyIEBA IHN0YXRpYyBjb25zdCBzdHJ1Y3QgY2xrX29wcyB6eW5xX3BsbF9vcHMgPSB7CiAgKiBAbG9jawlS ZWdpc3RlciBsb2NrCiAgKiBSZXR1cm5zIGhhbmRsZSB0byB0aGUgcmVnaXN0ZXJlZCBjbG9jay4K ICAqLwotc3RydWN0IGNsayAqY2xrX3JlZ2lzdGVyX3p5bnFfcGxsKGNvbnN0IGNoYXIgKm5hbWUs IGNvbnN0IGNoYXIgKnBhcmVudCwKK3N0cnVjdCBjbGtfY29yZSAqY2xrX3JlZ2lzdGVyX3p5bnFf cGxsKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudCwKIAkJdm9pZCBfX2lvbWVt ICpwbGxfY3RybCwgdm9pZCBfX2lvbWVtICpwbGxfc3RhdHVzLCB1OCBsb2NrX2luZGV4LAogCQlz cGlubG9ja190ICpsb2NrKQogewogCXN0cnVjdCB6eW5xX3BsbCAqcGxsOwotCXN0cnVjdCBjbGsg KmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAl1MzIgcmVnOwogCWNvbnN0IGNoYXIgKnBh cmVudF9hcnJbMV0gPSB7cGFyZW50fTsKIAl1bnNpZ25lZCBsb25nIGZsYWdzID0gMDsKZGlmZiAt LWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9tc20vaGRtaS9oZG1pX3BoeV84OTYwLmMgYi9kcml2ZXJz L2dwdS9kcm0vbXNtL2hkbWkvaGRtaV9waHlfODk2MC5jCmluZGV4IDkwMmQ3NjguLjhlOTc3MDIg MTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9tc20vaGRtaS9oZG1pX3BoeV84OTYwLmMKKysr IGIvZHJpdmVycy9ncHUvZHJtL21zbS9oZG1pL2hkbWlfcGh5Xzg5NjAuYwpAQCAtMTUsNyArMTUs NiBAQAogICogdGhpcyBwcm9ncmFtLiAgSWYgbm90LCBzZWUgPGh0dHA6Ly93d3cuZ251Lm9yZy9s aWNlbnNlcy8+LgogICovCiAKLSNpbmNsdWRlIDxsaW51eC9jbGsuaD4KICNpbmNsdWRlIDxsaW51 eC9jbGstcHJvdmlkZXIuaD4KIAogI2luY2x1ZGUgImhkbWkuaCIKQEAgLTI0LDcgKzIzLDcgQEAg c3RydWN0IGhkbWlfcGh5Xzg5NjAgewogCXN0cnVjdCBoZG1pX3BoeSBiYXNlOwogCXN0cnVjdCBo ZG1pICpoZG1pOwogCXN0cnVjdCBjbGtfaHcgcGxsX2h3OwotCXN0cnVjdCBjbGsgKnBsbDsKKwlz dHJ1Y3QgY2xrX2NvcmUgKnBsbDsKIAl1bnNpZ25lZCBsb25nIHBpeGNsazsKIH07CiAjZGVmaW5l IHRvX2hkbWlfcGh5Xzg5NjAoeCkgY29udGFpbmVyX29mKHgsIHN0cnVjdCBoZG1pX3BoeV84OTYw LCBiYXNlKQpkaWZmIC0tZ2l0IGEvZHJpdmVycy9tZWRpYS9wbGF0Zm9ybS9leHlub3M0LWlzL21l ZGlhLWRldi5jIGIvZHJpdmVycy9tZWRpYS9wbGF0Zm9ybS9leHlub3M0LWlzL21lZGlhLWRldi5j CmluZGV4IDI2MjBjNDguLjJmZGFkZDggMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvbWVkaWEvcGxhdGZv cm0vZXh5bm9zNC1pcy9tZWRpYS1kZXYuYworKysgYi9kcml2ZXJzL21lZGlhL3BsYXRmb3JtL2V4 eW5vczQtaXMvbWVkaWEtZGV2LmMKQEAgLTExLDcgKzExLDYgQEAKICAqLwogCiAjaW5jbHVkZSA8 bGludXgvYnVnLmg+Ci0jaW5jbHVkZSA8bGludXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvY2xr LXByb3ZpZGVyLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrZGV2Lmg+CiAjaW5jbHVkZSA8bGludXgv ZGV2aWNlLmg+CkBAIC0yMTUsNyArMjE0LDcgQEAgc3RhdGljIGludCBfX2ZpbWNfcGlwZWxpbmVf b3BlbihzdHJ1Y3QgZXh5bm9zX21lZGlhX3BpcGVsaW5lICplcCwKIAogCS8qIERpc2FibGUgUFhM QVNZTkMgY2xvY2sgaWYgdGhpcyBwaXBlbGluZSBpbmNsdWRlcyBGSU1DLUlTICovCiAJaWYgKCFJ U19FUlIoZm1kLT53YmNsa1tDTEtfSURYX1dCX0JdKSAmJiBwLT5zdWJkZXZzW0lEWF9JU19JU1Bd KSB7Ci0JCXJldCA9IGNsa19wcmVwYXJlX2VuYWJsZShmbWQtPndiY2xrW0NMS19JRFhfV0JfQl0p OworCQlyZXQgPSBjbGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUoZm1kLT53YmNsa1tDTEtfSURY X1dCX0JdKTsKIAkJaWYgKHJldCA8IDApCiAJCQlyZXR1cm4gcmV0OwogCX0KQEAgLTIyNSw3ICsy MjQsNyBAQCBzdGF0aWMgaW50IF9fZmltY19waXBlbGluZV9vcGVuKHN0cnVjdCBleHlub3NfbWVk aWFfcGlwZWxpbmUgKmVwLAogCQlyZXR1cm4gMDsKIAogCWlmICghSVNfRVJSKGZtZC0+d2JjbGtb Q0xLX0lEWF9XQl9CXSkgJiYgcC0+c3ViZGV2c1tJRFhfSVNfSVNQXSkKLQkJY2xrX2Rpc2FibGVf dW5wcmVwYXJlKGZtZC0+d2JjbGtbQ0xLX0lEWF9XQl9CXSk7CisJCWNsa19wcm92aWRlcl9kaXNh YmxlX3VucHJlcGFyZShmbWQtPndiY2xrW0NMS19JRFhfV0JfQl0pOwogCiAJcmV0dXJuIHJldDsK IH0KQEAgLTI1NCw3ICsyNTMsNyBAQCBzdGF0aWMgaW50IF9fZmltY19waXBlbGluZV9jbG9zZShz dHJ1Y3QgZXh5bm9zX21lZGlhX3BpcGVsaW5lICplcCkKIAogCS8qIERpc2FibGUgUFhMQVNZTkMg Y2xvY2sgaWYgdGhpcyBwaXBlbGluZSBpbmNsdWRlcyBGSU1DLUlTICovCiAJaWYgKCFJU19FUlIo Zm1kLT53YmNsa1tDTEtfSURYX1dCX0JdKSAmJiBwLT5zdWJkZXZzW0lEWF9JU19JU1BdKQotCQlj bGtfZGlzYWJsZV91bnByZXBhcmUoZm1kLT53YmNsa1tDTEtfSURYX1dCX0JdKTsKKwkJY2xrX3By b3ZpZGVyX2Rpc2FibGVfdW5wcmVwYXJlKGZtZC0+d2JjbGtbQ0xLX0lEWF9XQl9CXSk7CiAKIAly ZXR1cm4gcmV0ID09IC1FTlhJTyA/IDAgOiByZXQ7CiB9CkBAIC05NTQsNyArOTUzLDcgQEAgc3Rh dGljIHZvaWQgZmltY19tZF9wdXRfY2xvY2tzKHN0cnVjdCBmaW1jX21kICpmbWQpCiAJd2hpbGUg KC0taSA+PSAwKSB7CiAJCWlmIChJU19FUlIoZm1kLT5jYW1jbGtbaV0uY2xvY2spKQogCQkJY29u dGludWU7Ci0JCWNsa19wdXQoZm1kLT5jYW1jbGtbaV0uY2xvY2spOworCQlfX2Nsa19wdXQoZm1k LT5jYW1jbGtbaV0uY2xvY2spOwogCQlmbWQtPmNhbWNsa1tpXS5jbG9jayA9IEVSUl9QVFIoLUVJ TlZBTCk7CiAJfQogCkBAIC05NjIsNyArOTYxLDcgQEAgc3RhdGljIHZvaWQgZmltY19tZF9wdXRf Y2xvY2tzKHN0cnVjdCBmaW1jX21kICpmbWQpCiAJZm9yIChpID0gMDsgaSA8IEZJTUNfTUFYX1dC Q0xLUzsgaSsrKSB7CiAJCWlmIChJU19FUlIoZm1kLT53YmNsa1tpXSkpCiAJCQljb250aW51ZTsK LQkJY2xrX3B1dChmbWQtPndiY2xrW2ldKTsKKwkJX19jbGtfcHV0KGZtZC0+d2JjbGtbaV0pOwog CQlmbWQtPndiY2xrW2ldID0gRVJSX1BUUigtRUlOVkFMKTsKIAl9CiB9CkBAIC05NzEsNyArOTcw LDcgQEAgc3RhdGljIGludCBmaW1jX21kX2dldF9jbG9ja3Moc3RydWN0IGZpbWNfbWQgKmZtZCkK IHsKIAlzdHJ1Y3QgZGV2aWNlICpkZXYgPSAmZm1kLT5wZGV2LT5kZXY7CiAJY2hhciBjbGtfbmFt ZVszMl07Ci0Jc3RydWN0IGNsayAqY2xvY2s7CisJc3RydWN0IGNsa19jb3JlICpjbG9jazsKIAlp bnQgaSwgcmV0ID0gMDsKIAogCWZvciAoaSA9IDA7IGkgPCBGSU1DX01BWF9DQU1DTEtTOyBpKysp CkBAIC05NzksNyArOTc4LDcgQEAgc3RhdGljIGludCBmaW1jX21kX2dldF9jbG9ja3Moc3RydWN0 IGZpbWNfbWQgKmZtZCkKIAogCWZvciAoaSA9IDA7IGkgPCBGSU1DX01BWF9DQU1DTEtTOyBpKysp IHsKIAkJc25wcmludGYoY2xrX25hbWUsIHNpemVvZihjbGtfbmFtZSksICJzY2xrX2NhbSV1Iiwg aSk7Ci0JCWNsb2NrID0gY2xrX2dldChkZXYsIGNsa19uYW1lKTsKKwkJY2xvY2sgPSBjbGtfcHJv dmlkZXJfZ2V0KGRldiwgY2xrX25hbWUpOwogCiAJCWlmIChJU19FUlIoY2xvY2spKSB7CiAJCQlk ZXZfZXJyKGRldiwgIkZhaWxlZCB0byBnZXQgY2xvY2s6ICVzXG4iLCBjbGtfbmFtZSk7CkBAIC0x MDAxLDcgKzEwMDAsNyBAQCBzdGF0aWMgaW50IGZpbWNfbWRfZ2V0X2Nsb2NrcyhzdHJ1Y3QgZmlt Y19tZCAqZm1kKQogCiAJZm9yIChpID0gQ0xLX0lEWF9XQl9COyBpIDwgRklNQ19NQVhfV0JDTEtT OyBpKyspIHsKIAkJc25wcmludGYoY2xrX25hbWUsIHNpemVvZihjbGtfbmFtZSksICJweGxfYXN5 bmMldSIsIGkpOwotCQljbG9jayA9IGNsa19nZXQoZGV2LCBjbGtfbmFtZSk7CisJCWNsb2NrID0g Y2xrX3Byb3ZpZGVyX2dldChkZXYsIGNsa19uYW1lKTsKIAkJaWYgKElTX0VSUihjbG9jaykpIHsK IAkJCXY0bDJfZXJyKCZmbWQtPnY0bDJfZGV2LCAiRmFpbGVkIHRvIGdldCBjbG9jazogJXNcbiIs CiAJCQkJICBjbGtfbmFtZSk7CmRpZmYgLS1naXQgYS9kcml2ZXJzL21lZGlhL3BsYXRmb3JtL2V4 eW5vczQtaXMvbWVkaWEtZGV2LmggYi9kcml2ZXJzL21lZGlhL3BsYXRmb3JtL2V4eW5vczQtaXMv bWVkaWEtZGV2LmgKaW5kZXggMDMyMTQ1NC4uZjI0ZGFjNiAxMDA2NDQKLS0tIGEvZHJpdmVycy9t ZWRpYS9wbGF0Zm9ybS9leHlub3M0LWlzL21lZGlhLWRldi5oCisrKyBiL2RyaXZlcnMvbWVkaWEv cGxhdGZvcm0vZXh5bm9zNC1pcy9tZWRpYS1kZXYuaApAQCAtOSw3ICs5LDYgQEAKICNpZm5kZWYg RklNQ19NREVWSUNFX0hfCiAjZGVmaW5lIEZJTUNfTURFVklDRV9IXwogCi0jaW5jbHVkZSA8bGlu dXgvY2xrLmg+CiAjaW5jbHVkZSA8bGludXgvY2xrLXByb3ZpZGVyLmg+CiAjaW5jbHVkZSA8bGlu dXgvcGxhdGZvcm1fZGV2aWNlLmg+CiAjaW5jbHVkZSA8bGludXgvbXV0ZXguaD4KQEAgLTcyLDcg KzcxLDcgQEAgc3RydWN0IGZpbWNfY3Npc19pbmZvIHsKIH07CiAKIHN0cnVjdCBmaW1jX2NhbWNs a19pbmZvIHsKLQlzdHJ1Y3QgY2xrICpjbG9jazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsb2NrOwog CWludCB1c2VfY291bnQ7CiAJdW5zaWduZWQgbG9uZyBmcmVxdWVuY3k7CiB9OwpAQCAtMTI0LDcg KzEyMyw3IEBAIHN0cnVjdCBmaW1jX21kIHsKIAlzdHJ1Y3QgZmltY19zZW5zb3JfaW5mbyBzZW5z b3JbRklNQ19NQVhfU0VOU09SU107CiAJaW50IG51bV9zZW5zb3JzOwogCXN0cnVjdCBmaW1jX2Nh bWNsa19pbmZvIGNhbWNsa1tGSU1DX01BWF9DQU1DTEtTXTsKLQlzdHJ1Y3QgY2xrICp3YmNsa1tG SU1DX01BWF9XQkNMS1NdOworCXN0cnVjdCBjbGtfY29yZSAqd2JjbGtbRklNQ19NQVhfV0JDTEtT XTsKIAlzdHJ1Y3QgZmltY19saXRlICpmaW1jX2xpdGVbRklNQ19MSVRFX01BWF9ERVZTXTsKIAlz dHJ1Y3QgZmltY19kZXYgKmZpbWNbRklNQ19NQVhfREVWU107CiAJc3RydWN0IGZpbWNfaXMgKmZp bWNfaXM7CkBAIC0xNDEsNyArMTQwLDcgQEAgc3RydWN0IGZpbWNfbWQgewogCX0gcGluY3RsOwog CiAJc3RydWN0IGNhbV9jbGtfcHJvdmlkZXIgewotCQlzdHJ1Y3QgY2xrICpjbGtzW0ZJTUNfTUFY X0NBTUNMS1NdOworCQlzdHJ1Y3QgY2xrX2NvcmUgKmNsa3NbRklNQ19NQVhfQ0FNQ0xLU107CiAJ CXN0cnVjdCBjbGtfb25lY2VsbF9kYXRhIGNsa19kYXRhOwogCQlzdHJ1Y3QgZGV2aWNlX25vZGUg Km9mX25vZGU7CiAJCXN0cnVjdCBjYW1fY2xrIGNhbWNsa1tGSU1DX01BWF9DQU1DTEtTXTsKZGlm ZiAtLWdpdCBhL2RyaXZlcnMvbWVkaWEvcGxhdGZvcm0vb21hcDNpc3AvaXNwLmggYi9kcml2ZXJz L21lZGlhL3BsYXRmb3JtL29tYXAzaXNwL2lzcC5oCmluZGV4IDJjMzE0ZWUuLjVmY2VkZDYgMTAw NjQ0Ci0tLSBhL2RyaXZlcnMvbWVkaWEvcGxhdGZvcm0vb21hcDNpc3AvaXNwLmgKKysrIGIvZHJp dmVycy9tZWRpYS9wbGF0Zm9ybS9vbWFwM2lzcC9pc3AuaApAQCAtMTMzLDcgKzEzMyw3IEBAIHN0 cnVjdCBpc3BfeGNsayB7CiAJc3RydWN0IGlzcF9kZXZpY2UgKmlzcDsKIAlzdHJ1Y3QgY2xrX2h3 IGh3OwogCXN0cnVjdCBjbGtfbG9va3VwICpsb29rdXA7Ci0Jc3RydWN0IGNsayAqY2xrOworCXN0 cnVjdCBjbGtfY29yZSAqY2xrOwogCWVudW0gaXNwX3hjbGtfaWQgaWQ7CiAKIAlzcGlubG9ja190 IGxvY2s7CS8qIFByb3RlY3RzIGVuYWJsZWQgYW5kIGRpdmlkZXIgKi8KZGlmZiAtLWdpdCBhL2Ry aXZlcnMvcnRjL3J0Yy1oeW04NTYzLmMgYi9kcml2ZXJzL3J0Yy9ydGMtaHltODU2My5jCmluZGV4 IGI5MzZiYjQuLmVhMjFiZDEgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvcnRjL3J0Yy1oeW04NTYzLmMK KysrIGIvZHJpdmVycy9ydGMvcnRjLWh5bTg1NjMuYwpAQCAtMzk4LDExICszOTgsMTEgQEAgc3Rh dGljIGNvbnN0IHN0cnVjdCBjbGtfb3BzIGh5bTg1NjNfY2xrb3V0X29wcyA9IHsKIAkuc2V0X3Jh dGUgPSBoeW04NTYzX2Nsa291dF9zZXRfcmF0ZSwKIH07CiAKLXN0YXRpYyBzdHJ1Y3QgY2xrICpo eW04NTYzX2Nsa291dF9yZWdpc3Rlcl9jbGsoc3RydWN0IGh5bTg1NjMgKmh5bTg1NjMpCitzdGF0 aWMgc3RydWN0IGNsa19jb3JlICpoeW04NTYzX2Nsa291dF9yZWdpc3Rlcl9jbGsoc3RydWN0IGh5 bTg1NjMgKmh5bTg1NjMpCiB7CiAJc3RydWN0IGkyY19jbGllbnQgKmNsaWVudCA9IGh5bTg1NjMt PmNsaWVudDsKIAlzdHJ1Y3QgZGV2aWNlX25vZGUgKm5vZGUgPSBjbGllbnQtPmRldi5vZl9ub2Rl OwotCXN0cnVjdCBjbGsgKmNsazsKKwlzdHJ1Y3QgY2xrX2NvcmUgKmNsazsKIAlzdHJ1Y3QgY2xr X2luaXRfZGF0YSBpbml0OwogCWludCByZXQ7CiAKZGlmZiAtLWdpdCBhL2RyaXZlcnMvc3RhZ2lu Zy9pbXgtZHJtL2lteC10dmUuYyBiL2RyaXZlcnMvc3RhZ2luZy9pbXgtZHJtL2lteC10dmUuYwpp bmRleCBjNjI4ZmNkLi40NTgxNzBiIDEwMDY0NAotLS0gYS9kcml2ZXJzL3N0YWdpbmcvaW14LWRy bS9pbXgtdHZlLmMKKysrIGIvZHJpdmVycy9zdGFnaW5nL2lteC1kcm0vaW14LXR2ZS5jCkBAIC0x OCw3ICsxOCw2IEBACiAgKiBNQSAwMjExMC0xMzAxLCBVU0EuCiAgKi8KIAotI2luY2x1ZGUgPGxp bnV4L2Nsay5oPgogI2luY2x1ZGUgPGxpbnV4L2Nsay1wcm92aWRlci5oPgogI2luY2x1ZGUgPGxp bnV4L2NvbXBvbmVudC5oPgogI2luY2x1ZGUgPGxpbnV4L21vZHVsZS5oPgpAQCAtMTIxLDEwICsx MjAsMTAgQEAgc3RydWN0IGlteF90dmUgewogCXN0cnVjdCByZWdtYXAgKnJlZ21hcDsKIAlzdHJ1 Y3QgcmVndWxhdG9yICpkYWNfcmVnOwogCXN0cnVjdCBpMmNfYWRhcHRlciAqZGRjOwotCXN0cnVj dCBjbGsgKmNsazsKLQlzdHJ1Y3QgY2xrICpkaV9zZWxfY2xrOworCXN0cnVjdCBjbGtfY29yZSAq Y2xrOworCXN0cnVjdCBjbGtfY29yZSAqZGlfc2VsX2NsazsKIAlzdHJ1Y3QgY2xrX2h3IGNsa19o d19kaTsKLQlzdHJ1Y3QgY2xrICpkaV9jbGs7CisJc3RydWN0IGNsa19jb3JlICpkaV9jbGs7CiAJ aW50IHZzeW5jX3BpbjsKIAlpbnQgaHN5bmNfcGluOwogfTsKQEAgLTE0OSw3ICsxNDgsNyBAQCBz dGF0aWMgdm9pZCB0dmVfZW5hYmxlKHN0cnVjdCBpbXhfdHZlICp0dmUpCiAKIAlpZiAoIXR2ZS0+ ZW5hYmxlZCkgewogCQl0dmUtPmVuYWJsZWQgPSB0cnVlOwotCQljbGtfcHJlcGFyZV9lbmFibGUo dHZlLT5jbGspOworCQljbGtfcHJvdmlkZXJfcHJlcGFyZV9lbmFibGUodHZlLT5jbGspOwogCQly ZXQgPSByZWdtYXBfdXBkYXRlX2JpdHModHZlLT5yZWdtYXAsIFRWRV9DT01fQ09ORl9SRUcsCiAJ CQkJCSBUVkVfSVBVX0NMS19FTiB8IFRWRV9FTiwKIAkJCQkJIFRWRV9JUFVfQ0xLX0VOIHwgVFZF X0VOKTsKQEAgLTE3Niw3ICsxNzUsNyBAQCBzdGF0aWMgdm9pZCB0dmVfZGlzYWJsZShzdHJ1Y3Qg aW14X3R2ZSAqdHZlKQogCQl0dmUtPmVuYWJsZWQgPSBmYWxzZTsKIAkJcmV0ID0gcmVnbWFwX3Vw ZGF0ZV9iaXRzKHR2ZS0+cmVnbWFwLCBUVkVfQ09NX0NPTkZfUkVHLAogCQkJCQkgVFZFX0lQVV9D TEtfRU4gfCBUVkVfRU4sIDApOwotCQljbGtfZGlzYWJsZV91bnByZXBhcmUodHZlLT5jbGspOwor CQljbGtfcHJvdmlkZXJfZGlzYWJsZV91bnByZXBhcmUodHZlLT5jbGspOwogCX0KIH0KIApAQCAt MjUxLDEyICsyNTAsMTIgQEAgc3RhdGljIGludCBpbXhfdHZlX2Nvbm5lY3Rvcl9tb2RlX3ZhbGlk KHN0cnVjdCBkcm1fY29ubmVjdG9yICpjb25uZWN0b3IsCiAJdW5zaWduZWQgbG9uZyByYXRlOwog CiAJLyogcGl4ZWwgY2xvY2sgd2l0aCAyeCBvdmVyc2FtcGxpbmcgKi8KLQlyYXRlID0gY2xrX3Jv dW5kX3JhdGUodHZlLT5jbGssIDIwMDBVTCAqIG1vZGUtPmNsb2NrKSAvIDIwMDA7CisJcmF0ZSA9 IGNsa19wcm92aWRlcl9yb3VuZF9yYXRlKHR2ZS0+Y2xrLCAyMDAwVUwgKiBtb2RlLT5jbG9jaykg LyAyMDAwOwogCWlmIChyYXRlID09IG1vZGUtPmNsb2NrKQogCQlyZXR1cm4gTU9ERV9PSzsKIAog CS8qIHBpeGVsIGNsb2NrIHdpdGhvdXQgb3ZlcnNhbXBsaW5nICovCi0JcmF0ZSA9IGNsa19yb3Vu ZF9yYXRlKHR2ZS0+Y2xrLCAxMDAwVUwgKiBtb2RlLT5jbG9jaykgLyAxMDAwOworCXJhdGUgPSBj bGtfcHJvdmlkZXJfcm91bmRfcmF0ZSh0dmUtPmNsaywgMTAwMFVMICogbW9kZS0+Y2xvY2spIC8g MTAwMDsKIAlpZiAocmF0ZSA9PSBtb2RlLT5jbG9jaykKIAkJcmV0dXJuIE1PREVfT0s7CiAKQEAg LTMyNSwxMyArMzI0LDEzIEBAIHN0YXRpYyB2b2lkIGlteF90dmVfZW5jb2Rlcl9tb2RlX3NldChz dHJ1Y3QgZHJtX2VuY29kZXIgKmVuY29kZXIsCiAJICogYW5kIGVuYWJsZSA0eCBvdmVyc2FtcGxp bmcgZm9yIGxvd2VyIHJlc29sdXRpb25zCiAJICovCiAJcmF0ZSA9IDIwMDBVTCAqIG1vZGUtPmNs b2NrOwotCWNsa19zZXRfcmF0ZSh0dmUtPmNsaywgcmF0ZSk7Ci0Jcm91bmRlZF9yYXRlID0gY2xr X2dldF9yYXRlKHR2ZS0+Y2xrKTsKKwljbGtfcHJvdmlkZXJfc2V0X3JhdGUodHZlLT5jbGssIHJh dGUpOworCXJvdW5kZWRfcmF0ZSA9IGNsa19wcm92aWRlcl9nZXRfcmF0ZSh0dmUtPmNsayk7CiAJ aWYgKHJvdW5kZWRfcmF0ZSA+PSByYXRlKQogCQlkaXYgPSAyOwotCWNsa19zZXRfcmF0ZSh0dmUt PmRpX2Nsaywgcm91bmRlZF9yYXRlIC8gZGl2KTsKKwljbGtfcHJvdmlkZXJfc2V0X3JhdGUodHZl LT5kaV9jbGssIHJvdW5kZWRfcmF0ZSAvIGRpdik7CiAKLQlyZXQgPSBjbGtfc2V0X3BhcmVudCh0 dmUtPmRpX3NlbF9jbGssIHR2ZS0+ZGlfY2xrKTsKKwlyZXQgPSBjbGtfcHJvdmlkZXJfc2V0X3Bh cmVudCh0dmUtPmRpX3NlbF9jbGssIHR2ZS0+ZGlfY2xrKTsKIAlpZiAocmV0IDwgMCkgewogCQlk ZXZfZXJyKHR2ZS0+ZGV2LCAiZmFpbGVkIHRvIHNldCBkaV9zZWwgcGFyZW50IHRvIHR2ZV9kaTog JWRcbiIsCiAJCQlyZXQpOwpAQCAtNjQzLDcgKzY0Miw3IEBAIHN0YXRpYyBpbnQgaW14X3R2ZV9i aW5kKHN0cnVjdCBkZXZpY2UgKmRldiwgc3RydWN0IGRldmljZSAqbWFzdGVyLCB2b2lkICpkYXRh KQogCQkJcmV0dXJuIHJldDsKIAl9CiAKLQl0dmUtPmNsayA9IGRldm1fY2xrX2dldChkZXYsICJ0 dmUiKTsKKwl0dmUtPmNsayA9IGRldm1fY2xrX3Byb3ZpZGVyX2dldChkZXYsICJ0dmUiKTsKIAlp ZiAoSVNfRVJSKHR2ZS0+Y2xrKSkgewogCQlkZXZfZXJyKGRldiwgImZhaWxlZCB0byBnZXQgaGln aCBzcGVlZCB0dmUgY2xvY2s6ICVsZFxuIiwKIAkJCVBUUl9FUlIodHZlLT5jbGspKTsKQEAgLTY1 MSw3ICs2NTAsNyBAQCBzdGF0aWMgaW50IGlteF90dmVfYmluZChzdHJ1Y3QgZGV2aWNlICpkZXYs IHN0cnVjdCBkZXZpY2UgKm1hc3Rlciwgdm9pZCAqZGF0YSkKIAl9CiAKIAkvKiB0aGlzIGlzIHRo ZSBJUFUgREkgY2xvY2sgaW5wdXQgc2VsZWN0b3IsIGNhbiBiZSBwYXJlbnRlZCB0byB0dmVfZGkg Ki8KLQl0dmUtPmRpX3NlbF9jbGsgPSBkZXZtX2Nsa19nZXQoZGV2LCAiZGlfc2VsIik7CisJdHZl LT5kaV9zZWxfY2xrID0gZGV2bV9jbGtfcHJvdmlkZXJfZ2V0KGRldiwgImRpX3NlbCIpOwogCWlm IChJU19FUlIodHZlLT5kaV9zZWxfY2xrKSkgewogCQlkZXZfZXJyKGRldiwgImZhaWxlZCB0byBn ZXQgaXB1IGRpIG11eCBjbG9jazogJWxkXG4iLAogCQkJUFRSX0VSUih0dmUtPmRpX3NlbF9jbGsp KTsKZGlmZiAtLWdpdCBhL2luY2x1ZGUvYXNtLWdlbmVyaWMvY2xrZGV2LmggYi9pbmNsdWRlL2Fz bS1nZW5lcmljL2Nsa2Rldi5oCmluZGV4IDkwYTMyYTYuLjQzMjAyMjUgMTAwNjQ0Ci0tLSBhL2lu Y2x1ZGUvYXNtLWdlbmVyaWMvY2xrZGV2LmgKKysrIGIvaW5jbHVkZS9hc20tZ2VuZXJpYy9jbGtk ZXYuaApAQCAtMTUsMTAgKzE1LDEwIEBACiAKICNpbmNsdWRlIDxsaW51eC9zbGFiLmg+CiAKLXN0 cnVjdCBjbGs7CitzdHJ1Y3QgY2xrX2NvcmU7CiAKLXN0YXRpYyBpbmxpbmUgaW50IF9fY2xrX2dl dChzdHJ1Y3QgY2xrICpjbGspIHsgcmV0dXJuIDE7IH0KLXN0YXRpYyBpbmxpbmUgdm9pZCBfX2Ns a19wdXQoc3RydWN0IGNsayAqY2xrKSB7IH0KK3N0YXRpYyBpbmxpbmUgaW50IF9fY2xrX2dldChz dHJ1Y3QgY2xrX2NvcmUgKmNsaykgeyByZXR1cm4gMTsgfQorc3RhdGljIGlubGluZSB2b2lkIF9f Y2xrX3B1dChzdHJ1Y3QgY2xrX2NvcmUgKmNsaykgeyB9CiAKIHN0YXRpYyBpbmxpbmUgc3RydWN0 IGNsa19sb29rdXBfYWxsb2MgKl9fY2xrZGV2X2FsbG9jKHNpemVfdCBzaXplKQogewpkaWZmIC0t Z2l0IGEvaW5jbHVkZS9saW51eC9jbGsvdGkuaCBiL2luY2x1ZGUvbGludXgvY2xrL3RpLmgKaW5k ZXggZThkOGEzNS4uNmI5ZTZiNCAxMDA2NDQKLS0tIGEvaW5jbHVkZS9saW51eC9jbGsvdGkuaAor KysgYi9pbmNsdWRlL2xpbnV4L2Nsay90aS5oCkBAIC0yMiw4ICsyMiw4IEBACiAgKiBAbXVsdF9k aXYxX3JlZzogcmVnaXN0ZXIgY29udGFpbmluZyB0aGUgRFBMTCBNIGFuZCBOIGJpdGZpZWxkcwog ICogQG11bHRfbWFzazogbWFzayBvZiB0aGUgRFBMTCBNIGJpdGZpZWxkIGluIEBtdWx0X2RpdjFf cmVnCiAgKiBAZGl2MV9tYXNrOiBtYXNrIG9mIHRoZSBEUExMIE4gYml0ZmllbGQgaW4gQG11bHRf ZGl2MV9yZWcKLSAqIEBjbGtfYnlwYXNzOiBzdHJ1Y3QgY2xrIHBvaW50ZXIgdG8gdGhlIGNsb2Nr J3MgYnlwYXNzIGNsb2NrIGlucHV0Ci0gKiBAY2xrX3JlZjogc3RydWN0IGNsayBwb2ludGVyIHRv IHRoZSBjbG9jaydzIHJlZmVyZW5jZSBjbG9jayBpbnB1dAorICogQGNsa19ieXBhc3M6IHN0cnVj dCBjbGtfY29yZSBwb2ludGVyIHRvIHRoZSBjbG9jaydzIGJ5cGFzcyBjbG9jayBpbnB1dAorICog QGNsa19yZWY6IHN0cnVjdCBjbGtfY29yZSBwb2ludGVyIHRvIHRoZSBjbG9jaydzIHJlZmVyZW5j ZSBjbG9jayBpbnB1dAogICogQGNvbnRyb2xfcmVnOiByZWdpc3RlciBjb250YWluaW5nIHRoZSBE UExMIG1vZGUgYml0ZmllbGQKICAqIEBlbmFibGVfbWFzazogbWFzayBvZiB0aGUgRFBMTCBtb2Rl IGJpdGZpZWxkIGluIEBjb250cm9sX3JlZwogICogQGxhc3Rfcm91bmRlZF9yYXRlOiBjYWNoZSBv ZiB0aGUgbGFzdCByYXRlIHJlc3VsdCBvZiBvbWFwMl9kcGxsX3JvdW5kX3JhdGUoKQpAQCAtNjgs OCArNjgsOCBAQCBzdHJ1Y3QgZHBsbF9kYXRhIHsKIAl2b2lkIF9faW9tZW0JCSptdWx0X2RpdjFf cmVnOwogCXUzMgkJCW11bHRfbWFzazsKIAl1MzIJCQlkaXYxX21hc2s7Ci0Jc3RydWN0IGNsawkJ KmNsa19ieXBhc3M7Ci0Jc3RydWN0IGNsawkJKmNsa19yZWY7CisJc3RydWN0IGNsa19jb3JlCQkq Y2xrX2J5cGFzczsKKwlzdHJ1Y3QgY2xrX2NvcmUJCSpjbGtfcmVmOwogCXZvaWQgX19pb21lbQkJ KmNvbnRyb2xfcmVnOwogCXUzMgkJCWVuYWJsZV9tYXNrOwogCXVuc2lnbmVkIGxvbmcJCWxhc3Rf cm91bmRlZF9yYXRlOwpAQCAtMjUxLDcgKzI1MSw3IEBAIGV4dGVybiBjb25zdCBzdHJ1Y3QgY2xr X29wcyB0aV9jbGtfbXV4X29wczsKIAogI2RlZmluZSB0b19jbGtfaHdfb21hcChfaHcpIGNvbnRh aW5lcl9vZihfaHcsIHN0cnVjdCBjbGtfaHdfb21hcCwgaHcpCiAKLXZvaWQgb21hcDJfaW5pdF9j bGtfaHdfb21hcF9jbG9ja3Moc3RydWN0IGNsayAqY2xrKTsKK3ZvaWQgb21hcDJfaW5pdF9jbGtf aHdfb21hcF9jbG9ja3Moc3RydWN0IGNsa19jb3JlICpjbGspOwogaW50IG9tYXAzX25vbmNvcmVf ZHBsbF9lbmFibGUoc3RydWN0IGNsa19odyAqaHcpOwogdm9pZCBvbWFwM19ub25jb3JlX2RwbGxf ZGlzYWJsZShzdHJ1Y3QgY2xrX2h3ICpodyk7CiBpbnQgb21hcDNfbm9uY29yZV9kcGxsX3NldF9y YXRlKHN0cnVjdCBjbGtfaHcgKmh3LCB1bnNpZ25lZCBsb25nIHJhdGUsCmRpZmYgLS1naXQgYS9p bmNsdWRlL2xpbnV4L2Nsay96eW5xLmggYi9pbmNsdWRlL2xpbnV4L2Nsay96eW5xLmgKaW5kZXgg YTk5MGE1OS4uNmMzNTI5MSAxMDA2NDQKLS0tIGEvaW5jbHVkZS9saW51eC9jbGsvenlucS5oCisr KyBiL2luY2x1ZGUvbGludXgvY2xrL3p5bnEuaApAQCAtMjUsNyArMjUsNyBAQAogCiB2b2lkIHp5 bnFfY2xvY2tfaW5pdCh2b2lkKTsKIAotc3RydWN0IGNsayAqY2xrX3JlZ2lzdGVyX3p5bnFfcGxs KGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVudCwKK3N0cnVjdCBjbGtfY29yZSAq Y2xrX3JlZ2lzdGVyX3p5bnFfcGxsKGNvbnN0IGNoYXIgKm5hbWUsIGNvbnN0IGNoYXIgKnBhcmVu dCwKIAkJdm9pZCBfX2lvbWVtICpwbGxfY3RybCwgdm9pZCBfX2lvbWVtICpwbGxfc3RhdHVzLCB1 OCBsb2NrX2luZGV4LAogCQlzcGlubG9ja190ICpsb2NrKTsKICNlbmRpZgpkaWZmIC0tZ2l0IGEv aW5jbHVkZS9saW51eC9wbGF0Zm9ybV9kYXRhL3NpNTM1MS5oIGIvaW5jbHVkZS9saW51eC9wbGF0 Zm9ybV9kYXRhL3NpNTM1MS5oCmluZGV4IGE5NDdhYjguLjRiMzRjNjkgMTAwNjQ0Ci0tLSBhL2lu Y2x1ZGUvbGludXgvcGxhdGZvcm1fZGF0YS9zaTUzNTEuaAorKysgYi9pbmNsdWRlL2xpbnV4L3Bs YXRmb3JtX2RhdGEvc2k1MzUxLmgKQEAgLTEwNyw4ICsxMDcsOCBAQCBzdHJ1Y3Qgc2k1MzUxX2Ns a291dF9jb25maWcgewogICogQGNsa291dDogYXJyYXkgb2YgY2xrb3V0IGNvbmZpZ3VyYXRpb24K ICAqLwogc3RydWN0IHNpNTM1MV9wbGF0Zm9ybV9kYXRhIHsKLQlzdHJ1Y3QgY2xrICpjbGtfeHRh bDsKLQlzdHJ1Y3QgY2xrICpjbGtfY2xraW47CisJc3RydWN0IGNsa19jb3JlICpjbGtfeHRhbDsK KwlzdHJ1Y3QgY2xrX2NvcmUgKmNsa19jbGtpbjsKIAllbnVtIHNpNTM1MV9wbGxfc3JjIHBsbF9z cmNbMl07CiAJc3RydWN0IHNpNTM1MV9jbGtvdXRfY29uZmlnIGNsa291dFs4XTsKIH07CmRpZmYg LS1naXQgYS9zb3VuZC9zb2MvbXhzL214cy1zYWlmLmMgYi9zb3VuZC9zb2MvbXhzL214cy1zYWlm LmMKaW5kZXggMjMxZDdlNy4uYTI0MzY3ZCAxMDA2NDQKLS0tIGEvc291bmQvc29jL214cy9teHMt c2FpZi5jCisrKyBiL3NvdW5kL3NvYy9teHMvbXhzLXNhaWYuYwpAQCAtNjgyLDExICs2ODIsMTEg QEAgc3RhdGljIGludCBteHNfc2FpZl9tY2xrX2luaXQoc3RydWN0IHBsYXRmb3JtX2RldmljZSAq cGRldikKIHsKIAlzdHJ1Y3QgbXhzX3NhaWYgKnNhaWYgPSBwbGF0Zm9ybV9nZXRfZHJ2ZGF0YShw ZGV2KTsKIAlzdHJ1Y3QgZGV2aWNlX25vZGUgKm5wID0gcGRldi0+ZGV2Lm9mX25vZGU7Ci0Jc3Ry dWN0IGNsayAqY2xrOworCXN0cnVjdCBjbGtfY29yZSAqY2xrOwogCWludCByZXQ7CiAKIAljbGsg PSBjbGtfcmVnaXN0ZXJfZGl2aWRlcigmcGRldi0+ZGV2LCAibXhzX3NhaWZfbWNsayIsCi0JCQkJ ICAgX19jbGtfZ2V0X25hbWUoc2FpZi0+Y2xrKSwgMCwKKwkJCQkgICBjbGtfZ2V0X25hbWUoc2Fp Zi0+Y2xrKSwgMCwKIAkJCQkgICBzYWlmLT5iYXNlICsgU0FJRl9DVFJMLAogCQkJCSAgIEJQX1NB SUZfQ1RSTF9CSVRDTEtfTVVMVF9SQVRFLCAzLAogCQkJCSAgIDAsIE5VTEwpOwotLSAKMS45LjMK Cl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkxpbnV4cHBj LWRldiBtYWlsaW5nIGxpc3QKTGludXhwcGMtZGV2QGxpc3RzLm96bGFicy5vcmcKaHR0cHM6Ly9s aXN0cy5vemxhYnMub3JnL2xpc3RpbmZvL2xpbnV4cHBjLWRldg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wi0-x22b.google.com (mail-wi0-x22b.google.com [IPv6:2a00:1450:400c:c05::22b]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id A8F471A00F6 for ; Thu, 4 Sep 2014 01:32:25 +1000 (EST) Received: by mail-wi0-f171.google.com with SMTP id hi2so1177451wib.4 for ; Wed, 03 Sep 2014 08:32:20 -0700 (PDT) Sender: Tomeu Vizoso From: Tomeu Vizoso To: Mike Turquette Subject: [PATCH v9 2/6] clk: Move all drivers to use internal API Date: Wed, 3 Sep 2014 17:31:57 +0200 Message-Id: <1409758317-20564-1-git-send-email-tomeu.vizoso@collabora.com> In-Reply-To: <1409758148-20104-2-git-send-email-tomeu.vizoso@collabora.com> References: <1409758148-20104-2-git-send-email-tomeu.vizoso@collabora.com> Cc: Andrew Lunn , Ulf Hansson , Prashant Gaikwad , Tony Lindgren , tomasz.figa@gmail.com, Liam Girdwood , Thierry Reding , Paul Mackerras , Sylwester Nawrocki , Daniel Walker , linux-arch@vger.kernel.org, Boris Brezillon , linux-samsung-soc@vger.kernel.org, Kukjin Kim , Russell King , =?UTF-8?q?Emilio=20L=C3=B3pez?= , Takashi Iwai , Michal Simek , Kyungmin Park , Kevin Hilman , linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, patches@opensource.wolfsonmicro.com, Viresh Kumar , David Brown , Anatolij Gustschin , Dinh Nguyen , Sebastian Hesselbarth , alsa-devel@alsa-project.org, Jason Cooper , Arnd Bergmann , Stephen Warren , linux-arm-msm@vger.kernel.org, spear-devel@list.st.com, Barry Song , Mark Brown , linux-rpi-kernel@lists.infradead.org, Ben Dooks , linux-tegra@vger.kernel.org, Jaroslav Kysela , Sascha Hauer , Shawn Guo , Paul Walmsley , Tomeu Vizoso , Peter De Schrijver , linux-kernel@vger.kernel.org, rabin@rab.in, Bryan Huntsman , Santosh Shilimkar , =?UTF-8?q?Beno=C3=AEt=20Cousson?= , Maxime Ripard , linux-media@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, Mauro Carvalho Chehab List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , In preparation to change the public API to return a per-user clk structure, remove any usage of this public API from the clock implementations. The reason for having this in a separate commit from the one that introduces the implementation of the new functions is to separate the changes generated with Coccinelle from the rest, and keep the patches' size reasonable. Signed-off-by: Tomeu Vizoso Tested-by: Boris Brezillon Tested-by: Heiko Stuebner Acked-by: Boris Brezillon --- v9: * Fold in changes to mxs-saif.c, so to not break bisectability * Re-generate the patch on top of the latest changes * Remove linux/clk.h includes from clk implementations --- arch/arm/mach-dove/common.c | 10 +- arch/arm/mach-imx/clk-busy.c | 9 +- arch/arm/mach-imx/clk-fixup-div.c | 4 +- arch/arm/mach-imx/clk-fixup-mux.c | 4 +- arch/arm/mach-imx/clk-gate2.c | 4 +- arch/arm/mach-imx/clk-imx1.c | 3 +- arch/arm/mach-imx/clk-imx21.c | 3 +- arch/arm/mach-imx/clk-imx25.c | 9 +- arch/arm/mach-imx/clk-imx27.c | 5 +- arch/arm/mach-imx/clk-imx31.c | 11 +- arch/arm/mach-imx/clk-imx35.c | 23 +- arch/arm/mach-imx/clk-imx51-imx53.c | 78 +++--- arch/arm/mach-imx/clk-imx6q.c | 54 ++-- arch/arm/mach-imx/clk-imx6sl.c | 14 +- arch/arm/mach-imx/clk-imx6sx.c | 98 ++++--- arch/arm/mach-imx/clk-pfd.c | 5 +- arch/arm/mach-imx/clk-pllv1.c | 5 +- arch/arm/mach-imx/clk-pllv2.c | 5 +- arch/arm/mach-imx/clk-pllv3.c | 5 +- arch/arm/mach-imx/clk-vf610.c | 43 +-- arch/arm/mach-imx/clk.c | 11 +- arch/arm/mach-imx/clk.h | 42 +-- arch/arm/mach-msm/clock-pcom.c | 2 +- arch/arm/mach-mv78xx0/common.c | 2 +- arch/arm/mach-omap2/board-cm-t35.c | 2 +- arch/arm/mach-omap2/cclock3xxx_data.c | 371 +++++++++++++------------- arch/arm/mach-omap2/clkt2xxx_dpll.c | 5 +- arch/arm/mach-omap2/clkt2xxx_dpllcore.c | 5 +- arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c | 11 +- arch/arm/mach-omap2/clkt34xx_dpll3m2.c | 3 +- arch/arm/mach-omap2/clkt_clksel.c | 46 ++-- arch/arm/mach-omap2/clkt_dpll.c | 8 +- arch/arm/mach-omap2/clock.c | 52 ++-- arch/arm/mach-omap2/clock.h | 18 +- arch/arm/mach-omap2/clock3xxx.c | 23 +- arch/arm/mach-omap2/clock3xxx.h | 4 +- arch/arm/mach-omap2/clock_common_data.c | 2 +- arch/arm/mach-omap2/clockdomain.c | 9 +- arch/arm/mach-omap2/clockdomain.h | 4 +- arch/arm/mach-omap2/display.c | 5 +- arch/arm/mach-omap2/dpll3xxx.c | 29 +- arch/arm/mach-omap2/dpll44xx.c | 5 +- arch/arm/mach-omap2/mcbsp.c | 5 +- arch/arm/mach-omap2/omap_device.c | 9 +- arch/arm/mach-omap2/omap_hwmod.c | 42 +-- arch/arm/mach-omap2/omap_hwmod.h | 12 +- arch/arm/mach-omap2/pm24xx.c | 12 +- arch/arm/mach-orion5x/common.c | 2 +- arch/arm/mach-shmobile/clock.c | 9 +- arch/arm/mach-vexpress/spc.c | 4 +- arch/arm/plat-orion/common.c | 21 +- arch/arm/plat-orion/include/plat/common.h | 12 +- arch/powerpc/platforms/512x/clock-commonclk.c | 48 ++-- drivers/clk/at91/clk-main.c | 24 +- drivers/clk/at91/clk-master.c | 6 +- drivers/clk/at91/clk-peripheral.c | 12 +- drivers/clk/at91/clk-pll.c | 6 +- drivers/clk/at91/clk-plldiv.c | 6 +- drivers/clk/at91/clk-programmable.c | 10 +- drivers/clk/at91/clk-slow.c | 24 +- drivers/clk/at91/clk-smd.c | 6 +- drivers/clk/at91/clk-system.c | 6 +- drivers/clk/at91/clk-usb.c | 20 +- drivers/clk/at91/clk-utmi.c | 6 +- drivers/clk/bcm/clk-kona-setup.c | 6 +- drivers/clk/bcm/clk-kona.c | 12 +- drivers/clk/bcm/clk-kona.h | 2 +- drivers/clk/berlin/berlin2-avpll.c | 4 +- drivers/clk/berlin/berlin2-avpll.h | 4 +- drivers/clk/berlin/berlin2-div.c | 2 +- drivers/clk/berlin/berlin2-div.h | 2 +- drivers/clk/berlin/berlin2-pll.c | 2 +- drivers/clk/berlin/berlin2-pll.h | 2 +- drivers/clk/berlin/bg2.c | 13 +- drivers/clk/berlin/bg2q.c | 9 +- drivers/clk/clk-axi-clkgen.c | 3 +- drivers/clk/clk-axm5516.c | 4 +- drivers/clk/clk-bcm2835.c | 2 +- drivers/clk/clk-composite.c | 11 +- drivers/clk/clk-conf.c | 17 +- drivers/clk/clk-divider.c | 8 +- drivers/clk/clk-efm32gg.c | 3 +- drivers/clk/clk-fixed-factor.c | 6 +- drivers/clk/clk-fixed-rate.c | 8 +- drivers/clk/clk-fractional-divider.c | 4 +- drivers/clk/clk-gate.c | 4 +- drivers/clk/clk-highbank.c | 8 +- drivers/clk/clk-ls1x.c | 16 +- drivers/clk/clk-max77686.c | 10 +- drivers/clk/clk-moxart.c | 8 +- drivers/clk/clk-mux.c | 7 +- drivers/clk/clk-nomadik.c | 15 +- drivers/clk/clk-nspire.c | 4 +- drivers/clk/clk-palmas.c | 7 +- drivers/clk/clk-ppc-corenet.c | 8 +- drivers/clk/clk-s2mps11.c | 6 +- drivers/clk/clk-si5351.c | 17 +- drivers/clk/clk-si570.c | 4 +- drivers/clk/clk-twl6040.c | 3 +- drivers/clk/clk-u300.c | 13 +- drivers/clk/clk-vt8500.c | 4 +- drivers/clk/clk-wm831x.c | 7 +- drivers/clk/clk-xgene.c | 12 +- drivers/clk/clk.h | 4 +- drivers/clk/hisilicon/clk-hi3620.c | 9 +- drivers/clk/hisilicon/clk-hip04.c | 1 - drivers/clk/hisilicon/clk.c | 17 +- drivers/clk/hisilicon/clk.h | 2 +- drivers/clk/hisilicon/clkgate-separated.c | 5 +- drivers/clk/keystone/gate.c | 7 +- drivers/clk/keystone/pll.c | 11 +- drivers/clk/mmp/clk-apbc.c | 5 +- drivers/clk/mmp/clk-apmu.c | 5 +- drivers/clk/mmp/clk-frac.c | 4 +- drivers/clk/mmp/clk-mmp2.c | 14 +- drivers/clk/mmp/clk-pxa168.c | 12 +- drivers/clk/mmp/clk-pxa910.c | 12 +- drivers/clk/mmp/clk.h | 8 +- drivers/clk/mvebu/clk-corediv.c | 4 +- drivers/clk/mvebu/clk-cpu.c | 8 +- drivers/clk/mvebu/common.c | 15 +- drivers/clk/mvebu/kirkwood.c | 6 +- drivers/clk/mxs/clk-div.c | 5 +- drivers/clk/mxs/clk-frac.c | 5 +- drivers/clk/mxs/clk-imx23.c | 5 +- drivers/clk/mxs/clk-imx28.c | 5 +- drivers/clk/mxs/clk-pll.c | 5 +- drivers/clk/mxs/clk-ref.c | 5 +- drivers/clk/mxs/clk.h | 17 +- drivers/clk/qcom/clk-rcg.c | 8 +- drivers/clk/qcom/clk-rcg2.c | 14 +- drivers/clk/qcom/clk-regmap.c | 2 +- drivers/clk/qcom/clk-regmap.h | 2 +- drivers/clk/qcom/common.c | 6 +- drivers/clk/qcom/gcc-apq8084.c | 2 +- drivers/clk/qcom/gcc-ipq806x.c | 2 +- drivers/clk/qcom/gcc-msm8660.c | 2 +- drivers/clk/qcom/gcc-msm8960.c | 2 +- drivers/clk/qcom/gcc-msm8974.c | 2 +- drivers/clk/qcom/mmcc-msm8960.c | 6 +- drivers/clk/rockchip/clk-pll.c | 9 +- drivers/clk/rockchip/clk-rk3188.c | 2 +- drivers/clk/rockchip/clk-rk3288.c | 2 +- drivers/clk/rockchip/clk-rockchip.c | 2 +- drivers/clk/rockchip/clk.c | 23 +- drivers/clk/rockchip/clk.h | 5 +- drivers/clk/samsung/clk-exynos-audss.c | 16 +- drivers/clk/samsung/clk-exynos-clkout.c | 9 +- drivers/clk/samsung/clk-exynos3250.c | 1 - drivers/clk/samsung/clk-exynos4.c | 7 +- drivers/clk/samsung/clk-exynos5250.c | 1 - drivers/clk/samsung/clk-exynos5260.c | 1 - drivers/clk/samsung/clk-exynos5410.c | 1 - drivers/clk/samsung/clk-exynos5420.c | 1 - drivers/clk/samsung/clk-exynos5440.c | 1 - drivers/clk/samsung/clk-pll.c | 6 +- drivers/clk/samsung/clk-pll.h | 2 +- drivers/clk/samsung/clk-s3c2410-dclk.c | 30 +-- drivers/clk/samsung/clk-s3c2410.c | 1 - drivers/clk/samsung/clk-s3c2412.c | 1 - drivers/clk/samsung/clk-s3c2443.c | 1 - drivers/clk/samsung/clk-s3c64xx.c | 1 - drivers/clk/samsung/clk-s5pv210-audss.c | 16 +- drivers/clk/samsung/clk.c | 22 +- drivers/clk/samsung/clk.h | 3 +- drivers/clk/shmobile/clk-div6.c | 2 +- drivers/clk/shmobile/clk-emev2.c | 4 +- drivers/clk/shmobile/clk-mstp.c | 6 +- drivers/clk/shmobile/clk-r8a7740.c | 6 +- drivers/clk/shmobile/clk-r8a7779.c | 6 +- drivers/clk/shmobile/clk-rcar-gen2.c | 10 +- drivers/clk/shmobile/clk-rz.c | 6 +- drivers/clk/sirf/clk-atlas6.c | 3 +- drivers/clk/sirf/clk-common.c | 30 +-- drivers/clk/sirf/clk-prima2.c | 3 +- drivers/clk/socfpga/clk-gate.c | 3 +- drivers/clk/socfpga/clk-periph.c | 3 +- drivers/clk/socfpga/clk-pll.c | 5 +- drivers/clk/spear/clk-aux-synth.c | 8 +- drivers/clk/spear/clk-frac-synth.c | 4 +- drivers/clk/spear/clk-gpt-synth.c | 4 +- drivers/clk/spear/clk-vco-pll.c | 8 +- drivers/clk/spear/clk.h | 14 +- drivers/clk/spear/spear1310_clock.c | 3 +- drivers/clk/spear/spear1340_clock.c | 3 +- drivers/clk/spear/spear3xx_clock.c | 17 +- drivers/clk/spear/spear6xx_clock.c | 3 +- drivers/clk/st/clk-flexgen.c | 12 +- drivers/clk/st/clkgen-fsyn.c | 22 +- drivers/clk/st/clkgen-mux.c | 32 +-- drivers/clk/st/clkgen-pll.c | 34 +-- drivers/clk/sunxi/clk-a10-hosc.c | 2 +- drivers/clk/sunxi/clk-a20-gmac.c | 2 +- drivers/clk/sunxi/clk-factors.c | 4 +- drivers/clk/sunxi/clk-sun6i-apb0-gates.c | 2 +- drivers/clk/sunxi/clk-sun6i-apb0.c | 2 +- drivers/clk/sunxi/clk-sun6i-ar100.c | 6 +- drivers/clk/sunxi/clk-sun8i-apb0.c | 2 +- drivers/clk/sunxi/clk-sunxi.c | 18 +- drivers/clk/tegra/clk-audio-sync.c | 4 +- drivers/clk/tegra/clk-divider.c | 5 +- drivers/clk/tegra/clk-periph-gate.c | 5 +- drivers/clk/tegra/clk-periph.c | 9 +- drivers/clk/tegra/clk-pll-out.c | 5 +- drivers/clk/tegra/clk-pll.c | 41 ++- drivers/clk/tegra/clk-super.c | 5 +- drivers/clk/tegra/clk-tegra-audio.c | 5 +- drivers/clk/tegra/clk-tegra-fixed.c | 9 +- drivers/clk/tegra/clk-tegra-periph.c | 13 +- drivers/clk/tegra/clk-tegra-pmc.c | 5 +- drivers/clk/tegra/clk-tegra-super-gen4.c | 9 +- drivers/clk/tegra/clk-tegra114.c | 11 +- drivers/clk/tegra/clk-tegra124.c | 7 +- drivers/clk/tegra/clk-tegra20.c | 13 +- drivers/clk/tegra/clk-tegra30.c | 9 +- drivers/clk/tegra/clk.c | 25 +- drivers/clk/tegra/clk.h | 38 +-- drivers/clk/ti/apll.c | 8 +- drivers/clk/ti/clk-2xxx.c | 8 +- drivers/clk/ti/clk-33xx.c | 18 +- drivers/clk/ti/clk-3xxx.c | 8 +- drivers/clk/ti/clk-43xx.c | 8 +- drivers/clk/ti/clk-44xx.c | 16 +- drivers/clk/ti/clk-54xx.c | 25 +- drivers/clk/ti/clk-7xx.c | 28 +- drivers/clk/ti/clk-dra7-atl.c | 6 +- drivers/clk/ti/clk.c | 2 +- drivers/clk/ti/clockdomain.c | 4 +- drivers/clk/ti/composite.c | 2 +- drivers/clk/ti/divider.c | 6 +- drivers/clk/ti/dpll.c | 8 +- drivers/clk/ti/fixed-factor.c | 2 +- drivers/clk/ti/gate.c | 2 +- drivers/clk/ti/interface.c | 2 +- drivers/clk/ti/mux.c | 6 +- drivers/clk/ux500/abx500-clk.c | 3 +- drivers/clk/ux500/clk-prcc.c | 8 +- drivers/clk/ux500/clk-prcmu.c | 16 +- drivers/clk/ux500/clk-sysctrl.c | 10 +- drivers/clk/ux500/clk.h | 23 +- drivers/clk/ux500/u8500_clk.c | 3 +- drivers/clk/ux500/u8500_of_clk.c | 13 +- drivers/clk/ux500/u8540_clk.c | 3 +- drivers/clk/ux500/u9540_clk.c | 1 - drivers/clk/versatile/clk-icst.c | 5 +- drivers/clk/versatile/clk-icst.h | 2 +- drivers/clk/versatile/clk-impd1.c | 19 +- drivers/clk/versatile/clk-realview.c | 3 +- drivers/clk/versatile/clk-sp810.c | 30 ++- drivers/clk/versatile/clk-versatile.c | 3 +- drivers/clk/versatile/clk-vexpress-osc.c | 2 +- drivers/clk/versatile/clk-vexpress.c | 6 +- drivers/clk/x86/clk-lpt.c | 3 +- drivers/clk/zynq/clkc.c | 22 +- drivers/clk/zynq/pll.c | 4 +- drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c | 3 +- drivers/media/platform/exynos4-is/media-dev.c | 17 +- drivers/media/platform/exynos4-is/media-dev.h | 7 +- drivers/media/platform/omap3isp/isp.h | 2 +- drivers/rtc/rtc-hym8563.c | 4 +- drivers/staging/imx-drm/imx-tve.c | 27 +- include/asm-generic/clkdev.h | 6 +- include/linux/clk/ti.h | 10 +- include/linux/clk/zynq.h | 2 +- include/linux/platform_data/si5351.h | 4 +- sound/soc/mxs/mxs-saif.c | 4 +- 266 files changed, 1453 insertions(+), 1516 deletions(-) diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index 0d1a892..4d95685 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c @@ -71,9 +71,9 @@ void __init dove_map_io(void) static int dove_tclk; static DEFINE_SPINLOCK(gating_lock); -static struct clk *tclk; +static struct clk_core *tclk; -static struct clk __init *dove_register_gate(const char *name, +static struct clk_core __init *dove_register_gate(const char *name, const char *parent, u8 bit_idx) { return clk_register_gate(NULL, name, parent, 0, @@ -83,9 +83,9 @@ static struct clk __init *dove_register_gate(const char *name, static void __init dove_clk_init(void) { - struct clk *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1; - struct clk *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma; - struct clk *xor0, *xor1, *ge, *gephy; + struct clk_core *usb0, *usb1, *sata, *pex0, *pex1, *sdio0, *sdio1; + struct clk_core *nand, *camera, *i2s0, *i2s1, *crypto, *ac97, *pdma; + struct clk_core *xor0, *xor1, *ge, *gephy; tclk = clk_register_fixed_rate(NULL, "tclk", NULL, CLK_IS_ROOT, dove_tclk); diff --git a/arch/arm/mach-imx/clk-busy.c b/arch/arm/mach-imx/clk-busy.c index 4bb1bc4..bb3edc5 100644 --- a/arch/arm/mach-imx/clk-busy.c +++ b/arch/arm/mach-imx/clk-busy.c @@ -10,7 +10,6 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include #include #include #include @@ -78,12 +77,12 @@ static struct clk_ops clk_busy_divider_ops = { .set_rate = clk_busy_divider_set_rate, }; -struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, +struct clk_core *imx_clk_busy_divider(const char *name, const char *parent_name, void __iomem *reg, u8 shift, u8 width, void __iomem *busy_reg, u8 busy_shift) { struct clk_busy_divider *busy; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; busy = kzalloc(sizeof(*busy), GFP_KERNEL); @@ -152,12 +151,12 @@ static struct clk_ops clk_busy_mux_ops = { .set_parent = clk_busy_mux_set_parent, }; -struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, +struct clk_core *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, u8 width, void __iomem *busy_reg, u8 busy_shift, const char **parent_names, int num_parents) { struct clk_busy_mux *busy; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; busy = kzalloc(sizeof(*busy), GFP_KERNEL); diff --git a/arch/arm/mach-imx/clk-fixup-div.c b/arch/arm/mach-imx/clk-fixup-div.c index 21db020..8a62bfd 100644 --- a/arch/arm/mach-imx/clk-fixup-div.c +++ b/arch/arm/mach-imx/clk-fixup-div.c @@ -92,12 +92,12 @@ static const struct clk_ops clk_fixup_div_ops = { .set_rate = clk_fixup_div_set_rate, }; -struct clk *imx_clk_fixup_divider(const char *name, const char *parent, +struct clk_core *imx_clk_fixup_divider(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width, void (*fixup)(u32 *val)) { struct clk_fixup_div *fixup_div; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; if (!fixup) diff --git a/arch/arm/mach-imx/clk-fixup-mux.c b/arch/arm/mach-imx/clk-fixup-mux.c index 0d40b35..e29dc62 100644 --- a/arch/arm/mach-imx/clk-fixup-mux.c +++ b/arch/arm/mach-imx/clk-fixup-mux.c @@ -71,12 +71,12 @@ static const struct clk_ops clk_fixup_mux_ops = { .set_parent = clk_fixup_mux_set_parent, }; -struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg, +struct clk_core *imx_clk_fixup_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char **parents, int num_parents, void (*fixup)(u32 *val)) { struct clk_fixup_mux *fixup_mux; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; if (!fixup) diff --git a/arch/arm/mach-imx/clk-gate2.c b/arch/arm/mach-imx/clk-gate2.c index 84acdfd..d78f409 100644 --- a/arch/arm/mach-imx/clk-gate2.c +++ b/arch/arm/mach-imx/clk-gate2.c @@ -108,14 +108,14 @@ static struct clk_ops clk_gate2_ops = { .is_enabled = clk_gate2_is_enabled, }; -struct clk *clk_register_gate2(struct device *dev, const char *name, +struct clk_core *clk_register_gate2(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate2_flags, spinlock_t *lock, unsigned int *share_count) { struct clk_gate2 *gate; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; gate = kzalloc(sizeof(struct clk_gate2), GFP_KERNEL); diff --git a/arch/arm/mach-imx/clk-imx1.c b/arch/arm/mach-imx/clk-imx1.c index 37c307a..8459bd7 100644 --- a/arch/arm/mach-imx/clk-imx1.c +++ b/arch/arm/mach-imx/clk-imx1.c @@ -15,7 +15,6 @@ * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ -#include #include #include #include @@ -32,7 +31,7 @@ static const char *prem_sel_clks[] = { "clk32_premult", "clk16m", }; static const char *clko_sel_clks[] = { "per1", "hclk", "clk48m", "clk16m", "prem", "fclk", }; -static struct clk *clk[IMX1_CLK_MAX]; +static struct clk_core *clk[IMX1_CLK_MAX]; static struct clk_onecell_data clk_data; static void __iomem *ccm __initdata; diff --git a/arch/arm/mach-imx/clk-imx21.c b/arch/arm/mach-imx/clk-imx21.c index 4b4c753..56d799c 100644 --- a/arch/arm/mach-imx/clk-imx21.c +++ b/arch/arm/mach-imx/clk-imx21.c @@ -9,7 +9,6 @@ * of the License, or (at your option) any later version. */ -#include #include #include #include @@ -36,7 +35,7 @@ static const char *mpll_sel_clks[] = { "fpm_gate", "mpll_osc_sel", }; static const char *spll_sel_clks[] = { "fpm_gate", "mpll_osc_sel", }; static const char *ssi_sel_clks[] = { "spll_gate", "mpll_gate", }; -static struct clk *clk[IMX21_CLK_MAX]; +static struct clk_core *clk[IMX21_CLK_MAX]; static struct clk_onecell_data clk_data; static void __init _mx21_clocks_init(unsigned long lref, unsigned long href) diff --git a/arch/arm/mach-imx/clk-imx25.c b/arch/arm/mach-imx/clk-imx25.c index 59c0c85..06d2c72 100644 --- a/arch/arm/mach-imx/clk-imx25.c +++ b/arch/arm/mach-imx/clk-imx25.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include @@ -87,7 +86,7 @@ enum mx25_clks { wdt_ipg, cko_div, cko_sel, cko, clk_max }; -static struct clk *clk[clk_max]; +static struct clk_core *clk[clk_max]; static int __init __mx25_clocks_init(unsigned long osc_rate, void __iomem *ccm_base) @@ -225,16 +224,16 @@ static int __init __mx25_clocks_init(unsigned long osc_rate, imx_check_clocks(clk, ARRAY_SIZE(clk)); - clk_prepare_enable(clk[emi_ahb]); + clk_provider_prepare_enable(clk[emi_ahb]); /* Clock source for gpt must be derived from AHB */ - clk_set_parent(clk[per5_sel], clk[ahb]); + clk_provider_set_parent(clk[per5_sel], clk[ahb]); /* * Let's initially set up CLKO parent as ipg, since this configuration * is used on some imx25 board designs to clock the audio codec. */ - clk_set_parent(clk[cko_sel], clk[ipg]); + clk_provider_set_parent(clk[cko_sel], clk[ipg]); return 0; } diff --git a/arch/arm/mach-imx/clk-imx27.c b/arch/arm/mach-imx/clk-imx27.c index ab6349e..7b0f01c 100644 --- a/arch/arm/mach-imx/clk-imx27.c +++ b/arch/arm/mach-imx/clk-imx27.c @@ -1,4 +1,3 @@ -#include #include #include #include @@ -39,7 +38,7 @@ static const char *clko_sel_clks[] = { static const char *ssi_sel_clks[] = { "spll_gate", "mpll", }; -static struct clk *clk[IMX27_CLK_MAX]; +static struct clk_core *clk[IMX27_CLK_MAX]; static struct clk_onecell_data clk_data; static void __init _mx27_clocks_init(unsigned long fref) @@ -156,7 +155,7 @@ static void __init _mx27_clocks_init(unsigned long fref) clk_register_clkdev(clk[IMX27_CLK_CPU_DIV], NULL, "cpu0"); - clk_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]); + clk_provider_prepare_enable(clk[IMX27_CLK_EMI_AHB_GATE]); imx_print_silicon_rev("i.MX27", mx27_revision()); } diff --git a/arch/arm/mach-imx/clk-imx31.c b/arch/arm/mach-imx/clk-imx31.c index 286ef42..c95fc5c 100644 --- a/arch/arm/mach-imx/clk-imx31.c +++ b/arch/arm/mach-imx/clk-imx31.c @@ -16,7 +16,6 @@ */ #include -#include #include #include #include @@ -45,7 +44,7 @@ enum mx31_clks { gacc_gate, emi_gate, rtic_gate, firi_gate, clk_max }; -static struct clk *clk[clk_max]; +static struct clk_core *clk[clk_max]; static struct clk_onecell_data clk_data; int __init mx31_clocks_init(unsigned long fref) @@ -176,11 +175,11 @@ int __init mx31_clocks_init(unsigned long fref) clk_register_clkdev(clk[sdma_gate], NULL, "imx31-sdma"); clk_register_clkdev(clk[iim_gate], "iim", NULL); - clk_set_parent(clk[csi], clk[upll]); - clk_prepare_enable(clk[emi_gate]); - clk_prepare_enable(clk[iim_gate]); + clk_provider_set_parent(clk[csi], clk[upll]); + clk_provider_prepare_enable(clk[emi_gate]); + clk_provider_prepare_enable(clk[iim_gate]); mx31_revision(); - clk_disable_unprepare(clk[iim_gate]); + clk_provider_disable_unprepare(clk[iim_gate]); mxc_timer_init(MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR), MX31_INT_GPT); diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c index a0d2b57..846b2cc 100644 --- a/arch/arm/mach-imx/clk-imx35.c +++ b/arch/arm/mach-imx/clk-imx35.c @@ -8,7 +8,6 @@ */ #include #include -#include #include #include #include @@ -67,7 +66,7 @@ enum mx35_clks { gpu2d_gate, clk_max }; -static struct clk *clk[clk_max]; +static struct clk_core *clk[clk_max]; int __init mx35_clocks_init(void) { @@ -99,7 +98,7 @@ int __init mx35_clocks_init(void) else clk[arm] = imx_clk_fixed_factor("arm", "mpll", 1, aad->arm); - if (clk_get_rate(clk[arm]) > 400000000) + if (clk_provider_get_rate(clk[arm]) > 400000000) hsp_div = hsp_div_532; else hsp_div = hsp_div_400; @@ -257,14 +256,14 @@ int __init mx35_clocks_init(void) clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0"); clk_register_clkdev(clk[admux_gate], "audmux", NULL); - clk_prepare_enable(clk[spba_gate]); - clk_prepare_enable(clk[gpio1_gate]); - clk_prepare_enable(clk[gpio2_gate]); - clk_prepare_enable(clk[gpio3_gate]); - clk_prepare_enable(clk[iim_gate]); - clk_prepare_enable(clk[emi_gate]); - clk_prepare_enable(clk[max_gate]); - clk_prepare_enable(clk[iomuxc_gate]); + clk_provider_prepare_enable(clk[spba_gate]); + clk_provider_prepare_enable(clk[gpio1_gate]); + clk_provider_prepare_enable(clk[gpio2_gate]); + clk_provider_prepare_enable(clk[gpio3_gate]); + clk_provider_prepare_enable(clk[iim_gate]); + clk_provider_prepare_enable(clk[emi_gate]); + clk_provider_prepare_enable(clk[max_gate]); + clk_provider_prepare_enable(clk[iomuxc_gate]); /* * SCC is needed to boot via mmc after a watchdog reset. The clock code @@ -272,7 +271,7 @@ int __init mx35_clocks_init(void) * handled here and not needed for mmc) and IIM (which is enabled * unconditionally above). */ - clk_prepare_enable(clk[scc_gate]); + clk_provider_prepare_enable(clk[scc_gate]); imx_print_silicon_rev("i.MX35", mx35_revision()); diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c index 72d6521..fa9fc84 100644 --- a/arch/arm/mach-imx/clk-imx51-imx53.c +++ b/arch/arm/mach-imx/clk-imx51-imx53.c @@ -8,7 +8,6 @@ */ #include #include -#include #include #include #include @@ -126,7 +125,7 @@ static const char *spdif_sel[] = { "pll1_sw", "pll2_sw", "pll3_sw", "spdif_xtal_ static const char *spdif0_com_sel[] = { "spdif0_podf", "ssi1_root_gate", }; static const char *mx51_spdif1_com_sel[] = { "spdif1_podf", "ssi2_root_gate", }; -static struct clk *clk[IMX5_CLK_END]; +static struct clk_core *clk[IMX5_CLK_END]; static struct clk_onecell_data clk_data; static void __init mx5_clocks_common_init(void __iomem *ccm_base) @@ -289,26 +288,28 @@ static void __init mx5_clocks_common_init(void __iomem *ccm_base) clk_register_clkdev(clk[IMX5_CLK_GPC_DVFS], "gpc_dvfs", NULL); /* Set SDHC parents to be PLL2 */ - clk_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], clk[IMX5_CLK_PLL2_SW]); - clk_set_parent(clk[IMX5_CLK_ESDHC_B_SEL], clk[IMX5_CLK_PLL2_SW]); + clk_provider_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], + clk[IMX5_CLK_PLL2_SW]); + clk_provider_set_parent(clk[IMX5_CLK_ESDHC_B_SEL], + clk[IMX5_CLK_PLL2_SW]); /* move usb phy clk to 24MHz */ - clk_set_parent(clk[IMX5_CLK_USB_PHY_SEL], clk[IMX5_CLK_OSC]); - - clk_prepare_enable(clk[IMX5_CLK_GPC_DVFS]); - clk_prepare_enable(clk[IMX5_CLK_AHB_MAX]); /* esdhc3 */ - clk_prepare_enable(clk[IMX5_CLK_AIPS_TZ1]); - clk_prepare_enable(clk[IMX5_CLK_AIPS_TZ2]); /* fec */ - clk_prepare_enable(clk[IMX5_CLK_SPBA]); - clk_prepare_enable(clk[IMX5_CLK_EMI_FAST_GATE]); /* fec */ - clk_prepare_enable(clk[IMX5_CLK_EMI_SLOW_GATE]); /* eim */ - clk_prepare_enable(clk[IMX5_CLK_MIPI_HSC1_GATE]); - clk_prepare_enable(clk[IMX5_CLK_MIPI_HSC2_GATE]); - clk_prepare_enable(clk[IMX5_CLK_MIPI_ESC_GATE]); - clk_prepare_enable(clk[IMX5_CLK_MIPI_HSP_GATE]); - clk_prepare_enable(clk[IMX5_CLK_TMAX1]); - clk_prepare_enable(clk[IMX5_CLK_TMAX2]); /* esdhc2, fec */ - clk_prepare_enable(clk[IMX5_CLK_TMAX3]); /* esdhc1, esdhc4 */ + clk_provider_set_parent(clk[IMX5_CLK_USB_PHY_SEL], clk[IMX5_CLK_OSC]); + + clk_provider_prepare_enable(clk[IMX5_CLK_GPC_DVFS]); + clk_provider_prepare_enable(clk[IMX5_CLK_AHB_MAX]); /* esdhc3 */ + clk_provider_prepare_enable(clk[IMX5_CLK_AIPS_TZ1]); + clk_provider_prepare_enable(clk[IMX5_CLK_AIPS_TZ2]); /* fec */ + clk_provider_prepare_enable(clk[IMX5_CLK_SPBA]); + clk_provider_prepare_enable(clk[IMX5_CLK_EMI_FAST_GATE]); /* fec */ + clk_provider_prepare_enable(clk[IMX5_CLK_EMI_SLOW_GATE]); /* eim */ + clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_HSC1_GATE]); + clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_HSC2_GATE]); + clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_ESC_GATE]); + clk_provider_prepare_enable(clk[IMX5_CLK_MIPI_HSP_GATE]); + clk_provider_prepare_enable(clk[IMX5_CLK_TMAX1]); + clk_provider_prepare_enable(clk[IMX5_CLK_TMAX2]); /* esdhc2, fec */ + clk_provider_prepare_enable(clk[IMX5_CLK_TMAX3]); /* esdhc1, esdhc4 */ } static void __init mx50_clocks_init(struct device_node *np) @@ -361,15 +362,15 @@ static void __init mx50_clocks_init(struct device_node *np) of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); /* set SDHC root clock to 200MHZ*/ - clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000); - clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000); + clk_provider_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000); + clk_provider_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000); - clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]); + clk_provider_prepare_enable(clk[IMX5_CLK_IIM_GATE]); imx_print_silicon_rev("i.MX50", IMX_CHIP_REVISION_1_1); - clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]); + clk_provider_disable_unprepare(clk[IMX5_CLK_IIM_GATE]); - r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000); - clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r); + r = clk_provider_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000); + clk_provider_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r); } CLK_OF_DECLARE(imx50_ccm, "fsl,imx50-ccm", mx50_clocks_init); @@ -435,15 +436,16 @@ static void __init mx51_clocks_init(struct device_node *np) of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); /* set the usboh3 parent to pll2_sw */ - clk_set_parent(clk[IMX5_CLK_USBOH3_SEL], clk[IMX5_CLK_PLL2_SW]); + clk_provider_set_parent(clk[IMX5_CLK_USBOH3_SEL], + clk[IMX5_CLK_PLL2_SW]); /* set SDHC root clock to 166.25MHZ*/ - clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 166250000); - clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 166250000); + clk_provider_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 166250000); + clk_provider_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 166250000); - clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]); + clk_provider_prepare_enable(clk[IMX5_CLK_IIM_GATE]); imx_print_silicon_rev("i.MX51", mx51_revision()); - clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]); + clk_provider_disable_unprepare(clk[IMX5_CLK_IIM_GATE]); /* * Reference Manual says: Functionality of CCDR[18] and CLPCR[23] is no @@ -545,17 +547,17 @@ static void __init mx53_clocks_init(struct device_node *np) of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); /* set SDHC root clock to 200MHZ*/ - clk_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000); - clk_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000); + clk_provider_set_rate(clk[IMX5_CLK_ESDHC_A_PODF], 200000000); + clk_provider_set_rate(clk[IMX5_CLK_ESDHC_B_PODF], 200000000); /* move can bus clk to 24MHz */ - clk_set_parent(clk[IMX5_CLK_CAN_SEL], clk[IMX5_CLK_LP_APM]); + clk_provider_set_parent(clk[IMX5_CLK_CAN_SEL], clk[IMX5_CLK_LP_APM]); - clk_prepare_enable(clk[IMX5_CLK_IIM_GATE]); + clk_provider_prepare_enable(clk[IMX5_CLK_IIM_GATE]); imx_print_silicon_rev("i.MX53", mx53_revision()); - clk_disable_unprepare(clk[IMX5_CLK_IIM_GATE]); + clk_provider_disable_unprepare(clk[IMX5_CLK_IIM_GATE]); - r = clk_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000); - clk_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r); + r = clk_provider_round_rate(clk[IMX5_CLK_USBOH3_PER_GATE], 54000000); + clk_provider_set_rate(clk[IMX5_CLK_USBOH3_PER_GATE], r); } CLK_OF_DECLARE(imx53_ccm, "fsl,imx53-ccm", mx53_clocks_init); diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c index 29d4129..1a816a2 100644 --- a/arch/arm/mach-imx/clk-imx6q.c +++ b/arch/arm/mach-imx/clk-imx6q.c @@ -12,7 +12,6 @@ #include #include -#include #include #include #include @@ -74,7 +73,7 @@ static const char *lvds_sels[] = { "pcie_ref_125m", "sata_ref_100m", }; -static struct clk *clk[IMX6QDL_CLK_END]; +static struct clk_core *clk[IMX6QDL_CLK_END]; static struct clk_onecell_data clk_data; static unsigned int const clks_init_on[] __initconst = { @@ -414,50 +413,65 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) if ((imx_get_soc_revision() != IMX_CHIP_REVISION_1_0) || cpu_is_imx6dl()) { - clk_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); - clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); + clk_provider_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], + clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); + clk_provider_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], + clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); } - clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); - clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); - clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); - clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); - clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_SEL], clk[IMX6QDL_CLK_IPU1_DI0_PRE]); - clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_SEL], clk[IMX6QDL_CLK_IPU1_DI1_PRE]); - clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL], clk[IMX6QDL_CLK_IPU2_DI0_PRE]); - clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_SEL], clk[IMX6QDL_CLK_IPU2_DI1_PRE]); + clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], + clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); + clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_PRE_SEL], + clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); + clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_PRE_SEL], + clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); + clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_PRE_SEL], + clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]); + clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_SEL], + clk[IMX6QDL_CLK_IPU1_DI0_PRE]); + clk_provider_set_parent(clk[IMX6QDL_CLK_IPU1_DI1_SEL], + clk[IMX6QDL_CLK_IPU1_DI1_PRE]); + clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL], + clk[IMX6QDL_CLK_IPU2_DI0_PRE]); + clk_provider_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_SEL], + clk[IMX6QDL_CLK_IPU2_DI1_PRE]); /* * The gpmi needs 100MHz frequency in the EDO/Sync mode, * We can not get the 100MHz from the pll2_pfd0_352m. * So choose pll2_pfd2_396m as enfc_sel's parent. */ - clk_set_parent(clk[IMX6QDL_CLK_ENFC_SEL], clk[IMX6QDL_CLK_PLL2_PFD2_396M]); + clk_provider_set_parent(clk[IMX6QDL_CLK_ENFC_SEL], + clk[IMX6QDL_CLK_PLL2_PFD2_396M]); for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) - clk_prepare_enable(clk[clks_init_on[i]]); + clk_provider_prepare_enable(clk[clks_init_on[i]]); if (IS_ENABLED(CONFIG_USB_MXS_PHY)) { - clk_prepare_enable(clk[IMX6QDL_CLK_USBPHY1_GATE]); - clk_prepare_enable(clk[IMX6QDL_CLK_USBPHY2_GATE]); + clk_provider_prepare_enable(clk[IMX6QDL_CLK_USBPHY1_GATE]); + clk_provider_prepare_enable(clk[IMX6QDL_CLK_USBPHY2_GATE]); } /* * Let's initially set up CLKO with OSC24M, since this configuration * is widely used by imx6q board designs to clock audio codec. */ - ret = clk_set_parent(clk[IMX6QDL_CLK_CKO2_SEL], clk[IMX6QDL_CLK_OSC]); + ret = clk_provider_set_parent(clk[IMX6QDL_CLK_CKO2_SEL], + clk[IMX6QDL_CLK_OSC]); if (!ret) - ret = clk_set_parent(clk[IMX6QDL_CLK_CKO], clk[IMX6QDL_CLK_CKO2]); + ret = clk_provider_set_parent(clk[IMX6QDL_CLK_CKO], + clk[IMX6QDL_CLK_CKO2]); if (ret) pr_warn("failed to set up CLKO: %d\n", ret); /* Audio-related clocks configuration */ - clk_set_parent(clk[IMX6QDL_CLK_SPDIF_SEL], clk[IMX6QDL_CLK_PLL3_PFD3_454M]); + clk_provider_set_parent(clk[IMX6QDL_CLK_SPDIF_SEL], + clk[IMX6QDL_CLK_PLL3_PFD3_454M]); /* All existing boards with PCIe use LVDS1 */ if (IS_ENABLED(CONFIG_PCI_IMX6)) - clk_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], clk[IMX6QDL_CLK_SATA_REF_100M]); + clk_provider_set_parent(clk[IMX6QDL_CLK_LVDS1_SEL], + clk[IMX6QDL_CLK_SATA_REF_100M]); /* Set initial power mode */ imx6q_set_lpm(WAIT_CLOCKED); diff --git a/arch/arm/mach-imx/clk-imx6sl.c b/arch/arm/mach-imx/clk-imx6sl.c index fef46fa..9f1224d 100644 --- a/arch/arm/mach-imx/clk-imx6sl.c +++ b/arch/arm/mach-imx/clk-imx6sl.c @@ -7,7 +7,6 @@ * */ -#include #include #include #include @@ -79,7 +78,7 @@ static struct clk_div_table video_div_table[] = { { } }; -static struct clk *clks[IMX6SL_CLK_END]; +static struct clk_core *clks[IMX6SL_CLK_END]; static struct clk_onecell_data clk_data; static void __iomem *ccm_base; static void __iomem *anatop_base; @@ -355,7 +354,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node) of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); /* Ensure the AHB clk is at 132MHz. */ - ret = clk_set_rate(clks[IMX6SL_CLK_AHB], 132000000); + ret = clk_provider_set_rate(clks[IMX6SL_CLK_AHB], 132000000); if (ret) pr_warn("%s: failed to set AHB clock rate %d!\n", __func__, ret); @@ -365,15 +364,16 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node) * usecount and enabling/disabling of parent PLLs. */ for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) - clk_prepare_enable(clks[clks_init_on[i]]); + clk_provider_prepare_enable(clks[clks_init_on[i]]); if (IS_ENABLED(CONFIG_USB_MXS_PHY)) { - clk_prepare_enable(clks[IMX6SL_CLK_USBPHY1_GATE]); - clk_prepare_enable(clks[IMX6SL_CLK_USBPHY2_GATE]); + clk_provider_prepare_enable(clks[IMX6SL_CLK_USBPHY1_GATE]); + clk_provider_prepare_enable(clks[IMX6SL_CLK_USBPHY2_GATE]); } /* Audio-related clocks configuration */ - clk_set_parent(clks[IMX6SL_CLK_SPDIF0_SEL], clks[IMX6SL_CLK_PLL3_PFD3]); + clk_provider_set_parent(clks[IMX6SL_CLK_SPDIF0_SEL], + clks[IMX6SL_CLK_PLL3_PFD3]); /* Set initial power mode */ imx6q_set_lpm(WAIT_CLOCKED); diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c index ecde72b..1f2bc4b 100644 --- a/arch/arm/mach-imx/clk-imx6sx.c +++ b/arch/arm/mach-imx/clk-imx6sx.c @@ -10,7 +10,6 @@ */ #include -#include #include #include #include @@ -82,7 +81,7 @@ static const char *lvds_sels[] = { "dummy", "dummy", "pcie_ref_125m", "dummy", "usbphy1", "usbphy2", }; -static struct clk *clks[IMX6SX_CLK_CLK_END]; +static struct clk_core *clks[IMX6SX_CLK_CLK_END]; static struct clk_onecell_data clk_data; static int const clks_init_on[] __initconst = { @@ -136,12 +135,14 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) clks[IMX6SX_CLK_DUMMY] = imx_clk_fixed("dummy", 0); - clks[IMX6SX_CLK_CKIL] = of_clk_get_by_name(ccm_node, "ckil"); - clks[IMX6SX_CLK_OSC] = of_clk_get_by_name(ccm_node, "osc"); + clks[IMX6SX_CLK_CKIL] = of_clk_provider_get_by_name(ccm_node, "ckil"); + clks[IMX6SX_CLK_OSC] = of_clk_provider_get_by_name(ccm_node, "osc"); /* ipp_di clock is external input */ - clks[IMX6SX_CLK_IPP_DI0] = of_clk_get_by_name(ccm_node, "ipp_di0"); - clks[IMX6SX_CLK_IPP_DI1] = of_clk_get_by_name(ccm_node, "ipp_di1"); + clks[IMX6SX_CLK_IPP_DI0] = of_clk_provider_get_by_name(ccm_node, + "ipp_di0"); + clks[IMX6SX_CLK_IPP_DI1] = of_clk_provider_get_by_name(ccm_node, + "ipp_di1"); np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-anatop"); base = of_iomap(np, 0); @@ -453,65 +454,80 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) - clk_prepare_enable(clks[clks_init_on[i]]); + clk_provider_prepare_enable(clks[clks_init_on[i]]); if (IS_ENABLED(CONFIG_USB_MXS_PHY)) { - clk_prepare_enable(clks[IMX6SX_CLK_USBPHY1_GATE]); - clk_prepare_enable(clks[IMX6SX_CLK_USBPHY2_GATE]); + clk_provider_prepare_enable(clks[IMX6SX_CLK_USBPHY1_GATE]); + clk_provider_prepare_enable(clks[IMX6SX_CLK_USBPHY2_GATE]); } /* Set the default 132MHz for EIM module */ - clk_set_parent(clks[IMX6SX_CLK_EIM_SLOW_SEL], clks[IMX6SX_CLK_PLL2_PFD2]); - clk_set_rate(clks[IMX6SX_CLK_EIM_SLOW], 132000000); + clk_provider_set_parent(clks[IMX6SX_CLK_EIM_SLOW_SEL], + clks[IMX6SX_CLK_PLL2_PFD2]); + clk_provider_set_rate(clks[IMX6SX_CLK_EIM_SLOW], 132000000); /* set parent clock for LCDIF1 pixel clock */ - clk_set_parent(clks[IMX6SX_CLK_LCDIF1_PRE_SEL], clks[IMX6SX_CLK_PLL5_VIDEO_DIV]); - clk_set_parent(clks[IMX6SX_CLK_LCDIF1_SEL], clks[IMX6SX_CLK_LCDIF1_PODF]); + clk_provider_set_parent(clks[IMX6SX_CLK_LCDIF1_PRE_SEL], + clks[IMX6SX_CLK_PLL5_VIDEO_DIV]); + clk_provider_set_parent(clks[IMX6SX_CLK_LCDIF1_SEL], + clks[IMX6SX_CLK_LCDIF1_PODF]); /* Set the parent clks of PCIe lvds1 and pcie_axi to be pcie ref, axi */ - if (clk_set_parent(clks[IMX6SX_CLK_LVDS1_SEL], clks[IMX6SX_CLK_PCIE_REF_125M])) + if (clk_provider_set_parent(clks[IMX6SX_CLK_LVDS1_SEL], clks[IMX6SX_CLK_PCIE_REF_125M])) pr_err("Failed to set pcie bus parent clk.\n"); - if (clk_set_parent(clks[IMX6SX_CLK_PCIE_AXI_SEL], clks[IMX6SX_CLK_AXI])) + if (clk_provider_set_parent(clks[IMX6SX_CLK_PCIE_AXI_SEL], clks[IMX6SX_CLK_AXI])) pr_err("Failed to set pcie parent clk.\n"); /* * Init enet system AHB clock, set to 200Mhz * pll2_pfd2_396m-> ENET_PODF-> ENET_AHB */ - clk_set_parent(clks[IMX6SX_CLK_ENET_PRE_SEL], clks[IMX6SX_CLK_PLL2_PFD2]); - clk_set_parent(clks[IMX6SX_CLK_ENET_SEL], clks[IMX6SX_CLK_ENET_PODF]); - clk_set_rate(clks[IMX6SX_CLK_ENET_PODF], 200000000); - clk_set_rate(clks[IMX6SX_CLK_ENET_REF], 125000000); - clk_set_rate(clks[IMX6SX_CLK_ENET2_REF], 125000000); + clk_provider_set_parent(clks[IMX6SX_CLK_ENET_PRE_SEL], + clks[IMX6SX_CLK_PLL2_PFD2]); + clk_provider_set_parent(clks[IMX6SX_CLK_ENET_SEL], + clks[IMX6SX_CLK_ENET_PODF]); + clk_provider_set_rate(clks[IMX6SX_CLK_ENET_PODF], 200000000); + clk_provider_set_rate(clks[IMX6SX_CLK_ENET_REF], 125000000); + clk_provider_set_rate(clks[IMX6SX_CLK_ENET2_REF], 125000000); /* Audio clocks */ - clk_set_rate(clks[IMX6SX_CLK_PLL4_AUDIO_DIV], 393216000); - - clk_set_parent(clks[IMX6SX_CLK_SPDIF_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]); - clk_set_rate(clks[IMX6SX_CLK_SPDIF_PODF], 98304000); - - clk_set_parent(clks[IMX6SX_CLK_AUDIO_SEL], clks[IMX6SX_CLK_PLL3_USB_OTG]); - clk_set_rate(clks[IMX6SX_CLK_AUDIO_PODF], 24000000); - - clk_set_parent(clks[IMX6SX_CLK_SSI1_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]); - clk_set_parent(clks[IMX6SX_CLK_SSI2_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]); - clk_set_parent(clks[IMX6SX_CLK_SSI3_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]); - clk_set_rate(clks[IMX6SX_CLK_SSI1_PODF], 24576000); - clk_set_rate(clks[IMX6SX_CLK_SSI2_PODF], 24576000); - clk_set_rate(clks[IMX6SX_CLK_SSI3_PODF], 24576000); - - clk_set_parent(clks[IMX6SX_CLK_ESAI_SEL], clks[IMX6SX_CLK_PLL4_AUDIO_DIV]); - clk_set_rate(clks[IMX6SX_CLK_ESAI_PODF], 24576000); + clk_provider_set_rate(clks[IMX6SX_CLK_PLL4_AUDIO_DIV], 393216000); + + clk_provider_set_parent(clks[IMX6SX_CLK_SPDIF_SEL], + clks[IMX6SX_CLK_PLL4_AUDIO_DIV]); + clk_provider_set_rate(clks[IMX6SX_CLK_SPDIF_PODF], 98304000); + + clk_provider_set_parent(clks[IMX6SX_CLK_AUDIO_SEL], + clks[IMX6SX_CLK_PLL3_USB_OTG]); + clk_provider_set_rate(clks[IMX6SX_CLK_AUDIO_PODF], 24000000); + + clk_provider_set_parent(clks[IMX6SX_CLK_SSI1_SEL], + clks[IMX6SX_CLK_PLL4_AUDIO_DIV]); + clk_provider_set_parent(clks[IMX6SX_CLK_SSI2_SEL], + clks[IMX6SX_CLK_PLL4_AUDIO_DIV]); + clk_provider_set_parent(clks[IMX6SX_CLK_SSI3_SEL], + clks[IMX6SX_CLK_PLL4_AUDIO_DIV]); + clk_provider_set_rate(clks[IMX6SX_CLK_SSI1_PODF], 24576000); + clk_provider_set_rate(clks[IMX6SX_CLK_SSI2_PODF], 24576000); + clk_provider_set_rate(clks[IMX6SX_CLK_SSI3_PODF], 24576000); + + clk_provider_set_parent(clks[IMX6SX_CLK_ESAI_SEL], + clks[IMX6SX_CLK_PLL4_AUDIO_DIV]); + clk_provider_set_rate(clks[IMX6SX_CLK_ESAI_PODF], 24576000); /* Set parent clock for vadc */ - clk_set_parent(clks[IMX6SX_CLK_VID_SEL], clks[IMX6SX_CLK_PLL3_USB_OTG]); + clk_provider_set_parent(clks[IMX6SX_CLK_VID_SEL], + clks[IMX6SX_CLK_PLL3_USB_OTG]); /* default parent of can_sel clock is invalid, manually set it here */ - clk_set_parent(clks[IMX6SX_CLK_CAN_SEL], clks[IMX6SX_CLK_PLL3_60M]); + clk_provider_set_parent(clks[IMX6SX_CLK_CAN_SEL], + clks[IMX6SX_CLK_PLL3_60M]); /* Update gpu clock from default 528M to 720M */ - clk_set_parent(clks[IMX6SX_CLK_GPU_CORE_SEL], clks[IMX6SX_CLK_PLL3_PFD0]); - clk_set_parent(clks[IMX6SX_CLK_GPU_AXI_SEL], clks[IMX6SX_CLK_PLL3_PFD0]); + clk_provider_set_parent(clks[IMX6SX_CLK_GPU_CORE_SEL], + clks[IMX6SX_CLK_PLL3_PFD0]); + clk_provider_set_parent(clks[IMX6SX_CLK_GPU_AXI_SEL], + clks[IMX6SX_CLK_PLL3_PFD0]); /* Set initial power mode */ imx6q_set_lpm(WAIT_CLOCKED); diff --git a/arch/arm/mach-imx/clk-pfd.c b/arch/arm/mach-imx/clk-pfd.c index 0b0f6f6..7f172a2 100644 --- a/arch/arm/mach-imx/clk-pfd.c +++ b/arch/arm/mach-imx/clk-pfd.c @@ -10,7 +10,6 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include #include #include #include @@ -128,11 +127,11 @@ static const struct clk_ops clk_pfd_ops = { .is_enabled = clk_pfd_is_enabled, }; -struct clk *imx_clk_pfd(const char *name, const char *parent_name, +struct clk_core *imx_clk_pfd(const char *name, const char *parent_name, void __iomem *reg, u8 idx) { struct clk_pfd *pfd; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; pfd = kzalloc(sizeof(*pfd), GFP_KERNEL); diff --git a/arch/arm/mach-imx/clk-pllv1.c b/arch/arm/mach-imx/clk-pllv1.c index d21d14c..7ef2cab 100644 --- a/arch/arm/mach-imx/clk-pllv1.c +++ b/arch/arm/mach-imx/clk-pllv1.c @@ -1,4 +1,3 @@ -#include #include #include #include @@ -97,11 +96,11 @@ static struct clk_ops clk_pllv1_ops = { .recalc_rate = clk_pllv1_recalc_rate, }; -struct clk *imx_clk_pllv1(const char *name, const char *parent, +struct clk_core *imx_clk_pllv1(const char *name, const char *parent, void __iomem *base) { struct clk_pllv1 *pll; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; pll = kmalloc(sizeof(*pll), GFP_KERNEL); diff --git a/arch/arm/mach-imx/clk-pllv2.c b/arch/arm/mach-imx/clk-pllv2.c index 20889d5..3dca7df 100644 --- a/arch/arm/mach-imx/clk-pllv2.c +++ b/arch/arm/mach-imx/clk-pllv2.c @@ -1,5 +1,4 @@ #include -#include #include #include #include @@ -237,11 +236,11 @@ static struct clk_ops clk_pllv2_ops = { .set_rate = clk_pllv2_set_rate, }; -struct clk *imx_clk_pllv2(const char *name, const char *parent, +struct clk_core *imx_clk_pllv2(const char *name, const char *parent, void __iomem *base) { struct clk_pllv2 *pll; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; pll = kzalloc(sizeof(*pll), GFP_KERNEL); diff --git a/arch/arm/mach-imx/clk-pllv3.c b/arch/arm/mach-imx/clk-pllv3.c index 6136405..a07603d 100644 --- a/arch/arm/mach-imx/clk-pllv3.c +++ b/arch/arm/mach-imx/clk-pllv3.c @@ -10,7 +10,6 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include #include #include #include @@ -320,13 +319,13 @@ static const struct clk_ops clk_pllv3_enet_ops = { .recalc_rate = clk_pllv3_enet_recalc_rate, }; -struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, +struct clk_core *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, const char *parent_name, void __iomem *base, u32 div_mask) { struct clk_pllv3 *pll; const struct clk_ops *ops; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; pll = kzalloc(sizeof(*pll), GFP_KERNEL); diff --git a/arch/arm/mach-imx/clk-vf610.c b/arch/arm/mach-imx/clk-vf610.c index f60d6d5..bd2450b 100644 --- a/arch/arm/mach-imx/clk-vf610.c +++ b/arch/arm/mach-imx/clk-vf610.c @@ -9,7 +9,6 @@ */ #include -#include #include #include "clk.h" @@ -95,7 +94,7 @@ static struct clk_div_table pll4_main_div_table[] = { { } }; -static struct clk *clk[VF610_CLK_END]; +static struct clk_core *clk[VF610_CLK_END]; static struct clk_onecell_data clk_data; static void __init vf610_clocks_init(struct device_node *ccm_node) @@ -307,20 +306,32 @@ static void __init vf610_clocks_init(struct device_node *ccm_node) imx_check_clocks(clk, ARRAY_SIZE(clk)); - clk_set_parent(clk[VF610_CLK_QSPI0_SEL], clk[VF610_CLK_PLL1_PFD4]); - clk_set_rate(clk[VF610_CLK_QSPI0_X4_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_SEL]) / 2); - clk_set_rate(clk[VF610_CLK_QSPI0_X2_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_X4_DIV]) / 2); - clk_set_rate(clk[VF610_CLK_QSPI0_X1_DIV], clk_get_rate(clk[VF610_CLK_QSPI0_X2_DIV]) / 2); - - clk_set_parent(clk[VF610_CLK_QSPI1_SEL], clk[VF610_CLK_PLL1_PFD4]); - clk_set_rate(clk[VF610_CLK_QSPI1_X4_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_SEL]) / 2); - clk_set_rate(clk[VF610_CLK_QSPI1_X2_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_X4_DIV]) / 2); - clk_set_rate(clk[VF610_CLK_QSPI1_X1_DIV], clk_get_rate(clk[VF610_CLK_QSPI1_X2_DIV]) / 2); - - clk_set_parent(clk[VF610_CLK_SAI0_SEL], clk[VF610_CLK_AUDIO_EXT]); - clk_set_parent(clk[VF610_CLK_SAI1_SEL], clk[VF610_CLK_AUDIO_EXT]); - clk_set_parent(clk[VF610_CLK_SAI2_SEL], clk[VF610_CLK_AUDIO_EXT]); - clk_set_parent(clk[VF610_CLK_SAI3_SEL], clk[VF610_CLK_AUDIO_EXT]); + clk_provider_set_parent(clk[VF610_CLK_QSPI0_SEL], + clk[VF610_CLK_PLL1_PFD4]); + clk_provider_set_rate(clk[VF610_CLK_QSPI0_X4_DIV], + clk_provider_get_rate(clk[VF610_CLK_QSPI0_SEL]) / 2); + clk_provider_set_rate(clk[VF610_CLK_QSPI0_X2_DIV], + clk_provider_get_rate(clk[VF610_CLK_QSPI0_X4_DIV]) / 2); + clk_provider_set_rate(clk[VF610_CLK_QSPI0_X1_DIV], + clk_provider_get_rate(clk[VF610_CLK_QSPI0_X2_DIV]) / 2); + + clk_provider_set_parent(clk[VF610_CLK_QSPI1_SEL], + clk[VF610_CLK_PLL1_PFD4]); + clk_provider_set_rate(clk[VF610_CLK_QSPI1_X4_DIV], + clk_provider_get_rate(clk[VF610_CLK_QSPI1_SEL]) / 2); + clk_provider_set_rate(clk[VF610_CLK_QSPI1_X2_DIV], + clk_provider_get_rate(clk[VF610_CLK_QSPI1_X4_DIV]) / 2); + clk_provider_set_rate(clk[VF610_CLK_QSPI1_X1_DIV], + clk_provider_get_rate(clk[VF610_CLK_QSPI1_X2_DIV]) / 2); + + clk_provider_set_parent(clk[VF610_CLK_SAI0_SEL], + clk[VF610_CLK_AUDIO_EXT]); + clk_provider_set_parent(clk[VF610_CLK_SAI1_SEL], + clk[VF610_CLK_AUDIO_EXT]); + clk_provider_set_parent(clk[VF610_CLK_SAI2_SEL], + clk[VF610_CLK_AUDIO_EXT]); + clk_provider_set_parent(clk[VF610_CLK_SAI3_SEL], + clk[VF610_CLK_AUDIO_EXT]); /* Add the clocks to provider list */ clk_data.clks = clk; diff --git a/arch/arm/mach-imx/clk.c b/arch/arm/mach-imx/clk.c index df12b53..fc54203 100644 --- a/arch/arm/mach-imx/clk.c +++ b/arch/arm/mach-imx/clk.c @@ -1,4 +1,3 @@ -#include #include #include #include @@ -7,7 +6,7 @@ DEFINE_SPINLOCK(imx_ccm_lock); -void __init imx_check_clocks(struct clk *clks[], unsigned int count) +void __init imx_check_clocks(struct clk_core *clks[], unsigned int count) { unsigned i; @@ -17,10 +16,10 @@ void __init imx_check_clocks(struct clk *clks[], unsigned int count) i, PTR_ERR(clks[i])); } -static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name) +static struct clk_core * __init imx_obtain_fixed_clock_from_dt(const char *name) { struct of_phandle_args phandle; - struct clk *clk = ERR_PTR(-ENODEV); + struct clk_core *clk = ERR_PTR(-ENODEV); char *path; path = kasprintf(GFP_KERNEL, "/clocks/%s", name); @@ -37,10 +36,10 @@ static struct clk * __init imx_obtain_fixed_clock_from_dt(const char *name) return clk; } -struct clk * __init imx_obtain_fixed_clock( +struct clk_core * __init imx_obtain_fixed_clock( const char *name, unsigned long rate) { - struct clk *clk; + struct clk_core *clk; clk = imx_obtain_fixed_clock_from_dt(name); if (IS_ERR(clk)) diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h index d5ba76f..0926889 100644 --- a/arch/arm/mach-imx/clk.h +++ b/arch/arm/mach-imx/clk.h @@ -6,14 +6,14 @@ extern spinlock_t imx_ccm_lock; -void imx_check_clocks(struct clk *clks[], unsigned int count); +void imx_check_clocks(struct clk_core *clks[], unsigned int count); extern void imx_cscmr1_fixup(u32 *val); -struct clk *imx_clk_pllv1(const char *name, const char *parent, +struct clk_core *imx_clk_pllv1(const char *name, const char *parent, void __iomem *base); -struct clk *imx_clk_pllv2(const char *name, const char *parent, +struct clk_core *imx_clk_pllv2(const char *name, const char *parent, void __iomem *base); enum imx_pllv3_type { @@ -24,26 +24,26 @@ enum imx_pllv3_type { IMX_PLLV3_ENET, }; -struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, +struct clk_core *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, const char *parent_name, void __iomem *base, u32 div_mask); -struct clk *clk_register_gate2(struct device *dev, const char *name, +struct clk_core *clk_register_gate2(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock, unsigned int *share_count); -struct clk * imx_obtain_fixed_clock( +struct clk_core * imx_obtain_fixed_clock( const char *name, unsigned long rate); -static inline struct clk *imx_clk_gate2(const char *name, const char *parent, +static inline struct clk_core *imx_clk_gate2(const char *name, const char *parent, void __iomem *reg, u8 shift) { return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg, shift, 0, &imx_ccm_lock, NULL); } -static inline struct clk *imx_clk_gate2_shared(const char *name, +static inline struct clk_core *imx_clk_gate2_shared(const char *name, const char *parent, void __iomem *reg, u8 shift, unsigned int *share_count) { @@ -51,38 +51,38 @@ static inline struct clk *imx_clk_gate2_shared(const char *name, shift, 0, &imx_ccm_lock, share_count); } -struct clk *imx_clk_pfd(const char *name, const char *parent_name, +struct clk_core *imx_clk_pfd(const char *name, const char *parent_name, void __iomem *reg, u8 idx); -struct clk *imx_clk_busy_divider(const char *name, const char *parent_name, +struct clk_core *imx_clk_busy_divider(const char *name, const char *parent_name, void __iomem *reg, u8 shift, u8 width, void __iomem *busy_reg, u8 busy_shift); -struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, +struct clk_core *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, u8 width, void __iomem *busy_reg, u8 busy_shift, const char **parent_names, int num_parents); -struct clk *imx_clk_fixup_divider(const char *name, const char *parent, +struct clk_core *imx_clk_fixup_divider(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width, void (*fixup)(u32 *val)); -struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg, +struct clk_core *imx_clk_fixup_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char **parents, int num_parents, void (*fixup)(u32 *val)); -static inline struct clk *imx_clk_fixed(const char *name, int rate) +static inline struct clk_core *imx_clk_fixed(const char *name, int rate) { return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate); } -static inline struct clk *imx_clk_divider(const char *name, const char *parent, +static inline struct clk_core *imx_clk_divider(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width) { return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT, reg, shift, width, 0, &imx_ccm_lock); } -static inline struct clk *imx_clk_divider_flags(const char *name, +static inline struct clk_core *imx_clk_divider_flags(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width, unsigned long flags) { @@ -90,21 +90,21 @@ static inline struct clk *imx_clk_divider_flags(const char *name, reg, shift, width, 0, &imx_ccm_lock); } -static inline struct clk *imx_clk_gate(const char *name, const char *parent, +static inline struct clk_core *imx_clk_gate(const char *name, const char *parent, void __iomem *reg, u8 shift) { return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, shift, 0, &imx_ccm_lock); } -static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent, +static inline struct clk_core *imx_clk_gate_dis(const char *name, const char *parent, void __iomem *reg, u8 shift) { return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg, shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock); } -static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, +static inline struct clk_core *imx_clk_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char **parents, int num_parents) { return clk_register_mux(NULL, name, parents, num_parents, @@ -112,7 +112,7 @@ static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg, width, 0, &imx_ccm_lock); } -static inline struct clk *imx_clk_mux_flags(const char *name, +static inline struct clk_core *imx_clk_mux_flags(const char *name, void __iomem *reg, u8 shift, u8 width, const char **parents, int num_parents, unsigned long flags) { @@ -121,7 +121,7 @@ static inline struct clk *imx_clk_mux_flags(const char *name, &imx_ccm_lock); } -static inline struct clk *imx_clk_fixed_factor(const char *name, +static inline struct clk_core *imx_clk_fixed_factor(const char *name, const char *parent, unsigned int mult, unsigned int div) { return clk_register_fixed_factor(NULL, name, parent, diff --git a/arch/arm/mach-msm/clock-pcom.c b/arch/arm/mach-msm/clock-pcom.c index 9a80449..14352c4 100644 --- a/arch/arm/mach-msm/clock-pcom.c +++ b/arch/arm/mach-msm/clock-pcom.c @@ -132,7 +132,7 @@ static int msm_clock_pcom_probe(struct platform_device *pdev) for (i = 0; i < pdata->num_lookups; i++) { const struct clk_pcom_desc *desc = &pdata->lookup[i]; - struct clk *c; + struct clk_core *c; struct clk_pcom *p; struct clk_hw *hw; struct clk_init_data init; diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c index e6ac679..fee2643 100644 --- a/arch/arm/mach-mv78xx0/common.c +++ b/arch/arm/mach-mv78xx0/common.c @@ -164,7 +164,7 @@ void __init mv78xx0_map_io(void) /***************************************************************************** * CLK tree ****************************************************************************/ -static struct clk *tclk; +static struct clk_core *tclk; static void __init clk_init(void) { diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index 018353d..0f41427 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c @@ -551,7 +551,7 @@ static struct regulator_consumer_supply cm_t35_camera_supplies[] = { static void __init cm_t35_init_camera(void) { - struct clk *clk; + struct clk_core *clk; clk = clk_register_fixed_rate(NULL, "mt9t001-clkin", NULL, CLK_IS_ROOT, 48000000); diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c index eb8c75e..1180abe 100644 --- a/arch/arm/mach-omap2/cclock3xxx_data.c +++ b/arch/arm/mach-omap2/cclock3xxx_data.c @@ -18,7 +18,6 @@ */ #include -#include #include #include #include @@ -107,7 +106,7 @@ static struct dpll_data dpll3_dd = { .max_divider = OMAP3_MAX_DPLL_DIV, }; -static struct clk dpll3_ck; +static struct clk_core dpll3_ck; static const char *dpll3_ck_parent_names[] = { "sys_ck", @@ -137,7 +136,7 @@ DEFINE_CLK_DIVIDER(dpll3_m2_ck, "dpll3_ck", &dpll3_ck, 0x0, OMAP3430_CORE_DPLL_CLKOUT_DIV_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); -static struct clk core_ck; +static struct clk_core core_ck; static const char *core_ck_parent_names[] = { "dpll3_m2_ck", @@ -158,7 +157,7 @@ DEFINE_CLK_DIVIDER(l4_ick, "l3_ick", &l3_ick, 0x0, OMAP3430_CLKSEL_L4_SHIFT, OMAP3430_CLKSEL_L4_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); -static struct clk security_l4_ick2; +static struct clk_core security_l4_ick2; static const char *security_l4_ick2_parent_names[] = { "l4_ick", @@ -167,7 +166,7 @@ static const char *security_l4_ick2_parent_names[] = { DEFINE_STRUCT_CLK_HW_OMAP(security_l4_ick2, NULL); DEFINE_STRUCT_CLK(security_l4_ick2, security_l4_ick2_parent_names, core_ck_ops); -static struct clk aes1_ick; +static struct clk_core aes1_ick; static const char *aes1_ick_parent_names[] = { "security_l4_ick2", @@ -190,7 +189,7 @@ static struct clk_hw_omap aes1_ick_hw = { DEFINE_STRUCT_CLK(aes1_ick, aes1_ick_parent_names, aes1_ick_ops); -static struct clk core_l4_ick; +static struct clk_core core_l4_ick; static const struct clk_ops core_l4_ick_ops = { .init = &omap2_init_clk_clkdm, @@ -199,7 +198,7 @@ static const struct clk_ops core_l4_ick_ops = { DEFINE_STRUCT_CLK_HW_OMAP(core_l4_ick, "core_l4_clkdm"); DEFINE_STRUCT_CLK(core_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops); -static struct clk aes2_ick; +static struct clk_core aes2_ick; static const char *aes2_ick_parent_names[] = { "core_l4_ick", @@ -224,7 +223,7 @@ static struct clk_hw_omap aes2_ick_hw = { DEFINE_STRUCT_CLK(aes2_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk dpll1_fck; +static struct clk_core dpll1_fck; static struct dpll_data dpll1_dd = { .mult_div1_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL), @@ -248,7 +247,7 @@ static struct dpll_data dpll1_dd = { .max_divider = OMAP3_MAX_DPLL_DIV, }; -static struct clk dpll1_ck; +static struct clk_core dpll1_ck; static const struct clk_ops dpll1_ck_ops = { .init = &omap2_init_clk_clkdm, @@ -279,7 +278,7 @@ DEFINE_CLK_DIVIDER(dpll1_x2m2_ck, "dpll1_x2_ck", &dpll1_x2_ck, 0x0, OMAP3430_MPU_DPLL_CLKOUT_DIV_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); -static struct clk mpu_ck; +static struct clk_core mpu_ck; static const char *mpu_ck_parent_names[] = { "dpll1_x2m2_ck", @@ -293,7 +292,7 @@ DEFINE_CLK_DIVIDER(arm_fck, "mpu_ck", &mpu_ck, 0x0, OMAP3430_ST_MPU_CLK_SHIFT, OMAP3430_ST_MPU_CLK_WIDTH, 0x0, NULL); -static struct clk cam_ick; +static struct clk_core cam_ick; static struct clk_hw_omap cam_ick_hw = { .hw = { @@ -358,7 +357,7 @@ static struct dpll_data dpll4_dd_3630 __initdata = { .flags = DPLL_J_TYPE }; -static struct clk dpll4_ck; +static struct clk_core dpll4_ck; static const struct clk_ops dpll4_ck_ops = { .init = &omap2_init_clk_clkdm, @@ -422,7 +421,7 @@ DEFINE_CLK_DIVIDER(dpll4_m5_ck, "dpll4_ck", &dpll4_ck, 0x0, OMAP3430_CLKSEL_CAM_SHIFT, OMAP3630_CLKSEL_CAM_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); -static struct clk dpll4_m5x2_ck; +static struct clk_core dpll4_m5x2_ck; static const char *dpll4_m5x2_ck_parent_names[] = { "dpll4_m5_ck", @@ -459,7 +458,7 @@ static struct clk_hw_omap dpll4_m5x2_ck_hw = { DEFINE_STRUCT_CLK_FLAGS(dpll4_m5x2_ck, dpll4_m5x2_ck_parent_names, dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT); -static struct clk dpll4_m5x2_ck_3630 = { +static struct clk_core dpll4_m5x2_ck_3630 = { .name = "dpll4_m5x2_ck", .hw = &dpll4_m5x2_ck_hw.hw, .parent_names = dpll4_m5x2_ck_parent_names, @@ -468,7 +467,7 @@ static struct clk dpll4_m5x2_ck_3630 = { .flags = CLK_SET_RATE_PARENT, }; -static struct clk cam_mclk; +static struct clk_core cam_mclk; static const char *cam_mclk_parent_names[] = { "dpll4_m5x2_ck", @@ -483,7 +482,7 @@ static struct clk_hw_omap cam_mclk_hw = { .clkdm_name = "cam_clkdm", }; -static struct clk cam_mclk = { +static struct clk_core cam_mclk = { .name = "cam_mclk", .hw = &cam_mclk_hw.hw, .parent_names = cam_mclk_parent_names, @@ -512,7 +511,7 @@ DEFINE_CLK_DIVIDER(dpll4_m2_ck, "dpll4_ck", &dpll4_ck, 0x0, OMAP3430_DIV_96M_SHIFT, OMAP3630_DIV_96M_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); -static struct clk dpll4_m2x2_ck; +static struct clk_core dpll4_m2x2_ck; static const char *dpll4_m2x2_ck_parent_names[] = { "dpll4_m2_ck", @@ -531,7 +530,7 @@ static struct clk_hw_omap dpll4_m2x2_ck_hw = { DEFINE_STRUCT_CLK(dpll4_m2x2_ck, dpll4_m2x2_ck_parent_names, dpll4_m5x2_ck_ops); -static struct clk dpll4_m2x2_ck_3630 = { +static struct clk_core dpll4_m2x2_ck_3630 = { .name = "dpll4_m2x2_ck", .hw = &dpll4_m2x2_ck_hw.hw, .parent_names = dpll4_m2x2_ck_parent_names, @@ -539,7 +538,7 @@ static struct clk dpll4_m2x2_ck_3630 = { .ops = &dpll4_m5x2_ck_3630_ops, }; -static struct clk omap_96m_alwon_fck; +static struct clk_core omap_96m_alwon_fck; static const char *omap_96m_alwon_fck_parent_names[] = { "dpll4_m2x2_ck", @@ -549,7 +548,7 @@ DEFINE_STRUCT_CLK_HW_OMAP(omap_96m_alwon_fck, NULL); DEFINE_STRUCT_CLK(omap_96m_alwon_fck, omap_96m_alwon_fck_parent_names, core_ck_ops); -static struct clk cm_96m_fck; +static struct clk_core cm_96m_fck; static const char *cm_96m_fck_parent_names[] = { "omap_96m_alwon_fck", @@ -568,7 +567,7 @@ DEFINE_CLK_DIVIDER_TABLE(dpll4_m3_ck, "dpll4_ck", &dpll4_ck, 0x0, OMAP3430_CLKSEL_TV_SHIFT, OMAP3630_CLKSEL_TV_WIDTH, 0, dpll4_mx_ck_div_table, NULL); -static struct clk dpll4_m3x2_ck; +static struct clk_core dpll4_m3x2_ck; static const char *dpll4_m3x2_ck_parent_names[] = { "dpll4_m3_ck", @@ -587,7 +586,7 @@ static struct clk_hw_omap dpll4_m3x2_ck_hw = { DEFINE_STRUCT_CLK(dpll4_m3x2_ck, dpll4_m3x2_ck_parent_names, dpll4_m5x2_ck_ops); -static struct clk dpll4_m3x2_ck_3630 = { +static struct clk_core dpll4_m3x2_ck_3630 = { .name = "dpll4_m3x2_ck", .hw = &dpll4_m3x2_ck_hw.hw, .parent_names = dpll4_m3x2_ck_parent_names, @@ -651,7 +650,7 @@ static const char *omap_48m_fck_parent_names[] = { "cm_96m_fck", "sys_altclk", }; -static struct clk omap_48m_fck; +static struct clk_core omap_48m_fck; static const struct clk_ops omap_48m_fck_ops = { .recalc_rate = &omap2_clksel_recalc, @@ -672,7 +671,7 @@ DEFINE_STRUCT_CLK(omap_48m_fck, omap_48m_fck_parent_names, omap_48m_fck_ops); DEFINE_CLK_FIXED_FACTOR(omap_12m_fck, "omap_48m_fck", &omap_48m_fck, 0x0, 1, 4); -static struct clk core_12m_fck; +static struct clk_core core_12m_fck; static const char *core_12m_fck_parent_names[] = { "omap_12m_fck", @@ -681,7 +680,7 @@ static const char *core_12m_fck_parent_names[] = { DEFINE_STRUCT_CLK_HW_OMAP(core_12m_fck, "core_l4_clkdm"); DEFINE_STRUCT_CLK(core_12m_fck, core_12m_fck_parent_names, core_l4_ick_ops); -static struct clk core_48m_fck; +static struct clk_core core_48m_fck; static const char *core_48m_fck_parent_names[] = { "omap_48m_fck", @@ -698,7 +697,7 @@ DEFINE_CLK_MUX(omap_96m_fck, omap_96m_fck_parent_names, NULL, 0x0, OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), OMAP3430_SOURCE_96M_SHIFT, OMAP3430_SOURCE_96M_WIDTH, 0x0, NULL); -static struct clk core_96m_fck; +static struct clk_core core_96m_fck; static const char *core_96m_fck_parent_names[] = { "omap_96m_fck", @@ -707,7 +706,7 @@ static const char *core_96m_fck_parent_names[] = { DEFINE_STRUCT_CLK_HW_OMAP(core_96m_fck, "core_l4_clkdm"); DEFINE_STRUCT_CLK(core_96m_fck, core_96m_fck_parent_names, core_l4_ick_ops); -static struct clk core_l3_ick; +static struct clk_core core_l3_ick; static const char *core_l3_ick_parent_names[] = { "l3_ick", @@ -718,7 +717,7 @@ DEFINE_STRUCT_CLK(core_l3_ick, core_l3_ick_parent_names, core_l4_ick_ops); DEFINE_CLK_FIXED_FACTOR(dpll3_m2x2_ck, "dpll3_m2_ck", &dpll3_m2_ck, 0x0, 2, 1); -static struct clk corex2_fck; +static struct clk_core corex2_fck; static const char *corex2_fck_parent_names[] = { "dpll3_m2x2_ck", @@ -727,7 +726,7 @@ static const char *corex2_fck_parent_names[] = { DEFINE_STRUCT_CLK_HW_OMAP(corex2_fck, NULL); DEFINE_STRUCT_CLK(corex2_fck, corex2_fck_parent_names, core_ck_ops); -static struct clk cpefuse_fck; +static struct clk_core cpefuse_fck; static struct clk_hw_omap cpefuse_fck_hw = { .hw = { @@ -740,7 +739,7 @@ static struct clk_hw_omap cpefuse_fck_hw = { DEFINE_STRUCT_CLK(cpefuse_fck, dpll3_ck_parent_names, aes2_ick_ops); -static struct clk csi2_96m_fck; +static struct clk_core csi2_96m_fck; static const char *csi2_96m_fck_parent_names[] = { "core_96m_fck", @@ -757,7 +756,7 @@ static struct clk_hw_omap csi2_96m_fck_hw = { DEFINE_STRUCT_CLK(csi2_96m_fck, csi2_96m_fck_parent_names, aes2_ick_ops); -static struct clk d2d_26m_fck; +static struct clk_core d2d_26m_fck; static struct clk_hw_omap d2d_26m_fck_hw = { .hw = { @@ -771,7 +770,7 @@ static struct clk_hw_omap d2d_26m_fck_hw = { DEFINE_STRUCT_CLK(d2d_26m_fck, dpll3_ck_parent_names, aes2_ick_ops); -static struct clk des1_ick; +static struct clk_core des1_ick; static struct clk_hw_omap des1_ick_hw = { .hw = { @@ -784,7 +783,7 @@ static struct clk_hw_omap des1_ick_hw = { DEFINE_STRUCT_CLK(des1_ick, aes1_ick_parent_names, aes1_ick_ops); -static struct clk des2_ick; +static struct clk_core des2_ick; static struct clk_hw_omap des2_ick_hw = { .hw = { @@ -803,7 +802,7 @@ DEFINE_CLK_DIVIDER(dpll1_fck, "core_ck", &core_ck, 0x0, OMAP3430_MPU_CLK_SRC_SHIFT, OMAP3430_MPU_CLK_SRC_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); -static struct clk dpll2_fck; +static struct clk_core dpll2_fck; static struct dpll_data dpll2_dd = { .mult_div1_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL1_PLL), @@ -828,7 +827,7 @@ static struct dpll_data dpll2_dd = { .max_divider = OMAP3_MAX_DPLL_DIV, }; -static struct clk dpll2_ck; +static struct clk_core dpll2_ck; static struct clk_hw_omap dpll2_ck_hw = { .hw = { @@ -857,7 +856,7 @@ DEFINE_CLK_DIVIDER(dpll3_m3_ck, "dpll3_ck", &dpll3_ck, 0x0, OMAP3430_DIV_DPLL3_SHIFT, OMAP3430_DIV_DPLL3_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); -static struct clk dpll3_m3x2_ck; +static struct clk_core dpll3_m3x2_ck; static const char *dpll3_m3x2_ck_parent_names[] = { "dpll3_m3_ck", @@ -876,7 +875,7 @@ static struct clk_hw_omap dpll3_m3x2_ck_hw = { DEFINE_STRUCT_CLK(dpll3_m3x2_ck, dpll3_m3x2_ck_parent_names, dpll4_m5x2_ck_ops); -static struct clk dpll3_m3x2_ck_3630 = { +static struct clk_core dpll3_m3x2_ck_3630 = { .name = "dpll3_m3x2_ck", .hw = &dpll3_m3x2_ck_hw.hw, .parent_names = dpll3_m3x2_ck_parent_names, @@ -891,7 +890,7 @@ DEFINE_CLK_DIVIDER_TABLE(dpll4_m4_ck, "dpll4_ck", &dpll4_ck, 0x0, OMAP3430_CLKSEL_DSS1_SHIFT, OMAP3630_CLKSEL_DSS1_WIDTH, 0, dpll4_mx_ck_div_table, NULL); -static struct clk dpll4_m4x2_ck; +static struct clk_core dpll4_m4x2_ck; static const char *dpll4_m4x2_ck_parent_names[] = { "dpll4_m4_ck", @@ -911,7 +910,7 @@ static struct clk_hw_omap dpll4_m4x2_ck_hw = { DEFINE_STRUCT_CLK_FLAGS(dpll4_m4x2_ck, dpll4_m4x2_ck_parent_names, dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT); -static struct clk dpll4_m4x2_ck_3630 = { +static struct clk_core dpll4_m4x2_ck_3630 = { .name = "dpll4_m4x2_ck", .hw = &dpll4_m4x2_ck_hw.hw, .parent_names = dpll4_m4x2_ck_parent_names, @@ -925,7 +924,7 @@ DEFINE_CLK_DIVIDER(dpll4_m6_ck, "dpll4_ck", &dpll4_ck, 0x0, OMAP3430_DIV_DPLL4_SHIFT, OMAP3630_DIV_DPLL4_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); -static struct clk dpll4_m6x2_ck; +static struct clk_core dpll4_m6x2_ck; static const char *dpll4_m6x2_ck_parent_names[] = { "dpll4_m6_ck", @@ -944,7 +943,7 @@ static struct clk_hw_omap dpll4_m6x2_ck_hw = { DEFINE_STRUCT_CLK(dpll4_m6x2_ck, dpll4_m6x2_ck_parent_names, dpll4_m5x2_ck_ops); -static struct clk dpll4_m6x2_ck_3630 = { +static struct clk_core dpll4_m6x2_ck_3630 = { .name = "dpll4_m6x2_ck", .hw = &dpll4_m6x2_ck_hw.hw, .parent_names = dpll4_m6x2_ck_parent_names, @@ -976,7 +975,7 @@ static struct dpll_data dpll5_dd = { .max_divider = OMAP3_MAX_DPLL_DIV, }; -static struct clk dpll5_ck; +static struct clk_core dpll5_ck; static struct clk_hw_omap dpll5_ck_hw = { .hw = { @@ -994,7 +993,7 @@ DEFINE_CLK_DIVIDER(dpll5_m2_ck, "dpll5_ck", &dpll5_ck, 0x0, OMAP3430ES2_DIV_120M_SHIFT, OMAP3430ES2_DIV_120M_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); -static struct clk dss1_alwon_fck_3430es1; +static struct clk_core dss1_alwon_fck_3430es1; static const char *dss1_alwon_fck_3430es1_parent_names[] = { "dpll4_m4x2_ck", @@ -1013,7 +1012,7 @@ DEFINE_STRUCT_CLK_FLAGS(dss1_alwon_fck_3430es1, dss1_alwon_fck_3430es1_parent_names, aes2_ick_ops, CLK_SET_RATE_PARENT); -static struct clk dss1_alwon_fck_3430es2; +static struct clk_core dss1_alwon_fck_3430es2; static struct clk_hw_omap dss1_alwon_fck_3430es2_hw = { .hw = { @@ -1029,7 +1028,7 @@ DEFINE_STRUCT_CLK_FLAGS(dss1_alwon_fck_3430es2, dss1_alwon_fck_3430es1_parent_names, aes2_ick_ops, CLK_SET_RATE_PARENT); -static struct clk dss2_alwon_fck; +static struct clk_core dss2_alwon_fck; static struct clk_hw_omap dss2_alwon_fck_hw = { .hw = { @@ -1042,7 +1041,7 @@ static struct clk_hw_omap dss2_alwon_fck_hw = { DEFINE_STRUCT_CLK(dss2_alwon_fck, dpll3_ck_parent_names, aes2_ick_ops); -static struct clk dss_96m_fck; +static struct clk_core dss_96m_fck; static struct clk_hw_omap dss_96m_fck_hw = { .hw = { @@ -1055,7 +1054,7 @@ static struct clk_hw_omap dss_96m_fck_hw = { DEFINE_STRUCT_CLK(dss_96m_fck, core_96m_fck_parent_names, aes2_ick_ops); -static struct clk dss_ick_3430es1; +static struct clk_core dss_ick_3430es1; static struct clk_hw_omap dss_ick_3430es1_hw = { .hw = { @@ -1069,7 +1068,7 @@ static struct clk_hw_omap dss_ick_3430es1_hw = { DEFINE_STRUCT_CLK(dss_ick_3430es1, security_l4_ick2_parent_names, aes2_ick_ops); -static struct clk dss_ick_3430es2; +static struct clk_core dss_ick_3430es2; static struct clk_hw_omap dss_ick_3430es2_hw = { .hw = { @@ -1083,7 +1082,7 @@ static struct clk_hw_omap dss_ick_3430es2_hw = { DEFINE_STRUCT_CLK(dss_ick_3430es2, security_l4_ick2_parent_names, aes2_ick_ops); -static struct clk dss_tv_fck; +static struct clk_core dss_tv_fck; static const char *dss_tv_fck_parent_names[] = { "omap_54m_fck", @@ -1100,7 +1099,7 @@ static struct clk_hw_omap dss_tv_fck_hw = { DEFINE_STRUCT_CLK(dss_tv_fck, dss_tv_fck_parent_names, aes2_ick_ops); -static struct clk emac_fck; +static struct clk_core emac_fck; static const char *emac_fck_parent_names[] = { "rmii_ck", @@ -1116,7 +1115,7 @@ static struct clk_hw_omap emac_fck_hw = { DEFINE_STRUCT_CLK(emac_fck, emac_fck_parent_names, aes1_ick_ops); -static struct clk ipss_ick; +static struct clk_core ipss_ick; static const char *ipss_ick_parent_names[] = { "core_l3_ick", @@ -1134,7 +1133,7 @@ static struct clk_hw_omap ipss_ick_hw = { DEFINE_STRUCT_CLK(ipss_ick, ipss_ick_parent_names, aes2_ick_ops); -static struct clk emac_ick; +static struct clk_core emac_ick; static const char *emac_ick_parent_names[] = { "ipss_ick", @@ -1152,7 +1151,7 @@ static struct clk_hw_omap emac_ick_hw = { DEFINE_STRUCT_CLK(emac_ick, emac_ick_parent_names, aes2_ick_ops); -static struct clk emu_core_alwon_ck; +static struct clk_core emu_core_alwon_ck; static const char *emu_core_alwon_ck_parent_names[] = { "dpll3_m3x2_ck", @@ -1162,7 +1161,7 @@ DEFINE_STRUCT_CLK_HW_OMAP(emu_core_alwon_ck, "dpll3_clkdm"); DEFINE_STRUCT_CLK(emu_core_alwon_ck, emu_core_alwon_ck_parent_names, core_l4_ick_ops); -static struct clk emu_mpu_alwon_ck; +static struct clk_core emu_mpu_alwon_ck; static const char *emu_mpu_alwon_ck_parent_names[] = { "mpu_ck", @@ -1171,7 +1170,7 @@ static const char *emu_mpu_alwon_ck_parent_names[] = { DEFINE_STRUCT_CLK_HW_OMAP(emu_mpu_alwon_ck, NULL); DEFINE_STRUCT_CLK(emu_mpu_alwon_ck, emu_mpu_alwon_ck_parent_names, core_ck_ops); -static struct clk emu_per_alwon_ck; +static struct clk_core emu_per_alwon_ck; static const char *emu_per_alwon_ck_parent_names[] = { "dpll4_m6x2_ck", @@ -1222,7 +1221,7 @@ static const struct clk_ops emu_src_ck_ops = { .disable = &omap2_clkops_disable_clkdm, }; -static struct clk emu_src_ck; +static struct clk_core emu_src_ck; static struct clk_hw_omap emu_src_ck_hw = { .hw = { @@ -1241,7 +1240,7 @@ DEFINE_CLK_DIVIDER(atclk_fck, "emu_src_ck", &emu_src_ck, 0x0, OMAP3430_CLKSEL_ATCLK_SHIFT, OMAP3430_CLKSEL_ATCLK_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); -static struct clk fac_ick; +static struct clk_core fac_ick; static struct clk_hw_omap fac_ick_hw = { .hw = { @@ -1255,7 +1254,7 @@ static struct clk_hw_omap fac_ick_hw = { DEFINE_STRUCT_CLK(fac_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk fshostusb_fck; +static struct clk_core fshostusb_fck; static const char *fshostusb_fck_parent_names[] = { "core_48m_fck", @@ -1273,7 +1272,7 @@ static struct clk_hw_omap fshostusb_fck_hw = { DEFINE_STRUCT_CLK(fshostusb_fck, fshostusb_fck_parent_names, aes2_ick_ops); -static struct clk gfx_l3_ck; +static struct clk_core gfx_l3_ck; static struct clk_hw_omap gfx_l3_ck_hw = { .hw = { @@ -1292,7 +1291,7 @@ DEFINE_CLK_DIVIDER(gfx_l3_fck, "l3_ick", &l3_ick, 0x0, OMAP_CLKSEL_GFX_SHIFT, OMAP_CLKSEL_GFX_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); -static struct clk gfx_cg1_ck; +static struct clk_core gfx_cg1_ck; static const char *gfx_cg1_ck_parent_names[] = { "gfx_l3_fck", @@ -1310,7 +1309,7 @@ static struct clk_hw_omap gfx_cg1_ck_hw = { DEFINE_STRUCT_CLK(gfx_cg1_ck, gfx_cg1_ck_parent_names, aes2_ick_ops); -static struct clk gfx_cg2_ck; +static struct clk_core gfx_cg2_ck; static struct clk_hw_omap gfx_cg2_ck_hw = { .hw = { @@ -1324,7 +1323,7 @@ static struct clk_hw_omap gfx_cg2_ck_hw = { DEFINE_STRUCT_CLK(gfx_cg2_ck, gfx_cg1_ck_parent_names, aes2_ick_ops); -static struct clk gfx_l3_ick; +static struct clk_core gfx_l3_ick; static const char *gfx_l3_ick_parent_names[] = { "gfx_l3_ck", @@ -1333,7 +1332,7 @@ static const char *gfx_l3_ick_parent_names[] = { DEFINE_STRUCT_CLK_HW_OMAP(gfx_l3_ick, "gfx_3430es1_clkdm"); DEFINE_STRUCT_CLK(gfx_l3_ick, gfx_l3_ick_parent_names, core_l4_ick_ops); -static struct clk wkup_32k_fck; +static struct clk_core wkup_32k_fck; static const char *wkup_32k_fck_parent_names[] = { "omap_32k_fck", @@ -1342,7 +1341,7 @@ static const char *wkup_32k_fck_parent_names[] = { DEFINE_STRUCT_CLK_HW_OMAP(wkup_32k_fck, "wkup_clkdm"); DEFINE_STRUCT_CLK(wkup_32k_fck, wkup_32k_fck_parent_names, core_l4_ick_ops); -static struct clk gpio1_dbck; +static struct clk_core gpio1_dbck; static const char *gpio1_dbck_parent_names[] = { "wkup_32k_fck", @@ -1359,12 +1358,12 @@ static struct clk_hw_omap gpio1_dbck_hw = { DEFINE_STRUCT_CLK(gpio1_dbck, gpio1_dbck_parent_names, aes2_ick_ops); -static struct clk wkup_l4_ick; +static struct clk_core wkup_l4_ick; DEFINE_STRUCT_CLK_HW_OMAP(wkup_l4_ick, "wkup_clkdm"); DEFINE_STRUCT_CLK(wkup_l4_ick, dpll3_ck_parent_names, core_l4_ick_ops); -static struct clk gpio1_ick; +static struct clk_core gpio1_ick; static const char *gpio1_ick_parent_names[] = { "wkup_l4_ick", @@ -1382,13 +1381,13 @@ static struct clk_hw_omap gpio1_ick_hw = { DEFINE_STRUCT_CLK(gpio1_ick, gpio1_ick_parent_names, aes2_ick_ops); -static struct clk per_32k_alwon_fck; +static struct clk_core per_32k_alwon_fck; DEFINE_STRUCT_CLK_HW_OMAP(per_32k_alwon_fck, "per_clkdm"); DEFINE_STRUCT_CLK(per_32k_alwon_fck, wkup_32k_fck_parent_names, core_l4_ick_ops); -static struct clk gpio2_dbck; +static struct clk_core gpio2_dbck; static const char *gpio2_dbck_parent_names[] = { "per_32k_alwon_fck", @@ -1405,12 +1404,12 @@ static struct clk_hw_omap gpio2_dbck_hw = { DEFINE_STRUCT_CLK(gpio2_dbck, gpio2_dbck_parent_names, aes2_ick_ops); -static struct clk per_l4_ick; +static struct clk_core per_l4_ick; DEFINE_STRUCT_CLK_HW_OMAP(per_l4_ick, "per_clkdm"); DEFINE_STRUCT_CLK(per_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops); -static struct clk gpio2_ick; +static struct clk_core gpio2_ick; static const char *gpio2_ick_parent_names[] = { "per_l4_ick", @@ -1428,7 +1427,7 @@ static struct clk_hw_omap gpio2_ick_hw = { DEFINE_STRUCT_CLK(gpio2_ick, gpio2_ick_parent_names, aes2_ick_ops); -static struct clk gpio3_dbck; +static struct clk_core gpio3_dbck; static struct clk_hw_omap gpio3_dbck_hw = { .hw = { @@ -1441,7 +1440,7 @@ static struct clk_hw_omap gpio3_dbck_hw = { DEFINE_STRUCT_CLK(gpio3_dbck, gpio2_dbck_parent_names, aes2_ick_ops); -static struct clk gpio3_ick; +static struct clk_core gpio3_ick; static struct clk_hw_omap gpio3_ick_hw = { .hw = { @@ -1455,7 +1454,7 @@ static struct clk_hw_omap gpio3_ick_hw = { DEFINE_STRUCT_CLK(gpio3_ick, gpio2_ick_parent_names, aes2_ick_ops); -static struct clk gpio4_dbck; +static struct clk_core gpio4_dbck; static struct clk_hw_omap gpio4_dbck_hw = { .hw = { @@ -1468,7 +1467,7 @@ static struct clk_hw_omap gpio4_dbck_hw = { DEFINE_STRUCT_CLK(gpio4_dbck, gpio2_dbck_parent_names, aes2_ick_ops); -static struct clk gpio4_ick; +static struct clk_core gpio4_ick; static struct clk_hw_omap gpio4_ick_hw = { .hw = { @@ -1482,7 +1481,7 @@ static struct clk_hw_omap gpio4_ick_hw = { DEFINE_STRUCT_CLK(gpio4_ick, gpio2_ick_parent_names, aes2_ick_ops); -static struct clk gpio5_dbck; +static struct clk_core gpio5_dbck; static struct clk_hw_omap gpio5_dbck_hw = { .hw = { @@ -1495,7 +1494,7 @@ static struct clk_hw_omap gpio5_dbck_hw = { DEFINE_STRUCT_CLK(gpio5_dbck, gpio2_dbck_parent_names, aes2_ick_ops); -static struct clk gpio5_ick; +static struct clk_core gpio5_ick; static struct clk_hw_omap gpio5_ick_hw = { .hw = { @@ -1509,7 +1508,7 @@ static struct clk_hw_omap gpio5_ick_hw = { DEFINE_STRUCT_CLK(gpio5_ick, gpio2_ick_parent_names, aes2_ick_ops); -static struct clk gpio6_dbck; +static struct clk_core gpio6_dbck; static struct clk_hw_omap gpio6_dbck_hw = { .hw = { @@ -1522,7 +1521,7 @@ static struct clk_hw_omap gpio6_dbck_hw = { DEFINE_STRUCT_CLK(gpio6_dbck, gpio2_dbck_parent_names, aes2_ick_ops); -static struct clk gpio6_ick; +static struct clk_core gpio6_ick; static struct clk_hw_omap gpio6_ick_hw = { .hw = { @@ -1536,7 +1535,7 @@ static struct clk_hw_omap gpio6_ick_hw = { DEFINE_STRUCT_CLK(gpio6_ick, gpio2_ick_parent_names, aes2_ick_ops); -static struct clk gpmc_fck; +static struct clk_core gpmc_fck; static struct clk_hw_omap gpmc_fck_hw = { .hw = { @@ -1565,7 +1564,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt10_fck, "core_l4_clkdm", omap343x_gpt_clksel, OMAP3430_EN_GPT10_SHIFT, &clkhwops_wait, gpt10_fck_parent_names, clkout2_src_ck_ops); -static struct clk gpt10_ick; +static struct clk_core gpt10_ick; static struct clk_hw_omap gpt10_ick_hw = { .hw = { @@ -1586,7 +1585,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt11_fck, "core_l4_clkdm", omap343x_gpt_clksel, OMAP3430_EN_GPT11_SHIFT, &clkhwops_wait, gpt10_fck_parent_names, clkout2_src_ck_ops); -static struct clk gpt11_ick; +static struct clk_core gpt11_ick; static struct clk_hw_omap gpt11_ick_hw = { .hw = { @@ -1600,7 +1599,7 @@ static struct clk_hw_omap gpt11_ick_hw = { DEFINE_STRUCT_CLK(gpt11_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk gpt12_fck; +static struct clk_core gpt12_fck; static const char *gpt12_fck_parent_names[] = { "secure_32k_fck", @@ -1609,7 +1608,7 @@ static const char *gpt12_fck_parent_names[] = { DEFINE_STRUCT_CLK_HW_OMAP(gpt12_fck, "wkup_clkdm"); DEFINE_STRUCT_CLK(gpt12_fck, gpt12_fck_parent_names, core_l4_ick_ops); -static struct clk gpt12_ick; +static struct clk_core gpt12_ick; static struct clk_hw_omap gpt12_ick_hw = { .hw = { @@ -1630,7 +1629,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt1_fck, "wkup_clkdm", omap343x_gpt_clksel, OMAP3430_EN_GPT1_SHIFT, &clkhwops_wait, gpt10_fck_parent_names, clkout2_src_ck_ops); -static struct clk gpt1_ick; +static struct clk_core gpt1_ick; static struct clk_hw_omap gpt1_ick_hw = { .hw = { @@ -1651,7 +1650,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt2_fck, "per_clkdm", omap343x_gpt_clksel, OMAP3430_EN_GPT2_SHIFT, &clkhwops_wait, gpt10_fck_parent_names, clkout2_src_ck_ops); -static struct clk gpt2_ick; +static struct clk_core gpt2_ick; static struct clk_hw_omap gpt2_ick_hw = { .hw = { @@ -1672,7 +1671,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt3_fck, "per_clkdm", omap343x_gpt_clksel, OMAP3430_EN_GPT3_SHIFT, &clkhwops_wait, gpt10_fck_parent_names, clkout2_src_ck_ops); -static struct clk gpt3_ick; +static struct clk_core gpt3_ick; static struct clk_hw_omap gpt3_ick_hw = { .hw = { @@ -1693,7 +1692,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt4_fck, "per_clkdm", omap343x_gpt_clksel, OMAP3430_EN_GPT4_SHIFT, &clkhwops_wait, gpt10_fck_parent_names, clkout2_src_ck_ops); -static struct clk gpt4_ick; +static struct clk_core gpt4_ick; static struct clk_hw_omap gpt4_ick_hw = { .hw = { @@ -1714,7 +1713,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt5_fck, "per_clkdm", omap343x_gpt_clksel, OMAP3430_EN_GPT5_SHIFT, &clkhwops_wait, gpt10_fck_parent_names, clkout2_src_ck_ops); -static struct clk gpt5_ick; +static struct clk_core gpt5_ick; static struct clk_hw_omap gpt5_ick_hw = { .hw = { @@ -1735,7 +1734,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt6_fck, "per_clkdm", omap343x_gpt_clksel, OMAP3430_EN_GPT6_SHIFT, &clkhwops_wait, gpt10_fck_parent_names, clkout2_src_ck_ops); -static struct clk gpt6_ick; +static struct clk_core gpt6_ick; static struct clk_hw_omap gpt6_ick_hw = { .hw = { @@ -1756,7 +1755,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt7_fck, "per_clkdm", omap343x_gpt_clksel, OMAP3430_EN_GPT7_SHIFT, &clkhwops_wait, gpt10_fck_parent_names, clkout2_src_ck_ops); -static struct clk gpt7_ick; +static struct clk_core gpt7_ick; static struct clk_hw_omap gpt7_ick_hw = { .hw = { @@ -1777,7 +1776,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt8_fck, "per_clkdm", omap343x_gpt_clksel, OMAP3430_EN_GPT8_SHIFT, &clkhwops_wait, gpt10_fck_parent_names, clkout2_src_ck_ops); -static struct clk gpt8_ick; +static struct clk_core gpt8_ick; static struct clk_hw_omap gpt8_ick_hw = { .hw = { @@ -1798,7 +1797,7 @@ DEFINE_CLK_OMAP_MUX_GATE(gpt9_fck, "per_clkdm", omap343x_gpt_clksel, OMAP3430_EN_GPT9_SHIFT, &clkhwops_wait, gpt10_fck_parent_names, clkout2_src_ck_ops); -static struct clk gpt9_ick; +static struct clk_core gpt9_ick; static struct clk_hw_omap gpt9_ick_hw = { .hw = { @@ -1812,7 +1811,7 @@ static struct clk_hw_omap gpt9_ick_hw = { DEFINE_STRUCT_CLK(gpt9_ick, gpio2_ick_parent_names, aes2_ick_ops); -static struct clk hdq_fck; +static struct clk_core hdq_fck; static const char *hdq_fck_parent_names[] = { "core_12m_fck", @@ -1830,7 +1829,7 @@ static struct clk_hw_omap hdq_fck_hw = { DEFINE_STRUCT_CLK(hdq_fck, hdq_fck_parent_names, aes2_ick_ops); -static struct clk hdq_ick; +static struct clk_core hdq_ick; static struct clk_hw_omap hdq_ick_hw = { .hw = { @@ -1844,7 +1843,7 @@ static struct clk_hw_omap hdq_ick_hw = { DEFINE_STRUCT_CLK(hdq_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk hecc_ck; +static struct clk_core hecc_ck; static struct clk_hw_omap hecc_ck_hw = { .hw = { @@ -1858,7 +1857,7 @@ static struct clk_hw_omap hecc_ck_hw = { DEFINE_STRUCT_CLK(hecc_ck, dpll3_ck_parent_names, aes2_ick_ops); -static struct clk hsotgusb_fck_am35xx; +static struct clk_core hsotgusb_fck_am35xx; static struct clk_hw_omap hsotgusb_fck_am35xx_hw = { .hw = { @@ -1871,7 +1870,7 @@ static struct clk_hw_omap hsotgusb_fck_am35xx_hw = { DEFINE_STRUCT_CLK(hsotgusb_fck_am35xx, dpll3_ck_parent_names, aes2_ick_ops); -static struct clk hsotgusb_ick_3430es1; +static struct clk_core hsotgusb_ick_3430es1; static struct clk_hw_omap hsotgusb_ick_3430es1_hw = { .hw = { @@ -1885,7 +1884,7 @@ static struct clk_hw_omap hsotgusb_ick_3430es1_hw = { DEFINE_STRUCT_CLK(hsotgusb_ick_3430es1, ipss_ick_parent_names, aes2_ick_ops); -static struct clk hsotgusb_ick_3430es2; +static struct clk_core hsotgusb_ick_3430es2; static struct clk_hw_omap hsotgusb_ick_3430es2_hw = { .hw = { @@ -1899,7 +1898,7 @@ static struct clk_hw_omap hsotgusb_ick_3430es2_hw = { DEFINE_STRUCT_CLK(hsotgusb_ick_3430es2, ipss_ick_parent_names, aes2_ick_ops); -static struct clk hsotgusb_ick_am35xx; +static struct clk_core hsotgusb_ick_am35xx; static struct clk_hw_omap hsotgusb_ick_am35xx_hw = { .hw = { @@ -1913,7 +1912,7 @@ static struct clk_hw_omap hsotgusb_ick_am35xx_hw = { DEFINE_STRUCT_CLK(hsotgusb_ick_am35xx, emac_ick_parent_names, aes2_ick_ops); -static struct clk i2c1_fck; +static struct clk_core i2c1_fck; static struct clk_hw_omap i2c1_fck_hw = { .hw = { @@ -1927,7 +1926,7 @@ static struct clk_hw_omap i2c1_fck_hw = { DEFINE_STRUCT_CLK(i2c1_fck, csi2_96m_fck_parent_names, aes2_ick_ops); -static struct clk i2c1_ick; +static struct clk_core i2c1_ick; static struct clk_hw_omap i2c1_ick_hw = { .hw = { @@ -1941,7 +1940,7 @@ static struct clk_hw_omap i2c1_ick_hw = { DEFINE_STRUCT_CLK(i2c1_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk i2c2_fck; +static struct clk_core i2c2_fck; static struct clk_hw_omap i2c2_fck_hw = { .hw = { @@ -1955,7 +1954,7 @@ static struct clk_hw_omap i2c2_fck_hw = { DEFINE_STRUCT_CLK(i2c2_fck, csi2_96m_fck_parent_names, aes2_ick_ops); -static struct clk i2c2_ick; +static struct clk_core i2c2_ick; static struct clk_hw_omap i2c2_ick_hw = { .hw = { @@ -1969,7 +1968,7 @@ static struct clk_hw_omap i2c2_ick_hw = { DEFINE_STRUCT_CLK(i2c2_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk i2c3_fck; +static struct clk_core i2c3_fck; static struct clk_hw_omap i2c3_fck_hw = { .hw = { @@ -1983,7 +1982,7 @@ static struct clk_hw_omap i2c3_fck_hw = { DEFINE_STRUCT_CLK(i2c3_fck, csi2_96m_fck_parent_names, aes2_ick_ops); -static struct clk i2c3_ick; +static struct clk_core i2c3_ick; static struct clk_hw_omap i2c3_ick_hw = { .hw = { @@ -1997,7 +1996,7 @@ static struct clk_hw_omap i2c3_ick_hw = { DEFINE_STRUCT_CLK(i2c3_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk icr_ick; +static struct clk_core icr_ick; static struct clk_hw_omap icr_ick_hw = { .hw = { @@ -2011,7 +2010,7 @@ static struct clk_hw_omap icr_ick_hw = { DEFINE_STRUCT_CLK(icr_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk iva2_ck; +static struct clk_core iva2_ck; static const char *iva2_ck_parent_names[] = { "dpll2_m2_ck", @@ -2029,7 +2028,7 @@ static struct clk_hw_omap iva2_ck_hw = { DEFINE_STRUCT_CLK(iva2_ck, iva2_ck_parent_names, aes2_ick_ops); -static struct clk mad2d_ick; +static struct clk_core mad2d_ick; static struct clk_hw_omap mad2d_ick_hw = { .hw = { @@ -2043,7 +2042,7 @@ static struct clk_hw_omap mad2d_ick_hw = { DEFINE_STRUCT_CLK(mad2d_ick, core_l3_ick_parent_names, aes2_ick_ops); -static struct clk mailboxes_ick; +static struct clk_core mailboxes_ick; static struct clk_hw_omap mailboxes_ick_hw = { .hw = { @@ -2084,7 +2083,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp1_fck, "core_l4_clkdm", mcbsp_15_clksel, OMAP3430_EN_MCBSP1_SHIFT, &clkhwops_wait, mcbsp1_fck_parent_names, clkout2_src_ck_ops); -static struct clk mcbsp1_ick; +static struct clk_core mcbsp1_ick; static struct clk_hw_omap mcbsp1_ick_hw = { .hw = { @@ -2098,7 +2097,7 @@ static struct clk_hw_omap mcbsp1_ick_hw = { DEFINE_STRUCT_CLK(mcbsp1_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk per_96m_fck; +static struct clk_core per_96m_fck; DEFINE_STRUCT_CLK_HW_OMAP(per_96m_fck, "per_clkdm"); DEFINE_STRUCT_CLK(per_96m_fck, cm_96m_fck_parent_names, core_l4_ick_ops); @@ -2120,7 +2119,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp2_fck, "per_clkdm", mcbsp_234_clksel, OMAP3430_EN_MCBSP2_SHIFT, &clkhwops_wait, mcbsp2_fck_parent_names, clkout2_src_ck_ops); -static struct clk mcbsp2_ick; +static struct clk_core mcbsp2_ick; static struct clk_hw_omap mcbsp2_ick_hw = { .hw = { @@ -2141,7 +2140,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp3_fck, "per_clkdm", mcbsp_234_clksel, OMAP3430_EN_MCBSP3_SHIFT, &clkhwops_wait, mcbsp2_fck_parent_names, clkout2_src_ck_ops); -static struct clk mcbsp3_ick; +static struct clk_core mcbsp3_ick; static struct clk_hw_omap mcbsp3_ick_hw = { .hw = { @@ -2162,7 +2161,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp4_fck, "per_clkdm", mcbsp_234_clksel, OMAP3430_EN_MCBSP4_SHIFT, &clkhwops_wait, mcbsp2_fck_parent_names, clkout2_src_ck_ops); -static struct clk mcbsp4_ick; +static struct clk_core mcbsp4_ick; static struct clk_hw_omap mcbsp4_ick_hw = { .hw = { @@ -2183,7 +2182,7 @@ DEFINE_CLK_OMAP_MUX_GATE(mcbsp5_fck, "core_l4_clkdm", mcbsp_15_clksel, OMAP3430_EN_MCBSP5_SHIFT, &clkhwops_wait, mcbsp1_fck_parent_names, clkout2_src_ck_ops); -static struct clk mcbsp5_ick; +static struct clk_core mcbsp5_ick; static struct clk_hw_omap mcbsp5_ick_hw = { .hw = { @@ -2197,7 +2196,7 @@ static struct clk_hw_omap mcbsp5_ick_hw = { DEFINE_STRUCT_CLK(mcbsp5_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk mcspi1_fck; +static struct clk_core mcspi1_fck; static struct clk_hw_omap mcspi1_fck_hw = { .hw = { @@ -2211,7 +2210,7 @@ static struct clk_hw_omap mcspi1_fck_hw = { DEFINE_STRUCT_CLK(mcspi1_fck, fshostusb_fck_parent_names, aes2_ick_ops); -static struct clk mcspi1_ick; +static struct clk_core mcspi1_ick; static struct clk_hw_omap mcspi1_ick_hw = { .hw = { @@ -2225,7 +2224,7 @@ static struct clk_hw_omap mcspi1_ick_hw = { DEFINE_STRUCT_CLK(mcspi1_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk mcspi2_fck; +static struct clk_core mcspi2_fck; static struct clk_hw_omap mcspi2_fck_hw = { .hw = { @@ -2239,7 +2238,7 @@ static struct clk_hw_omap mcspi2_fck_hw = { DEFINE_STRUCT_CLK(mcspi2_fck, fshostusb_fck_parent_names, aes2_ick_ops); -static struct clk mcspi2_ick; +static struct clk_core mcspi2_ick; static struct clk_hw_omap mcspi2_ick_hw = { .hw = { @@ -2253,7 +2252,7 @@ static struct clk_hw_omap mcspi2_ick_hw = { DEFINE_STRUCT_CLK(mcspi2_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk mcspi3_fck; +static struct clk_core mcspi3_fck; static struct clk_hw_omap mcspi3_fck_hw = { .hw = { @@ -2267,7 +2266,7 @@ static struct clk_hw_omap mcspi3_fck_hw = { DEFINE_STRUCT_CLK(mcspi3_fck, fshostusb_fck_parent_names, aes2_ick_ops); -static struct clk mcspi3_ick; +static struct clk_core mcspi3_ick; static struct clk_hw_omap mcspi3_ick_hw = { .hw = { @@ -2281,7 +2280,7 @@ static struct clk_hw_omap mcspi3_ick_hw = { DEFINE_STRUCT_CLK(mcspi3_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk mcspi4_fck; +static struct clk_core mcspi4_fck; static struct clk_hw_omap mcspi4_fck_hw = { .hw = { @@ -2295,7 +2294,7 @@ static struct clk_hw_omap mcspi4_fck_hw = { DEFINE_STRUCT_CLK(mcspi4_fck, fshostusb_fck_parent_names, aes2_ick_ops); -static struct clk mcspi4_ick; +static struct clk_core mcspi4_ick; static struct clk_hw_omap mcspi4_ick_hw = { .hw = { @@ -2309,7 +2308,7 @@ static struct clk_hw_omap mcspi4_ick_hw = { DEFINE_STRUCT_CLK(mcspi4_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk mmchs1_fck; +static struct clk_core mmchs1_fck; static struct clk_hw_omap mmchs1_fck_hw = { .hw = { @@ -2323,7 +2322,7 @@ static struct clk_hw_omap mmchs1_fck_hw = { DEFINE_STRUCT_CLK(mmchs1_fck, csi2_96m_fck_parent_names, aes2_ick_ops); -static struct clk mmchs1_ick; +static struct clk_core mmchs1_ick; static struct clk_hw_omap mmchs1_ick_hw = { .hw = { @@ -2337,7 +2336,7 @@ static struct clk_hw_omap mmchs1_ick_hw = { DEFINE_STRUCT_CLK(mmchs1_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk mmchs2_fck; +static struct clk_core mmchs2_fck; static struct clk_hw_omap mmchs2_fck_hw = { .hw = { @@ -2351,7 +2350,7 @@ static struct clk_hw_omap mmchs2_fck_hw = { DEFINE_STRUCT_CLK(mmchs2_fck, csi2_96m_fck_parent_names, aes2_ick_ops); -static struct clk mmchs2_ick; +static struct clk_core mmchs2_ick; static struct clk_hw_omap mmchs2_ick_hw = { .hw = { @@ -2365,7 +2364,7 @@ static struct clk_hw_omap mmchs2_ick_hw = { DEFINE_STRUCT_CLK(mmchs2_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk mmchs3_fck; +static struct clk_core mmchs3_fck; static struct clk_hw_omap mmchs3_fck_hw = { .hw = { @@ -2379,7 +2378,7 @@ static struct clk_hw_omap mmchs3_fck_hw = { DEFINE_STRUCT_CLK(mmchs3_fck, csi2_96m_fck_parent_names, aes2_ick_ops); -static struct clk mmchs3_ick; +static struct clk_core mmchs3_ick; static struct clk_hw_omap mmchs3_ick_hw = { .hw = { @@ -2393,7 +2392,7 @@ static struct clk_hw_omap mmchs3_ick_hw = { DEFINE_STRUCT_CLK(mmchs3_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk modem_fck; +static struct clk_core modem_fck; static struct clk_hw_omap modem_fck_hw = { .hw = { @@ -2407,7 +2406,7 @@ static struct clk_hw_omap modem_fck_hw = { DEFINE_STRUCT_CLK(modem_fck, dpll3_ck_parent_names, aes2_ick_ops); -static struct clk mspro_fck; +static struct clk_core mspro_fck; static struct clk_hw_omap mspro_fck_hw = { .hw = { @@ -2421,7 +2420,7 @@ static struct clk_hw_omap mspro_fck_hw = { DEFINE_STRUCT_CLK(mspro_fck, csi2_96m_fck_parent_names, aes2_ick_ops); -static struct clk mspro_ick; +static struct clk_core mspro_ick; static struct clk_hw_omap mspro_ick_hw = { .hw = { @@ -2435,13 +2434,13 @@ static struct clk_hw_omap mspro_ick_hw = { DEFINE_STRUCT_CLK(mspro_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk omap_192m_alwon_fck; +static struct clk_core omap_192m_alwon_fck; DEFINE_STRUCT_CLK_HW_OMAP(omap_192m_alwon_fck, NULL); DEFINE_STRUCT_CLK(omap_192m_alwon_fck, omap_96m_alwon_fck_parent_names, core_ck_ops); -static struct clk omap_32ksync_ick; +static struct clk_core omap_32ksync_ick; static struct clk_hw_omap omap_32ksync_ick_hw = { .hw = { @@ -2466,7 +2465,7 @@ static const struct clksel omap_96m_alwon_fck_clksel[] = { { .parent = NULL } }; -static struct clk omap_96m_alwon_fck_3630; +static struct clk_core omap_96m_alwon_fck_3630; static const char *omap_96m_alwon_fck_3630_parent_names[] = { "omap_192m_alwon_fck", @@ -2487,7 +2486,7 @@ static struct clk_hw_omap omap_96m_alwon_fck_3630_hw = { .clksel_mask = OMAP3630_CLKSEL_96M_MASK, }; -static struct clk omap_96m_alwon_fck_3630 = { +static struct clk_core omap_96m_alwon_fck_3630 = { .name = "omap_96m_alwon_fck", .hw = &omap_96m_alwon_fck_3630_hw.hw, .parent_names = omap_96m_alwon_fck_3630_parent_names, @@ -2495,7 +2494,7 @@ static struct clk omap_96m_alwon_fck_3630 = { .ops = &omap_96m_alwon_fck_3630_ops, }; -static struct clk omapctrl_ick; +static struct clk_core omapctrl_ick; static struct clk_hw_omap omapctrl_ick_hw = { .hw = { @@ -2520,17 +2519,17 @@ DEFINE_CLK_DIVIDER(pclkx2_fck, "emu_src_ck", &emu_src_ck, 0x0, OMAP3430_CLKSEL_PCLKX2_SHIFT, OMAP3430_CLKSEL_PCLKX2_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); -static struct clk per_48m_fck; +static struct clk_core per_48m_fck; DEFINE_STRUCT_CLK_HW_OMAP(per_48m_fck, "per_clkdm"); DEFINE_STRUCT_CLK(per_48m_fck, core_48m_fck_parent_names, core_l4_ick_ops); -static struct clk security_l3_ick; +static struct clk_core security_l3_ick; DEFINE_STRUCT_CLK_HW_OMAP(security_l3_ick, NULL); DEFINE_STRUCT_CLK(security_l3_ick, core_l3_ick_parent_names, core_ck_ops); -static struct clk pka_ick; +static struct clk_core pka_ick; static const char *pka_ick_parent_names[] = { "security_l3_ick", @@ -2552,7 +2551,7 @@ DEFINE_CLK_DIVIDER(rm_ick, "l4_ick", &l4_ick, 0x0, OMAP3430_CLKSEL_RM_SHIFT, OMAP3430_CLKSEL_RM_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); -static struct clk rng_ick; +static struct clk_core rng_ick; static struct clk_hw_omap rng_ick_hw = { .hw = { @@ -2565,7 +2564,7 @@ static struct clk_hw_omap rng_ick_hw = { DEFINE_STRUCT_CLK(rng_ick, aes1_ick_parent_names, aes1_ick_ops); -static struct clk sad2d_ick; +static struct clk_core sad2d_ick; static struct clk_hw_omap sad2d_ick_hw = { .hw = { @@ -2579,7 +2578,7 @@ static struct clk_hw_omap sad2d_ick_hw = { DEFINE_STRUCT_CLK(sad2d_ick, core_l3_ick_parent_names, aes2_ick_ops); -static struct clk sdrc_ick; +static struct clk_core sdrc_ick; static struct clk_hw_omap sdrc_ick_hw = { .hw = { @@ -2630,7 +2629,7 @@ static const char *sgx_fck_parent_names[] = { "core_ck", "cm_96m_fck", "omap_192m_alwon_fck", "corex2_fck", }; -static struct clk sgx_fck; +static struct clk_core sgx_fck; static const struct clk_ops sgx_fck_ops = { .init = &omap2_init_clk_clkdm, @@ -2651,7 +2650,7 @@ DEFINE_CLK_OMAP_MUX_GATE(sgx_fck, "sgx_clkdm", sgx_clksel, OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_SHIFT, &clkhwops_wait, sgx_fck_parent_names, sgx_fck_ops); -static struct clk sgx_ick; +static struct clk_core sgx_ick; static struct clk_hw_omap sgx_ick_hw = { .hw = { @@ -2665,7 +2664,7 @@ static struct clk_hw_omap sgx_ick_hw = { DEFINE_STRUCT_CLK(sgx_ick, core_l3_ick_parent_names, aes2_ick_ops); -static struct clk sha11_ick; +static struct clk_core sha11_ick; static struct clk_hw_omap sha11_ick_hw = { .hw = { @@ -2678,7 +2677,7 @@ static struct clk_hw_omap sha11_ick_hw = { DEFINE_STRUCT_CLK(sha11_ick, aes1_ick_parent_names, aes1_ick_ops); -static struct clk sha12_ick; +static struct clk_core sha12_ick; static struct clk_hw_omap sha12_ick_hw = { .hw = { @@ -2692,7 +2691,7 @@ static struct clk_hw_omap sha12_ick_hw = { DEFINE_STRUCT_CLK(sha12_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk sr1_fck; +static struct clk_core sr1_fck; static struct clk_hw_omap sr1_fck_hw = { .hw = { @@ -2706,7 +2705,7 @@ static struct clk_hw_omap sr1_fck_hw = { DEFINE_STRUCT_CLK(sr1_fck, dpll3_ck_parent_names, aes2_ick_ops); -static struct clk sr2_fck; +static struct clk_core sr2_fck; static struct clk_hw_omap sr2_fck_hw = { .hw = { @@ -2720,17 +2719,17 @@ static struct clk_hw_omap sr2_fck_hw = { DEFINE_STRUCT_CLK(sr2_fck, dpll3_ck_parent_names, aes2_ick_ops); -static struct clk sr_l4_ick; +static struct clk_core sr_l4_ick; DEFINE_STRUCT_CLK_HW_OMAP(sr_l4_ick, "core_l4_clkdm"); DEFINE_STRUCT_CLK(sr_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops); -static struct clk ssi_l4_ick; +static struct clk_core ssi_l4_ick; DEFINE_STRUCT_CLK_HW_OMAP(ssi_l4_ick, "core_l4_clkdm"); DEFINE_STRUCT_CLK(ssi_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops); -static struct clk ssi_ick_3430es1; +static struct clk_core ssi_ick_3430es1; static const char *ssi_ick_3430es1_parent_names[] = { "ssi_l4_ick", @@ -2748,7 +2747,7 @@ static struct clk_hw_omap ssi_ick_3430es1_hw = { DEFINE_STRUCT_CLK(ssi_ick_3430es1, ssi_ick_3430es1_parent_names, aes2_ick_ops); -static struct clk ssi_ick_3430es2; +static struct clk_core ssi_ick_3430es2; static struct clk_hw_omap ssi_ick_3430es2_hw = { .hw = { @@ -2813,7 +2812,7 @@ DEFINE_CLK_FIXED_FACTOR(ssi_sst_fck_3430es1, "ssi_ssr_fck_3430es1", DEFINE_CLK_FIXED_FACTOR(ssi_sst_fck_3430es2, "ssi_ssr_fck_3430es2", &ssi_ssr_fck_3430es2, 0x0, 1, 2); -static struct clk sys_clkout1; +static struct clk_core sys_clkout1; static const char *sys_clkout1_parent_names[] = { "osc_sys_ck", @@ -2843,7 +2842,7 @@ DEFINE_CLK_DIVIDER(traceclk_fck, "traceclk_src_fck", &traceclk_src_fck, 0x0, OMAP3430_CLKSEL_TRACECLK_SHIFT, OMAP3430_CLKSEL_TRACECLK_WIDTH, CLK_DIVIDER_ONE_BASED, NULL); -static struct clk ts_fck; +static struct clk_core ts_fck; static struct clk_hw_omap ts_fck_hw = { .hw = { @@ -2856,7 +2855,7 @@ static struct clk_hw_omap ts_fck_hw = { DEFINE_STRUCT_CLK(ts_fck, wkup_32k_fck_parent_names, aes2_ick_ops); -static struct clk uart1_fck; +static struct clk_core uart1_fck; static struct clk_hw_omap uart1_fck_hw = { .hw = { @@ -2870,7 +2869,7 @@ static struct clk_hw_omap uart1_fck_hw = { DEFINE_STRUCT_CLK(uart1_fck, fshostusb_fck_parent_names, aes2_ick_ops); -static struct clk uart1_ick; +static struct clk_core uart1_ick; static struct clk_hw_omap uart1_ick_hw = { .hw = { @@ -2884,7 +2883,7 @@ static struct clk_hw_omap uart1_ick_hw = { DEFINE_STRUCT_CLK(uart1_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk uart2_fck; +static struct clk_core uart2_fck; static struct clk_hw_omap uart2_fck_hw = { .hw = { @@ -2898,7 +2897,7 @@ static struct clk_hw_omap uart2_fck_hw = { DEFINE_STRUCT_CLK(uart2_fck, fshostusb_fck_parent_names, aes2_ick_ops); -static struct clk uart2_ick; +static struct clk_core uart2_ick; static struct clk_hw_omap uart2_ick_hw = { .hw = { @@ -2912,7 +2911,7 @@ static struct clk_hw_omap uart2_ick_hw = { DEFINE_STRUCT_CLK(uart2_ick, aes2_ick_parent_names, aes2_ick_ops); -static struct clk uart3_fck; +static struct clk_core uart3_fck; static const char *uart3_fck_parent_names[] = { "per_48m_fck", @@ -2930,7 +2929,7 @@ static struct clk_hw_omap uart3_fck_hw = { DEFINE_STRUCT_CLK(uart3_fck, uart3_fck_parent_names, aes2_ick_ops); -static struct clk uart3_ick; +static struct clk_core uart3_ick; static struct clk_hw_omap uart3_ick_hw = { .hw = { @@ -2944,7 +2943,7 @@ static struct clk_hw_omap uart3_ick_hw = { DEFINE_STRUCT_CLK(uart3_ick, gpio2_ick_parent_names, aes2_ick_ops); -static struct clk uart4_fck; +static struct clk_core uart4_fck; static struct clk_hw_omap uart4_fck_hw = { .hw = { @@ -2958,7 +2957,7 @@ static struct clk_hw_omap uart4_fck_hw = { DEFINE_STRUCT_CLK(uart4_fck, uart3_fck_parent_names, aes2_ick_ops); -static struct clk uart4_fck_am35xx; +static struct clk_core uart4_fck_am35xx; static struct clk_hw_omap uart4_fck_am35xx_hw = { .hw = { @@ -2972,7 +2971,7 @@ static struct clk_hw_omap uart4_fck_am35xx_hw = { DEFINE_STRUCT_CLK(uart4_fck_am35xx, fshostusb_fck_parent_names, aes2_ick_ops); -static struct clk uart4_ick; +static struct clk_core uart4_ick; static struct clk_hw_omap uart4_ick_hw = { .hw = { @@ -2986,7 +2985,7 @@ static struct clk_hw_omap uart4_ick_hw = { DEFINE_STRUCT_CLK(uart4_ick, gpio2_ick_parent_names, aes2_ick_ops); -static struct clk uart4_ick_am35xx; +static struct clk_core uart4_ick_am35xx; static struct clk_hw_omap uart4_ick_am35xx_hw = { .hw = { @@ -3023,7 +3022,7 @@ DEFINE_CLK_OMAP_MUX_GATE(usb_l4_ick, "core_l4_clkdm", usb_l4_clksel, &clkhwops_iclk_wait, usb_l4_ick_parent_names, ssi_ssr_fck_3430es1_ops); -static struct clk usbhost_120m_fck; +static struct clk_core usbhost_120m_fck; static const char *usbhost_120m_fck_parent_names[] = { "dpll5_m2_ck", @@ -3041,7 +3040,7 @@ static struct clk_hw_omap usbhost_120m_fck_hw = { DEFINE_STRUCT_CLK(usbhost_120m_fck, usbhost_120m_fck_parent_names, aes2_ick_ops); -static struct clk usbhost_48m_fck; +static struct clk_core usbhost_48m_fck; static struct clk_hw_omap usbhost_48m_fck_hw = { .hw = { @@ -3055,7 +3054,7 @@ static struct clk_hw_omap usbhost_48m_fck_hw = { DEFINE_STRUCT_CLK(usbhost_48m_fck, core_48m_fck_parent_names, aes2_ick_ops); -static struct clk usbhost_ick; +static struct clk_core usbhost_ick; static struct clk_hw_omap usbhost_ick_hw = { .hw = { @@ -3069,7 +3068,7 @@ static struct clk_hw_omap usbhost_ick_hw = { DEFINE_STRUCT_CLK(usbhost_ick, security_l4_ick2_parent_names, aes2_ick_ops); -static struct clk usbtll_fck; +static struct clk_core usbtll_fck; static struct clk_hw_omap usbtll_fck_hw = { .hw = { @@ -3083,7 +3082,7 @@ static struct clk_hw_omap usbtll_fck_hw = { DEFINE_STRUCT_CLK(usbtll_fck, usbhost_120m_fck_parent_names, aes2_ick_ops); -static struct clk usbtll_ick; +static struct clk_core usbtll_ick; static struct clk_hw_omap usbtll_ick_hw = { .hw = { @@ -3124,7 +3123,7 @@ static const char *usim_fck_parent_names[] = { "omap_96m_fck", "dpll5_m2_ck", "sys_ck", }; -static struct clk usim_fck; +static struct clk_core usim_fck; static const struct clk_ops usim_fck_ops = { .enable = &omap2_dflt_clk_enable, @@ -3142,7 +3141,7 @@ DEFINE_CLK_OMAP_MUX_GATE(usim_fck, NULL, usim_clksel, OMAP3430ES2_EN_USIMOCP_SHIFT, &clkhwops_wait, usim_fck_parent_names, usim_fck_ops); -static struct clk usim_ick; +static struct clk_core usim_ick; static struct clk_hw_omap usim_ick_hw = { .hw = { @@ -3156,7 +3155,7 @@ static struct clk_hw_omap usim_ick_hw = { DEFINE_STRUCT_CLK(usim_ick, gpio1_ick_parent_names, aes2_ick_ops); -static struct clk vpfe_fck; +static struct clk_core vpfe_fck; static const char *vpfe_fck_parent_names[] = { "pclk_ck", @@ -3172,7 +3171,7 @@ static struct clk_hw_omap vpfe_fck_hw = { DEFINE_STRUCT_CLK(vpfe_fck, vpfe_fck_parent_names, aes1_ick_ops); -static struct clk vpfe_ick; +static struct clk_core vpfe_ick; static struct clk_hw_omap vpfe_ick_hw = { .hw = { @@ -3186,12 +3185,12 @@ static struct clk_hw_omap vpfe_ick_hw = { DEFINE_STRUCT_CLK(vpfe_ick, emac_ick_parent_names, aes2_ick_ops); -static struct clk wdt1_fck; +static struct clk_core wdt1_fck; DEFINE_STRUCT_CLK_HW_OMAP(wdt1_fck, "wkup_clkdm"); DEFINE_STRUCT_CLK(wdt1_fck, gpt12_fck_parent_names, core_l4_ick_ops); -static struct clk wdt1_ick; +static struct clk_core wdt1_ick; static struct clk_hw_omap wdt1_ick_hw = { .hw = { @@ -3205,7 +3204,7 @@ static struct clk_hw_omap wdt1_ick_hw = { DEFINE_STRUCT_CLK(wdt1_ick, gpio1_ick_parent_names, aes2_ick_ops); -static struct clk wdt2_fck; +static struct clk_core wdt2_fck; static struct clk_hw_omap wdt2_fck_hw = { .hw = { @@ -3219,7 +3218,7 @@ static struct clk_hw_omap wdt2_fck_hw = { DEFINE_STRUCT_CLK(wdt2_fck, gpio1_dbck_parent_names, aes2_ick_ops); -static struct clk wdt2_ick; +static struct clk_core wdt2_ick; static struct clk_hw_omap wdt2_ick_hw = { .hw = { @@ -3233,7 +3232,7 @@ static struct clk_hw_omap wdt2_ick_hw = { DEFINE_STRUCT_CLK(wdt2_ick, gpio1_ick_parent_names, aes2_ick_ops); -static struct clk wdt3_fck; +static struct clk_core wdt3_fck; static struct clk_hw_omap wdt3_fck_hw = { .hw = { @@ -3247,7 +3246,7 @@ static struct clk_hw_omap wdt3_fck_hw = { DEFINE_STRUCT_CLK(wdt3_fck, gpio2_dbck_parent_names, aes2_ick_ops); -static struct clk wdt3_ick; +static struct clk_core wdt3_ick; static struct clk_hw_omap wdt3_ick_hw = { .hw = { @@ -3661,10 +3660,10 @@ int __init omap3xxx_clk_init(void) ARRAY_SIZE(enable_init_clks)); pr_info("Clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n", - (clk_get_rate(&osc_sys_ck) / 1000000), - (clk_get_rate(&osc_sys_ck) / 100000) % 10, - (clk_get_rate(&core_ck) / 1000000), - (clk_get_rate(&arm_fck) / 1000000)); + (clk_provider_get_rate(&osc_sys_ck) / 1000000), + (clk_provider_get_rate(&osc_sys_ck) / 100000) % 10, + (clk_provider_get_rate(&core_ck) / 1000000), + (clk_provider_get_rate(&arm_fck) / 1000000)); /* * Lock DPLL5 -- here only until other device init code can @@ -3674,8 +3673,8 @@ int __init omap3xxx_clk_init(void) omap3_clk_lock_dpll5(); /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */ - sdrc_ick_p = clk_get(NULL, "sdrc_ick"); - arm_fck_p = clk_get(NULL, "arm_fck"); + sdrc_ick_p = clk_provider_get(NULL, "sdrc_ick"); + arm_fck_p = clk_provider_get(NULL, "arm_fck"); return 0; } diff --git a/arch/arm/mach-omap2/clkt2xxx_dpll.c b/arch/arm/mach-omap2/clkt2xxx_dpll.c index 82572e2..d7bbbb6 100644 --- a/arch/arm/mach-omap2/clkt2xxx_dpll.c +++ b/arch/arm/mach-omap2/clkt2xxx_dpll.c @@ -11,7 +11,6 @@ #include #include -#include #include #include "clock.h" @@ -22,7 +21,7 @@ /** * _allow_idle - enable DPLL autoidle bits - * @clk: struct clk * of the DPLL to operate on + * @clk: struct clk_core * of the DPLL to operate on * * Enable DPLL automatic idle control. The DPLL will enter low-power * stop when its downstream clocks are gated. No return value. @@ -39,7 +38,7 @@ static void _allow_idle(struct clk_hw_omap *clk) /** * _deny_idle - prevent DPLL from automatically idling - * @clk: struct clk * of the DPLL to operate on + * @clk: struct clk_core * of the DPLL to operate on * * Disable DPLL automatic idle control. No return value. */ diff --git a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c index 59cf310..9a60ce2 100644 --- a/arch/arm/mach-omap2/clkt2xxx_dpllcore.c +++ b/arch/arm/mach-omap2/clkt2xxx_dpllcore.c @@ -22,7 +22,6 @@ #include #include -#include #include #include "clock.h" @@ -48,7 +47,7 @@ static struct clk_hw_omap *dpll_core_ck; * Returns the CORE_CLK rate. CORE_CLK can have one of three rate * sources on OMAP2xxx: the DPLL CLKOUT rate, DPLL CLKOUTX2, or 32KHz * (the latter is unusual). This currently should be called with - * struct clk *dpll_ck, which is a composite clock of dpll_ck and + * struct clk_core *dpll_ck, which is a composite clock of dpll_ck and * core_ck. */ unsigned long omap2xxx_clk_get_core_rate(void) @@ -179,7 +178,7 @@ int omap2_reprogram_dpllcore(struct clk_hw *hw, unsigned long rate, /** * omap2xxx_clkt_dpllcore_init - clk init function for dpll_ck - * @clk: struct clk *dpll_ck + * @clk: struct clk_core *dpll_ck * * Store a local copy of @clk in dpll_core_ck so other code can query * the core rate without having to clk_get(), which can sleep. Must diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c index 85e0b0c0..d621a4c 100644 --- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c +++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c @@ -28,7 +28,6 @@ #include #include -#include #include #include #include @@ -198,14 +197,14 @@ void omap2xxx_clkt_vps_check_bootloader_rates(void) */ void omap2xxx_clkt_vps_late_init(void) { - struct clk *c; + struct clk_core *c; - c = clk_get(NULL, "sys_ck"); + c = clk_provider_get(NULL, "sys_ck"); if (IS_ERR(c)) { WARN(1, "could not locate sys_ck\n"); } else { - sys_ck_rate = clk_get_rate(c); - clk_put(c); + sys_ck_rate = clk_provider_get_rate(c); + __clk_put(c); } } @@ -230,7 +229,7 @@ void omap2xxx_clkt_vps_init(void) { struct clk_init_data init = { NULL }; struct clk_hw_omap *hw = NULL; - struct clk *clk; + struct clk_core *clk; const char *parent_name = "mpu_ck"; struct clk_lookup *lookup = NULL; diff --git a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c index eb69acf..16ff4ed 100644 --- a/arch/arm/mach-omap2/clkt34xx_dpll3m2.c +++ b/arch/arm/mach-omap2/clkt34xx_dpll3m2.c @@ -18,7 +18,6 @@ #include #include -#include #include #include "clock.h" @@ -38,7 +37,7 @@ /** * omap3_core_dpll_m2_set_rate - set CORE DPLL M2 divider - * @clk: struct clk * of DPLL to set + * @clk: struct clk_core * of DPLL to set * @rate: rounded target rate * * Program the DPLL M2 divider with the rounded target rate. Returns diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c index 7ee2610..b4796b3 100644 --- a/arch/arm/mach-omap2/clkt_clksel.c +++ b/arch/arm/mach-omap2/clkt_clksel.c @@ -51,15 +51,15 @@ /** * _get_clksel_by_parent() - return clksel struct for a given clk & parent - * @clk: OMAP struct clk ptr to inspect - * @src_clk: OMAP struct clk ptr of the parent clk to search for + * @clk: OMAP struct clk_core ptr to inspect + * @src_clk: OMAP struct clk_core ptr of the parent clk to search for * * Scan the struct clksel array associated with the clock to find * the element associated with the supplied parent clock address. * Returns a pointer to the struct clksel on success or NULL on error. */ static const struct clksel *_get_clksel_by_parent(struct clk_hw_omap *clk, - struct clk *src_clk) + struct clk_core *src_clk) { const struct clksel *clks; @@ -82,7 +82,7 @@ static const struct clksel *_get_clksel_by_parent(struct clk_hw_omap *clk, /** * _write_clksel_reg() - program a clock's clksel register in hardware - * @clk: struct clk * to program + * @clk: struct clk_core * to program * @v: clksel bitfield value to program (with LSB at bit 0) * * Shift the clksel register bitfield value @v to its appropriate @@ -107,10 +107,10 @@ static void _write_clksel_reg(struct clk_hw_omap *clk, u32 field_val) /** * _clksel_to_divisor() - turn clksel field value into integer divider - * @clk: OMAP struct clk to use + * @clk: OMAP struct clk_core to use * @field_val: register field value to find * - * Given a struct clk of a rate-selectable clksel clock, and a register field + * Given a struct clk_core of a rate-selectable clksel clock, and a register field * value to search for, find the corresponding clock divisor. The register * field value should be pre-masked and shifted down so the LSB is at bit 0 * before calling. Returns 0 on error or returns the actual integer divisor @@ -120,7 +120,7 @@ static u32 _clksel_to_divisor(struct clk_hw_omap *clk, u32 field_val) { const struct clksel *clks; const struct clksel_rate *clkr; - struct clk *parent; + struct clk_core *parent; parent = __clk_get_parent(clk->hw.clk); @@ -149,10 +149,10 @@ static u32 _clksel_to_divisor(struct clk_hw_omap *clk, u32 field_val) /** * _divisor_to_clksel() - turn clksel integer divisor into a field value - * @clk: OMAP struct clk to use + * @clk: OMAP struct clk_core to use * @div: integer divisor to search for * - * Given a struct clk of a rate-selectable clksel clock, and a clock + * Given a struct clk_core of a rate-selectable clksel clock, and a clock * divisor, find the corresponding register field value. Returns the * register field value _before_ left-shifting (i.e., LSB is at bit * 0); or returns 0xFFFFFFFF (~0) upon error. @@ -161,7 +161,7 @@ static u32 _divisor_to_clksel(struct clk_hw_omap *clk, u32 div) { const struct clksel *clks; const struct clksel_rate *clkr; - struct clk *parent; + struct clk_core *parent; /* should never happen */ WARN_ON(div == 0); @@ -191,7 +191,7 @@ static u32 _divisor_to_clksel(struct clk_hw_omap *clk, u32 div) /** * _read_divisor() - get current divisor applied to parent clock (from hdwr) - * @clk: OMAP struct clk to use. + * @clk: OMAP struct clk_core to use. * * Read the current divisor register value for @clk that is programmed * into the hardware, convert it into the actual divisor value, and @@ -215,7 +215,7 @@ static u32 _read_divisor(struct clk_hw_omap *clk) /** * omap2_clksel_round_rate_div() - find divisor for the given clock and rate - * @clk: OMAP struct clk to use + * @clk: OMAP struct clk_core to use * @target_rate: desired clock rate * @new_div: ptr to where we should store the divisor * @@ -233,7 +233,7 @@ u32 omap2_clksel_round_rate_div(struct clk_hw_omap *clk, const struct clksel *clks; const struct clksel_rate *clkr; u32 last_div = 0; - struct clk *parent; + struct clk_core *parent; unsigned long parent_rate; const char *clk_name; @@ -286,7 +286,7 @@ u32 omap2_clksel_round_rate_div(struct clk_hw_omap *clk, /* * Clocktype interface functions to the OMAP clock code - * (i.e., those used in struct clk field function pointers, etc.) + * (i.e., those used in struct clk_core field function pointers, etc.) */ /** @@ -309,7 +309,7 @@ u8 omap2_clksel_find_parent_index(struct clk_hw *hw) const struct clksel *clks; const struct clksel_rate *clkr; u32 r, found = 0; - struct clk *parent; + struct clk_core *parent; const char *clk_name; int ret = 0, f = 0; @@ -345,11 +345,11 @@ u8 omap2_clksel_find_parent_index(struct clk_hw *hw) /** - * omap2_clksel_recalc() - function ptr to pass via struct clk .recalc field - * @clk: struct clk * + * omap2_clksel_recalc() - function ptr to pass via struct clk_core .recalc field + * @clk: struct clk_core * * * This function is intended to be called only by the clock framework. - * Each clksel clock should have its struct clk .recalc field set to this + * Each clksel clock should have its struct clk_core .recalc field set to this * function. Returns the clock's current rate, based on its parent's rate * and its current divisor setting in the hardware. */ @@ -376,7 +376,7 @@ unsigned long omap2_clksel_recalc(struct clk_hw *hw, unsigned long parent_rate) /** * omap2_clksel_round_rate() - find rounded rate for the given clock and rate - * @clk: OMAP struct clk to use + * @clk: OMAP struct clk_core to use * @target_rate: desired clock rate * * This function is intended to be called only by the clock framework. @@ -396,7 +396,7 @@ long omap2_clksel_round_rate(struct clk_hw *hw, unsigned long target_rate, /** * omap2_clksel_set_rate() - program clock rate in hardware - * @clk: struct clk * to program rate + * @clk: struct clk_core * to program rate * @rate: target rate to program * * This function is intended to be called only by the clock framework. @@ -435,7 +435,7 @@ int omap2_clksel_set_rate(struct clk_hw *hw, unsigned long rate, } /* - * Clksel parent setting function - not passed in struct clk function + * Clksel parent setting function - not passed in struct clk_core function * pointer - instead, the OMAP clock code currently assumes that any * parent-setting clock is a clksel clock, and calls * omap2_clksel_set_parent() by default @@ -443,8 +443,8 @@ int omap2_clksel_set_rate(struct clk_hw *hw, unsigned long rate, /** * omap2_clksel_set_parent() - change a clock's parent clock - * @clk: struct clk * of the child clock - * @new_parent: struct clk * of the new parent clock + * @clk: struct clk_core * of the child clock + * @new_parent: struct clk_core * of the new parent clock * * This function is intended to be called only by the clock framework. * Change the parent clock of clock @clk to @new_parent. This is diff --git a/arch/arm/mach-omap2/clkt_dpll.c b/arch/arm/mach-omap2/clkt_dpll.c index f251a14..36f263d 100644 --- a/arch/arm/mach-omap2/clkt_dpll.c +++ b/arch/arm/mach-omap2/clkt_dpll.c @@ -56,7 +56,7 @@ /* * _dpll_test_fint - test whether an Fint value is valid for the DPLL - * @clk: DPLL struct clk to test + * @clk: DPLL struct clk_core to test * @n: divider value (N) to test * * Tests whether a particular divider @n will result in a valid DPLL @@ -215,7 +215,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw) v &= dd->enable_mask; v >>= __ffs(dd->enable_mask); - /* Reparent the struct clk in case the dpll is in bypass */ + /* Reparent the struct clk_core in case the dpll is in bypass */ if (_omap2_dpll_is_in_bypass(v)) return 1; @@ -224,7 +224,7 @@ u8 omap2_init_dpll_parent(struct clk_hw *hw) /** * omap2_get_dpll_rate - returns the current DPLL CLKOUT rate - * @clk: struct clk * of a DPLL + * @clk: struct clk_core * of a DPLL * * DPLLs can be locked or bypassed - basically, enabled or disabled. * When locked, the DPLL output depends on the M and N values. When @@ -270,7 +270,7 @@ unsigned long omap2_get_dpll_rate(struct clk_hw_omap *clk) /** * omap2_dpll_round_rate - round a target rate for an OMAP DPLL - * @clk: struct clk * for a DPLL + * @clk: struct clk_core * for a DPLL * @target_rate: desired DPLL clock rate * * Given a DPLL and a desired target rate, round the target rate to a diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c index 500530d..ab341e4 100644 --- a/arch/arm/mach-omap2/clock.c +++ b/arch/arm/mach-omap2/clock.c @@ -142,7 +142,7 @@ static int _wait_idlest_generic(struct clk_hw_omap *clk, void __iomem *reg, /** * _omap2_module_wait_ready - wait for an OMAP module to leave IDLE - * @clk: struct clk * belonging to the module + * @clk: struct clk_core * belonging to the module * * If the necessary clocks for the OMAP hardware IP block that * corresponds to clock @clk are enabled, then wait for the module to @@ -181,7 +181,7 @@ static void _omap2_module_wait_ready(struct clk_hw_omap *clk) * omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk * @clk: OMAP clock struct ptr to use * - * Convert a clockdomain name stored in a struct clk 'clk' into a + * Convert a clockdomain name stored in a struct clk_core 'clk' into a * clockdomain pointer, and save it into the struct clk. Intended to be * called during clk_register(). No return value. */ @@ -222,7 +222,7 @@ void __init omap2_clk_disable_clkdm_control(void) /** * omap2_clk_dflt_find_companion - find companion clock to @clk - * @clk: struct clk * to find the companion clock of + * @clk: struct clk_core * to find the companion clock of * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in * @other_bit: u8 ** to return the companion clock bit shift in * @@ -258,7 +258,7 @@ void omap2_clk_dflt_find_companion(struct clk_hw_omap *clk, /** * omap2_clk_dflt_find_idlest - find CM_IDLEST reg va, bit shift for @clk - * @clk: struct clk * to find IDLEST info for + * @clk: struct clk_core * to find IDLEST info for * @idlest_reg: void __iomem ** to return the CM_IDLEST va in * @idlest_bit: u8 * to return the CM_IDLEST bit shift in * @idlest_val: u8 * to return the idle status indicator @@ -502,14 +502,14 @@ __setup("mpurate=", omap_clk_setup); /** * omap2_init_clk_hw_omap_clocks - initialize an OMAP clock - * @clk: struct clk * to initialize + * @clk: struct clk_core * to initialize * * Add an OMAP clock @clk to the internal list of OMAP clocks. Used * temporarily for autoidle handling, until this support can be * integrated into the common clock framework code in some way. No * return value. */ -void omap2_init_clk_hw_omap_clocks(struct clk *clk) +void omap2_init_clk_hw_omap_clocks(struct clk_core *clk) { struct clk_hw_omap *c; @@ -566,11 +566,11 @@ int omap2_clk_disable_autoidle_all(void) /** * omap2_clk_deny_idle - disable autoidle on an OMAP clock - * @clk: struct clk * to disable autoidle for + * @clk: struct clk_core * to disable autoidle for * * Disable autoidle on an OMAP clock. */ -int omap2_clk_deny_idle(struct clk *clk) +int omap2_clk_deny_idle(struct clk_core *clk) { struct clk_hw_omap *c; @@ -585,11 +585,11 @@ int omap2_clk_deny_idle(struct clk *clk) /** * omap2_clk_allow_idle - enable autoidle on an OMAP clock - * @clk: struct clk * to enable autoidle for + * @clk: struct clk_core * to enable autoidle for * * Enable autoidle on an OMAP clock. */ -int omap2_clk_allow_idle(struct clk *clk) +int omap2_clk_allow_idle(struct clk_core *clk) { struct clk_hw_omap *c; @@ -614,12 +614,12 @@ int omap2_clk_allow_idle(struct clk *clk) */ void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks) { - struct clk *init_clk; + struct clk_core *init_clk; int i; for (i = 0; i < num_clocks; i++) { - init_clk = clk_get(NULL, clk_names[i]); - clk_prepare_enable(init_clk); + init_clk = clk_provider_get(NULL, clk_names[i]); + clk_provider_prepare_enable(init_clk); } } @@ -655,31 +655,31 @@ void __init omap_clocks_register(struct omap_clk oclks[], int cnt) * the OPP layer. XXX This is intended to be handled by the OPP layer * code in the near future and should be removed from the clock code. * Returns -EINVAL if 'mpurate' is zero or if clk_set_rate() rejects - * the rate, -ENOENT if the struct clk referred to by @mpurate_ck_name + * the rate, -ENOENT if the struct clk_core referred to by @mpurate_ck_name * cannot be found, or 0 upon success. */ int __init omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name) { - struct clk *mpurate_ck; + struct clk_core *mpurate_ck; int r; if (!mpurate) return -EINVAL; - mpurate_ck = clk_get(NULL, mpurate_ck_name); + mpurate_ck = clk_provider_get(NULL, mpurate_ck_name); if (WARN(IS_ERR(mpurate_ck), "Failed to get %s.\n", mpurate_ck_name)) return -ENOENT; - r = clk_set_rate(mpurate_ck, mpurate); + r = clk_provider_set_rate(mpurate_ck, mpurate); if (r < 0) { WARN(1, "clock: %s: unable to set MPU rate to %d: %d\n", mpurate_ck_name, mpurate, r); - clk_put(mpurate_ck); + __clk_put(mpurate_ck); return -EINVAL; } calibrate_delay(); - clk_put(mpurate_ck); + __clk_put(mpurate_ck); return 0; } @@ -700,27 +700,27 @@ void __init omap2_clk_print_new_rates(const char *hfclkin_ck_name, const char *core_ck_name, const char *mpu_ck_name) { - struct clk *hfclkin_ck, *core_ck, *mpu_ck; + struct clk_core *hfclkin_ck, *core_ck, *mpu_ck; unsigned long hfclkin_rate; - mpu_ck = clk_get(NULL, mpu_ck_name); + mpu_ck = clk_provider_get(NULL, mpu_ck_name); if (WARN(IS_ERR(mpu_ck), "clock: failed to get %s.\n", mpu_ck_name)) return; - core_ck = clk_get(NULL, core_ck_name); + core_ck = clk_provider_get(NULL, core_ck_name); if (WARN(IS_ERR(core_ck), "clock: failed to get %s.\n", core_ck_name)) return; - hfclkin_ck = clk_get(NULL, hfclkin_ck_name); + hfclkin_ck = clk_provider_get(NULL, hfclkin_ck_name); if (WARN(IS_ERR(hfclkin_ck), "Failed to get %s.\n", hfclkin_ck_name)) return; - hfclkin_rate = clk_get_rate(hfclkin_ck); + hfclkin_rate = clk_provider_get_rate(hfclkin_ck); pr_info("Switched to new clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n", (hfclkin_rate / 1000000), ((hfclkin_rate / 100000) % 10), - (clk_get_rate(core_ck) / 1000000), - (clk_get_rate(mpu_ck) / 1000000)); + (clk_provider_get_rate(core_ck) / 1000000), + (clk_provider_get_rate(mpu_ck) / 1000000)); } /** diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h index 4592a27..7068684 100644 --- a/arch/arm/mach-omap2/clock.h +++ b/arch/arm/mach-omap2/clock.h @@ -40,7 +40,7 @@ struct omap_clk { struct clockdomain; #define DEFINE_STRUCT_CLK(_name, _parent_array_name, _clkops_name) \ - static struct clk _name = { \ + static struct clk_core _name = { \ .name = #_name, \ .hw = &_name##_hw.hw, \ .parent_names = _parent_array_name, \ @@ -50,7 +50,7 @@ struct clockdomain; #define DEFINE_STRUCT_CLK_FLAGS(_name, _parent_array_name, \ _clkops_name, _flags) \ - static struct clk _name = { \ + static struct clk_core _name = { \ .name = #_name, \ .hw = &_name##_hw.hw, \ .parent_names = _parent_array_name, \ @@ -70,7 +70,7 @@ struct clockdomain; #define DEFINE_CLK_OMAP_MUX(_name, _clkdm_name, _clksel, \ _clksel_reg, _clksel_mask, \ _parent_names, _ops) \ - static struct clk _name; \ + static struct clk_core _name; \ static struct clk_hw_omap _name##_hw = { \ .hw = { \ .clk = &_name, \ @@ -86,7 +86,7 @@ struct clockdomain; _clksel_reg, _clksel_mask, \ _enable_reg, _enable_bit, \ _hwops, _parent_names, _ops) \ - static struct clk _name; \ + static struct clk_core _name; \ static struct clk_hw_omap _name##_hw = { \ .hw = { \ .clk = &_name, \ @@ -142,14 +142,14 @@ struct clksel_rate { /** * struct clksel - available parent clocks, and a pointer to their divisors - * @parent: struct clk * to a possible parent clock + * @parent: struct clk_core * to a possible parent clock * @rates: available divisors for this parent clock * * A struct clksel is always associated with one or more struct clks * and one or more struct clksel_rates. */ struct clksel { - struct clk *parent; + struct clk_core *parent; const struct clksel_rate *rates; }; @@ -208,8 +208,8 @@ void omap2_clk_dflt_find_idlest(struct clk_hw_omap *clk, void __iomem **idlest_reg, u8 *idlest_bit, u8 *idlest_val); int omap2_clk_enable_autoidle_all(void); -int omap2_clk_allow_idle(struct clk *clk); -int omap2_clk_deny_idle(struct clk *clk); +int omap2_clk_allow_idle(struct clk_core *clk); +int omap2_clk_deny_idle(struct clk_core *clk); int omap2_clk_switch_mpurate_at_boot(const char *mpurate_ck_name); void omap2_clk_print_new_rates(const char *hfclkin_ck_name, const char *core_ck_name, @@ -247,7 +247,7 @@ extern const struct clksel_rate gpt_32k_rates[]; extern const struct clksel_rate gpt_sys_rates[]; extern const struct clksel_rate gfx_l3_rates[]; extern const struct clksel_rate dsp_ick_rates[]; -extern struct clk dummy_ck; +extern struct clk_core dummy_ck; extern const struct clk_hw_omap_ops clkhwops_iclk_wait; extern const struct clk_hw_omap_ops clkhwops_wait; diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c index 0b02b41..8d1b843 100644 --- a/arch/arm/mach-omap2/clock3xxx.c +++ b/arch/arm/mach-omap2/clock3xxx.c @@ -18,7 +18,6 @@ #include #include -#include #include #include "soc.h" @@ -37,7 +36,7 @@ #define DPLL5_FREQ_FOR_USBHOST 120000000 /* needed by omap3_core_dpll_m2_set_rate() */ -struct clk *sdrc_ick_p, *arm_fck_p; +struct clk_core *sdrc_ick_p, *arm_fck_p; int omap3_dpll4_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { @@ -56,20 +55,20 @@ int omap3_dpll4_set_rate(struct clk_hw *hw, unsigned long rate, void __init omap3_clk_lock_dpll5(void) { - struct clk *dpll5_clk; - struct clk *dpll5_m2_clk; + struct clk_core *dpll5_clk; + struct clk_core *dpll5_m2_clk; - dpll5_clk = clk_get(NULL, "dpll5_ck"); - clk_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST); - clk_prepare_enable(dpll5_clk); + dpll5_clk = clk_provider_get(NULL, "dpll5_ck"); + clk_provider_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST); + clk_provider_prepare_enable(dpll5_clk); /* Program dpll5_m2_clk divider for no division */ - dpll5_m2_clk = clk_get(NULL, "dpll5_m2_ck"); - clk_prepare_enable(dpll5_m2_clk); - clk_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST); + dpll5_m2_clk = clk_provider_get(NULL, "dpll5_m2_ck"); + clk_provider_prepare_enable(dpll5_m2_clk); + clk_provider_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST); - clk_disable_unprepare(dpll5_m2_clk); - clk_disable_unprepare(dpll5_clk); + clk_provider_disable_unprepare(dpll5_m2_clk); + clk_provider_disable_unprepare(dpll5_clk); return; } diff --git a/arch/arm/mach-omap2/clock3xxx.h b/arch/arm/mach-omap2/clock3xxx.h index 78d9f56..063fbf1 100644 --- a/arch/arm/mach-omap2/clock3xxx.h +++ b/arch/arm/mach-omap2/clock3xxx.h @@ -12,8 +12,8 @@ int omap3xxx_clk_init(void); int omap3_core_dpll_m2_set_rate(struct clk_hw *clk, unsigned long rate, unsigned long parent_rate); -extern struct clk *sdrc_ick_p; -extern struct clk *arm_fck_p; +extern struct clk_core *sdrc_ick_p; +extern struct clk_core *arm_fck_p; extern const struct clkops clkops_noncore_dpll_ops; diff --git a/arch/arm/mach-omap2/clock_common_data.c b/arch/arm/mach-omap2/clock_common_data.c index ef4d21b..31e3e79 100644 --- a/arch/arm/mach-omap2/clock_common_data.c +++ b/arch/arm/mach-omap2/clock_common_data.c @@ -119,7 +119,7 @@ const struct clksel_rate div31_1to31_rates[] = { static struct clk_ops dummy_ck_ops = {}; -struct clk dummy_ck = { +struct clk_core dummy_ck = { .name = "dummy_clk", .ops = &dummy_ck_ops, .flags = CLK_IS_BASIC, diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 2da3b5e..dd89095 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include #include @@ -1141,7 +1140,7 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) /** * clkdm_clk_enable - add an enabled downstream clock to this clkdm * @clkdm: struct clockdomain * - * @clk: struct clk * of the enabled downstream clock + * @clk: struct clk_core * of the enabled downstream clock * * Increment the usecount of the clockdomain @clkdm and ensure that it * is awake before @clk is enabled. Intended to be called by @@ -1152,7 +1151,7 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) * by on-chip processors. Returns -EINVAL if passed null pointers; * returns 0 upon success or if the clockdomain is in hwsup idle mode. */ -int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) +int clkdm_clk_enable(struct clockdomain *clkdm, struct clk_core *clk) { /* * XXX Rewrite this code to maintain a list of enabled @@ -1168,7 +1167,7 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) /** * clkdm_clk_disable - remove an enabled downstream clock from this clkdm * @clkdm: struct clockdomain * - * @clk: struct clk * of the disabled downstream clock + * @clk: struct clk_core * of the disabled downstream clock * * Decrement the usecount of this clockdomain @clkdm when @clk is * disabled. Intended to be called by clk_disable() code. If the @@ -1178,7 +1177,7 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) * pointers; -ERANGE if the @clkdm usecount underflows; or returns 0 * upon success or if the clockdomain is in hwsup idle mode. */ -int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) +int clkdm_clk_disable(struct clockdomain *clkdm, struct clk_core *clk) { if (!clkdm || !clk || !arch_clkdm || !arch_clkdm->clkdm_clk_disable) return -EINVAL; diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h index 82c37b1..f1a2cad 100644 --- a/arch/arm/mach-omap2/clockdomain.h +++ b/arch/arm/mach-omap2/clockdomain.h @@ -207,8 +207,8 @@ int clkdm_wakeup(struct clockdomain *clkdm); int clkdm_sleep_nolock(struct clockdomain *clkdm); int clkdm_sleep(struct clockdomain *clkdm); -int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk); -int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk); +int clkdm_clk_enable(struct clockdomain *clkdm, struct clk_core *clk); +int clkdm_clk_disable(struct clockdomain *clkdm, struct clk_core *clk); int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh); int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh); diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c index 0f9e479..ff1f6c1 100644 --- a/arch/arm/mach-omap2/display.c +++ b/arch/arm/mach-omap2/display.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include #include @@ -524,7 +523,7 @@ int omap_dss_reset(struct omap_hwmod *oh) for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) if (oc->_clk) - clk_prepare_enable(oc->_clk); + clk_provider_prepare_enable(oc->_clk); dispc_disable_outputs(); @@ -551,7 +550,7 @@ int omap_dss_reset(struct omap_hwmod *oh) for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) if (oc->_clk) - clk_disable_unprepare(oc->_clk); + clk_provider_disable_unprepare(oc->_clk); r = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0; diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c index ac3d789..39c3861 100644 --- a/arch/arm/mach-omap2/dpll3xxx.c +++ b/arch/arm/mach-omap2/dpll3xxx.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include @@ -288,7 +287,7 @@ static void _lookup_sddiv(struct clk_hw_omap *clk, u8 *sd_div, u16 m, u8 n) /* * _omap3_noncore_dpll_program - set non-core DPLL M,N values directly - * @clk: struct clk * of DPLL to set + * @clk: struct clk_core * of DPLL to set * @freqsel: FREQSEL value to set * * Program the DPLL with the last M, N values calculated, and wait for @@ -410,7 +409,7 @@ int omap3_noncore_dpll_enable(struct clk_hw *hw) struct clk_hw_omap *clk = to_clk_hw_omap(hw); int r; struct dpll_data *dd; - struct clk *parent; + struct clk_core *parent; dd = clk->dpll_data; if (!dd) @@ -461,7 +460,7 @@ void omap3_noncore_dpll_disable(struct clk_hw *hw) /** * omap3_noncore_dpll_set_rate - set non-core DPLL rate - * @clk: struct clk * of DPLL to set + * @clk: struct clk_core * of DPLL to set * @rate: rounded target rate * * Set the DPLL CLKOUT to the target rate. If the DPLL can enter @@ -474,7 +473,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { struct clk_hw_omap *clk = to_clk_hw_omap(hw); - struct clk *new_parent = NULL; + struct clk_core *new_parent = NULL; unsigned long rrate; u16 freqsel = 0; struct dpll_data *dd; @@ -493,15 +492,15 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate, __func__, __clk_get_name(hw->clk)); __clk_prepare(dd->clk_bypass); - clk_enable(dd->clk_bypass); + clk_provider_enable(dd->clk_bypass); ret = _omap3_noncore_dpll_bypass(clk); if (!ret) new_parent = dd->clk_bypass; - clk_disable(dd->clk_bypass); + clk_provider_disable(dd->clk_bypass); __clk_unprepare(dd->clk_bypass); } else { __clk_prepare(dd->clk_ref); - clk_enable(dd->clk_ref); + clk_provider_enable(dd->clk_ref); /* XXX this check is probably pointless in the CCF context */ if (dd->last_rounded_rate != rate) { @@ -530,7 +529,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate, ret = omap3_noncore_dpll_program(clk, freqsel); if (!ret) new_parent = dd->clk_ref; - clk_disable(dd->clk_ref); + clk_provider_disable(dd->clk_ref); __clk_unprepare(dd->clk_ref); } /* @@ -540,7 +539,7 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate, * stuff is inherited for free */ - if (!ret && clk_get_parent(hw->clk) != new_parent) + if (!ret && clk_provider_get_parent(hw->clk) != new_parent) __clk_reparent(hw->clk, new_parent); return 0; @@ -550,10 +549,10 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate, /** * omap3_dpll_autoidle_read - read a DPLL's autoidle bits - * @clk: struct clk * of the DPLL to read + * @clk: struct clk_core * of the DPLL to read * * Return the DPLL's autoidle bits, shifted down to bit 0. Returns - * -EINVAL if passed a null pointer or if the struct clk does not + * -EINVAL if passed a null pointer or if the struct clk_core does not * appear to refer to a DPLL. */ u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk) @@ -578,7 +577,7 @@ u32 omap3_dpll_autoidle_read(struct clk_hw_omap *clk) /** * omap3_dpll_allow_idle - enable DPLL autoidle bits - * @clk: struct clk * of the DPLL to operate on + * @clk: struct clk_core * of the DPLL to operate on * * Enable DPLL automatic idle control. This automatic idle mode * switching takes effect only when the DPLL is locked, at least on @@ -612,7 +611,7 @@ void omap3_dpll_allow_idle(struct clk_hw_omap *clk) /** * omap3_dpll_deny_idle - prevent DPLL from automatically idling - * @clk: struct clk * of the DPLL to operate on + * @clk: struct clk_core * of the DPLL to operate on * * Disable DPLL automatic idle control. No return value. */ @@ -642,7 +641,7 @@ void omap3_dpll_deny_idle(struct clk_hw_omap *clk) static struct clk_hw_omap *omap3_find_clkoutx2_dpll(struct clk_hw *hw) { struct clk_hw_omap *pclk = NULL; - struct clk *parent; + struct clk_core *parent; /* Walk up the parents of clk, looking for a DPLL */ do { diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c index 4613f1e..726b254 100644 --- a/arch/arm/mach-omap2/dpll44xx.c +++ b/arch/arm/mach-omap2/dpll44xx.c @@ -11,7 +11,6 @@ #include #include -#include #include #include @@ -124,7 +123,7 @@ static void omap4_dpll_lpmode_recalc(struct dpll_data *dd) /** * omap4_dpll_regm4xen_recalc - compute DPLL rate, considering REGM4XEN bit - * @clk: struct clk * of the DPLL to compute the rate for + * @clk: struct clk_core * of the DPLL to compute the rate for * * Compute the output rate for the OMAP4 DPLL represented by @clk. * Takes the REGM4XEN bit into consideration, which is needed for the @@ -156,7 +155,7 @@ unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw, /** * omap4_dpll_regm4xen_round_rate - round DPLL rate, considering REGM4XEN bit - * @clk: struct clk * of the DPLL to round a rate for + * @clk: struct clk_core * of the DPLL to round a rate for * @target_rate: the desired rate of the DPLL * * Compute the rate that would be programmed into the DPLL hardware diff --git a/arch/arm/mach-omap2/mcbsp.c b/arch/arm/mach-omap2/mcbsp.c index b4ac3af..1424c90 100644 --- a/arch/arm/mach-omap2/mcbsp.c +++ b/arch/arm/mach-omap2/mcbsp.c @@ -12,7 +12,6 @@ */ #include #include -#include #include #include #include @@ -34,7 +33,7 @@ #include "cm3xxx.h" #include "cm-regbits-34xx.h" -static struct clk *mcbsp_iclks[5]; +static struct clk_core *mcbsp_iclks[5]; static int omap3_enable_st_clock(unsigned int id, bool enable) { @@ -98,7 +97,7 @@ static int __init omap_init_mcbsp(struct omap_hwmod *oh, void *unused) (struct omap_mcbsp_dev_attr *)(oh->dev_attr))->sidetone); pdata->enable_st_clock = omap3_enable_st_clock; sprintf(clk_name, "mcbsp%d_ick", id); - mcbsp_iclks[id] = clk_get(NULL, clk_name); + mcbsp_iclks[id] = clk_provider_get(NULL, clk_name); count++; } pdev = omap_device_build_ss(name, id, oh_device, count, pdata, diff --git a/arch/arm/mach-omap2/omap_device.c b/arch/arm/mach-omap2/omap_device.c index f138a62..c5386a4 100644 --- a/arch/arm/mach-omap2/omap_device.c +++ b/arch/arm/mach-omap2/omap_device.c @@ -30,7 +30,6 @@ #include #include #include -#include #include #include #include @@ -47,7 +46,7 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias, const char *clk_name) { - struct clk *r; + struct clk_core *r; struct clk_lookup *l; if (!clk_alias || !clk_name) @@ -55,15 +54,15 @@ static void _add_clkdev(struct omap_device *od, const char *clk_alias, dev_dbg(&od->pdev->dev, "Creating %s -> %s\n", clk_alias, clk_name); - r = clk_get_sys(dev_name(&od->pdev->dev), clk_alias); + r = clk_provider_get_sys(dev_name(&od->pdev->dev), clk_alias); if (!IS_ERR(r)) { dev_dbg(&od->pdev->dev, "alias %s already exists\n", clk_alias); - clk_put(r); + __clk_put(r); return; } - r = clk_get(NULL, clk_name); + r = clk_provider_get(NULL, clk_name); if (IS_ERR(r)) { dev_err(&od->pdev->dev, "clk_get for %s failed\n", clk_name); diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 8fd87a3..c61b392 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -753,7 +753,7 @@ static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) } /** - * _init_main_clk - get a struct clk * for the the hwmod's main functional clk + * _init_main_clk - get a struct clk_core * for the the hwmod's main functional clk * @oh: struct omap_hwmod * * * Called from _init_clocks(). Populates the @oh _clk (main @@ -767,7 +767,7 @@ static int _init_main_clk(struct omap_hwmod *oh) if (!oh->main_clk) return 0; - oh->_clk = clk_get(NULL, oh->main_clk); + oh->_clk = clk_provider_get(NULL, oh->main_clk); if (IS_ERR(oh->_clk)) { pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n", oh->name, oh->main_clk); @@ -781,7 +781,7 @@ static int _init_main_clk(struct omap_hwmod *oh) * some point where subsystems like i2c and pmic become * available. */ - clk_prepare(oh->_clk); + clk_provider_prepare(oh->_clk); if (!_get_clkdm(oh)) pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n", @@ -791,7 +791,7 @@ static int _init_main_clk(struct omap_hwmod *oh) } /** - * _init_interface_clks - get a struct clk * for the the hwmod's interface clks + * _init_interface_clks - get a struct clk_core * for the the hwmod's interface clks * @oh: struct omap_hwmod * * * Called from _init_clocks(). Populates the @oh OCP slave interface @@ -801,7 +801,7 @@ static int _init_interface_clks(struct omap_hwmod *oh) { struct omap_hwmod_ocp_if *os; struct list_head *p; - struct clk *c; + struct clk_core *c; int i = 0; int ret = 0; @@ -812,7 +812,7 @@ static int _init_interface_clks(struct omap_hwmod *oh) if (!os->clk) continue; - c = clk_get(NULL, os->clk); + c = clk_provider_get(NULL, os->clk); if (IS_ERR(c)) { pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n", oh->name, os->clk); @@ -828,14 +828,14 @@ static int _init_interface_clks(struct omap_hwmod *oh) * some point where subsystems like i2c and pmic become * available. */ - clk_prepare(os->_clk); + clk_provider_prepare(os->_clk); } return ret; } /** - * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks + * _init_opt_clk - get a struct clk_core * for the the hwmod's optional clocks * @oh: struct omap_hwmod * * * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk @@ -844,12 +844,12 @@ static int _init_interface_clks(struct omap_hwmod *oh) static int _init_opt_clks(struct omap_hwmod *oh) { struct omap_hwmod_opt_clk *oc; - struct clk *c; + struct clk_core *c; int i; int ret = 0; for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) { - c = clk_get(NULL, oc->clk); + c = clk_provider_get(NULL, oc->clk); if (IS_ERR(c)) { pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n", oh->name, oc->clk); @@ -865,7 +865,7 @@ static int _init_opt_clks(struct omap_hwmod *oh) * some point where subsystems like i2c and pmic become * available. */ - clk_prepare(oc->_clk); + clk_provider_prepare(oc->_clk); } return ret; @@ -887,7 +887,7 @@ static int _enable_clocks(struct omap_hwmod *oh) pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name); if (oh->_clk) - clk_enable(oh->_clk); + clk_provider_enable(oh->_clk); p = oh->slave_ports.next; @@ -895,7 +895,7 @@ static int _enable_clocks(struct omap_hwmod *oh) os = _fetch_next_ocp_if(&p, &i); if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) - clk_enable(os->_clk); + clk_provider_enable(os->_clk); } /* The opt clocks are controlled by the device driver. */ @@ -918,7 +918,7 @@ static int _disable_clocks(struct omap_hwmod *oh) pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name); if (oh->_clk) - clk_disable(oh->_clk); + clk_provider_disable(oh->_clk); p = oh->slave_ports.next; @@ -926,7 +926,7 @@ static int _disable_clocks(struct omap_hwmod *oh) os = _fetch_next_ocp_if(&p, &i); if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) - clk_disable(os->_clk); + clk_provider_disable(os->_clk); } /* The opt clocks are controlled by the device driver. */ @@ -945,7 +945,7 @@ static void _enable_optional_clocks(struct omap_hwmod *oh) if (oc->_clk) { pr_debug("omap_hwmod: enable %s:%s\n", oc->role, __clk_get_name(oc->_clk)); - clk_enable(oc->_clk); + clk_provider_enable(oc->_clk); } } @@ -960,7 +960,7 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) if (oc->_clk) { pr_debug("omap_hwmod: disable %s:%s\n", oc->role, __clk_get_name(oc->_clk)); - clk_disable(oc->_clk); + clk_provider_disable(oc->_clk); } } @@ -2589,7 +2589,7 @@ static void __init _setup_iclk_autoidle(struct omap_hwmod *oh) /* XXX omap_iclk_deny_idle(c); */ } else { /* XXX omap_iclk_allow_idle(c); */ - clk_enable(os->_clk); + clk_provider_enable(os->_clk); } } @@ -3396,7 +3396,7 @@ static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh) * Initialize and set up a single hwmod. Intended to be used for a * small number of early devices, such as the timer IP blocks used for * the scheduler clock. Must be called after omap2_clk_init(). - * Resolves the struct clk names to struct clk pointers for each + * Resolves the struct clk_core names to struct clk_core pointers for each * registered omap_hwmod. Also calls _setup() on each hwmod. Returns * -EINVAL upon error or 0 upon success. */ @@ -3425,7 +3425,7 @@ int __init omap_hwmod_setup_one(const char *oh_name) * * Initialize and set up all IP blocks registered with the hwmod code. * Must be called after omap2_clk_init(). Resolves the struct clk - * names to struct clk pointers for each registered omap_hwmod. Also + * names to struct clk_core pointers for each registered omap_hwmod. Also * calls _setup() on each hwmod. Returns 0 upon success. */ static int __init omap_hwmod_setup_all(void) @@ -3792,7 +3792,7 @@ int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type, */ struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) { - struct clk *c; + struct clk_core *c; struct omap_hwmod_ocp_if *oi; struct clockdomain *clkdm; struct clk_hw_omap *clk; diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h index 0f97d63..46ffd06 100644 --- a/arch/arm/mach-omap2/omap_hwmod.h +++ b/arch/arm/mach-omap2/omap_hwmod.h @@ -207,7 +207,7 @@ struct omap_hwmod_rst_info { * struct omap_hwmod_opt_clk - optional clocks used by this hwmod * @role: "sys", "32k", "tv", etc -- for use in clk_get() * @clk: opt clock: OMAP clock name - * @_clk: pointer to the struct clk (filled in at runtime) + * @_clk: pointer to the struct clk_core (filled in at runtime) * * The module's interface clock and main functional clock should not * be added as optional clocks. @@ -215,7 +215,7 @@ struct omap_hwmod_rst_info { struct omap_hwmod_opt_clk { const char *role; const char *clk; - struct clk *_clk; + struct clk_core *_clk; }; @@ -289,7 +289,7 @@ struct omap_hwmod_addr_space { * @slave: struct omap_hwmod that responds to OCP transactions on this link * @addr: address space associated with this link * @clk: interface clock: OMAP clock name - * @_clk: pointer to the interface struct clk (filled in at runtime) + * @_clk: pointer to the interface struct clk_core (filled in at runtime) * @fw: interface firewall data * @width: OCP data width * @user: initiators using this interface (see OCP_USER_* macros above) @@ -306,7 +306,7 @@ struct omap_hwmod_ocp_if { struct omap_hwmod *slave; struct omap_hwmod_addr_space *addr; const char *clk; - struct clk *_clk; + struct clk_core *_clk; union { struct omap_hwmod_omap2_firewall omap2; } fw; @@ -611,7 +611,7 @@ struct omap_hwmod_link { * @sdma_reqs: ptr to an array of System DMA request IDs * @prcm: PRCM data pertaining to this hwmod * @main_clk: main clock: OMAP clock name - * @_clk: pointer to the main struct clk (filled in at runtime) + * @_clk: pointer to the main struct clk_core (filled in at runtime) * @opt_clks: other device clocks that drivers can request (0..*) * @voltdm: pointer to voltage domain (filled in at runtime) * @dev_attr: arbitrary device attributes that can be passed to the driver @@ -653,7 +653,7 @@ struct omap_hwmod { struct omap_hwmod_omap4_prcm omap4; } prcm; const char *main_clk; - struct clk *_clk; + struct clk_core *_clk; struct omap_hwmod_opt_clk *opt_clks; char *clkdm_name; struct clockdomain *clkdm; diff --git a/arch/arm/mach-omap2/pm24xx.c b/arch/arm/mach-omap2/pm24xx.c index fe01c5a..56e5e77 100644 --- a/arch/arm/mach-omap2/pm24xx.c +++ b/arch/arm/mach-omap2/pm24xx.c @@ -60,7 +60,7 @@ static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl, static struct powerdomain *mpu_pwrdm, *core_pwrdm; static struct clockdomain *dsp_clkdm, *mpu_clkdm, *wkup_clkdm, *gfx_clkdm; -static struct clk *osc_ck, *emul_ck; +static struct clk_core *osc_ck, *emul_ck; static int omap2_enter_full_retention(void) { @@ -71,7 +71,7 @@ static int omap2_enter_full_retention(void) * oscillator itself it will be disabled if/when we enter retention * mode. */ - clk_disable(osc_ck); + clk_provider_disable(osc_ck); /* Clear old wake-up events */ /* REVISIT: These write to reserved bits? */ @@ -101,7 +101,7 @@ static int omap2_enter_full_retention(void) no_sleep: omap2_gpio_resume_after_idle(); - clk_enable(osc_ck); + clk_provider_enable(osc_ck); /* clear CORE wake-up events */ omap2xxx_prm_clear_mod_irqs(CORE_MOD, PM_WKST1, ~0); @@ -287,17 +287,17 @@ int __init omap2_pm_init(void) pr_err("PM: gfx_clkdm not found\n"); - osc_ck = clk_get(NULL, "osc_ck"); + osc_ck = clk_provider_get(NULL, "osc_ck"); if (IS_ERR(osc_ck)) { printk(KERN_ERR "could not get osc_ck\n"); return -ENODEV; } if (cpu_is_omap242x()) { - emul_ck = clk_get(NULL, "emul_ck"); + emul_ck = clk_provider_get(NULL, "emul_ck"); if (IS_ERR(emul_ck)) { printk(KERN_ERR "could not get emul_ck\n"); - clk_put(osc_ck); + __clk_put(osc_ck); return -ENODEV; } } diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 6bbb7b5..6be2d2d 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -62,7 +62,7 @@ void __init orion5x_map_io(void) /***************************************************************************** * CLK tree ****************************************************************************/ -static struct clk *tclk; +static struct clk_core *tclk; void __init clk_init(void) { diff --git a/arch/arm/mach-shmobile/clock.c b/arch/arm/mach-shmobile/clock.c index ed415dc..827f746 100644 --- a/arch/arm/mach-shmobile/clock.c +++ b/arch/arm/mach-shmobile/clock.c @@ -23,7 +23,6 @@ #include #ifdef CONFIG_COMMON_CLK -#include #include #include #include "clock.h" @@ -32,17 +31,17 @@ void __init shmobile_clk_workaround(const struct clk_name *clks, int nr_clks, bool enable) { const struct clk_name *clkn; - struct clk *clk; + struct clk_core *clk; unsigned int i; for (i = 0; i < nr_clks; ++i) { clkn = clks + i; - clk = clk_get(NULL, clkn->clk); + clk = clk_provider_get(NULL, clkn->clk); if (!IS_ERR(clk)) { clk_register_clkdev(clk, clkn->con_id, clkn->dev_id); if (enable) - clk_prepare_enable(clk); - clk_put(clk); + clk_provider_prepare_enable(clk); + __clk_put(clk); } } } diff --git a/arch/arm/mach-vexpress/spc.c b/arch/arm/mach-vexpress/spc.c index f61158c..e497df6 100644 --- a/arch/arm/mach-vexpress/spc.c +++ b/arch/arm/mach-vexpress/spc.c @@ -529,7 +529,7 @@ static struct clk_ops clk_spc_ops = { .set_rate = spc_set_rate, }; -static struct clk *ve_spc_clk_register(struct device *cpu_dev) +static struct clk_core *ve_spc_clk_register(struct device *cpu_dev) { struct clk_init_data init; struct clk_spc *spc; @@ -556,7 +556,7 @@ static struct clk *ve_spc_clk_register(struct device *cpu_dev) static int __init ve_spc_clk_init(void) { int cpu; - struct clk *clk; + struct clk_core *clk; if (!info) return 0; /* Continue only if SPC is initialised */ diff --git a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c index 961b593..abf63ce 100644 --- a/arch/arm/plat-orion/common.c +++ b/arch/arm/plat-orion/common.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include @@ -27,7 +26,7 @@ /* Create a clkdev entry for a given device/clk */ void __init orion_clkdev_add(const char *con_id, const char *dev_id, - struct clk *clk) + struct clk_core *clk) { struct clk_lookup *cl; @@ -40,7 +39,7 @@ void __init orion_clkdev_add(const char *con_id, const char *dev_id, Kirkwood has gated clocks for some of its peripherals, so creates its own clkdev entries. For all the other orion devices, create clkdev entries to the tclk. */ -void __init orion_clkdev_init(struct clk *tclk) +void __init orion_clkdev_init(struct clk_core *tclk) { orion_clkdev_add(NULL, "orion_spi.0", tclk); orion_clkdev_add(NULL, "orion_spi.1", tclk); @@ -78,10 +77,10 @@ static void fill_resources(struct platform_device *device, /***************************************************************************** * UART ****************************************************************************/ -static unsigned long __init uart_get_clk_rate(struct clk *clk) +static unsigned long __init uart_get_clk_rate(struct clk_core *clk) { - clk_prepare_enable(clk); - return clk_get_rate(clk); + clk_provider_prepare_enable(clk); + return clk_provider_get_rate(clk); } static void __init uart_complete( @@ -91,7 +90,7 @@ static void __init uart_complete( void __iomem *membase, resource_size_t mapbase, unsigned int irq, - struct clk *clk) + struct clk_core *clk) { data->mapbase = mapbase; data->membase = membase; @@ -125,7 +124,7 @@ static struct platform_device orion_uart0 = { void __init orion_uart0_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, - struct clk *clk) + struct clk_core *clk) { uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources, membase, mapbase, irq, clk); @@ -153,7 +152,7 @@ static struct platform_device orion_uart1 = { void __init orion_uart1_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, - struct clk *clk) + struct clk_core *clk) { uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources, membase, mapbase, irq, clk); @@ -181,7 +180,7 @@ static struct platform_device orion_uart2 = { void __init orion_uart2_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, - struct clk *clk) + struct clk_core *clk) { uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources, membase, mapbase, irq, clk); @@ -209,7 +208,7 @@ static struct platform_device orion_uart3 = { void __init orion_uart3_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, - struct clk *clk) + struct clk_core *clk) { uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources, membase, mapbase, irq, clk); diff --git a/arch/arm/plat-orion/include/plat/common.h b/arch/arm/plat-orion/include/plat/common.h index d9a24f6..44f1bbe 100644 --- a/arch/arm/plat-orion/include/plat/common.h +++ b/arch/arm/plat-orion/include/plat/common.h @@ -18,22 +18,22 @@ struct mv_sata_platform_data; void __init orion_uart0_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, - struct clk *clk); + struct clk_core *clk); void __init orion_uart1_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, - struct clk *clk); + struct clk_core *clk); void __init orion_uart2_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, - struct clk *clk); + struct clk_core *clk); void __init orion_uart3_init(void __iomem *membase, resource_size_t mapbase, unsigned int irq, - struct clk *clk); + struct clk_core *clk); void __init orion_rtc_init(unsigned long mapbase, unsigned long irq); @@ -107,7 +107,7 @@ void __init orion_crypto_init(unsigned long mapbase, unsigned long irq); void __init orion_clkdev_add(const char *con_id, const char *dev_id, - struct clk *clk); + struct clk_core *clk); -void __init orion_clkdev_init(struct clk *tclk); +void __init orion_clkdev_init(struct clk_core *tclk); #endif diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c index 6eb614a..81afe83 100644 --- a/arch/powerpc/platforms/512x/clock-commonclk.c +++ b/arch/powerpc/platforms/512x/clock-commonclk.c @@ -70,7 +70,7 @@ enum { }; /* data required for the OF clock provider registration */ -static struct clk *clks[MPC512x_CLK_LAST_PRIVATE]; +static struct clk_core *clks[MPC512x_CLK_LAST_PRIVATE]; static struct clk_onecell_data clk_data; /* CCM register access */ @@ -218,12 +218,12 @@ static bool soc_has_mclk_mux0_canin(void) /* common clk API wrappers {{{ */ /* convenience wrappers around the common clk API */ -static inline struct clk *mpc512x_clk_fixed(const char *name, int rate) +static inline struct clk_core *mpc512x_clk_fixed(const char *name, int rate) { return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate); } -static inline struct clk *mpc512x_clk_factor( +static inline struct clk_core *mpc512x_clk_factor( const char *name, const char *parent_name, int mul, int div) { @@ -234,7 +234,7 @@ static inline struct clk *mpc512x_clk_factor( mul, div); } -static inline struct clk *mpc512x_clk_divider( +static inline struct clk_core *mpc512x_clk_divider( const char *name, const char *parent_name, u8 clkflags, u32 __iomem *reg, u8 pos, u8 len, int divflags) { @@ -242,7 +242,7 @@ static inline struct clk *mpc512x_clk_divider( reg, pos, len, divflags, &clklock); } -static inline struct clk *mpc512x_clk_divtable( +static inline struct clk_core *mpc512x_clk_divtable( const char *name, const char *parent_name, u32 __iomem *reg, u8 pos, u8 len, const struct clk_div_table *divtab) @@ -255,7 +255,7 @@ static inline struct clk *mpc512x_clk_divtable( divtab, &clklock); } -static inline struct clk *mpc512x_clk_gated( +static inline struct clk_core *mpc512x_clk_gated( const char *name, const char *parent_name, u32 __iomem *reg, u8 pos) { @@ -266,7 +266,7 @@ static inline struct clk *mpc512x_clk_gated( reg, pos, 0, &clklock); } -static inline struct clk *mpc512x_clk_muxed(const char *name, +static inline struct clk_core *mpc512x_clk_muxed(const char *name, const char **parent_names, int parent_count, u32 __iomem *reg, u8 pos, u8 len) { @@ -422,7 +422,7 @@ static void mpc512x_clk_setup_ref_clock(struct device_node *np, int bus_freq, int *sys_mul, int *sys_div, int *ips_div) { - struct clk *osc_clk; + struct clk_core *osc_clk; int calc_freq; /* fetch mul/div factors from the hardware */ @@ -432,7 +432,7 @@ static void mpc512x_clk_setup_ref_clock(struct device_node *np, int bus_freq, *ips_div = get_bit_field(&clkregs->scfr1, 23, 3); /* lookup the oscillator clock for its rate */ - osc_clk = of_clk_get_by_name(np, "osc"); + osc_clk = of_clk_provider_get_by_name(np, "osc"); /* * either descend from OSC to REF (and in bypassing verify the @@ -444,7 +444,7 @@ static void mpc512x_clk_setup_ref_clock(struct device_node *np, int bus_freq, */ if (!IS_ERR(osc_clk)) { clks[MPC512x_CLK_REF] = mpc512x_clk_factor("ref", "osc", 1, 1); - calc_freq = clk_get_rate(clks[MPC512x_CLK_REF]); + calc_freq = clk_provider_get_rate(clks[MPC512x_CLK_REF]); calc_freq *= *sys_mul; calc_freq /= *sys_div; calc_freq /= 2; @@ -647,8 +647,8 @@ static void mpc512x_clk_setup_mclk(struct mclk_setup_data *entry, size_t idx) * - MCLK 0 enabled * - MCLK 1 from MCLK DIV */ - div = clk_get_rate(clks[MPC512x_CLK_SYS]); - div /= clk_get_rate(clks[MPC512x_CLK_IPS]); + div = clk_provider_get_rate(clks[MPC512x_CLK_SYS]); + div /= clk_provider_get_rate(clks[MPC512x_CLK_IPS]); out_be32(mccr_reg, (0 << 16)); out_be32(mccr_reg, (0 << 16) | ((div - 1) << 17)); out_be32(mccr_reg, (1 << 16) | ((div - 1) << 17)); @@ -925,12 +925,12 @@ static void mpc512x_clk_setup_clock_tree(struct device_node *np, int busfreq) * claimed by any peripheral driver, to not have the clock * subsystem disable them late at startup */ - clk_prepare_enable(clks[MPC512x_CLK_DUMMY]); - clk_prepare_enable(clks[MPC512x_CLK_E300]); /* PowerPC CPU */ - clk_prepare_enable(clks[MPC512x_CLK_DDR]); /* DRAM */ - clk_prepare_enable(clks[MPC512x_CLK_MEM]); /* SRAM */ - clk_prepare_enable(clks[MPC512x_CLK_IPS]); /* SoC periph */ - clk_prepare_enable(clks[MPC512x_CLK_LPC]); /* boot media */ + clk_provider_prepare_enable(clks[MPC512x_CLK_DUMMY]); + clk_provider_prepare_enable(clks[MPC512x_CLK_E300]); /* PowerPC CPU */ + clk_provider_prepare_enable(clks[MPC512x_CLK_DDR]); /* DRAM */ + clk_provider_prepare_enable(clks[MPC512x_CLK_MEM]); /* SRAM */ + clk_provider_prepare_enable(clks[MPC512x_CLK_IPS]); /* SoC periph */ + clk_provider_prepare_enable(clks[MPC512x_CLK_LPC]); /* boot media */ } /* @@ -969,9 +969,9 @@ static void mpc5121_clk_provide_migration_support(void) * has attached to bridges, otherwise the PCI clock remains * unused and so it gets disabled */ - clk_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */ + clk_provider_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */ if (of_find_compatible_node(NULL, "pci", "fsl,mpc5121-pci")) - clk_prepare_enable(clks[MPC512x_CLK_PCI]); + clk_provider_prepare_enable(clks[MPC512x_CLK_PCI]); } /* @@ -988,8 +988,8 @@ static void mpc5121_clk_provide_migration_support(void) } while (0) #define NODE_CHK(clkname, clkitem, regnode, regflag) do { \ - struct clk *clk; \ - clk = of_clk_get_by_name(np, clkname); \ + struct clk_core *clk; \ + clk = of_clk_provider_get_by_name(np, clkname); \ if (IS_ERR(clk)) { \ clk = clkitem; \ clk_register_clkdev(clk, clkname, devname); \ @@ -999,7 +999,7 @@ static void mpc5121_clk_provide_migration_support(void) pr_debug("clock alias name '%s' for dev '%s' pointer %p\n", \ clkname, devname, clk); \ } else { \ - clk_put(clk); \ + __clk_put(clk); \ } \ } while (0) @@ -1090,7 +1090,7 @@ static void mpc5121_clk_provide_backwards_compat(void) * workaround obsolete */ if (did_register & DID_REG_I2C) - clk_prepare_enable(clks[MPC512x_CLK_I2C]); + clk_provider_prepare_enable(clks[MPC512x_CLK_I2C]); FOR_NODES("fsl,mpc5121-diu") { NODE_PREP; diff --git a/drivers/clk/at91/clk-main.c b/drivers/clk/at91/clk-main.c index 59fa3cc..11bcdb1 100644 --- a/drivers/clk/at91/clk-main.c +++ b/drivers/clk/at91/clk-main.c @@ -138,7 +138,7 @@ static const struct clk_ops main_osc_ops = { .is_prepared = clk_main_osc_is_prepared, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_main_osc(struct at91_pmc *pmc, unsigned int irq, const char *name, @@ -147,7 +147,7 @@ at91_clk_register_main_osc(struct at91_pmc *pmc, { int ret; struct clk_main_osc *osc; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; if (!pmc || !irq || !name || !parent_name) @@ -192,7 +192,7 @@ at91_clk_register_main_osc(struct at91_pmc *pmc, void __init of_at91rm9200_clk_main_osc_setup(struct device_node *np, struct at91_pmc *pmc) { - struct clk *clk; + struct clk_core *clk; unsigned int irq; const char *name = np->name; const char *parent_name; @@ -291,7 +291,7 @@ static const struct clk_ops main_rc_osc_ops = { .recalc_accuracy = clk_main_rc_osc_recalc_accuracy, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_main_rc_osc(struct at91_pmc *pmc, unsigned int irq, const char *name, @@ -299,7 +299,7 @@ at91_clk_register_main_rc_osc(struct at91_pmc *pmc, { int ret; struct clk_main_rc_osc *osc; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; if (!pmc || !irq || !name || !frequency) @@ -340,7 +340,7 @@ at91_clk_register_main_rc_osc(struct at91_pmc *pmc, void __init of_at91sam9x5_clk_main_rc_osc_setup(struct device_node *np, struct at91_pmc *pmc) { - struct clk *clk; + struct clk_core *clk; unsigned int irq; u32 frequency = 0; u32 accuracy = 0; @@ -424,13 +424,13 @@ static const struct clk_ops rm9200_main_ops = { .recalc_rate = clk_rm9200_main_recalc_rate, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_rm9200_main(struct at91_pmc *pmc, const char *name, const char *parent_name) { struct clk_rm9200_main *clkmain; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; if (!pmc || !name) @@ -462,7 +462,7 @@ at91_clk_register_rm9200_main(struct at91_pmc *pmc, void __init of_at91rm9200_clk_main_setup(struct device_node *np, struct at91_pmc *pmc) { - struct clk *clk; + struct clk_core *clk; const char *parent_name; const char *name = np->name; @@ -555,7 +555,7 @@ static const struct clk_ops sam9x5_main_ops = { .get_parent = clk_sam9x5_main_get_parent, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_sam9x5_main(struct at91_pmc *pmc, unsigned int irq, const char *name, @@ -564,7 +564,7 @@ at91_clk_register_sam9x5_main(struct at91_pmc *pmc, { int ret; struct clk_sam9x5_main *clkmain; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; if (!pmc || !irq || !name) @@ -607,7 +607,7 @@ at91_clk_register_sam9x5_main(struct at91_pmc *pmc, void __init of_at91sam9x5_clk_main_setup(struct device_node *np, struct at91_pmc *pmc) { - struct clk *clk; + struct clk_core *clk; const char *parent_names[2]; int num_parents; unsigned int irq; diff --git a/drivers/clk/at91/clk-master.c b/drivers/clk/at91/clk-master.c index c1af80b..95ae1b6 100644 --- a/drivers/clk/at91/clk-master.c +++ b/drivers/clk/at91/clk-master.c @@ -131,7 +131,7 @@ static const struct clk_ops master_ops = { .get_parent = clk_master_get_parent, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_master(struct at91_pmc *pmc, unsigned int irq, const char *name, int num_parents, const char **parent_names, @@ -140,7 +140,7 @@ at91_clk_register_master(struct at91_pmc *pmc, unsigned int irq, { int ret; struct clk_master *master; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; if (!pmc || !irq || !name || !num_parents || !parent_names) @@ -216,7 +216,7 @@ static void __init of_at91_clk_master_setup(struct device_node *np, struct at91_pmc *pmc, const struct clk_master_layout *layout) { - struct clk *clk; + struct clk_core *clk; int num_parents; int i; unsigned int irq; diff --git a/drivers/clk/at91/clk-peripheral.c b/drivers/clk/at91/clk-peripheral.c index 597fed4..cdf8e8a 100644 --- a/drivers/clk/at91/clk-peripheral.c +++ b/drivers/clk/at91/clk-peripheral.c @@ -100,12 +100,12 @@ static const struct clk_ops peripheral_ops = { .is_enabled = clk_peripheral_is_enabled, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_peripheral(struct at91_pmc *pmc, const char *name, const char *parent_name, u32 id) { struct clk_peripheral *periph; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; if (!pmc || !name || !parent_name || id > PERIPHERAL_ID_MAX) @@ -134,7 +134,7 @@ at91_clk_register_peripheral(struct at91_pmc *pmc, const char *name, static void clk_sam9x5_peripheral_autodiv(struct clk_sam9x5_peripheral *periph) { - struct clk *parent; + struct clk_core *parent; unsigned long parent_rate; int shift = 0; @@ -309,13 +309,13 @@ static const struct clk_ops sam9x5_peripheral_ops = { .set_rate = clk_sam9x5_peripheral_set_rate, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_sam9x5_peripheral(struct at91_pmc *pmc, const char *name, const char *parent_name, u32 id, const struct clk_range *range) { struct clk_sam9x5_peripheral *periph; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; if (!pmc || !name || !parent_name) @@ -352,7 +352,7 @@ of_at91_clk_periph_setup(struct device_node *np, struct at91_pmc *pmc, u8 type) { int num; u32 id; - struct clk *clk; + struct clk_core *clk; const char *parent_name; const char *name; struct device_node *periphclknp; diff --git a/drivers/clk/at91/clk-pll.c b/drivers/clk/at91/clk-pll.c index 6ec79db..6a1b900 100644 --- a/drivers/clk/at91/clk-pll.c +++ b/drivers/clk/at91/clk-pll.c @@ -299,14 +299,14 @@ static const struct clk_ops pll_ops = { .set_rate = clk_pll_set_rate, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_pll(struct at91_pmc *pmc, unsigned int irq, const char *name, const char *parent_name, u8 id, const struct clk_pll_layout *layout, const struct clk_pll_characteristics *characteristics) { struct clk_pll *pll; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; int ret; int offset = PLL_REG(id); @@ -476,7 +476,7 @@ of_at91_clk_pll_setup(struct device_node *np, struct at91_pmc *pmc, { u32 id; unsigned int irq; - struct clk *clk; + struct clk_core *clk; const char *parent_name; const char *name = np->name; struct clk_pll_characteristics *characteristics; diff --git a/drivers/clk/at91/clk-plldiv.c b/drivers/clk/at91/clk-plldiv.c index ea22656..f8204d8 100644 --- a/drivers/clk/at91/clk-plldiv.c +++ b/drivers/clk/at91/clk-plldiv.c @@ -79,12 +79,12 @@ static const struct clk_ops plldiv_ops = { .set_rate = clk_plldiv_set_rate, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_plldiv(struct at91_pmc *pmc, const char *name, const char *parent_name) { struct clk_plldiv *plldiv; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; plldiv = kzalloc(sizeof(*plldiv), GFP_KERNEL); @@ -111,7 +111,7 @@ at91_clk_register_plldiv(struct at91_pmc *pmc, const char *name, static void __init of_at91_clk_plldiv_setup(struct device_node *np, struct at91_pmc *pmc) { - struct clk *clk; + struct clk_core *clk; const char *parent_name; const char *name = np->name; diff --git a/drivers/clk/at91/clk-programmable.c b/drivers/clk/at91/clk-programmable.c index 62e2509..b72e98c 100644 --- a/drivers/clk/at91/clk-programmable.c +++ b/drivers/clk/at91/clk-programmable.c @@ -57,9 +57,9 @@ static unsigned long clk_programmable_recalc_rate(struct clk_hw *hw, static long clk_programmable_determine_rate(struct clk_hw *hw, unsigned long rate, unsigned long *best_parent_rate, - struct clk **best_parent_clk) + struct clk_core **best_parent_clk) { - struct clk *parent = NULL; + struct clk_core *parent = NULL; long best_rate = -EINVAL; unsigned long parent_rate; unsigned long tmp_rate; @@ -169,14 +169,14 @@ static const struct clk_ops programmable_ops = { .set_rate = clk_programmable_set_rate, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_programmable(struct at91_pmc *pmc, const char *name, const char **parent_names, u8 num_parents, u8 id, const struct clk_programmable_layout *layout) { struct clk_programmable *prog; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; if (id > PROG_ID_MAX) @@ -229,7 +229,7 @@ of_at91_clk_prog_setup(struct device_node *np, struct at91_pmc *pmc, int num; u32 id; int i; - struct clk *clk; + struct clk_core *clk; int num_parents; const char *parent_names[PROG_SOURCE_MAX]; const char *name; diff --git a/drivers/clk/at91/clk-slow.c b/drivers/clk/at91/clk-slow.c index 0300c46..d50fe02 100644 --- a/drivers/clk/at91/clk-slow.c +++ b/drivers/clk/at91/clk-slow.c @@ -117,7 +117,7 @@ static const struct clk_ops slow_osc_ops = { .is_prepared = clk_slow_osc_is_prepared, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_slow_osc(void __iomem *sckcr, const char *name, const char *parent_name, @@ -125,7 +125,7 @@ at91_clk_register_slow_osc(void __iomem *sckcr, bool bypass) { struct clk_slow_osc *osc; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; if (!sckcr || !name || !parent_name) @@ -159,7 +159,7 @@ at91_clk_register_slow_osc(void __iomem *sckcr, void __init of_at91sam9x5_clk_slow_osc_setup(struct device_node *np, void __iomem *sckcr) { - struct clk *clk; + struct clk_core *clk; const char *parent_name; const char *name = np->name; u32 startup; @@ -229,7 +229,7 @@ static const struct clk_ops slow_rc_osc_ops = { .recalc_accuracy = clk_slow_rc_osc_recalc_accuracy, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_slow_rc_osc(void __iomem *sckcr, const char *name, unsigned long frequency, @@ -237,7 +237,7 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr, unsigned long startup) { struct clk_slow_rc_osc *osc; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; if (!sckcr || !name) @@ -269,7 +269,7 @@ at91_clk_register_slow_rc_osc(void __iomem *sckcr, void __init of_at91sam9x5_clk_slow_rc_osc_setup(struct device_node *np, void __iomem *sckcr) { - struct clk *clk; + struct clk_core *clk; u32 frequency = 0; u32 accuracy = 0; u32 startup = 0; @@ -327,14 +327,14 @@ static const struct clk_ops sam9x5_slow_ops = { .get_parent = clk_sam9x5_slow_get_parent, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_sam9x5_slow(void __iomem *sckcr, const char *name, const char **parent_names, int num_parents) { struct clk_sam9x5_slow *slowck; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; if (!sckcr || !name || !parent_names || !num_parents) @@ -364,7 +364,7 @@ at91_clk_register_sam9x5_slow(void __iomem *sckcr, void __init of_at91sam9x5_clk_slow_setup(struct device_node *np, void __iomem *sckcr) { - struct clk *clk; + struct clk_core *clk; const char *parent_names[2]; int num_parents; const char *name = np->name; @@ -401,14 +401,14 @@ static const struct clk_ops sam9260_slow_ops = { .get_parent = clk_sam9260_slow_get_parent, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_sam9260_slow(struct at91_pmc *pmc, const char *name, const char **parent_names, int num_parents) { struct clk_sam9260_slow *slowck; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; if (!pmc || !name) @@ -440,7 +440,7 @@ at91_clk_register_sam9260_slow(struct at91_pmc *pmc, void __init of_at91sam9260_clk_slow_setup(struct device_node *np, struct at91_pmc *pmc) { - struct clk *clk; + struct clk_core *clk; const char *parent_names[2]; int num_parents; const char *name = np->name; diff --git a/drivers/clk/at91/clk-smd.c b/drivers/clk/at91/clk-smd.c index 144d47e..8820b84 100644 --- a/drivers/clk/at91/clk-smd.c +++ b/drivers/clk/at91/clk-smd.c @@ -113,12 +113,12 @@ static const struct clk_ops at91sam9x5_smd_ops = { .set_rate = at91sam9x5_clk_smd_set_rate, }; -static struct clk * __init +static struct clk_core * __init at91sam9x5_clk_register_smd(struct at91_pmc *pmc, const char *name, const char **parent_names, u8 num_parents) { struct at91sam9x5_clk_smd *smd; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; smd = kzalloc(sizeof(*smd), GFP_KERNEL); @@ -144,7 +144,7 @@ at91sam9x5_clk_register_smd(struct at91_pmc *pmc, const char *name, void __init of_at91sam9x5_clk_smd_setup(struct device_node *np, struct at91_pmc *pmc) { - struct clk *clk; + struct clk_core *clk; int i; int num_parents; const char *parent_names[SMD_SOURCE_MAX]; diff --git a/drivers/clk/at91/clk-system.c b/drivers/clk/at91/clk-system.c index 8c96307..770d9bf 100644 --- a/drivers/clk/at91/clk-system.c +++ b/drivers/clk/at91/clk-system.c @@ -99,12 +99,12 @@ static const struct clk_ops system_ops = { .is_prepared = clk_system_is_prepared, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_system(struct at91_pmc *pmc, const char *name, const char *parent_name, u8 id, int irq) { struct clk_system *sys; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; int ret; @@ -153,7 +153,7 @@ of_at91_clk_sys_setup(struct device_node *np, struct at91_pmc *pmc) int num; int irq = 0; u32 id; - struct clk *clk; + struct clk_core *clk; const char *name; struct device_node *sysclknp; const char *parent_name; diff --git a/drivers/clk/at91/clk-usb.c b/drivers/clk/at91/clk-usb.c index 24b5b02..94b5871 100644 --- a/drivers/clk/at91/clk-usb.c +++ b/drivers/clk/at91/clk-usb.c @@ -162,12 +162,12 @@ static const struct clk_ops at91sam9n12_usb_ops = { .set_rate = at91sam9x5_clk_usb_set_rate, }; -static struct clk * __init +static struct clk_core * __init at91sam9x5_clk_register_usb(struct at91_pmc *pmc, const char *name, const char **parent_names, u8 num_parents) { struct at91sam9x5_clk_usb *usb; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; usb = kzalloc(sizeof(*usb), GFP_KERNEL); @@ -190,12 +190,12 @@ at91sam9x5_clk_register_usb(struct at91_pmc *pmc, const char *name, return clk; } -static struct clk * __init +static struct clk_core * __init at91sam9n12_clk_register_usb(struct at91_pmc *pmc, const char *name, const char *parent_name) { struct at91sam9x5_clk_usb *usb; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; usb = kzalloc(sizeof(*usb), GFP_KERNEL); @@ -238,7 +238,7 @@ static long at91rm9200_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw); - struct clk *parent = __clk_get_parent(hw->clk); + struct clk_core *parent = __clk_get_parent(hw->clk); unsigned long bestrate = 0; int bestdiff = -1; unsigned long tmprate; @@ -305,12 +305,12 @@ static const struct clk_ops at91rm9200_usb_ops = { .set_rate = at91rm9200_clk_usb_set_rate, }; -static struct clk * __init +static struct clk_core * __init at91rm9200_clk_register_usb(struct at91_pmc *pmc, const char *name, const char *parent_name, const u32 *divisors) { struct at91rm9200_clk_usb *usb; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; usb = kzalloc(sizeof(*usb), GFP_KERNEL); @@ -337,7 +337,7 @@ at91rm9200_clk_register_usb(struct at91_pmc *pmc, const char *name, void __init of_at91sam9x5_clk_usb_setup(struct device_node *np, struct at91_pmc *pmc) { - struct clk *clk; + struct clk_core *clk; int i; int num_parents; const char *parent_names[USB_SOURCE_MAX]; @@ -365,7 +365,7 @@ void __init of_at91sam9x5_clk_usb_setup(struct device_node *np, void __init of_at91sam9n12_clk_usb_setup(struct device_node *np, struct at91_pmc *pmc) { - struct clk *clk; + struct clk_core *clk; const char *parent_name; const char *name = np->name; @@ -385,7 +385,7 @@ void __init of_at91sam9n12_clk_usb_setup(struct device_node *np, void __init of_at91rm9200_clk_usb_setup(struct device_node *np, struct at91_pmc *pmc) { - struct clk *clk; + struct clk_core *clk; const char *parent_name; const char *name = np->name; u32 divisors[4] = {0, 0, 0, 0}; diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c index ae3263b..0502050 100644 --- a/drivers/clk/at91/clk-utmi.c +++ b/drivers/clk/at91/clk-utmi.c @@ -92,13 +92,13 @@ static const struct clk_ops utmi_ops = { .recalc_rate = clk_utmi_recalc_rate, }; -static struct clk * __init +static struct clk_core * __init at91_clk_register_utmi(struct at91_pmc *pmc, unsigned int irq, const char *name, const char *parent_name) { int ret; struct clk_utmi *utmi; - struct clk *clk = NULL; + struct clk_core *clk = NULL; struct clk_init_data init; utmi = kzalloc(sizeof(*utmi), GFP_KERNEL); @@ -132,7 +132,7 @@ static void __init of_at91_clk_utmi_setup(struct device_node *np, struct at91_pmc *pmc) { unsigned int irq; - struct clk *clk; + struct clk_core *clk; const char *parent_name; const char *name = np->name; diff --git a/drivers/clk/bcm/clk-kona-setup.c b/drivers/clk/bcm/clk-kona-setup.c index e5aeded..122e7b0 100644 --- a/drivers/clk/bcm/clk-kona-setup.c +++ b/drivers/clk/bcm/clk-kona-setup.c @@ -697,7 +697,7 @@ static void bcm_clk_teardown(struct kona_clk *bcm_clk) bcm_clk->type = bcm_clk_none; } -static void kona_clk_teardown(struct clk *clk) +static void kona_clk_teardown(struct clk_core *clk) { struct clk_hw *hw; struct kona_clk *bcm_clk; @@ -716,10 +716,10 @@ static void kona_clk_teardown(struct clk *clk) bcm_clk_teardown(bcm_clk); } -struct clk *kona_clk_setup(struct kona_clk *bcm_clk) +struct clk_core *kona_clk_setup(struct kona_clk *bcm_clk) { struct clk_init_data *init_data = &bcm_clk->init_data; - struct clk *clk = NULL; + struct clk_core *clk = NULL; switch (bcm_clk->type) { case bcm_clk_peri: diff --git a/drivers/clk/bcm/clk-kona.c b/drivers/clk/bcm/clk-kona.c index 95af2e6..a301aa9 100644 --- a/drivers/clk/bcm/clk-kona.c +++ b/drivers/clk/bcm/clk-kona.c @@ -1032,11 +1032,11 @@ static long kona_peri_clk_round_rate(struct clk_hw *hw, unsigned long rate, } static long kona_peri_clk_determine_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *best_parent_rate, struct clk **best_parent) + unsigned long *best_parent_rate, struct clk_core **best_parent) { struct kona_clk *bcm_clk = to_kona_clk(hw); - struct clk *clk = hw->clk; - struct clk *current_parent; + struct clk_core *clk = hw->clk; + struct clk_core *current_parent; unsigned long parent_rate; unsigned long best_delta; unsigned long best_rate; @@ -1053,14 +1053,14 @@ static long kona_peri_clk_determine_rate(struct clk_hw *hw, unsigned long rate, return kona_peri_clk_round_rate(hw, rate, best_parent_rate); /* Unless we can do better, stick with current parent */ - current_parent = clk_get_parent(clk); + current_parent = clk_provider_get_parent(clk); parent_rate = __clk_get_rate(current_parent); best_rate = kona_peri_clk_round_rate(hw, rate, &parent_rate); best_delta = abs(best_rate - rate); /* Check whether any other parent clock can produce a better result */ for (which = 0; which < parent_count; which++) { - struct clk *parent = clk_get_parent_by_index(clk, which); + struct clk_core *parent = clk_get_parent_by_index(clk, which); unsigned long delta; unsigned long other_rate; @@ -1260,7 +1260,7 @@ bool __init kona_ccu_init(struct ccu_data *ccu) { unsigned long flags; unsigned int which; - struct clk **clks = ccu->clk_data.clks; + struct clk_core **clks = ccu->clk_data.clks; bool success = true; flags = ccu_lock(ccu); diff --git a/drivers/clk/bcm/clk-kona.h b/drivers/clk/bcm/clk-kona.h index 2537b30..c2d0152 100644 --- a/drivers/clk/bcm/clk-kona.h +++ b/drivers/clk/bcm/clk-kona.h @@ -508,7 +508,7 @@ extern u64 scaled_div_max(struct bcm_clk_div *div); extern u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value, u32 billionths); -extern struct clk *kona_clk_setup(struct kona_clk *bcm_clk); +extern struct clk_core *kona_clk_setup(struct kona_clk *bcm_clk); extern void __init kona_dt_ccu_setup(struct ccu_data *ccu, struct device_node *node); extern bool __init kona_ccu_init(struct ccu_data *ccu); diff --git a/drivers/clk/berlin/berlin2-avpll.c b/drivers/clk/berlin/berlin2-avpll.c index fd0f26c..488d986 100644 --- a/drivers/clk/berlin/berlin2-avpll.c +++ b/drivers/clk/berlin/berlin2-avpll.c @@ -188,7 +188,7 @@ static const struct clk_ops berlin2_avpll_vco_ops = { .recalc_rate = berlin2_avpll_vco_recalc_rate, }; -struct clk * __init berlin2_avpll_vco_register(void __iomem *base, +struct clk_core * __init berlin2_avpll_vco_register(void __iomem *base, const char *name, const char *parent_name, u8 vco_flags, unsigned long flags) { @@ -364,7 +364,7 @@ static const struct clk_ops berlin2_avpll_channel_ops = { */ static const u8 quirk_index[] __initconst = { 0, 6, 5, 4, 3, 2, 1, 7 }; -struct clk * __init berlin2_avpll_channel_register(void __iomem *base, +struct clk_core * __init berlin2_avpll_channel_register(void __iomem *base, const char *name, u8 index, const char *parent_name, u8 ch_flags, unsigned long flags) { diff --git a/drivers/clk/berlin/berlin2-avpll.h b/drivers/clk/berlin/berlin2-avpll.h index a37f506..216eee7 100644 --- a/drivers/clk/berlin/berlin2-avpll.h +++ b/drivers/clk/berlin/berlin2-avpll.h @@ -24,11 +24,11 @@ struct clk; #define BERLIN2_AVPLL_BIT_QUIRK BIT(0) #define BERLIN2_AVPLL_SCRAMBLE_QUIRK BIT(1) -struct clk * __init +struct clk_core * __init berlin2_avpll_vco_register(void __iomem *base, const char *name, const char *parent_name, u8 vco_flags, unsigned long flags); -struct clk * __init +struct clk_core * __init berlin2_avpll_channel_register(void __iomem *base, const char *name, u8 index, const char *parent_name, u8 ch_flags, unsigned long flags); diff --git a/drivers/clk/berlin/berlin2-div.c b/drivers/clk/berlin/berlin2-div.c index 81ff97f..c673082 100644 --- a/drivers/clk/berlin/berlin2-div.c +++ b/drivers/clk/berlin/berlin2-div.c @@ -234,7 +234,7 @@ static const struct clk_ops berlin2_div_mux_ops = { .get_parent = berlin2_div_get_parent, }; -struct clk * __init +struct clk_core * __init berlin2_div_register(const struct berlin2_div_map *map, void __iomem *base, const char *name, u8 div_flags, const char **parent_names, int num_parents, diff --git a/drivers/clk/berlin/berlin2-div.h b/drivers/clk/berlin/berlin2-div.h index 15e3384..3ddb87a 100644 --- a/drivers/clk/berlin/berlin2-div.h +++ b/drivers/clk/berlin/berlin2-div.h @@ -80,7 +80,7 @@ struct berlin2_div_data { u8 div_flags; }; -struct clk * __init +struct clk_core * __init berlin2_div_register(const struct berlin2_div_map *map, void __iomem *base, const char *name, u8 div_flags, const char **parent_names, int num_parents, diff --git a/drivers/clk/berlin/berlin2-pll.c b/drivers/clk/berlin/berlin2-pll.c index bdc506b..b7a3016 100644 --- a/drivers/clk/berlin/berlin2-pll.c +++ b/drivers/clk/berlin/berlin2-pll.c @@ -91,7 +91,7 @@ static const struct clk_ops berlin2_pll_ops = { .recalc_rate = berlin2_pll_recalc_rate, }; -struct clk * __init +struct clk_core * __init berlin2_pll_register(const struct berlin2_pll_map *map, void __iomem *base, const char *name, const char *parent_name, unsigned long flags) diff --git a/drivers/clk/berlin/berlin2-pll.h b/drivers/clk/berlin/berlin2-pll.h index 8831ce2..6b6a6ed 100644 --- a/drivers/clk/berlin/berlin2-pll.h +++ b/drivers/clk/berlin/berlin2-pll.h @@ -29,7 +29,7 @@ struct berlin2_pll_map { u8 divsel_shift; }; -struct clk * __init +struct clk_core * __init berlin2_pll_register(const struct berlin2_pll_map *map, void __iomem *base, const char *name, const char *parent_name, unsigned long flags); diff --git a/drivers/clk/berlin/bg2.c b/drivers/clk/berlin/bg2.c index 4c81e09..49ecb3e 100644 --- a/drivers/clk/berlin/bg2.c +++ b/drivers/clk/berlin/bg2.c @@ -17,7 +17,6 @@ * this program. If not, see . */ -#include #include #include #include @@ -93,7 +92,7 @@ */ #define MAX_CLKS 41 -static struct clk *clks[MAX_CLKS]; +static struct clk_core *clks[MAX_CLKS]; static struct clk_onecell_data clk_data; static DEFINE_SPINLOCK(lock); static void __iomem *gbase; @@ -504,7 +503,7 @@ static const struct berlin2_gate_data bg2_gates[] __initconst = { static void __init berlin2_clock_setup(struct device_node *np) { const char *parent_names[9]; - struct clk *clk; + struct clk_core *clk; u8 avpll_flags = 0; int n; @@ -513,16 +512,16 @@ static void __init berlin2_clock_setup(struct device_node *np) return; /* overwrite default clock names with DT provided ones */ - clk = of_clk_get_by_name(np, clk_names[REFCLK]); + clk = of_clk_provider_get_by_name(np, clk_names[REFCLK]); if (!IS_ERR(clk)) { clk_names[REFCLK] = __clk_get_name(clk); - clk_put(clk); + __clk_put(clk); } - clk = of_clk_get_by_name(np, clk_names[VIDEO_EXT0]); + clk = of_clk_provider_get_by_name(np, clk_names[VIDEO_EXT0]); if (!IS_ERR(clk)) { clk_names[VIDEO_EXT0] = __clk_get_name(clk); - clk_put(clk); + __clk_put(clk); } /* simple register PLLs */ diff --git a/drivers/clk/berlin/bg2q.c b/drivers/clk/berlin/bg2q.c index 748da9b..33cc08b 100644 --- a/drivers/clk/berlin/bg2q.c +++ b/drivers/clk/berlin/bg2q.c @@ -17,7 +17,6 @@ * this program. If not, see . */ -#include #include #include #include @@ -47,7 +46,7 @@ #define REG_SDIO1XIN_CLKCTL 0x015c #define MAX_CLKS 27 -static struct clk *clks[MAX_CLKS]; +static struct clk_core *clks[MAX_CLKS]; static struct clk_onecell_data clk_data; static DEFINE_SPINLOCK(lock); static void __iomem *gbase; @@ -293,7 +292,7 @@ static const struct berlin2_gate_data bg2q_gates[] __initconst = { static void __init berlin2q_clock_setup(struct device_node *np) { const char *parent_names[9]; - struct clk *clk; + struct clk_core *clk; int n; gbase = of_iomap(np, 0); @@ -311,10 +310,10 @@ static void __init berlin2q_clock_setup(struct device_node *np) } /* overwrite default clock names with DT provided ones */ - clk = of_clk_get_by_name(np, clk_names[REFCLK]); + clk = of_clk_provider_get_by_name(np, clk_names[REFCLK]); if (!IS_ERR(clk)) { clk_names[REFCLK] = __clk_get_name(clk); - clk_put(clk); + __clk_put(clk); } /* simple register PLLs */ diff --git a/drivers/clk/clk-axi-clkgen.c b/drivers/clk/clk-axi-clkgen.c index 1127ee4..d91550c 100644 --- a/drivers/clk/clk-axi-clkgen.c +++ b/drivers/clk/clk-axi-clkgen.c @@ -10,7 +10,6 @@ #include #include -#include #include #include #include @@ -489,7 +488,7 @@ static int axi_clkgen_probe(struct platform_device *pdev) const char *parent_name; const char *clk_name; struct resource *mem; - struct clk *clk; + struct clk_core *clk; if (!pdev->dev.of_node) return -ENODEV; diff --git a/drivers/clk/clk-axm5516.c b/drivers/clk/clk-axm5516.c index d2f1e11..3dc6e58 100644 --- a/drivers/clk/clk-axm5516.c +++ b/drivers/clk/clk-axm5516.c @@ -532,7 +532,7 @@ MODULE_DEVICE_TABLE(of, axmclk_match_table); struct axmclk_priv { struct clk_onecell_data onecell; - struct clk *clks[]; + struct clk_core *clks[]; }; static int axmclk_probe(struct platform_device *pdev) @@ -541,7 +541,7 @@ static int axmclk_probe(struct platform_device *pdev) struct resource *res; int i, ret; struct device *dev = &pdev->dev; - struct clk *clk; + struct clk_core *clk; struct regmap *regmap; size_t num_clks; struct axmclk_priv *priv; diff --git a/drivers/clk/clk-bcm2835.c b/drivers/clk/clk-bcm2835.c index 6b950ca..f25e85e 100644 --- a/drivers/clk/clk-bcm2835.c +++ b/drivers/clk/clk-bcm2835.c @@ -29,7 +29,7 @@ */ void __init bcm2835_init_clocks(void) { - struct clk *clk; + struct clk_core *clk; int ret; clk = clk_register_fixed_rate(NULL, "sys_pclk", NULL, CLK_IS_ROOT, diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c index b9355da..d7322fa 100644 --- a/drivers/clk/clk-composite.c +++ b/drivers/clk/clk-composite.c @@ -14,7 +14,6 @@ * along with this program. If not, see . */ -#include #include #include #include @@ -57,14 +56,14 @@ static unsigned long clk_composite_recalc_rate(struct clk_hw *hw, static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate, unsigned long *best_parent_rate, - struct clk **best_parent_p) + struct clk_core **best_parent_p) { struct clk_composite *composite = to_clk_composite(hw); const struct clk_ops *rate_ops = composite->rate_ops; const struct clk_ops *mux_ops = composite->mux_ops; struct clk_hw *rate_hw = composite->rate_hw; struct clk_hw *mux_hw = composite->mux_hw; - struct clk *parent; + struct clk_core *parent; unsigned long parent_rate; long tmp_rate, best_rate = 0; unsigned long rate_diff; @@ -80,7 +79,7 @@ static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate, *best_parent_p = NULL; if (__clk_get_flags(hw->clk) & CLK_SET_RATE_NO_REPARENT) { - *best_parent_p = clk_get_parent(mux_hw->clk); + *best_parent_p = clk_provider_get_parent(mux_hw->clk); *best_parent_rate = __clk_get_rate(*best_parent_p); return rate_ops->round_rate(rate_hw, rate, @@ -181,14 +180,14 @@ static void clk_composite_disable(struct clk_hw *hw) gate_ops->disable(gate_hw); } -struct clk *clk_register_composite(struct device *dev, const char *name, +struct clk_core *clk_register_composite(struct device *dev, const char *name, const char **parent_names, int num_parents, struct clk_hw *mux_hw, const struct clk_ops *mux_ops, struct clk_hw *rate_hw, const struct clk_ops *rate_ops, struct clk_hw *gate_hw, const struct clk_ops *gate_ops, unsigned long flags) { - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; struct clk_composite *composite; struct clk_ops *clk_composite_ops; diff --git a/drivers/clk/clk-conf.c b/drivers/clk/clk-conf.c index d36a7b3..c9231cd 100644 --- a/drivers/clk/clk-conf.c +++ b/drivers/clk/clk-conf.c @@ -7,7 +7,6 @@ * published by the Free Software Foundation. */ -#include #include #include #include @@ -20,7 +19,7 @@ static int __set_clk_parents(struct device_node *node, bool clk_supplier) { struct of_phandle_args clkspec; int index, rc, num_parents; - struct clk *clk, *pclk; + struct clk_core *clk, *pclk; num_parents = of_count_phandle_with_args(node, "assigned-clock-parents", "#clock-cells"); @@ -63,16 +62,16 @@ static int __set_clk_parents(struct device_node *node, bool clk_supplier) goto err; } - rc = clk_set_parent(clk, pclk); + rc = clk_provider_set_parent(clk, pclk); if (rc < 0) pr_err("clk: failed to reparent %s to %s: %d\n", __clk_get_name(clk), __clk_get_name(pclk), rc); - clk_put(clk); - clk_put(pclk); + __clk_put(clk); + __clk_put(pclk); } return 0; err: - clk_put(pclk); + __clk_put(pclk); return rc; } @@ -82,7 +81,7 @@ static int __set_clk_rates(struct device_node *node, bool clk_supplier) struct property *prop; const __be32 *cur; int rc, index = 0; - struct clk *clk; + struct clk_core *clk; u32 rate; of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) { @@ -106,11 +105,11 @@ static int __set_clk_rates(struct device_node *node, bool clk_supplier) return PTR_ERR(clk); } - rc = clk_set_rate(clk, rate); + rc = clk_provider_set_rate(clk, rate); if (rc < 0) pr_err("clk: couldn't set %s clock rate: %d\n", __clk_get_name(clk), rc); - clk_put(clk); + __clk_put(clk); } index++; } diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index 18a9de2..3c78139 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -366,14 +366,14 @@ const struct clk_ops clk_divider_ro_ops = { }; EXPORT_SYMBOL_GPL(clk_divider_ro_ops); -static struct clk *_register_divider(struct device *dev, const char *name, +static struct clk_core *_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock) { struct clk_divider *div; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) { @@ -429,7 +429,7 @@ static struct clk *_register_divider(struct device *dev, const char *name, * @clk_divider_flags: divider-specific flags for this clock * @lock: shared register lock for this clock */ -struct clk *clk_register_divider(struct device *dev, const char *name, +struct clk_core *clk_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, spinlock_t *lock) @@ -453,7 +453,7 @@ EXPORT_SYMBOL_GPL(clk_register_divider); * @table: array of divider/value pairs ending with a div set to 0 * @lock: shared register lock for this clock */ -struct clk *clk_register_divider_table(struct device *dev, const char *name, +struct clk_core *clk_register_divider_table(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, const struct clk_div_table *table, diff --git a/drivers/clk/clk-efm32gg.c b/drivers/clk/clk-efm32gg.c index bac2ddf..3240887 100644 --- a/drivers/clk/clk-efm32gg.c +++ b/drivers/clk/clk-efm32gg.c @@ -6,7 +6,6 @@ * the terms of the GNU General Public License version 2 as published by the * Free Software Foundation. */ -#include #include #include #include @@ -16,7 +15,7 @@ #define CMU_HFPERCLKEN0 0x44 -static struct clk *clk[37]; +static struct clk_core *clk[37]; static struct clk_onecell_data clk_data = { .clks = clk, .clk_num = ARRAY_SIZE(clk), diff --git a/drivers/clk/clk-fixed-factor.c b/drivers/clk/clk-fixed-factor.c index d9e3f67..ae1fef0 100644 --- a/drivers/clk/clk-fixed-factor.c +++ b/drivers/clk/clk-fixed-factor.c @@ -65,13 +65,13 @@ struct clk_ops clk_fixed_factor_ops = { }; EXPORT_SYMBOL_GPL(clk_fixed_factor_ops); -struct clk *clk_register_fixed_factor(struct device *dev, const char *name, +struct clk_core *clk_register_fixed_factor(struct device *dev, const char *name, const char *parent_name, unsigned long flags, unsigned int mult, unsigned int div) { struct clk_fixed_factor *fix; struct clk_init_data init; - struct clk *clk; + struct clk_core *clk; fix = kmalloc(sizeof(*fix), GFP_KERNEL); if (!fix) { @@ -105,7 +105,7 @@ EXPORT_SYMBOL_GPL(clk_register_fixed_factor); */ void __init of_fixed_factor_clk_setup(struct device_node *node) { - struct clk *clk; + struct clk_core *clk; const char *clk_name = node->name; const char *parent_name; u32 div, mult; diff --git a/drivers/clk/clk-fixed-rate.c b/drivers/clk/clk-fixed-rate.c index 0fc56ab..56c0ced 100644 --- a/drivers/clk/clk-fixed-rate.c +++ b/drivers/clk/clk-fixed-rate.c @@ -56,12 +56,12 @@ EXPORT_SYMBOL_GPL(clk_fixed_rate_ops); * @fixed_rate: non-adjustable clock rate * @fixed_accuracy: non-adjustable clock rate */ -struct clk *clk_register_fixed_rate_with_accuracy(struct device *dev, +struct clk_core *clk_register_fixed_rate_with_accuracy(struct device *dev, const char *name, const char *parent_name, unsigned long flags, unsigned long fixed_rate, unsigned long fixed_accuracy) { struct clk_fixed_rate *fixed; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; /* allocate fixed-rate clock */ @@ -99,7 +99,7 @@ EXPORT_SYMBOL_GPL(clk_register_fixed_rate_with_accuracy); * @flags: framework-specific flags * @fixed_rate: non-adjustable clock rate */ -struct clk *clk_register_fixed_rate(struct device *dev, const char *name, +struct clk_core *clk_register_fixed_rate(struct device *dev, const char *name, const char *parent_name, unsigned long flags, unsigned long fixed_rate) { @@ -114,7 +114,7 @@ EXPORT_SYMBOL_GPL(clk_register_fixed_rate); */ void of_fixed_clk_setup(struct device_node *node) { - struct clk *clk; + struct clk_core *clk; const char *clk_name = node->name; u32 rate; u32 accuracy = 0; diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c index ede685c..8104683 100644 --- a/drivers/clk/clk-fractional-divider.c +++ b/drivers/clk/clk-fractional-divider.c @@ -96,14 +96,14 @@ const struct clk_ops clk_fractional_divider_ops = { }; EXPORT_SYMBOL_GPL(clk_fractional_divider_ops); -struct clk *clk_register_fractional_divider(struct device *dev, +struct clk_core *clk_register_fractional_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 mshift, u8 mwidth, u8 nshift, u8 nwidth, u8 clk_divider_flags, spinlock_t *lock) { struct clk_fractional_divider *fd; struct clk_init_data init; - struct clk *clk; + struct clk_core *clk; fd = kzalloc(sizeof(*fd), GFP_KERNEL); if (!fd) { diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index 4a58c55..429d302 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -118,13 +118,13 @@ EXPORT_SYMBOL_GPL(clk_gate_ops); * @clk_gate_flags: gate-specific flags for this clock * @lock: shared register lock for this clock */ -struct clk *clk_register_gate(struct device *dev, const char *name, +struct clk_core *clk_register_gate(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock) { struct clk_gate *gate; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; if (clk_gate_flags & CLK_GATE_HIWORD_MASK) { diff --git a/drivers/clk/clk-highbank.c b/drivers/clk/clk-highbank.c index 2e7e9d9..cad2fba 100644 --- a/drivers/clk/clk-highbank.c +++ b/drivers/clk/clk-highbank.c @@ -271,10 +271,10 @@ static const struct clk_ops periclk_ops = { .set_rate = clk_periclk_set_rate, }; -static __init struct clk *hb_clk_init(struct device_node *node, const struct clk_ops *ops) +static __init struct clk_core *hb_clk_init(struct device_node *node, const struct clk_ops *ops) { u32 reg; - struct clk *clk; + struct clk_core *clk; struct hb_clk *hb_clk; const char *clk_name = node->name; const char *parent_name; @@ -330,8 +330,8 @@ CLK_OF_DECLARE(hb_a9periph, "calxeda,hb-a9periph-clock", hb_a9periph_init); static void __init hb_a9bus_init(struct device_node *node) { - struct clk *clk = hb_clk_init(node, &a9bclk_ops); - clk_prepare_enable(clk); + struct clk_core *clk = hb_clk_init(node, &a9bclk_ops); + clk_provider_prepare_enable(clk); } CLK_OF_DECLARE(hb_a9bus, "calxeda,hb-a9bus-clock", hb_a9bus_init); diff --git a/drivers/clk/clk-ls1x.c b/drivers/clk/clk-ls1x.c index f20b750..796043c 100644 --- a/drivers/clk/clk-ls1x.c +++ b/drivers/clk/clk-ls1x.c @@ -48,11 +48,11 @@ static const struct clk_ops ls1x_pll_clk_ops = { .recalc_rate = ls1x_pll_recalc_rate, }; -static struct clk * __init clk_register_pll(struct device *dev, +static struct clk_core * __init clk_register_pll(struct device *dev, const char *name, const char *parent_name, unsigned long flags) { struct clk_hw *hw; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; /* allocate the divider */ @@ -80,32 +80,32 @@ static struct clk * __init clk_register_pll(struct device *dev, void __init ls1x_clk_init(void) { - struct clk *clk; + struct clk_core *clk; clk = clk_register_pll(NULL, "pll_clk", NULL, CLK_IS_ROOT); - clk_prepare_enable(clk); + clk_provider_prepare_enable(clk); clk = clk_register_divider(NULL, "cpu_clk", "pll_clk", CLK_SET_RATE_PARENT, LS1X_CLK_PLL_DIV, DIV_CPU_SHIFT, DIV_CPU_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock); - clk_prepare_enable(clk); + clk_provider_prepare_enable(clk); clk_register_clkdev(clk, "cpu", NULL); clk = clk_register_divider(NULL, "dc_clk", "pll_clk", CLK_SET_RATE_PARENT, LS1X_CLK_PLL_DIV, DIV_DC_SHIFT, DIV_DC_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock); - clk_prepare_enable(clk); + clk_provider_prepare_enable(clk); clk_register_clkdev(clk, "dc", NULL); clk = clk_register_divider(NULL, "ahb_clk", "pll_clk", CLK_SET_RATE_PARENT, LS1X_CLK_PLL_DIV, DIV_DDR_SHIFT, DIV_DDR_WIDTH, CLK_DIVIDER_ONE_BASED, &_lock); - clk_prepare_enable(clk); + clk_provider_prepare_enable(clk); clk_register_clkdev(clk, "ahb", NULL); clk_register_clkdev(clk, "stmmaceth", NULL); clk = clk_register_fixed_factor(NULL, "apb_clk", "ahb_clk", 0, 1, 2); - clk_prepare_enable(clk); + clk_provider_prepare_enable(clk); clk_register_clkdev(clk, "apb", NULL); clk_register_clkdev(clk, "serial8250", NULL); } diff --git a/drivers/clk/clk-max77686.c b/drivers/clk/clk-max77686.c index 3d7e8dd..42fa43a 100644 --- a/drivers/clk/clk-max77686.c +++ b/drivers/clk/clk-max77686.c @@ -112,10 +112,10 @@ static struct clk_init_data max77686_clks_init[MAX77686_CLKS_NUM] = { }, }; -static struct clk *max77686_clk_register(struct device *dev, +static struct clk_core *max77686_clk_register(struct device *dev, struct max77686_clk *max77686) { - struct clk *clk; + struct clk_core *clk; struct clk_hw *hw = &max77686->hw; clk = clk_register(dev, hw); @@ -138,10 +138,10 @@ static int max77686_clk_probe(struct platform_device *pdev) { struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent); struct max77686_clk *max77686_clks[MAX77686_CLKS_NUM]; - struct clk **clocks; + struct clk_core **clocks; int i, ret; - clocks = devm_kzalloc(&pdev->dev, sizeof(struct clk *) + clocks = devm_kzalloc(&pdev->dev, sizeof(struct clk_core *) * MAX77686_CLKS_NUM, GFP_KERNEL); if (!clocks) return -ENOMEM; @@ -203,7 +203,7 @@ err_clocks: static int max77686_clk_remove(struct platform_device *pdev) { struct max77686_dev *iodev = dev_get_drvdata(pdev->dev.parent); - struct clk **clocks = platform_get_drvdata(pdev); + struct clk_core **clocks = platform_get_drvdata(pdev); int i; if (iodev->dev->of_node) diff --git a/drivers/clk/clk-moxart.c b/drivers/clk/clk-moxart.c index 30a3b69..c503c09 100644 --- a/drivers/clk/clk-moxart.c +++ b/drivers/clk/clk-moxart.c @@ -18,7 +18,7 @@ void __init moxart_of_pll_clk_init(struct device_node *node) { static void __iomem *base; - struct clk *clk, *ref_clk; + struct clk_core *clk, *ref_clk; unsigned int mul; const char *name = node->name; const char *parent_name; @@ -35,7 +35,7 @@ void __init moxart_of_pll_clk_init(struct device_node *node) mul = readl(base + 0x30) >> 3 & 0x3f; iounmap(base); - ref_clk = of_clk_get(node, 0); + ref_clk = of_clk_provider_get(node, 0); if (IS_ERR(ref_clk)) { pr_err("%s: of_clk_get failed\n", node->full_name); return; @@ -56,7 +56,7 @@ CLK_OF_DECLARE(moxart_pll_clock, "moxa,moxart-pll-clock", void __init moxart_of_apb_clk_init(struct device_node *node) { static void __iomem *base; - struct clk *clk, *pll_clk; + struct clk_core *clk, *pll_clk; unsigned int div, val; unsigned int div_idx[] = { 2, 3, 4, 6, 8}; const char *name = node->name; @@ -78,7 +78,7 @@ void __init moxart_of_apb_clk_init(struct device_node *node) val = 0; div = div_idx[val] * 2; - pll_clk = of_clk_get(node, 0); + pll_clk = of_clk_provider_get(node, 0); if (IS_ERR(pll_clk)) { pr_err("%s: of_clk_get failed\n", node->full_name); return; diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 4f96ff3..538c455 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -10,7 +10,6 @@ * Simple multiplexer clock implementation */ -#include #include #include #include @@ -113,13 +112,13 @@ const struct clk_ops clk_mux_ro_ops = { }; EXPORT_SYMBOL_GPL(clk_mux_ro_ops); -struct clk *clk_register_mux_table(struct device *dev, const char *name, +struct clk_core *clk_register_mux_table(struct device *dev, const char *name, const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u32 mask, u8 clk_mux_flags, u32 *table, spinlock_t *lock) { struct clk_mux *mux; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; u8 width = 0; @@ -165,7 +164,7 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name, } EXPORT_SYMBOL_GPL(clk_register_mux_table); -struct clk *clk_register_mux(struct device *dev, const char *name, +struct clk_core *clk_register_mux(struct device *dev, const char *name, const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_mux_flags, spinlock_t *lock) diff --git a/drivers/clk/clk-nomadik.c b/drivers/clk/clk-nomadik.c index 05e04ce..91855d3 100644 --- a/drivers/clk/clk-nomadik.c +++ b/drivers/clk/clk-nomadik.c @@ -8,7 +8,6 @@ #define pr_fmt(fmt) "Nomadik SRC clocks: " fmt #include -#include #include #include #include @@ -254,11 +253,11 @@ static const struct clk_ops pll_clk_ops = { .recalc_rate = pll_clk_recalc_rate, }; -static struct clk * __init +static struct clk_core * __init pll_clk_register(struct device *dev, const char *name, const char *parent_name, u32 id) { - struct clk *clk; + struct clk_core *clk; struct clk_pll *pll; struct clk_init_data init; @@ -346,11 +345,11 @@ static const struct clk_ops src_clk_ops = { .recalc_rate = src_clk_recalc_rate, }; -static struct clk * __init +static struct clk_core * __init src_clk_register(struct device *dev, const char *name, const char *parent_name, u8 id) { - struct clk *clk; + struct clk_core *clk; struct clk_src *sclk; struct clk_init_data init; @@ -510,7 +509,7 @@ module_init(nomadik_src_clk_init_debugfs); static void __init of_nomadik_pll_setup(struct device_node *np) { - struct clk *clk = ERR_PTR(-EINVAL); + struct clk_core *clk = ERR_PTR(-EINVAL); const char *clk_name = np->name; const char *parent_name; u32 pll_id; @@ -533,7 +532,7 @@ CLK_OF_DECLARE(nomadik_pll_clk, static void __init of_nomadik_hclk_setup(struct device_node *np) { - struct clk *clk = ERR_PTR(-EINVAL); + struct clk_core *clk = ERR_PTR(-EINVAL); const char *clk_name = np->name; const char *parent_name; @@ -557,7 +556,7 @@ CLK_OF_DECLARE(nomadik_hclk_clk, static void __init of_nomadik_src_clk_setup(struct device_node *np) { - struct clk *clk = ERR_PTR(-EINVAL); + struct clk_core *clk = ERR_PTR(-EINVAL); const char *clk_name = np->name; const char *parent_name; u32 clk_id; diff --git a/drivers/clk/clk-nspire.c b/drivers/clk/clk-nspire.c index a378db7..e9c43f4 100644 --- a/drivers/clk/clk-nspire.c +++ b/drivers/clk/clk-nspire.c @@ -69,7 +69,7 @@ static void __init nspire_ahbdiv_setup(struct device_node *node, { u32 val; void __iomem *io; - struct clk *clk; + struct clk_core *clk; const char *clk_name = node->name; const char *parent_name; struct nspire_clk_info info; @@ -111,7 +111,7 @@ static void __init nspire_clk_setup(struct device_node *node, { u32 val; void __iomem *io; - struct clk *clk; + struct clk_core *clk; const char *clk_name = node->name; struct nspire_clk_info info; diff --git a/drivers/clk/clk-palmas.c b/drivers/clk/clk-palmas.c index 781630e..8febd8c 100644 --- a/drivers/clk/clk-palmas.c +++ b/drivers/clk/clk-palmas.c @@ -17,7 +17,6 @@ * General Public License for more details. */ -#include #include #include #include @@ -42,7 +41,7 @@ struct palmas_clk32k_desc { struct palmas_clock_info { struct device *dev; - struct clk *clk; + struct clk_core *clk; struct clk_hw hw; struct palmas *palmas; struct palmas_clk32k_desc *clk_desc; @@ -219,7 +218,7 @@ static int palmas_clks_init_configure(struct palmas_clock_info *cinfo) } if (cinfo->ext_control_pin) { - ret = clk_prepare(cinfo->clk); + ret = clk_provider_prepare(cinfo->clk); if (ret < 0) { dev_err(cinfo->dev, "Clock prep failed, %d\n", ret); return ret; @@ -244,7 +243,7 @@ static int palmas_clks_probe(struct platform_device *pdev) struct palmas_clks_of_match_data *match_data; const struct of_device_id *match; struct palmas_clock_info *cinfo; - struct clk *clk; + struct clk_core *clk; int ret; match = of_match_device(palmas_clks_of_match, &pdev->dev); diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-ppc-corenet.c index 8e58edf..5619ee9 100644 --- a/drivers/clk/clk-ppc-corenet.c +++ b/drivers/clk/clk-ppc-corenet.c @@ -64,7 +64,7 @@ const struct clk_ops cmux_ops = { static void __init core_mux_init(struct device_node *np) { - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; struct cmux_clk *cmux_clk; struct device_node *node; @@ -150,7 +150,7 @@ static void __init core_pll_init(struct device_node *np) int i, rc, count; const char *clk_name, *parent_name; struct clk_onecell_data *onecell_data; - struct clk **subclks; + struct clk_core **subclks; void __iomem *base; base = of_iomap(np, 0); @@ -184,7 +184,7 @@ static void __init core_pll_init(struct device_node *np) /* output clock number per PLL */ clocks_per_pll = count; - subclks = kzalloc(sizeof(struct clk *) * count, GFP_KERNEL); + subclks = kzalloc(sizeof(struct clk_core *) * count, GFP_KERNEL); if (!subclks) { pr_err("%s: could not allocate subclks\n", __func__); goto err_map; @@ -246,7 +246,7 @@ err_map: static void __init sysclk_init(struct device_node *node) { - struct clk *clk; + struct clk_core *clk; const char *clk_name = node->name; struct device_node *np = of_get_parent(node); u32 rate; diff --git a/drivers/clk/clk-s2mps11.c b/drivers/clk/clk-s2mps11.c index b7797fb..17fc7e1 100644 --- a/drivers/clk/clk-s2mps11.c +++ b/drivers/clk/clk-s2mps11.c @@ -29,7 +29,7 @@ #define s2mps11_name(a) (a->hw.init->name) -static struct clk **clk_table; +static struct clk_core **clk_table; static struct clk_onecell_data clk_data; enum { @@ -43,7 +43,7 @@ struct s2mps11_clk { struct sec_pmic_dev *iodev; struct device_node *clk_np; struct clk_hw hw; - struct clk *clk; + struct clk_core *clk; struct clk_lookup *lookup; u32 mask; unsigned int reg; @@ -174,7 +174,7 @@ static int s2mps11_clk_probe(struct platform_device *pdev) s2mps11_clk = s2mps11_clks; - clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk *) * + clk_table = devm_kzalloc(&pdev->dev, sizeof(struct clk_core *) * S2MPS11_CLKS_NUM, GFP_KERNEL); if (!clk_table) return -ENOMEM; diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c index 3b2a66f..57c9eb5 100644 --- a/drivers/clk/clk-si5351.c +++ b/drivers/clk/clk-si5351.c @@ -56,10 +56,10 @@ struct si5351_driver_data { struct regmap *regmap; struct clk_onecell_data onecell; - struct clk *pxtal; + struct clk_core *pxtal; const char *pxtal_name; struct clk_hw xtal; - struct clk *pclkin; + struct clk_core *pclkin; const char *pclkin_name; struct clk_hw clkin; @@ -1128,12 +1128,12 @@ static int si5351_dt_parse(struct i2c_client *client, if (!pdata) return -ENOMEM; - pdata->clk_xtal = of_clk_get(np, 0); + pdata->clk_xtal = of_clk_provider_get(np, 0); if (!IS_ERR(pdata->clk_xtal)) - clk_put(pdata->clk_xtal); - pdata->clk_clkin = of_clk_get(np, 1); + __clk_put(pdata->clk_xtal); + pdata->clk_clkin = of_clk_provider_get(np, 1); if (!IS_ERR(pdata->clk_clkin)) - clk_put(pdata->clk_clkin); + __clk_put(pdata->clk_clkin); /* * property silabs,pll-source : , [<..>] @@ -1306,7 +1306,7 @@ static int si5351_i2c_probe(struct i2c_client *client, struct si5351_platform_data *pdata; struct si5351_driver_data *drvdata; struct clk_init_data init; - struct clk *clk; + struct clk_core *clk; const char *parent_names[4]; u8 num_parents, num_clocks; int ret, n; @@ -1545,7 +1545,8 @@ static int si5351_i2c_probe(struct i2c_client *client, /* set initial clkout rate */ if (pdata->clkout[n].rate != 0) { int ret; - ret = clk_set_rate(clk, pdata->clkout[n].rate); + ret = clk_provider_set_rate(clk, + pdata->clkout[n].rate); if (ret != 0) { dev_err(&client->dev, "Cannot set rate : %d\n", ret); diff --git a/drivers/clk/clk-si570.c b/drivers/clk/clk-si570.c index fc167b3..f0eec4e 100644 --- a/drivers/clk/clk-si570.c +++ b/drivers/clk/clk-si570.c @@ -407,7 +407,7 @@ static int si570_probe(struct i2c_client *client, { struct clk_si570 *data; struct clk_init_data init; - struct clk *clk; + struct clk_core *clk; u32 initial_fout, factory_fout, stability; int err; enum clk_si570_variant variant = id->driver_data; @@ -476,7 +476,7 @@ static int si570_probe(struct i2c_client *client, /* Read the requested initial output frequency from device tree */ if (!of_property_read_u32(client->dev.of_node, "clock-frequency", &initial_fout)) { - err = clk_set_rate(clk, initial_fout); + err = clk_provider_set_rate(clk, initial_fout); if (err) { of_clk_del_provider(client->dev.of_node); return err; diff --git a/drivers/clk/clk-twl6040.c b/drivers/clk/clk-twl6040.c index 1ada79a..d24a8a2 100644 --- a/drivers/clk/clk-twl6040.c +++ b/drivers/clk/clk-twl6040.c @@ -20,7 +20,6 @@ * */ -#include #include #include #include @@ -31,7 +30,7 @@ struct twl6040_clk { struct twl6040 *twl6040; struct device *dev; struct clk_hw mcpdm_fclk; - struct clk *clk; + struct clk_core *clk; int enabled; }; diff --git a/drivers/clk/clk-u300.c b/drivers/clk/clk-u300.c index 406bfc1..392bcbf 100644 --- a/drivers/clk/clk-u300.c +++ b/drivers/clk/clk-u300.c @@ -5,7 +5,6 @@ * Author: Linus Walleij * Author: Jonas Aaberg */ -#include #include #include #include @@ -688,7 +687,7 @@ static const struct clk_ops syscon_clk_ops = { .set_rate = syscon_clk_set_rate, }; -static struct clk * __init +static struct clk_core * __init syscon_clk_register(struct device *dev, const char *name, const char *parent_name, unsigned long flags, bool hw_ctrld, @@ -696,7 +695,7 @@ syscon_clk_register(struct device *dev, const char *name, void __iomem *en_reg, u8 en_bit, u16 clk_val) { - struct clk *clk; + struct clk_core *clk; struct clk_syscon *sclk; struct clk_init_data init; @@ -867,7 +866,7 @@ static struct u300_clock const u300_clk_lookup[] __initconst = { static void __init of_u300_syscon_clk_init(struct device_node *np) { - struct clk *clk = ERR_PTR(-EINVAL); + struct clk_core *clk = ERR_PTR(-EINVAL); const char *clk_name = np->name; const char *parent_name; void __iomem *res_reg; @@ -1110,11 +1109,11 @@ static const struct clk_ops mclk_ops = { .set_rate = mclk_clk_set_rate, }; -static struct clk * __init +static struct clk_core * __init mclk_clk_register(struct device *dev, const char *name, const char *parent_name, bool is_mspro) { - struct clk *clk; + struct clk_core *clk; struct clk_mclk *mclk; struct clk_init_data init; @@ -1141,7 +1140,7 @@ mclk_clk_register(struct device *dev, const char *name, static void __init of_u300_syscon_mclk_init(struct device_node *np) { - struct clk *clk = ERR_PTR(-EINVAL); + struct clk_core *clk = ERR_PTR(-EINVAL); const char *clk_name = np->name; const char *parent_name; diff --git a/drivers/clk/clk-vt8500.c b/drivers/clk/clk-vt8500.c index 37e9288..e5fb933 100644 --- a/drivers/clk/clk-vt8500.c +++ b/drivers/clk/clk-vt8500.c @@ -232,7 +232,7 @@ static const struct clk_ops vt8500_gated_divisor_clk_ops = { static __init void vtwm_device_clk_init(struct device_node *node) { u32 en_reg, div_reg; - struct clk *clk; + struct clk_core *clk; struct clk_device *dev_clk; const char *clk_name = node->name; const char *parent_name; @@ -650,7 +650,7 @@ static const struct clk_ops vtwm_pll_ops = { static __init void vtwm_pll_clk_init(struct device_node *node, int pll_type) { u32 reg; - struct clk *clk; + struct clk_core *clk; struct clk_pll *pll_clk; const char *clk_name = node->name; const char *parent_name; diff --git a/drivers/clk/clk-wm831x.c b/drivers/clk/clk-wm831x.c index b131041..84ce873 100644 --- a/drivers/clk/clk-wm831x.c +++ b/drivers/clk/clk-wm831x.c @@ -12,7 +12,6 @@ * */ -#include #include #include #include @@ -25,9 +24,9 @@ struct wm831x_clk { struct clk_hw xtal_hw; struct clk_hw fll_hw; struct clk_hw clkout_hw; - struct clk *xtal; - struct clk *fll; - struct clk *clkout; + struct clk_core *xtal; + struct clk_core *fll; + struct clk_core *clkout; bool xtal_ena; }; diff --git a/drivers/clk/clk-xgene.c b/drivers/clk/clk-xgene.c index dd8a62d..ce3ed34 100644 --- a/drivers/clk/clk-xgene.c +++ b/drivers/clk/clk-xgene.c @@ -124,13 +124,13 @@ const struct clk_ops xgene_clk_pll_ops = { .recalc_rate = xgene_clk_pll_recalc_rate, }; -static struct clk *xgene_register_clk_pll(struct device *dev, +static struct clk_core *xgene_register_clk_pll(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u32 pll_offset, u32 type, spinlock_t *lock) { struct xgene_clk_pll *apmclk; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; /* allocate the APM clock structure */ @@ -166,7 +166,7 @@ static struct clk *xgene_register_clk_pll(struct device *dev, static void xgene_pllclk_init(struct device_node *np, enum xgene_pll_type pll_type) { const char *clk_name = np->full_name; - struct clk *clk; + struct clk_core *clk; void *reg; reg = of_iomap(np, 0); @@ -395,12 +395,12 @@ const struct clk_ops xgene_clk_ops = { .round_rate = xgene_clk_round_rate, }; -static struct clk *xgene_register_clk(struct device *dev, +static struct clk_core *xgene_register_clk(struct device *dev, const char *name, const char *parent_name, struct xgene_dev_parameters *parameters, spinlock_t *lock) { struct xgene_clk *apmclk; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; int rc; @@ -442,7 +442,7 @@ static struct clk *xgene_register_clk(struct device *dev, static void __init xgene_devclk_init(struct device_node *np) { const char *clk_name = np->full_name; - struct clk *clk; + struct clk_core *clk; struct resource res; int rc; struct xgene_dev_parameters parameters; diff --git a/drivers/clk/clk.h b/drivers/clk/clk.h index c798138..d278572 100644 --- a/drivers/clk/clk.h +++ b/drivers/clk/clk.h @@ -10,8 +10,8 @@ */ #if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK) -struct clk *of_clk_get_by_clkspec(struct of_phandle_args *clkspec); -struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec); +struct clk_core *of_clk_get_by_clkspec(struct of_phandle_args *clkspec); +struct clk_core *__of_clk_get_from_provider(struct of_phandle_args *clkspec); void of_clk_lock(void); void of_clk_unlock(void); #endif diff --git a/drivers/clk/hisilicon/clk-hi3620.c b/drivers/clk/hisilicon/clk-hi3620.c index 339945d..26f11a3 100644 --- a/drivers/clk/hisilicon/clk-hi3620.c +++ b/drivers/clk/hisilicon/clk-hi3620.c @@ -31,7 +31,6 @@ #include #include #include -#include #include @@ -296,7 +295,7 @@ static unsigned long mmc_clk_recalc_rate(struct clk_hw *hw, static long mmc_clk_determine_rate(struct clk_hw *hw, unsigned long rate, unsigned long *best_parent_rate, - struct clk **best_parent_p) + struct clk_core **best_parent_p) { struct clk_mmc *mclk = to_mmc(hw); unsigned long best = 0; @@ -427,11 +426,11 @@ static struct clk_ops clk_mmc_ops = { .recalc_rate = mmc_clk_recalc_rate, }; -static struct clk *hisi_register_clk_mmc(struct hisi_mmc_clock *mmc_clk, +static struct clk_core *hisi_register_clk_mmc(struct hisi_mmc_clock *mmc_clk, void __iomem *base, struct device_node *np) { struct clk_mmc *mclk; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; mclk = kzalloc(sizeof(*mclk), GFP_KERNEL); @@ -487,7 +486,7 @@ static void __init hi3620_mmc_clk_init(struct device_node *node) if (WARN_ON(!clk_data)) return; - clk_data->clks = kzalloc(sizeof(struct clk *) * num, GFP_KERNEL); + clk_data->clks = kzalloc(sizeof(struct clk_core *) * num, GFP_KERNEL); if (!clk_data->clks) { pr_err("%s: fail to allocate mmc clk\n", __func__); return; diff --git a/drivers/clk/hisilicon/clk-hip04.c b/drivers/clk/hisilicon/clk-hip04.c index 132b57a..e8403c0 100644 --- a/drivers/clk/hisilicon/clk-hip04.c +++ b/drivers/clk/hisilicon/clk-hip04.c @@ -30,7 +30,6 @@ #include #include #include -#include #include diff --git a/drivers/clk/hisilicon/clk.c b/drivers/clk/hisilicon/clk.c index a078e84..00b7c9c 100644 --- a/drivers/clk/hisilicon/clk.c +++ b/drivers/clk/hisilicon/clk.c @@ -32,7 +32,6 @@ #include #include #include -#include #include "clk.h" @@ -42,7 +41,7 @@ struct hisi_clock_data __init *hisi_clk_init(struct device_node *np, int nr_clks) { struct hisi_clock_data *clk_data; - struct clk **clk_table; + struct clk_core **clk_table; void __iomem *base; if (np) { @@ -63,7 +62,7 @@ struct hisi_clock_data __init *hisi_clk_init(struct device_node *np, } clk_data->base = base; - clk_table = kzalloc(sizeof(struct clk *) * nr_clks, GFP_KERNEL); + clk_table = kzalloc(sizeof(struct clk_core *) * nr_clks, GFP_KERNEL); if (!clk_table) { pr_err("%s: could not allocate clock lookup table\n", __func__); goto err_data; @@ -81,7 +80,7 @@ err: void __init hisi_clk_register_fixed_rate(struct hisi_fixed_rate_clock *clks, int nums, struct hisi_clock_data *data) { - struct clk *clk; + struct clk_core *clk; int i; for (i = 0; i < nums; i++) { @@ -102,7 +101,7 @@ void __init hisi_clk_register_fixed_factor(struct hisi_fixed_factor_clock *clks, int nums, struct hisi_clock_data *data) { - struct clk *clk; + struct clk_core *clk; int i; for (i = 0; i < nums; i++) { @@ -122,7 +121,7 @@ void __init hisi_clk_register_fixed_factor(struct hisi_fixed_factor_clock *clks, void __init hisi_clk_register_mux(struct hisi_mux_clock *clks, int nums, struct hisi_clock_data *data) { - struct clk *clk; + struct clk_core *clk; void __iomem *base = data->base; int i; @@ -151,7 +150,7 @@ void __init hisi_clk_register_mux(struct hisi_mux_clock *clks, void __init hisi_clk_register_divider(struct hisi_divider_clock *clks, int nums, struct hisi_clock_data *data) { - struct clk *clk; + struct clk_core *clk; void __iomem *base = data->base; int i; @@ -180,7 +179,7 @@ void __init hisi_clk_register_divider(struct hisi_divider_clock *clks, void __init hisi_clk_register_gate(struct hisi_gate_clock *clks, int nums, struct hisi_clock_data *data) { - struct clk *clk; + struct clk_core *clk; void __iomem *base = data->base; int i; @@ -208,7 +207,7 @@ void __init hisi_clk_register_gate(struct hisi_gate_clock *clks, void __init hisi_clk_register_gate_sep(struct hisi_gate_clock *clks, int nums, struct hisi_clock_data *data) { - struct clk *clk; + struct clk_core *clk; void __iomem *base = data->base; int i; diff --git a/drivers/clk/hisilicon/clk.h b/drivers/clk/hisilicon/clk.h index 31083ff..f7fc4b9 100644 --- a/drivers/clk/hisilicon/clk.h +++ b/drivers/clk/hisilicon/clk.h @@ -90,7 +90,7 @@ struct hisi_gate_clock { const char *alias; }; -struct clk *hisi_register_clkgate_sep(struct device *, const char *, +struct clk_core *hisi_register_clkgate_sep(struct device *, const char *, const char *, unsigned long, void __iomem *, u8, u8, spinlock_t *); diff --git a/drivers/clk/hisilicon/clkgate-separated.c b/drivers/clk/hisilicon/clkgate-separated.c index b03d5a7..5db5ba6 100644 --- a/drivers/clk/hisilicon/clkgate-separated.c +++ b/drivers/clk/hisilicon/clkgate-separated.c @@ -28,7 +28,6 @@ #include #include #include -#include #include "clk.h" @@ -96,14 +95,14 @@ static struct clk_ops clkgate_separated_ops = { .is_enabled = clkgate_separated_is_enabled, }; -struct clk *hisi_register_clkgate_sep(struct device *dev, const char *name, +struct clk_core *hisi_register_clkgate_sep(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 bit_idx, u8 clk_gate_flags, spinlock_t *lock) { struct clkgate_separated *sclk; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; sclk = kzalloc(sizeof(*sclk), GFP_KERNEL); diff --git a/drivers/clk/keystone/gate.c b/drivers/clk/keystone/gate.c index 86f1e36..6bb211a 100644 --- a/drivers/clk/keystone/gate.c +++ b/drivers/clk/keystone/gate.c @@ -10,7 +10,6 @@ * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. */ -#include #include #include #include @@ -163,7 +162,7 @@ static const struct clk_ops clk_psc_ops = { * @psc_data: platform data to configure this clock * @lock: spinlock used by this clock */ -static struct clk *clk_register_psc(struct device *dev, +static struct clk_core *clk_register_psc(struct device *dev, const char *name, const char *parent_name, struct clk_psc_data *psc_data, @@ -171,7 +170,7 @@ static struct clk *clk_register_psc(struct device *dev, { struct clk_init_data init; struct clk_psc *psc; - struct clk *clk; + struct clk_core *clk; psc = kzalloc(sizeof(*psc), GFP_KERNEL); if (!psc) @@ -204,7 +203,7 @@ static void __init of_psc_clk_init(struct device_node *node, spinlock_t *lock) const char *clk_name = node->name; const char *parent_name; struct clk_psc_data *data; - struct clk *clk; + struct clk_core *clk; int i; data = kzalloc(sizeof(*data), GFP_KERNEL); diff --git a/drivers/clk/keystone/pll.c b/drivers/clk/keystone/pll.c index 0dd8a4b..2e31895 100644 --- a/drivers/clk/keystone/pll.c +++ b/drivers/clk/keystone/pll.c @@ -10,7 +10,6 @@ * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. */ -#include #include #include #include @@ -116,14 +115,14 @@ static const struct clk_ops clk_pll_ops = { .recalc_rate = clk_pllclk_recalc, }; -static struct clk *clk_register_pll(struct device *dev, +static struct clk_core *clk_register_pll(struct device *dev, const char *name, const char *parent_name, struct clk_pll_data *pll_data) { struct clk_init_data init; struct clk_pll *pll; - struct clk *clk; + struct clk_core *clk; pll = kzalloc(sizeof(*pll), GFP_KERNEL); if (!pll) @@ -158,7 +157,7 @@ static void __init _of_pll_clk_init(struct device_node *node, bool pllctrl) { struct clk_pll_data *pll_data; const char *parent_name; - struct clk *clk; + struct clk_core *clk; int i; pll_data = kzalloc(sizeof(*pll_data), GFP_KERNEL); @@ -239,7 +238,7 @@ static void __init of_pll_div_clk_init(struct device_node *node) const char *parent_name; void __iomem *reg; u32 shift, mask; - struct clk *clk; + struct clk_core *clk; const char *clk_name = node->name; of_property_read_string(node, "clock-output-names", &clk_name); @@ -282,7 +281,7 @@ static void __init of_pll_mux_clk_init(struct device_node *node) { void __iomem *reg; u32 shift, mask; - struct clk *clk; + struct clk_core *clk; const char *parents[2]; const char *clk_name = node->name; diff --git a/drivers/clk/mmp/clk-apbc.c b/drivers/clk/mmp/clk-apbc.c index d14120e..4a1de49 100644 --- a/drivers/clk/mmp/clk-apbc.c +++ b/drivers/clk/mmp/clk-apbc.c @@ -10,7 +10,6 @@ */ #include -#include #include #include #include @@ -120,12 +119,12 @@ struct clk_ops clk_apbc_ops = { .unprepare = clk_apbc_unprepare, }; -struct clk *mmp_clk_register_apbc(const char *name, const char *parent_name, +struct clk_core *mmp_clk_register_apbc(const char *name, const char *parent_name, void __iomem *base, unsigned int delay, unsigned int apbc_flags, spinlock_t *lock) { struct clk_apbc *apbc; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; apbc = kzalloc(sizeof(*apbc), GFP_KERNEL); diff --git a/drivers/clk/mmp/clk-apmu.c b/drivers/clk/mmp/clk-apmu.c index abe182b..cbc0712 100644 --- a/drivers/clk/mmp/clk-apmu.c +++ b/drivers/clk/mmp/clk-apmu.c @@ -10,7 +10,6 @@ */ #include -#include #include #include #include @@ -66,11 +65,11 @@ struct clk_ops clk_apmu_ops = { .disable = clk_apmu_disable, }; -struct clk *mmp_clk_register_apmu(const char *name, const char *parent_name, +struct clk_core *mmp_clk_register_apmu(const char *name, const char *parent_name, void __iomem *base, u32 enable_mask, spinlock_t *lock) { struct clk_apmu *apmu; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; apmu = kzalloc(sizeof(*apmu), GFP_KERNEL); diff --git a/drivers/clk/mmp/clk-frac.c b/drivers/clk/mmp/clk-frac.c index 23a56f5..0386cdd 100644 --- a/drivers/clk/mmp/clk-frac.c +++ b/drivers/clk/mmp/clk-frac.c @@ -116,14 +116,14 @@ static struct clk_ops clk_factor_ops = { .set_rate = clk_factor_set_rate, }; -struct clk *mmp_clk_register_factor(const char *name, const char *parent_name, +struct clk_core *mmp_clk_register_factor(const char *name, const char *parent_name, unsigned long flags, void __iomem *base, struct clk_factor_masks *masks, struct clk_factor_tbl *ftbl, unsigned int ftbl_cnt) { struct clk_factor *factor; struct clk_init_data init; - struct clk *clk; + struct clk_core *clk; if (!masks) { pr_err("%s: must pass a clk_factor_mask\n", __func__); diff --git a/drivers/clk/mmp/clk-mmp2.c b/drivers/clk/mmp/clk-mmp2.c index b2721ca..98bd73f 100644 --- a/drivers/clk/mmp/clk-mmp2.c +++ b/drivers/clk/mmp/clk-mmp2.c @@ -77,8 +77,8 @@ static const char *ccic_parent[] = {"pll1_2", "pll1_16", "vctcxo"}; void __init mmp2_clk_init(void) { - struct clk *clk; - struct clk *vctcxo; + struct clk_core *clk; + struct clk_core *vctcxo; void __iomem *mpmu_base; void __iomem *apmu_base; void __iomem *apbc_base; @@ -192,7 +192,7 @@ void __init mmp2_clk_init(void) mpmu_base + MPMU_UART_PLL, &uart_factor_masks, uart_factor_tbl, ARRAY_SIZE(uart_factor_tbl)); - clk_set_rate(clk, 14745600); + clk_provider_set_rate(clk, 14745600); clk_register_clkdev(clk, "uart_pll", NULL); clk = mmp_clk_register_apbc("twsi0", "vctcxo", @@ -251,7 +251,7 @@ void __init mmp2_clk_init(void) ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, apbc_base + APBC_UART0, 4, 3, 0, &clk_lock); - clk_set_parent(clk, vctcxo); + clk_provider_set_parent(clk, vctcxo); clk_register_clkdev(clk, "uart_mux.0", NULL); clk = mmp_clk_register_apbc("uart0", "uart0_mux", @@ -262,7 +262,7 @@ void __init mmp2_clk_init(void) ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, apbc_base + APBC_UART1, 4, 3, 0, &clk_lock); - clk_set_parent(clk, vctcxo); + clk_provider_set_parent(clk, vctcxo); clk_register_clkdev(clk, "uart_mux.1", NULL); clk = mmp_clk_register_apbc("uart1", "uart1_mux", @@ -273,7 +273,7 @@ void __init mmp2_clk_init(void) ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, apbc_base + APBC_UART2, 4, 3, 0, &clk_lock); - clk_set_parent(clk, vctcxo); + clk_provider_set_parent(clk, vctcxo); clk_register_clkdev(clk, "uart_mux.2", NULL); clk = mmp_clk_register_apbc("uart2", "uart2_mux", @@ -284,7 +284,7 @@ void __init mmp2_clk_init(void) ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, apbc_base + APBC_UART3, 4, 3, 0, &clk_lock); - clk_set_parent(clk, vctcxo); + clk_provider_set_parent(clk, vctcxo); clk_register_clkdev(clk, "uart_mux.3", NULL); clk = mmp_clk_register_apbc("uart3", "uart3_mux", diff --git a/drivers/clk/mmp/clk-pxa168.c b/drivers/clk/mmp/clk-pxa168.c index 014396b..e4f50ab 100644 --- a/drivers/clk/mmp/clk-pxa168.c +++ b/drivers/clk/mmp/clk-pxa168.c @@ -68,8 +68,8 @@ static const char *ccic_phy_parent[] = {"pll1_6", "pll1_12"}; void __init pxa168_clk_init(void) { - struct clk *clk; - struct clk *uart_pll; + struct clk_core *clk; + struct clk_core *uart_pll; void __iomem *mpmu_base; void __iomem *apmu_base; void __iomem *apbc_base; @@ -159,7 +159,7 @@ void __init pxa168_clk_init(void) mpmu_base + MPMU_UART_PLL, &uart_factor_masks, uart_factor_tbl, ARRAY_SIZE(uart_factor_tbl)); - clk_set_rate(uart_pll, 14745600); + clk_provider_set_rate(uart_pll, 14745600); clk_register_clkdev(uart_pll, "uart_pll", NULL); clk = mmp_clk_register_apbc("twsi0", "pll1_13_1_5", @@ -202,7 +202,7 @@ void __init pxa168_clk_init(void) ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, apbc_base + APBC_UART0, 4, 3, 0, &clk_lock); - clk_set_parent(clk, uart_pll); + clk_provider_set_parent(clk, uart_pll); clk_register_clkdev(clk, "uart_mux.0", NULL); clk = mmp_clk_register_apbc("uart0", "uart0_mux", @@ -213,7 +213,7 @@ void __init pxa168_clk_init(void) ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, apbc_base + APBC_UART1, 4, 3, 0, &clk_lock); - clk_set_parent(clk, uart_pll); + clk_provider_set_parent(clk, uart_pll); clk_register_clkdev(clk, "uart_mux.1", NULL); clk = mmp_clk_register_apbc("uart1", "uart1_mux", @@ -224,7 +224,7 @@ void __init pxa168_clk_init(void) ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, apbc_base + APBC_UART2, 4, 3, 0, &clk_lock); - clk_set_parent(clk, uart_pll); + clk_provider_set_parent(clk, uart_pll); clk_register_clkdev(clk, "uart_mux.2", NULL); clk = mmp_clk_register_apbc("uart2", "uart2_mux", diff --git a/drivers/clk/mmp/clk-pxa910.c b/drivers/clk/mmp/clk-pxa910.c index 9efc6a4..b5c215e 100644 --- a/drivers/clk/mmp/clk-pxa910.c +++ b/drivers/clk/mmp/clk-pxa910.c @@ -66,8 +66,8 @@ static const char *ccic_phy_parent[] = {"pll1_6", "pll1_12"}; void __init pxa910_clk_init(void) { - struct clk *clk; - struct clk *uart_pll; + struct clk_core *clk; + struct clk_core *uart_pll; void __iomem *mpmu_base; void __iomem *apmu_base; void __iomem *apbcp_base; @@ -164,7 +164,7 @@ void __init pxa910_clk_init(void) mpmu_base + MPMU_UART_PLL, &uart_factor_masks, uart_factor_tbl, ARRAY_SIZE(uart_factor_tbl)); - clk_set_rate(uart_pll, 14745600); + clk_provider_set_rate(uart_pll, 14745600); clk_register_clkdev(uart_pll, "uart_pll", NULL); clk = mmp_clk_register_apbc("twsi0", "pll1_13_1_5", @@ -207,7 +207,7 @@ void __init pxa910_clk_init(void) ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, apbc_base + APBC_UART0, 4, 3, 0, &clk_lock); - clk_set_parent(clk, uart_pll); + clk_provider_set_parent(clk, uart_pll); clk_register_clkdev(clk, "uart_mux.0", NULL); clk = mmp_clk_register_apbc("uart0", "uart0_mux", @@ -218,7 +218,7 @@ void __init pxa910_clk_init(void) ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, apbc_base + APBC_UART1, 4, 3, 0, &clk_lock); - clk_set_parent(clk, uart_pll); + clk_provider_set_parent(clk, uart_pll); clk_register_clkdev(clk, "uart_mux.1", NULL); clk = mmp_clk_register_apbc("uart1", "uart1_mux", @@ -229,7 +229,7 @@ void __init pxa910_clk_init(void) ARRAY_SIZE(uart_parent), CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT, apbcp_base + APBCP_UART2, 4, 3, 0, &clk_lock); - clk_set_parent(clk, uart_pll); + clk_provider_set_parent(clk, uart_pll); clk_register_clkdev(clk, "uart_mux.2", NULL); clk = mmp_clk_register_apbc("uart2", "uart2_mux", diff --git a/drivers/clk/mmp/clk.h b/drivers/clk/mmp/clk.h index ab86dd4..1477e61 100644 --- a/drivers/clk/mmp/clk.h +++ b/drivers/clk/mmp/clk.h @@ -20,15 +20,15 @@ struct clk_factor_tbl { unsigned int den; }; -extern struct clk *mmp_clk_register_pll2(const char *name, +extern struct clk_core *mmp_clk_register_pll2(const char *name, const char *parent_name, unsigned long flags); -extern struct clk *mmp_clk_register_apbc(const char *name, +extern struct clk_core *mmp_clk_register_apbc(const char *name, const char *parent_name, void __iomem *base, unsigned int delay, unsigned int apbc_flags, spinlock_t *lock); -extern struct clk *mmp_clk_register_apmu(const char *name, +extern struct clk_core *mmp_clk_register_apmu(const char *name, const char *parent_name, void __iomem *base, u32 enable_mask, spinlock_t *lock); -extern struct clk *mmp_clk_register_factor(const char *name, +extern struct clk_core *mmp_clk_register_factor(const char *name, const char *parent_name, unsigned long flags, void __iomem *base, struct clk_factor_masks *masks, struct clk_factor_tbl *ftbl, unsigned int ftbl_cnt); diff --git a/drivers/clk/mvebu/clk-corediv.c b/drivers/clk/mvebu/clk-corediv.c index d1e5863..1be15c4 100644 --- a/drivers/clk/mvebu/clk-corediv.c +++ b/drivers/clk/mvebu/clk-corediv.c @@ -238,7 +238,7 @@ mvebu_corediv_clk_init(struct device_node *node, { struct clk_init_data init; struct clk_corediv *corediv; - struct clk **clks; + struct clk_core **clks; void __iomem *base; const char *parent_name; const char *clk_name; @@ -253,7 +253,7 @@ mvebu_corediv_clk_init(struct device_node *node, clk_data.clk_num = soc_desc->ndescs; /* clks holds the clock array */ - clks = kcalloc(clk_data.clk_num, sizeof(struct clk *), + clks = kcalloc(clk_data.clk_num, sizeof(struct clk_core *), GFP_KERNEL); if (WARN_ON(!clks)) goto err_unmap; diff --git a/drivers/clk/mvebu/clk-cpu.c b/drivers/clk/mvebu/clk-cpu.c index 3821a88..59a40c7 100644 --- a/drivers/clk/mvebu/clk-cpu.c +++ b/drivers/clk/mvebu/clk-cpu.c @@ -40,7 +40,7 @@ struct cpu_clk { void __iomem *pmu_dfs; }; -static struct clk **clks; +static struct clk_core **clks; static struct clk_onecell_data clk_data; @@ -195,8 +195,8 @@ static void __init of_cpu_clk_setup(struct device_node *node) for_each_node_by_type(dn, "cpu") { struct clk_init_data init; - struct clk *clk; - struct clk *parent_clk; + struct clk_core *clk; + struct clk_core *parent_clk; char *clk_name = kzalloc(5, GFP_KERNEL); int cpu, err; @@ -208,7 +208,7 @@ static void __init of_cpu_clk_setup(struct device_node *node) goto bail_out; sprintf(clk_name, "cpu%d", cpu); - parent_clk = of_clk_get(node, 0); + parent_clk = of_clk_provider_get(node, 0); cpuclk[cpu].parent_name = __clk_get_name(parent_clk); cpuclk[cpu].clk_name = clk_name; diff --git a/drivers/clk/mvebu/common.c b/drivers/clk/mvebu/common.c index 8145c4e..f6e14f8 100644 --- a/drivers/clk/mvebu/common.c +++ b/drivers/clk/mvebu/common.c @@ -13,7 +13,6 @@ */ #include -#include #include #include #include @@ -43,7 +42,7 @@ void __init mvebu_coreclk_setup(struct device_node *np, /* Allocate struct for TCLK, cpu clk, and core ratio clocks */ clk_data.clk_num = 2 + desc->num_ratios; - clk_data.clks = kzalloc(clk_data.clk_num * sizeof(struct clk *), + clk_data.clks = kzalloc(clk_data.clk_num * sizeof(struct clk_core *), GFP_KERNEL); if (WARN_ON(!clk_data.clks)) { iounmap(base); @@ -93,13 +92,13 @@ DEFINE_SPINLOCK(ctrl_gating_lock); struct clk_gating_ctrl { spinlock_t *lock; - struct clk **gates; + struct clk_core **gates; int num_gates; }; #define to_clk_gate(_hw) container_of(_hw, struct clk_gate, hw) -static struct clk *clk_gating_get_src( +static struct clk_core *clk_gating_get_src( struct of_phandle_args *clkspec, void *data) { struct clk_gating_ctrl *ctrl = (struct clk_gating_ctrl *)data; @@ -121,7 +120,7 @@ void __init mvebu_clk_gating_setup(struct device_node *np, const struct clk_gating_soc_desc *desc) { struct clk_gating_ctrl *ctrl; - struct clk *clk; + struct clk_core *clk; void __iomem *base; const char *default_parent = NULL; int n; @@ -130,10 +129,10 @@ void __init mvebu_clk_gating_setup(struct device_node *np, if (WARN_ON(!base)) return; - clk = of_clk_get(np, 0); + clk = of_clk_provider_get(np, 0); if (!IS_ERR(clk)) { default_parent = __clk_get_name(clk); - clk_put(clk); + __clk_put(clk); } ctrl = kzalloc(sizeof(*ctrl), GFP_KERNEL); @@ -148,7 +147,7 @@ void __init mvebu_clk_gating_setup(struct device_node *np, n++; ctrl->num_gates = n; - ctrl->gates = kzalloc(ctrl->num_gates * sizeof(struct clk *), + ctrl->gates = kzalloc(ctrl->num_gates * sizeof(struct clk_core *), GFP_KERNEL); if (WARN_ON(!ctrl->gates)) goto gates_out; diff --git a/drivers/clk/mvebu/kirkwood.c b/drivers/clk/mvebu/kirkwood.c index 99550f2..5d0978b 100644 --- a/drivers/clk/mvebu/kirkwood.c +++ b/drivers/clk/mvebu/kirkwood.c @@ -242,7 +242,7 @@ struct clk_muxing_soc_desc { struct clk_muxing_ctrl { spinlock_t *lock; - struct clk **muxes; + struct clk_core **muxes; int num_muxes; }; @@ -258,7 +258,7 @@ static const struct clk_muxing_soc_desc kirkwood_mux_desc[] __initconst = { #define to_clk_mux(_hw) container_of(_hw, struct clk_mux, hw) -static struct clk *clk_muxing_get_src( +static struct clk_core *clk_muxing_get_src( struct of_phandle_args *clkspec, void *data) { struct clk_muxing_ctrl *ctrl = (struct clk_muxing_ctrl *)data; @@ -299,7 +299,7 @@ static void __init kirkwood_clk_muxing_setup(struct device_node *np, n++; ctrl->num_muxes = n; - ctrl->muxes = kcalloc(ctrl->num_muxes, sizeof(struct clk *), + ctrl->muxes = kcalloc(ctrl->num_muxes, sizeof(struct clk_core *), GFP_KERNEL); if (WARN_ON(!ctrl->muxes)) goto muxes_out; diff --git a/drivers/clk/mxs/clk-div.c b/drivers/clk/mxs/clk-div.c index 90e1da9..73ca1e8 100644 --- a/drivers/clk/mxs/clk-div.c +++ b/drivers/clk/mxs/clk-div.c @@ -9,7 +9,6 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include #include #include #include @@ -74,11 +73,11 @@ static struct clk_ops clk_div_ops = { .set_rate = clk_div_set_rate, }; -struct clk *mxs_clk_div(const char *name, const char *parent_name, +struct clk_core *mxs_clk_div(const char *name, const char *parent_name, void __iomem *reg, u8 shift, u8 width, u8 busy) { struct clk_div *div; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; div = kzalloc(sizeof(*div), GFP_KERNEL); diff --git a/drivers/clk/mxs/clk-frac.c b/drivers/clk/mxs/clk-frac.c index e6aa6b5..65cedf8 100644 --- a/drivers/clk/mxs/clk-frac.c +++ b/drivers/clk/mxs/clk-frac.c @@ -9,7 +9,6 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include #include #include #include @@ -108,11 +107,11 @@ static struct clk_ops clk_frac_ops = { .set_rate = clk_frac_set_rate, }; -struct clk *mxs_clk_frac(const char *name, const char *parent_name, +struct clk_core *mxs_clk_frac(const char *name, const char *parent_name, void __iomem *reg, u8 shift, u8 width, u8 busy) { struct clk_frac *frac; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; frac = kzalloc(sizeof(*frac), GFP_KERNEL); diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c index 9fc9359..43f2d31 100644 --- a/drivers/clk/mxs/clk-imx23.c +++ b/drivers/clk/mxs/clk-imx23.c @@ -9,7 +9,6 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include #include #include #include @@ -94,7 +93,7 @@ enum imx23_clk { clk_max }; -static struct clk *clks[clk_max]; +static struct clk_core *clks[clk_max]; static struct clk_onecell_data clk_data; static enum imx23_clk clks_init_on[] __initdata = { @@ -171,7 +170,7 @@ static void __init mx23_clocks_init(struct device_node *np) of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) - clk_prepare_enable(clks[clks_init_on[i]]); + clk_provider_prepare_enable(clks[clks_init_on[i]]); } CLK_OF_DECLARE(imx23_clkctrl, "fsl,imx23-clkctrl", mx23_clocks_init); diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c index a6c3501..e6d70ac 100644 --- a/drivers/clk/mxs/clk-imx28.c +++ b/drivers/clk/mxs/clk-imx28.c @@ -9,7 +9,6 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include #include #include #include @@ -148,7 +147,7 @@ enum imx28_clk { clk_max }; -static struct clk *clks[clk_max]; +static struct clk_core *clks[clk_max]; static struct clk_onecell_data clk_data; static enum imx28_clk clks_init_on[] __initdata = { @@ -250,6 +249,6 @@ static void __init mx28_clocks_init(struct device_node *np) clk_register_clkdev(clks[enet_out], NULL, "enet_out"); for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) - clk_prepare_enable(clks[clks_init_on[i]]); + clk_provider_prepare_enable(clks[clks_init_on[i]]); } CLK_OF_DECLARE(imx28_clkctrl, "fsl,imx28-clkctrl", mx28_clocks_init); diff --git a/drivers/clk/mxs/clk-pll.c b/drivers/clk/mxs/clk-pll.c index fadae41..e0f94ac 100644 --- a/drivers/clk/mxs/clk-pll.c +++ b/drivers/clk/mxs/clk-pll.c @@ -9,7 +9,6 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include #include #include #include @@ -86,11 +85,11 @@ static const struct clk_ops clk_pll_ops = { .recalc_rate = clk_pll_recalc_rate, }; -struct clk *mxs_clk_pll(const char *name, const char *parent_name, +struct clk_core *mxs_clk_pll(const char *name, const char *parent_name, void __iomem *base, u8 power, unsigned long rate) { struct clk_pll *pll; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; pll = kzalloc(sizeof(*pll), GFP_KERNEL); diff --git a/drivers/clk/mxs/clk-ref.c b/drivers/clk/mxs/clk-ref.c index 4adeed6..af75c3f 100644 --- a/drivers/clk/mxs/clk-ref.c +++ b/drivers/clk/mxs/clk-ref.c @@ -9,7 +9,6 @@ * http://www.gnu.org/copyleft/gpl.html */ -#include #include #include #include @@ -125,11 +124,11 @@ static const struct clk_ops clk_ref_ops = { .set_rate = clk_ref_set_rate, }; -struct clk *mxs_clk_ref(const char *name, const char *parent_name, +struct clk_core *mxs_clk_ref(const char *name, const char *parent_name, void __iomem *reg, u8 idx) { struct clk_ref *ref; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; ref = kzalloc(sizeof(*ref), GFP_KERNEL); diff --git a/drivers/clk/mxs/clk.h b/drivers/clk/mxs/clk.h index ef10ad9..19b9dc3 100644 --- a/drivers/clk/mxs/clk.h +++ b/drivers/clk/mxs/clk.h @@ -12,7 +12,6 @@ #ifndef __MXS_CLK_H #define __MXS_CLK_H -#include #include #include @@ -23,24 +22,24 @@ extern spinlock_t mxs_lock; int mxs_clk_wait(void __iomem *reg, u8 shift); -struct clk *mxs_clk_pll(const char *name, const char *parent_name, +struct clk_core *mxs_clk_pll(const char *name, const char *parent_name, void __iomem *base, u8 power, unsigned long rate); -struct clk *mxs_clk_ref(const char *name, const char *parent_name, +struct clk_core *mxs_clk_ref(const char *name, const char *parent_name, void __iomem *reg, u8 idx); -struct clk *mxs_clk_div(const char *name, const char *parent_name, +struct clk_core *mxs_clk_div(const char *name, const char *parent_name, void __iomem *reg, u8 shift, u8 width, u8 busy); -struct clk *mxs_clk_frac(const char *name, const char *parent_name, +struct clk_core *mxs_clk_frac(const char *name, const char *parent_name, void __iomem *reg, u8 shift, u8 width, u8 busy); -static inline struct clk *mxs_clk_fixed(const char *name, int rate) +static inline struct clk_core *mxs_clk_fixed(const char *name, int rate) { return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate); } -static inline struct clk *mxs_clk_gate(const char *name, +static inline struct clk_core *mxs_clk_gate(const char *name, const char *parent_name, void __iomem *reg, u8 shift) { return clk_register_gate(NULL, name, parent_name, CLK_SET_RATE_PARENT, @@ -48,7 +47,7 @@ static inline struct clk *mxs_clk_gate(const char *name, &mxs_lock); } -static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg, +static inline struct clk_core *mxs_clk_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char **parent_names, int num_parents) { return clk_register_mux(NULL, name, parent_names, num_parents, @@ -56,7 +55,7 @@ static inline struct clk *mxs_clk_mux(const char *name, void __iomem *reg, reg, shift, width, 0, &mxs_lock); } -static inline struct clk *mxs_clk_fixed_factor(const char *name, +static inline struct clk_core *mxs_clk_fixed_factor(const char *name, const char *parent_name, unsigned int mult, unsigned int div) { return clk_register_fixed_factor(NULL, name, parent_name, diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c index b638c58..59f118c 100644 --- a/drivers/clk/qcom/clk-rcg.c +++ b/drivers/clk/qcom/clk-rcg.c @@ -375,7 +375,7 @@ struct freq_tbl *find_freq(const struct freq_tbl *f, unsigned long rate) static long _freq_tbl_determine_rate(struct clk_hw *hw, const struct freq_tbl *f, unsigned long rate, - unsigned long *p_rate, struct clk **p) + unsigned long *p_rate, struct clk_core **p) { unsigned long clk_flags; @@ -402,7 +402,7 @@ static long _freq_tbl_determine_rate(struct clk_hw *hw, } static long clk_rcg_determine_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *p_rate, struct clk **p) + unsigned long *p_rate, struct clk_core **p) { struct clk_rcg *rcg = to_clk_rcg(hw); @@ -410,7 +410,7 @@ static long clk_rcg_determine_rate(struct clk_hw *hw, unsigned long rate, } static long clk_dyn_rcg_determine_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *p_rate, struct clk **p) + unsigned long *p_rate, struct clk_core **p) { struct clk_dyn_rcg *rcg = to_clk_dyn_rcg(hw); @@ -418,7 +418,7 @@ static long clk_dyn_rcg_determine_rate(struct clk_hw *hw, unsigned long rate, } static long clk_rcg_bypass_determine_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *p_rate, struct clk **p) + unsigned long *p_rate, struct clk_core **p) { struct clk_rcg *rcg = to_clk_rcg(hw); const struct freq_tbl *f = rcg->freq_tbl; diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index cd185d5..6aac1ec 100644 --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c @@ -188,7 +188,7 @@ struct freq_tbl *find_freq(const struct freq_tbl *f, unsigned long rate) static long _freq_tbl_determine_rate(struct clk_hw *hw, const struct freq_tbl *f, unsigned long rate, - unsigned long *p_rate, struct clk **p) + unsigned long *p_rate, struct clk_core **p) { unsigned long clk_flags; @@ -219,7 +219,7 @@ static long _freq_tbl_determine_rate(struct clk_hw *hw, } static long clk_rcg2_determine_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *p_rate, struct clk **p) + unsigned long *p_rate, struct clk_core **p) { struct clk_rcg2 *rcg = to_clk_rcg2(hw); @@ -372,7 +372,7 @@ static int clk_edp_pixel_set_rate_and_parent(struct clk_hw *hw, } static long clk_edp_pixel_determine_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *p_rate, struct clk **p) + unsigned long *p_rate, struct clk_core **p) { struct clk_rcg2 *rcg = to_clk_rcg2(hw); const struct freq_tbl *f = rcg->freq_tbl; @@ -423,7 +423,7 @@ const struct clk_ops clk_edp_pixel_ops = { EXPORT_SYMBOL_GPL(clk_edp_pixel_ops); static long clk_byte_determine_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *p_rate, struct clk **p) + unsigned long *p_rate, struct clk_core **p) { struct clk_rcg2 *rcg = to_clk_rcg2(hw); const struct freq_tbl *f = rcg->freq_tbl; @@ -485,14 +485,14 @@ static const struct frac_entry frac_table_pixel[] = { }; static long clk_pixel_determine_rate(struct clk_hw *hw, unsigned long rate, - unsigned long *p_rate, struct clk **p) + unsigned long *p_rate, struct clk_core **p) { struct clk_rcg2 *rcg = to_clk_rcg2(hw); unsigned long request, src_rate; int delta = 100000; const struct freq_tbl *f = rcg->freq_tbl; const struct frac_entry *frac = frac_table_pixel; - struct clk *parent = *p = clk_get_parent_by_index(hw->clk, f->src); + struct clk_core *parent = *p = clk_get_parent_by_index(hw->clk, f->src); for (; frac->num; frac++) { request = (rate * frac->den) / frac->num; @@ -519,7 +519,7 @@ static int clk_pixel_set_rate(struct clk_hw *hw, unsigned long rate, int delta = 100000; u32 mask = BIT(rcg->hid_width) - 1; u32 hid_div; - struct clk *parent = clk_get_parent_by_index(hw->clk, f.src); + struct clk_core *parent = clk_get_parent_by_index(hw->clk, f.src); for (; frac->num; frac++) { request = (rate * frac->den) / frac->num; diff --git a/drivers/clk/qcom/clk-regmap.c b/drivers/clk/qcom/clk-regmap.c index a58ba39..2a98040 100644 --- a/drivers/clk/qcom/clk-regmap.c +++ b/drivers/clk/qcom/clk-regmap.c @@ -101,7 +101,7 @@ EXPORT_SYMBOL_GPL(clk_disable_regmap); * clk_regmap struct via this function so that the regmap is initialized * and so that the clock is registered with the common clock framework. */ -struct clk *devm_clk_register_regmap(struct device *dev, +struct clk_core *devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk) { if (dev && dev_get_regmap(dev, NULL)) diff --git a/drivers/clk/qcom/clk-regmap.h b/drivers/clk/qcom/clk-regmap.h index 491a63d..89258cb 100644 --- a/drivers/clk/qcom/clk-regmap.h +++ b/drivers/clk/qcom/clk-regmap.h @@ -39,7 +39,7 @@ struct clk_regmap { int clk_is_enabled_regmap(struct clk_hw *hw); int clk_enable_regmap(struct clk_hw *hw); void clk_disable_regmap(struct clk_hw *hw); -struct clk * +struct clk_core * devm_clk_register_regmap(struct device *dev, struct clk_regmap *rclk); #endif diff --git a/drivers/clk/qcom/common.c b/drivers/clk/qcom/common.c index eeb3eea..afd40ea 100644 --- a/drivers/clk/qcom/common.c +++ b/drivers/clk/qcom/common.c @@ -24,7 +24,7 @@ struct qcom_cc { struct qcom_reset_controller reset; struct clk_onecell_data data; - struct clk *clks[]; + struct clk_core *clks[]; }; struct regmap * @@ -48,9 +48,9 @@ int qcom_cc_really_probe(struct platform_device *pdev, { int i, ret; struct device *dev = &pdev->dev; - struct clk *clk; + struct clk_core *clk; struct clk_onecell_data *data; - struct clk **clks; + struct clk_core **clks; struct qcom_reset_controller *reset; struct qcom_cc *cc; size_t num_clks = desc->num_clks; diff --git a/drivers/clk/qcom/gcc-apq8084.c b/drivers/clk/qcom/gcc-apq8084.c index ee52eb1..27af0cd 100644 --- a/drivers/clk/qcom/gcc-apq8084.c +++ b/drivers/clk/qcom/gcc-apq8084.c @@ -3562,7 +3562,7 @@ MODULE_DEVICE_TABLE(of, gcc_apq8084_match_table); static int gcc_apq8084_probe(struct platform_device *pdev) { - struct clk *clk; + struct clk_core *clk; struct device *dev = &pdev->dev; /* Temporary until RPM clocks supported */ diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c index 4032e51..f31f095 100644 --- a/drivers/clk/qcom/gcc-ipq806x.c +++ b/drivers/clk/qcom/gcc-ipq806x.c @@ -2376,7 +2376,7 @@ MODULE_DEVICE_TABLE(of, gcc_ipq806x_match_table); static int gcc_ipq806x_probe(struct platform_device *pdev) { - struct clk *clk; + struct clk_core *clk; struct device *dev = &pdev->dev; /* Temporary until RPM clocks supported */ diff --git a/drivers/clk/qcom/gcc-msm8660.c b/drivers/clk/qcom/gcc-msm8660.c index 0c4b727..2d41fdb 100644 --- a/drivers/clk/qcom/gcc-msm8660.c +++ b/drivers/clk/qcom/gcc-msm8660.c @@ -2718,7 +2718,7 @@ MODULE_DEVICE_TABLE(of, gcc_msm8660_match_table); static int gcc_msm8660_probe(struct platform_device *pdev) { - struct clk *clk; + struct clk_core *clk; struct device *dev = &pdev->dev; /* Temporary until RPM clocks supported */ diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c index 007534f..ed8f8f5 100644 --- a/drivers/clk/qcom/gcc-msm8960.c +++ b/drivers/clk/qcom/gcc-msm8960.c @@ -3488,7 +3488,7 @@ MODULE_DEVICE_TABLE(of, gcc_msm8960_match_table); static int gcc_msm8960_probe(struct platform_device *pdev) { - struct clk *clk; + struct clk_core *clk; struct device *dev = &pdev->dev; const struct of_device_id *match; diff --git a/drivers/clk/qcom/gcc-msm8974.c b/drivers/clk/qcom/gcc-msm8974.c index 7af7c18..8326b1f 100644 --- a/drivers/clk/qcom/gcc-msm8974.c +++ b/drivers/clk/qcom/gcc-msm8974.c @@ -2699,7 +2699,7 @@ static void msm8974_pro_clock_override(void) static int gcc_msm8974_probe(struct platform_device *pdev) { - struct clk *clk; + struct clk_core *clk; struct device *dev = &pdev->dev; bool pro; const struct of_device_id *id; diff --git a/drivers/clk/qcom/mmcc-msm8960.c b/drivers/clk/qcom/mmcc-msm8960.c index 2e80a21..bb60d61 100644 --- a/drivers/clk/qcom/mmcc-msm8960.c +++ b/drivers/clk/qcom/mmcc-msm8960.c @@ -505,7 +505,7 @@ static int pix_rdi_set_parent(struct clk_hw *hw, u8 index) int ret = 0; u32 val; struct clk_pix_rdi *rdi = to_clk_pix_rdi(hw); - struct clk *clk = hw->clk; + struct clk_core *clk = hw->clk; int num_parents = __clk_get_num_parents(hw->clk); /* @@ -517,7 +517,7 @@ static int pix_rdi_set_parent(struct clk_hw *hw, u8 index) * needs to be on at what time. */ for (i = 0; i < num_parents; i++) { - ret = clk_prepare_enable(clk_get_parent_by_index(clk, i)); + ret = clk_provider_prepare_enable(clk_get_parent_by_index(clk, i)); if (ret) goto err; } @@ -546,7 +546,7 @@ static int pix_rdi_set_parent(struct clk_hw *hw, u8 index) err: for (i--; i >= 0; i--) - clk_disable_unprepare(clk_get_parent_by_index(clk, i)); + clk_provider_disable_unprepare(clk_get_parent_by_index(clk, i)); return ret; } diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c index f2a1c7a..414bff2 100644 --- a/drivers/clk/rockchip/clk-pll.c +++ b/drivers/clk/rockchip/clk-pll.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include "clk.h" @@ -297,7 +296,7 @@ static const struct clk_ops rockchip_rk3066_pll_clk_ops = { * Common registering of pll clocks */ -struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type, +struct clk_core *rockchip_clk_register_pll(enum rockchip_pll_type pll_type, const char *name, const char **parent_names, u8 num_parents, void __iomem *base, int con_offset, int grf_lock_offset, int lock_shift, int mode_offset, int mode_shift, @@ -308,7 +307,7 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type, struct clk_init_data init; struct rockchip_clk_pll *pll; struct clk_mux *pll_mux; - struct clk *pll_clk, *mux_clk; + struct clk_core *pll_clk, *mux_clk; char pll_name[20]; int ret; @@ -377,7 +376,7 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type, goto err_pll; } - ret = clk_notifier_register(pll_clk, &pll->clk_nb); + ret = clk_provider_notifier_register(pll_clk, &pll->clk_nb); if (ret) { pr_err("%s: failed to register clock notifier for %s : %d\n", __func__, name, ret); @@ -417,7 +416,7 @@ struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type, return mux_clk; err_mux: - ret = clk_notifier_unregister(pll_clk, &pll->clk_nb); + ret = clk_provider_notifier_unregister(pll_clk, &pll->clk_nb); if (ret) { pr_err("%s: could not unregister clock notifier in error path : %d\n", __func__, ret); diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c index 732118e..b0ca609 100644 --- a/drivers/clk/rockchip/clk-rk3188.c +++ b/drivers/clk/rockchip/clk-rk3188.c @@ -607,7 +607,7 @@ static const char *rk3188_critical_clocks[] __initconst = { static void __init rk3188_common_clk_init(struct device_node *np) { void __iomem *reg_base; - struct clk *clk; + struct clk_core *clk; reg_base = of_iomap(np, 0); if (!reg_base) { diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c index 038b1aa..b8992dd 100644 --- a/drivers/clk/rockchip/clk-rk3288.c +++ b/drivers/clk/rockchip/clk-rk3288.c @@ -688,7 +688,7 @@ static const char *rk3288_critical_clocks[] __initconst = { static void __init rk3288_clk_init(struct device_node *np) { void __iomem *reg_base; - struct clk *clk; + struct clk_core *clk; reg_base = of_iomap(np, 0); if (!reg_base) { diff --git a/drivers/clk/rockchip/clk-rockchip.c b/drivers/clk/rockchip/clk-rockchip.c index 4cf838d5..faa8dfa 100644 --- a/drivers/clk/rockchip/clk-rockchip.c +++ b/drivers/clk/rockchip/clk-rockchip.c @@ -54,7 +54,7 @@ static void __init rk2928_gate_clk_init(struct device_node *node) if (!clk_data) return; - clk_data->clks = kzalloc(qty * sizeof(struct clk *), GFP_KERNEL); + clk_data->clks = kzalloc(qty * sizeof(struct clk_core *), GFP_KERNEL); if (!clk_data->clks) { kfree(clk_data); return; diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c index d9c6db2..dfe3ddb 100644 --- a/drivers/clk/rockchip/clk.c +++ b/drivers/clk/rockchip/clk.c @@ -21,7 +21,6 @@ */ #include -#include #include #include #include @@ -37,7 +36,7 @@ * * sometimes without one of those components. */ -static struct clk *rockchip_clk_register_branch(const char *name, +static struct clk_core *rockchip_clk_register_branch(const char *name, const char **parent_names, u8 num_parents, void __iomem *base, int muxdiv_offset, u8 mux_shift, u8 mux_width, u8 mux_flags, u8 div_shift, u8 div_width, u8 div_flags, @@ -45,7 +44,7 @@ static struct clk *rockchip_clk_register_branch(const char *name, u8 gate_shift, u8 gate_flags, unsigned long flags, spinlock_t *lock) { - struct clk *clk; + struct clk_core *clk; struct clk_mux *mux = NULL; struct clk_gate *gate = NULL; struct clk_divider *div = NULL; @@ -103,13 +102,13 @@ static struct clk *rockchip_clk_register_branch(const char *name, return clk; } -static struct clk *rockchip_clk_register_frac_branch(const char *name, +static struct clk_core *rockchip_clk_register_frac_branch(const char *name, const char **parent_names, u8 num_parents, void __iomem *base, int muxdiv_offset, u8 div_flags, int gate_offset, u8 gate_shift, u8 gate_flags, unsigned long flags, spinlock_t *lock) { - struct clk *clk; + struct clk_core *clk; struct clk_gate *gate = NULL; struct clk_fractional_divider *div = NULL; const struct clk_ops *div_ops = NULL, *gate_ops = NULL; @@ -152,7 +151,7 @@ static struct clk *rockchip_clk_register_frac_branch(const char *name, } static DEFINE_SPINLOCK(clk_lock); -static struct clk **clk_table; +static struct clk_core **clk_table; static void __iomem *reg_base; static struct clk_onecell_data clk_data; static struct device_node *cru_node; @@ -165,7 +164,7 @@ void __init rockchip_clk_init(struct device_node *np, void __iomem *base, cru_node = np; grf = ERR_PTR(-EPROBE_DEFER); - clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL); + clk_table = kcalloc(nr_clks, sizeof(struct clk_core *), GFP_KERNEL); if (!clk_table) pr_err("%s: could not allocate clock lookup table\n", __func__); @@ -181,7 +180,7 @@ struct regmap *rockchip_clk_get_grf(void) return grf; } -void rockchip_clk_add_lookup(struct clk *clk, unsigned int id) +void rockchip_clk_add_lookup(struct clk_core *clk, unsigned int id) { if (clk_table && id) clk_table[id] = clk; @@ -190,7 +189,7 @@ void rockchip_clk_add_lookup(struct clk *clk, unsigned int id) void __init rockchip_clk_register_plls(struct rockchip_pll_clock *list, unsigned int nr_pll, int grf_lock_offset) { - struct clk *clk; + struct clk_core *clk; int idx; for (idx = 0; idx < nr_pll; idx++, list++) { @@ -213,7 +212,7 @@ void __init rockchip_clk_register_branches( struct rockchip_clk_branch *list, unsigned int nr_clk) { - struct clk *clk = NULL; + struct clk_core *clk = NULL; unsigned int idx; unsigned long flags; @@ -303,9 +302,9 @@ void __init rockchip_clk_protect_critical(const char *clocks[], int nclocks) /* Protect the clocks that needs to stay on */ for (i = 0; i < nclocks; i++) { - struct clk *clk = __clk_lookup(clocks[i]); + struct clk_core *clk = __clk_lookup(clocks[i]); if (clk) - clk_prepare_enable(clk); + clk_provider_prepare_enable(clk); } } diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index 2b0bca1..7f713eb 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -24,7 +24,6 @@ #define CLK_ROCKCHIP_CLK_H #include -#include #include #define HIWORD_UPDATE(val, mask, shift) \ @@ -113,7 +112,7 @@ struct rockchip_pll_clock { .rate_table = _rtable, \ } -struct clk *rockchip_clk_register_pll(enum rockchip_pll_type pll_type, +struct clk_core *rockchip_clk_register_pll(enum rockchip_pll_type pll_type, const char *name, const char **parent_names, u8 num_parents, void __iomem *base, int con_offset, int grf_lock_offset, int lock_shift, int reg_mode, int mode_shift, @@ -324,7 +323,7 @@ struct rockchip_clk_branch { void rockchip_clk_init(struct device_node *np, void __iomem *base, unsigned long nr_clks); struct regmap *rockchip_clk_get_grf(void); -void rockchip_clk_add_lookup(struct clk *clk, unsigned int id); +void rockchip_clk_add_lookup(struct clk_core *clk, unsigned int id); void rockchip_clk_register_branches(struct rockchip_clk_branch *clk_list, unsigned int nr_clk); void rockchip_clk_register_plls(struct rockchip_pll_clock *pll_list, diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c index 13eae14c..f5639bf 100644 --- a/drivers/clk/samsung/clk-exynos-audss.c +++ b/drivers/clk/samsung/clk-exynos-audss.c @@ -26,7 +26,7 @@ enum exynos_audss_clk_type { }; static DEFINE_SPINLOCK(lock); -static struct clk **clk_table; +static struct clk_core **clk_table; static void __iomem *reg_base; static struct clk_onecell_data clk_data; @@ -83,7 +83,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev) const char *mout_audss_p[] = {"fin_pll", "fout_epll"}; const char *mout_i2s_p[] = {"mout_audss", "cdclk0", "sclk_audio0"}; const char *sclk_pcm_p = "sclk_pcm0"; - struct clk *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in; + struct clk_core *pll_ref, *pll_in, *cdclk, *sclk_audio, *sclk_pcm_in; const struct of_device_id *match; enum exynos_audss_clk_type variant; @@ -100,7 +100,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev) } clk_table = devm_kzalloc(&pdev->dev, - sizeof(struct clk *) * EXYNOS_AUDSS_MAX_CLKS, + sizeof(struct clk_core *) * EXYNOS_AUDSS_MAX_CLKS, GFP_KERNEL); if (!clk_table) return -ENOMEM; @@ -111,8 +111,8 @@ static int exynos_audss_clk_probe(struct platform_device *pdev) else clk_data.clk_num = EXYNOS_AUDSS_MAX_CLKS - 1; - pll_ref = devm_clk_get(&pdev->dev, "pll_ref"); - pll_in = devm_clk_get(&pdev->dev, "pll_in"); + pll_ref = devm_clk_provider_get(&pdev->dev, "pll_ref"); + pll_in = devm_clk_provider_get(&pdev->dev, "pll_in"); if (!IS_ERR(pll_ref)) mout_audss_p[0] = __clk_get_name(pll_ref); if (!IS_ERR(pll_in)) @@ -122,8 +122,8 @@ static int exynos_audss_clk_probe(struct platform_device *pdev) CLK_SET_RATE_NO_REPARENT, reg_base + ASS_CLK_SRC, 0, 1, 0, &lock); - cdclk = devm_clk_get(&pdev->dev, "cdclk"); - sclk_audio = devm_clk_get(&pdev->dev, "sclk_audio"); + cdclk = devm_clk_provider_get(&pdev->dev, "cdclk"); + sclk_audio = devm_clk_provider_get(&pdev->dev, "sclk_audio"); if (!IS_ERR(cdclk)) mout_i2s_p[1] = __clk_get_name(cdclk); if (!IS_ERR(sclk_audio)) @@ -161,7 +161,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev) "sclk_pcm", CLK_SET_RATE_PARENT, reg_base + ASS_CLK_GATE, 4, 0, &lock); - sclk_pcm_in = devm_clk_get(&pdev->dev, "sclk_pcm_in"); + sclk_pcm_in = devm_clk_provider_get(&pdev->dev, "sclk_pcm_in"); if (!IS_ERR(sclk_pcm_in)) sclk_pcm_p = __clk_get_name(sclk_pcm_in); clk_table[EXYNOS_SCLK_PCM] = clk_register_gate(NULL, "sclk_pcm", diff --git a/drivers/clk/samsung/clk-exynos-clkout.c b/drivers/clk/samsung/clk-exynos-clkout.c index 3a7cb25..0ad7dee 100644 --- a/drivers/clk/samsung/clk-exynos-clkout.c +++ b/drivers/clk/samsung/clk-exynos-clkout.c @@ -9,7 +9,6 @@ * Clock driver for Exynos clock output */ -#include #include #include #include @@ -30,7 +29,7 @@ struct exynos_clkout { struct clk_mux mux; spinlock_t slock; struct clk_onecell_data data; - struct clk *clk_table[EXYNOS_CLKOUT_NR_CLKS]; + struct clk_core *clk_table[EXYNOS_CLKOUT_NR_CLKS]; void __iomem *reg; u32 pmu_debug_save; }; @@ -57,7 +56,7 @@ static struct syscore_ops exynos_clkout_syscore_ops = { static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask) { const char *parent_names[EXYNOS_CLKOUT_PARENTS]; - struct clk *parents[EXYNOS_CLKOUT_PARENTS]; + struct clk_core *parents[EXYNOS_CLKOUT_PARENTS]; int parent_count; int ret; int i; @@ -73,7 +72,7 @@ static void __init exynos_clkout_init(struct device_node *node, u32 mux_mask) char name[] = "clkoutXX"; snprintf(name, sizeof(name), "clkout%d", i); - parents[i] = of_clk_get_by_name(node, name); + parents[i] = of_clk_provider_get_by_name(node, name); if (IS_ERR(parents[i])) { parent_names[i] = "none"; continue; @@ -125,7 +124,7 @@ err_unmap: clks_put: for (i = 0; i < EXYNOS_CLKOUT_PARENTS; ++i) if (!IS_ERR(parents[i])) - clk_put(parents[i]); + __clk_put(parents[i]); free_clkout: kfree(clkout); diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk-exynos3250.c index dc85f8e..5742e76 100644 --- a/drivers/clk/samsung/clk-exynos3250.c +++ b/drivers/clk/samsung/clk-exynos3250.c @@ -8,7 +8,6 @@ * Common Clock Framework support for Exynos3250 SoC. */ -#include #include #include #include diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c index ac163d7..5d77da2 100644 --- a/drivers/clk/samsung/clk-exynos4.c +++ b/drivers/clk/samsung/clk-exynos4.c @@ -11,7 +11,6 @@ */ #include -#include #include #include #include @@ -1230,19 +1229,19 @@ static unsigned long exynos4_get_xom(void) static void __init exynos4_clk_register_finpll(struct samsung_clk_provider *ctx) { struct samsung_fixed_rate_clock fclk; - struct clk *clk; + struct clk_core *clk; unsigned long finpll_f = 24000000; char *parent_name; unsigned int xom = exynos4_get_xom(); parent_name = xom & 1 ? "xusbxti" : "xxti"; - clk = clk_get(NULL, parent_name); + clk = clk_provider_get(NULL, parent_name); if (IS_ERR(clk)) { pr_err("%s: failed to lookup parent clock %s, assuming " "fin_pll clock frequency is 24MHz\n", __func__, parent_name); } else { - finpll_f = clk_get_rate(clk); + finpll_f = clk_provider_get_rate(clk); } fclk.id = CLK_FIN_PLL; diff --git a/drivers/clk/samsung/clk-exynos5250.c b/drivers/clk/samsung/clk-exynos5250.c index 70ec3d2..623e68f 100644 --- a/drivers/clk/samsung/clk-exynos5250.c +++ b/drivers/clk/samsung/clk-exynos5250.c @@ -11,7 +11,6 @@ */ #include -#include #include #include #include diff --git a/drivers/clk/samsung/clk-exynos5260.c b/drivers/clk/samsung/clk-exynos5260.c index ce3de97..5a3d623 100644 --- a/drivers/clk/samsung/clk-exynos5260.c +++ b/drivers/clk/samsung/clk-exynos5260.c @@ -9,7 +9,6 @@ * Common Clock Framework support for Exynos5260 SoC. */ -#include #include #include #include diff --git a/drivers/clk/samsung/clk-exynos5410.c b/drivers/clk/samsung/clk-exynos5410.c index 231475b..546b32f 100644 --- a/drivers/clk/samsung/clk-exynos5410.c +++ b/drivers/clk/samsung/clk-exynos5410.c @@ -11,7 +11,6 @@ #include -#include #include #include #include diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c index 848d602..0229cc9 100644 --- a/drivers/clk/samsung/clk-exynos5420.c +++ b/drivers/clk/samsung/clk-exynos5420.c @@ -11,7 +11,6 @@ */ #include -#include #include #include #include diff --git a/drivers/clk/samsung/clk-exynos5440.c b/drivers/clk/samsung/clk-exynos5440.c index 00d1d00..8adeaa1 100644 --- a/drivers/clk/samsung/clk-exynos5440.c +++ b/drivers/clk/samsung/clk-exynos5440.c @@ -10,7 +10,6 @@ */ #include -#include #include #include #include diff --git a/drivers/clk/samsung/clk-pll.c b/drivers/clk/samsung/clk-pll.c index b07fad2..aaf234a 100644 --- a/drivers/clk/samsung/clk-pll.c +++ b/drivers/clk/samsung/clk-pll.c @@ -910,12 +910,12 @@ static const struct clk_ops samsung_pll2550x_clk_ops = { .recalc_rate = samsung_pll2550x_recalc_rate, }; -struct clk * __init samsung_clk_register_pll2550x(const char *name, +struct clk_core * __init samsung_clk_register_pll2550x(const char *name, const char *pname, const void __iomem *reg_base, const unsigned long offset) { struct samsung_clk_pll2550x *pll; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; pll = kzalloc(sizeof(*pll), GFP_KERNEL); @@ -1149,7 +1149,7 @@ static void __init _samsung_clk_register_pll(struct samsung_clk_provider *ctx, void __iomem *base) { struct samsung_clk_pll *pll; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; int ret, len; diff --git a/drivers/clk/samsung/clk-pll.h b/drivers/clk/samsung/clk-pll.h index c0ed4d4..81af344 100644 --- a/drivers/clk/samsung/clk-pll.h +++ b/drivers/clk/samsung/clk-pll.h @@ -97,7 +97,7 @@ struct samsung_pll_rate_table { unsigned int vsel; }; -extern struct clk * __init samsung_clk_register_pll2550x(const char *name, +extern struct clk_core * __init samsung_clk_register_pll2550x(const char *name, const char *pname, const void __iomem *reg_base, const unsigned long offset); diff --git a/drivers/clk/samsung/clk-s3c2410-dclk.c b/drivers/clk/samsung/clk-s3c2410-dclk.c index 0449cc0..05354bd 100644 --- a/drivers/clk/samsung/clk-s3c2410-dclk.c +++ b/drivers/clk/samsung/clk-s3c2410-dclk.c @@ -87,12 +87,12 @@ const struct clk_ops s3c24xx_clkout_ops = { .determine_rate = __clk_mux_determine_rate, }; -struct clk *s3c24xx_register_clkout(struct device *dev, const char *name, +struct clk_core *s3c24xx_register_clkout(struct device *dev, const char *name, const char **parent_names, u8 num_parents, u8 shift, u32 mask) { struct s3c24xx_clkout *clkout; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; /* allocate the clkout */ @@ -237,7 +237,7 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev) { struct s3c24xx_dclk *s3c24xx_dclk; struct resource *mem; - struct clk **clk_table; + struct clk_core **clk_table; struct s3c24xx_dclk_drv_data *dclk_variant; int ret, i; @@ -251,7 +251,7 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev) spin_lock_init(&s3c24xx_dclk->dclk_lock); clk_table = devm_kzalloc(&pdev->dev, - sizeof(struct clk *) * DCLK_MAX_CLKS, + sizeof(struct clk_core *) * DCLK_MAX_CLKS, GFP_KERNEL); if (!clk_table) return -ENOMEM; @@ -329,21 +329,21 @@ static int s3c24xx_dclk_probe(struct platform_device *pdev) s3c24xx_dclk->dclk1_div_change_nb.notifier_call = s3c24xx_dclk1_div_notify; - ret = clk_notifier_register(clk_table[DIV_DCLK0], - &s3c24xx_dclk->dclk0_div_change_nb); + ret = clk_provider_notifier_register(clk_table[DIV_DCLK0], + &s3c24xx_dclk->dclk0_div_change_nb); if (ret) goto err_clk_register; - ret = clk_notifier_register(clk_table[DIV_DCLK1], - &s3c24xx_dclk->dclk1_div_change_nb); + ret = clk_provider_notifier_register(clk_table[DIV_DCLK1], + &s3c24xx_dclk->dclk1_div_change_nb); if (ret) goto err_dclk_notify; return 0; err_dclk_notify: - clk_notifier_unregister(clk_table[DIV_DCLK0], - &s3c24xx_dclk->dclk0_div_change_nb); + clk_provider_notifier_unregister(clk_table[DIV_DCLK0], + &s3c24xx_dclk->dclk0_div_change_nb); err_clk_register: for (i = 0; i < DCLK_MAX_CLKS; i++) if (clk_table[i] && !IS_ERR(clk_table[i])) @@ -355,13 +355,13 @@ err_clk_register: static int s3c24xx_dclk_remove(struct platform_device *pdev) { struct s3c24xx_dclk *s3c24xx_dclk = platform_get_drvdata(pdev); - struct clk **clk_table = s3c24xx_dclk->clk_data.clks; + struct clk_core **clk_table = s3c24xx_dclk->clk_data.clks; int i; - clk_notifier_unregister(clk_table[DIV_DCLK1], - &s3c24xx_dclk->dclk1_div_change_nb); - clk_notifier_unregister(clk_table[DIV_DCLK0], - &s3c24xx_dclk->dclk0_div_change_nb); + clk_provider_notifier_unregister(clk_table[DIV_DCLK1], + &s3c24xx_dclk->dclk1_div_change_nb); + clk_provider_notifier_unregister(clk_table[DIV_DCLK0], + &s3c24xx_dclk->dclk0_div_change_nb); for (i = 0; i < DCLK_MAX_CLKS; i++) clk_unregister(clk_table[i]); diff --git a/drivers/clk/samsung/clk-s3c2410.c b/drivers/clk/samsung/clk-s3c2410.c index 5d2f034..af15156 100644 --- a/drivers/clk/samsung/clk-s3c2410.c +++ b/drivers/clk/samsung/clk-s3c2410.c @@ -8,7 +8,6 @@ * Common Clock Framework support for S3C2410 and following SoCs. */ -#include #include #include #include diff --git a/drivers/clk/samsung/clk-s3c2412.c b/drivers/clk/samsung/clk-s3c2412.c index 34af09f..7e6cc95 100644 --- a/drivers/clk/samsung/clk-s3c2412.c +++ b/drivers/clk/samsung/clk-s3c2412.c @@ -8,7 +8,6 @@ * Common Clock Framework support for S3C2412 and S3C2413. */ -#include #include #include #include diff --git a/drivers/clk/samsung/clk-s3c2443.c b/drivers/clk/samsung/clk-s3c2443.c index c92f853..7eaaa68 100644 --- a/drivers/clk/samsung/clk-s3c2443.c +++ b/drivers/clk/samsung/clk-s3c2443.c @@ -8,7 +8,6 @@ * Common Clock Framework support for S3C2443 and following SoCs. */ -#include #include #include #include diff --git a/drivers/clk/samsung/clk-s3c64xx.c b/drivers/clk/samsung/clk-s3c64xx.c index 0f590e5..7dad675 100644 --- a/drivers/clk/samsung/clk-s3c64xx.c +++ b/drivers/clk/samsung/clk-s3c64xx.c @@ -8,7 +8,6 @@ * Common Clock Framework support for all S3C64xx SoCs. */ -#include #include #include #include diff --git a/drivers/clk/samsung/clk-s5pv210-audss.c b/drivers/clk/samsung/clk-s5pv210-audss.c index a8053b4..f7b77e5 100644 --- a/drivers/clk/samsung/clk-s5pv210-audss.c +++ b/drivers/clk/samsung/clk-s5pv210-audss.c @@ -24,7 +24,7 @@ #include static DEFINE_SPINLOCK(lock); -static struct clk **clk_table; +static struct clk_core **clk_table; static void __iomem *reg_base; static struct clk_onecell_data clk_data; @@ -71,7 +71,7 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev) const char *mout_audss_p[2]; const char *mout_i2s_p[3]; const char *hclk_p; - struct clk *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio; + struct clk_core *hclk, *pll_ref, *pll_in, *cdclk, *sclk_audio; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); reg_base = devm_ioremap_resource(&pdev->dev, res); @@ -81,7 +81,7 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev) } clk_table = devm_kzalloc(&pdev->dev, - sizeof(struct clk *) * AUDSS_MAX_CLKS, + sizeof(struct clk_core *) * AUDSS_MAX_CLKS, GFP_KERNEL); if (!clk_table) return -ENOMEM; @@ -89,27 +89,27 @@ static int s5pv210_audss_clk_probe(struct platform_device *pdev) clk_data.clks = clk_table; clk_data.clk_num = AUDSS_MAX_CLKS; - hclk = devm_clk_get(&pdev->dev, "hclk"); + hclk = devm_clk_provider_get(&pdev->dev, "hclk"); if (IS_ERR(hclk)) { dev_err(&pdev->dev, "failed to get hclk clock\n"); return PTR_ERR(hclk); } - pll_in = devm_clk_get(&pdev->dev, "fout_epll"); + pll_in = devm_clk_provider_get(&pdev->dev, "fout_epll"); if (IS_ERR(pll_in)) { dev_err(&pdev->dev, "failed to get fout_epll clock\n"); return PTR_ERR(pll_in); } - sclk_audio = devm_clk_get(&pdev->dev, "sclk_audio0"); + sclk_audio = devm_clk_provider_get(&pdev->dev, "sclk_audio0"); if (IS_ERR(sclk_audio)) { dev_err(&pdev->dev, "failed to get sclk_audio0 clock\n"); return PTR_ERR(sclk_audio); } /* iiscdclk0 is an optional external I2S codec clock */ - cdclk = devm_clk_get(&pdev->dev, "iiscdclk0"); - pll_ref = devm_clk_get(&pdev->dev, "xxti"); + cdclk = devm_clk_provider_get(&pdev->dev, "iiscdclk0"); + pll_ref = devm_clk_provider_get(&pdev->dev, "xxti"); if (!IS_ERR(pll_ref)) mout_audss_p[0] = __clk_get_name(pll_ref); diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c index deab84d..68133fa 100644 --- a/drivers/clk/samsung/clk.c +++ b/drivers/clk/samsung/clk.c @@ -52,14 +52,14 @@ struct samsung_clk_provider *__init samsung_clk_init(struct device_node *np, void __iomem *base, unsigned long nr_clks) { struct samsung_clk_provider *ctx; - struct clk **clk_table; + struct clk_core **clk_table; int i; ctx = kzalloc(sizeof(struct samsung_clk_provider), GFP_KERNEL); if (!ctx) panic("could not allocate clock provider context.\n"); - clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL); + clk_table = kcalloc(nr_clks, sizeof(struct clk_core *), GFP_KERNEL); if (!clk_table) panic("could not allocate clock lookup table\n"); @@ -85,7 +85,7 @@ void __init samsung_clk_of_add_provider(struct device_node *np, } /* add a clock instance to the clock lookup table used for dt based lookup */ -void samsung_clk_add_lookup(struct samsung_clk_provider *ctx, struct clk *clk, +void samsung_clk_add_lookup(struct samsung_clk_provider *ctx, struct clk_core *clk, unsigned int id) { if (ctx->clk_data.clks && id) @@ -97,7 +97,7 @@ void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx, struct samsung_clock_alias *list, unsigned int nr_clk) { - struct clk *clk; + struct clk_core *clk; unsigned int idx, ret; if (!ctx->clk_data.clks) { @@ -130,7 +130,7 @@ void __init samsung_clk_register_alias(struct samsung_clk_provider *ctx, void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx, struct samsung_fixed_rate_clock *list, unsigned int nr_clk) { - struct clk *clk; + struct clk_core *clk; unsigned int idx, ret; for (idx = 0; idx < nr_clk; idx++, list++) { @@ -159,7 +159,7 @@ void __init samsung_clk_register_fixed_rate(struct samsung_clk_provider *ctx, void __init samsung_clk_register_fixed_factor(struct samsung_clk_provider *ctx, struct samsung_fixed_factor_clock *list, unsigned int nr_clk) { - struct clk *clk; + struct clk_core *clk; unsigned int idx; for (idx = 0; idx < nr_clk; idx++, list++) { @@ -180,7 +180,7 @@ void __init samsung_clk_register_mux(struct samsung_clk_provider *ctx, struct samsung_mux_clock *list, unsigned int nr_clk) { - struct clk *clk; + struct clk_core *clk; unsigned int idx, ret; for (idx = 0; idx < nr_clk; idx++, list++) { @@ -212,7 +212,7 @@ void __init samsung_clk_register_div(struct samsung_clk_provider *ctx, struct samsung_div_clock *list, unsigned int nr_clk) { - struct clk *clk; + struct clk_core *clk; unsigned int idx, ret; for (idx = 0; idx < nr_clk; idx++, list++) { @@ -251,7 +251,7 @@ void __init samsung_clk_register_gate(struct samsung_clk_provider *ctx, struct samsung_gate_clock *list, unsigned int nr_clk) { - struct clk *clk; + struct clk_core *clk; unsigned int idx, ret; for (idx = 0; idx < nr_clk; idx++, list++) { @@ -303,7 +303,7 @@ void __init samsung_clk_of_register_fixed_ext(struct samsung_clk_provider *ctx, /* utility function to get the rate of a specified clock */ unsigned long _get_rate(const char *clk_name) { - struct clk *clk; + struct clk_core *clk; clk = __clk_lookup(clk_name); if (!clk) { @@ -311,5 +311,5 @@ unsigned long _get_rate(const char *clk_name) return 0; } - return clk_get_rate(clk); + return clk_provider_get_rate(clk); } diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h index 66ab36b..58b1215 100644 --- a/drivers/clk/samsung/clk.h +++ b/drivers/clk/samsung/clk.h @@ -13,7 +13,6 @@ #ifndef __SAMSUNG_CLK_H #define __SAMSUNG_CLK_H -#include #include #include #include @@ -336,7 +335,7 @@ extern void __init samsung_clk_of_register_fixed_ext( const struct of_device_id *clk_matches); extern void samsung_clk_add_lookup(struct samsung_clk_provider *ctx, - struct clk *clk, unsigned int id); + struct clk_core *clk, unsigned int id); extern void samsung_clk_register_alias(struct samsung_clk_provider *ctx, struct samsung_clock_alias *list, diff --git a/drivers/clk/shmobile/clk-div6.c b/drivers/clk/shmobile/clk-div6.c index f065f69..c6712fb 100644 --- a/drivers/clk/shmobile/clk-div6.c +++ b/drivers/clk/shmobile/clk-div6.c @@ -119,7 +119,7 @@ static void __init cpg_div6_clock_init(struct device_node *np) struct div6_clock *clock; const char *parent_name; const char *name; - struct clk *clk; + struct clk_core *clk; int ret; clock = kzalloc(sizeof(*clock), GFP_KERNEL); diff --git a/drivers/clk/shmobile/clk-emev2.c b/drivers/clk/shmobile/clk-emev2.c index 6c7c929..2e3a45b 100644 --- a/drivers/clk/shmobile/clk-emev2.c +++ b/drivers/clk/shmobile/clk-emev2.c @@ -71,7 +71,7 @@ static void __init emev2_smu_init(void) static void __init emev2_smu_clkdiv_init(struct device_node *np) { u32 reg[2]; - struct clk *clk; + struct clk_core *clk; const char *parent_name = of_clk_get_parent_name(np, 0); if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2))) return; @@ -89,7 +89,7 @@ CLK_OF_DECLARE(emev2_smu_clkdiv, "renesas,emev2-smu-clkdiv", static void __init emev2_smu_gclk_init(struct device_node *np) { u32 reg[2]; - struct clk *clk; + struct clk_core *clk; const char *parent_name = of_clk_get_parent_name(np, 0); if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2))) return; diff --git a/drivers/clk/shmobile/clk-mstp.c b/drivers/clk/shmobile/clk-mstp.c index 2d2fe77..2659676 100644 --- a/drivers/clk/shmobile/clk-mstp.c +++ b/drivers/clk/shmobile/clk-mstp.c @@ -121,13 +121,13 @@ static const struct clk_ops cpg_mstp_clock_ops = { .is_enabled = cpg_mstp_clock_is_enabled, }; -static struct clk * __init +static struct clk_core * __init cpg_mstp_clock_register(const char *name, const char *parent_name, unsigned int index, struct mstp_clock_group *group) { struct clk_init_data init; struct mstp_clock *clock; - struct clk *clk; + struct clk_core *clk; clock = kzalloc(sizeof(*clock), GFP_KERNEL); if (!clock) { @@ -157,7 +157,7 @@ static void __init cpg_mstp_clocks_init(struct device_node *np) { struct mstp_clock_group *group; const char *idxname; - struct clk **clks; + struct clk_core **clks; unsigned int i; group = kzalloc(sizeof(*group), GFP_KERNEL); diff --git a/drivers/clk/shmobile/clk-r8a7740.c b/drivers/clk/shmobile/clk-r8a7740.c index 1e2eaae..8889e6a 100644 --- a/drivers/clk/shmobile/clk-r8a7740.c +++ b/drivers/clk/shmobile/clk-r8a7740.c @@ -61,7 +61,7 @@ static const struct clk_div_table div4_div_table[] = { static u32 cpg_mode __initdata; -static struct clk * __init +static struct clk_core * __init r8a7740_cpg_register_clock(struct device_node *np, struct r8a7740_cpg *cpg, const char *name) { @@ -147,7 +147,7 @@ r8a7740_cpg_register_clock(struct device_node *np, struct r8a7740_cpg *cpg, static void __init r8a7740_cpg_clocks_init(struct device_node *np) { struct r8a7740_cpg *cpg; - struct clk **clks; + struct clk_core **clks; unsigned int i; int num_clks; @@ -180,7 +180,7 @@ static void __init r8a7740_cpg_clocks_init(struct device_node *np) for (i = 0; i < num_clks; ++i) { const char *name; - struct clk *clk; + struct clk_core *clk; of_property_read_string_index(np, "clock-output-names", i, &name); diff --git a/drivers/clk/shmobile/clk-r8a7779.c b/drivers/clk/shmobile/clk-r8a7779.c index 652ecac..96b51b1 100644 --- a/drivers/clk/shmobile/clk-r8a7779.c +++ b/drivers/clk/shmobile/clk-r8a7779.c @@ -90,7 +90,7 @@ static const unsigned int cpg_plla_mult[4] __initconst = { 42, 48, 56, 64 }; static u32 cpg_mode __initdata; -static struct clk * __init +static struct clk_core * __init r8a7779_cpg_register_clock(struct device_node *np, struct r8a7779_cpg *cpg, const struct cpg_clk_config *config, unsigned int plla_mult, const char *name) @@ -124,7 +124,7 @@ static void __init r8a7779_cpg_clocks_init(struct device_node *np) { const struct cpg_clk_config *config; struct r8a7779_cpg *cpg; - struct clk **clks; + struct clk_core **clks; unsigned int i, plla_mult; int num_clks; @@ -153,7 +153,7 @@ static void __init r8a7779_cpg_clocks_init(struct device_node *np) for (i = 0; i < num_clks; ++i) { const char *name; - struct clk *clk; + struct clk_core *clk; of_property_read_string_index(np, "clock-output-names", i, &name); diff --git a/drivers/clk/shmobile/clk-rcar-gen2.c b/drivers/clk/shmobile/clk-rcar-gen2.c index e996425..45a0712 100644 --- a/drivers/clk/shmobile/clk-rcar-gen2.c +++ b/drivers/clk/shmobile/clk-rcar-gen2.c @@ -133,12 +133,12 @@ static const struct clk_ops cpg_z_clk_ops = { .set_rate = cpg_z_clk_set_rate, }; -static struct clk * __init cpg_z_clk_register(struct rcar_gen2_cpg *cpg) +static struct clk_core * __init cpg_z_clk_register(struct rcar_gen2_cpg *cpg) { static const char *parent_name = "pll0"; struct clk_init_data init; struct cpg_z_clk *zclk; - struct clk *clk; + struct clk_core *clk; zclk = kzalloc(sizeof(*zclk), GFP_KERNEL); if (!zclk) @@ -213,7 +213,7 @@ static const struct clk_div_table cpg_sd01_div_table[] = { static u32 cpg_mode __initdata; -static struct clk * __init +static struct clk_core * __init rcar_gen2_cpg_register_clock(struct device_node *np, struct rcar_gen2_cpg *cpg, const struct cpg_pll_config *config, const char *name) @@ -280,7 +280,7 @@ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np) { const struct cpg_pll_config *config; struct rcar_gen2_cpg *cpg; - struct clk **clks; + struct clk_core **clks; unsigned int i; int num_clks; @@ -313,7 +313,7 @@ static void __init rcar_gen2_cpg_clocks_init(struct device_node *np) for (i = 0; i < num_clks; ++i) { const char *name; - struct clk *clk; + struct clk_core *clk; of_property_read_string_index(np, "clock-output-names", i, &name); diff --git a/drivers/clk/shmobile/clk-rz.c b/drivers/clk/shmobile/clk-rz.c index 7e68e86..414e20e 100644 --- a/drivers/clk/shmobile/clk-rz.c +++ b/drivers/clk/shmobile/clk-rz.c @@ -28,7 +28,7 @@ struct rz_cpg { * Initialization */ -static struct clk * __init +static struct clk_core * __init rz_cpg_register_clock(struct device_node *np, struct rz_cpg *cpg, const char *name) { u32 val; @@ -67,7 +67,7 @@ rz_cpg_register_clock(struct device_node *np, struct rz_cpg *cpg, const char *na static void __init rz_cpg_clocks_init(struct device_node *np) { struct rz_cpg *cpg; - struct clk **clks; + struct clk_core **clks; unsigned i; int num_clks; @@ -86,7 +86,7 @@ static void __init rz_cpg_clocks_init(struct device_node *np) for (i = 0; i < num_clks; ++i) { const char *name; - struct clk *clk; + struct clk_core *clk; of_property_read_string_index(np, "clock-output-names", i, &name); diff --git a/drivers/clk/sirf/clk-atlas6.c b/drivers/clk/sirf/clk-atlas6.c index d63b76c..3b07a02 100644 --- a/drivers/clk/sirf/clk-atlas6.c +++ b/drivers/clk/sirf/clk-atlas6.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include @@ -113,7 +112,7 @@ static __initdata struct clk_hw *atlas6_clk_hw_array[maxclk] = { &clk_cphif.hw, }; -static struct clk *atlas6_clks[maxclk]; +static struct clk_core *atlas6_clks[maxclk]; static void __init atlas6_clk_init(struct device_node *np) { diff --git a/drivers/clk/sirf/clk-common.c b/drivers/clk/sirf/clk-common.c index 37af51c..05f5040 100644 --- a/drivers/clk/sirf/clk-common.c +++ b/drivers/clk/sirf/clk-common.c @@ -165,9 +165,9 @@ static long cpu_clk_round_rate(struct clk_hw *hw, unsigned long rate, * SiRF SoC has not cpu clock control, * So bypass to it's parent pll. */ - struct clk *parent_clk = clk_get_parent(hw->clk); - struct clk *pll_parent_clk = clk_get_parent(parent_clk); - unsigned long pll_parent_rate = clk_get_rate(pll_parent_clk); + struct clk_core *parent_clk = clk_provider_get_parent(hw->clk); + struct clk_core *pll_parent_clk = clk_provider_get_parent(parent_clk); + unsigned long pll_parent_rate = clk_provider_get_rate(pll_parent_clk); return pll_clk_round_rate(__clk_get_hw(parent_clk), rate, &pll_parent_rate); } @@ -178,7 +178,7 @@ static unsigned long cpu_clk_recalc_rate(struct clk_hw *hw, * SiRF SoC has not cpu clock control, * So return the parent pll rate. */ - struct clk *parent_clk = clk_get_parent(hw->clk); + struct clk_core *parent_clk = clk_provider_get_parent(hw->clk); return __clk_get_rate(parent_clk); } @@ -403,34 +403,34 @@ static int cpu_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { int ret1, ret2; - struct clk *cur_parent; + struct clk_core *cur_parent; - if (rate == clk_get_rate(clk_pll1.hw.clk)) { - ret1 = clk_set_parent(hw->clk, clk_pll1.hw.clk); + if (rate == clk_provider_get_rate(clk_pll1.hw.clk)) { + ret1 = clk_provider_set_parent(hw->clk, clk_pll1.hw.clk); return ret1; } - if (rate == clk_get_rate(clk_pll2.hw.clk)) { - ret1 = clk_set_parent(hw->clk, clk_pll2.hw.clk); + if (rate == clk_provider_get_rate(clk_pll2.hw.clk)) { + ret1 = clk_provider_set_parent(hw->clk, clk_pll2.hw.clk); return ret1; } - if (rate == clk_get_rate(clk_pll3.hw.clk)) { - ret1 = clk_set_parent(hw->clk, clk_pll3.hw.clk); + if (rate == clk_provider_get_rate(clk_pll3.hw.clk)) { + ret1 = clk_provider_set_parent(hw->clk, clk_pll3.hw.clk); return ret1; } - cur_parent = clk_get_parent(hw->clk); + cur_parent = clk_provider_get_parent(hw->clk); /* switch to tmp pll before setting parent clock's rate */ if (cur_parent == clk_pll1.hw.clk) { - ret1 = clk_set_parent(hw->clk, clk_pll2.hw.clk); + ret1 = clk_provider_set_parent(hw->clk, clk_pll2.hw.clk); BUG_ON(ret1); } - ret2 = clk_set_rate(clk_pll1.hw.clk, rate); + ret2 = clk_provider_set_rate(clk_pll1.hw.clk, rate); - ret1 = clk_set_parent(hw->clk, clk_pll1.hw.clk); + ret1 = clk_provider_set_parent(hw->clk, clk_pll1.hw.clk); return ret2 ? ret2 : ret1; } diff --git a/drivers/clk/sirf/clk-prima2.c b/drivers/clk/sirf/clk-prima2.c index 6968e2e..869bc8c 100644 --- a/drivers/clk/sirf/clk-prima2.c +++ b/drivers/clk/sirf/clk-prima2.c @@ -10,7 +10,6 @@ #include #include #include -#include #include #include #include @@ -112,7 +111,7 @@ static __initdata struct clk_hw *prima2_clk_hw_array[maxclk] = { &clk_cphif.hw, }; -static struct clk *prima2_clks[maxclk]; +static struct clk_core *prima2_clks[maxclk]; static void __init prima2_clk_init(struct device_node *np) { diff --git a/drivers/clk/socfpga/clk-gate.c b/drivers/clk/socfpga/clk-gate.c index dd3a78c..5d00dee 100644 --- a/drivers/clk/socfpga/clk-gate.c +++ b/drivers/clk/socfpga/clk-gate.c @@ -15,7 +15,6 @@ * Based from clk-highbank.c * */ -#include #include #include #include @@ -188,7 +187,7 @@ static void __init __socfpga_gate_init(struct device_node *node, u32 div_reg[3]; u32 clk_phase[2]; u32 fixed_div; - struct clk *clk; + struct clk_core *clk; struct socfpga_gate_clk *socfpga_clk; const char *clk_name = node->name; const char *parent_name[SOCFPGA_MAX_PARENTS]; diff --git a/drivers/clk/socfpga/clk-periph.c b/drivers/clk/socfpga/clk-periph.c index 46531c3..1bcb275 100644 --- a/drivers/clk/socfpga/clk-periph.c +++ b/drivers/clk/socfpga/clk-periph.c @@ -15,7 +15,6 @@ * Based from clk-highbank.c * */ -#include #include #include #include @@ -53,7 +52,7 @@ static __init void __socfpga_periph_init(struct device_node *node, const struct clk_ops *ops) { u32 reg; - struct clk *clk; + struct clk_core *clk; struct socfpga_periph_clk *periph_clk; const char *clk_name = node->name; const char *parent_name; diff --git a/drivers/clk/socfpga/clk-pll.c b/drivers/clk/socfpga/clk-pll.c index de6da95..ba7073f 100644 --- a/drivers/clk/socfpga/clk-pll.c +++ b/drivers/clk/socfpga/clk-pll.c @@ -15,7 +15,6 @@ * Based from clk-highbank.c * */ -#include #include #include #include @@ -81,11 +80,11 @@ static struct clk_ops clk_pll_ops = { .get_parent = clk_pll_get_parent, }; -static __init struct clk *__socfpga_pll_init(struct device_node *node, +static __init struct clk_core *__socfpga_pll_init(struct device_node *node, const struct clk_ops *ops) { u32 reg; - struct clk *clk; + struct clk_core *clk; struct socfpga_pll *pll_clk; const char *clk_name = node->name; const char *parent_name[SOCFPGA_MAX_PARENTS]; diff --git a/drivers/clk/spear/clk-aux-synth.c b/drivers/clk/spear/clk-aux-synth.c index bdfb442..18334c3 100644 --- a/drivers/clk/spear/clk-aux-synth.c +++ b/drivers/clk/spear/clk-aux-synth.c @@ -134,14 +134,14 @@ static struct clk_ops clk_aux_ops = { .set_rate = clk_aux_set_rate, }; -struct clk *clk_register_aux(const char *aux_name, const char *gate_name, +struct clk_core *clk_register_aux(const char *aux_name, const char *gate_name, const char *parent_name, unsigned long flags, void __iomem *reg, struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl, - u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk) + u8 rtbl_cnt, spinlock_t *lock, struct clk_core **gate_clk) { struct clk_aux *aux; struct clk_init_data init; - struct clk *clk; + struct clk_core *clk; if (!aux_name || !parent_name || !reg || !rtbl || !rtbl_cnt) { pr_err("Invalid arguments passed"); @@ -177,7 +177,7 @@ struct clk *clk_register_aux(const char *aux_name, const char *gate_name, goto free_aux; if (gate_name) { - struct clk *tgate_clk; + struct clk_core *tgate_clk; tgate_clk = clk_register_gate(NULL, gate_name, aux_name, CLK_SET_RATE_PARENT, reg, diff --git a/drivers/clk/spear/clk-frac-synth.c b/drivers/clk/spear/clk-frac-synth.c index dffd4ce..bce2c0e 100644 --- a/drivers/clk/spear/clk-frac-synth.c +++ b/drivers/clk/spear/clk-frac-synth.c @@ -122,13 +122,13 @@ static struct clk_ops clk_frac_ops = { .set_rate = clk_frac_set_rate, }; -struct clk *clk_register_frac(const char *name, const char *parent_name, +struct clk_core *clk_register_frac(const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock) { struct clk_init_data init; struct clk_frac *frac; - struct clk *clk; + struct clk_core *clk; if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) { pr_err("Invalid arguments passed"); diff --git a/drivers/clk/spear/clk-gpt-synth.c b/drivers/clk/spear/clk-gpt-synth.c index 1afc18c..f8e13f3 100644 --- a/drivers/clk/spear/clk-gpt-synth.c +++ b/drivers/clk/spear/clk-gpt-synth.c @@ -111,13 +111,13 @@ static struct clk_ops clk_gpt_ops = { .set_rate = clk_gpt_set_rate, }; -struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned +struct clk_core *clk_register_gpt(const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, struct gpt_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock) { struct clk_init_data init; struct clk_gpt *gpt; - struct clk *clk; + struct clk_core *clk; if (!name || !parent_name || !reg || !rtbl || !rtbl_cnt) { pr_err("Invalid arguments passed"); diff --git a/drivers/clk/spear/clk-vco-pll.c b/drivers/clk/spear/clk-vco-pll.c index 1b9b65b..226f2ec 100644 --- a/drivers/clk/spear/clk-vco-pll.c +++ b/drivers/clk/spear/clk-vco-pll.c @@ -272,16 +272,16 @@ static struct clk_ops clk_vco_ops = { .set_rate = clk_vco_set_rate, }; -struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name, +struct clk_core *clk_register_vco_pll(const char *vco_name, const char *pll_name, const char *vco_gate_name, const char *parent_name, unsigned long flags, void __iomem *mode_reg, void __iomem *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt, - spinlock_t *lock, struct clk **pll_clk, - struct clk **vco_gate_clk) + spinlock_t *lock, struct clk_core **pll_clk, + struct clk_core **vco_gate_clk) { struct clk_vco *vco; struct clk_pll *pll; - struct clk *vco_clk, *tpll_clk, *tvco_gate_clk; + struct clk_core *vco_clk, *tpll_clk, *tvco_gate_clk; struct clk_init_data vco_init, pll_init; const char **vco_parent_name; diff --git a/drivers/clk/spear/clk.h b/drivers/clk/spear/clk.h index 9317376..777322e 100644 --- a/drivers/clk/spear/clk.h +++ b/drivers/clk/spear/clk.h @@ -110,22 +110,22 @@ typedef unsigned long (*clk_calc_rate)(struct clk_hw *hw, unsigned long prate, int index); /* clk register routines */ -struct clk *clk_register_aux(const char *aux_name, const char *gate_name, +struct clk_core *clk_register_aux(const char *aux_name, const char *gate_name, const char *parent_name, unsigned long flags, void __iomem *reg, struct aux_clk_masks *masks, struct aux_rate_tbl *rtbl, - u8 rtbl_cnt, spinlock_t *lock, struct clk **gate_clk); -struct clk *clk_register_frac(const char *name, const char *parent_name, + u8 rtbl_cnt, spinlock_t *lock, struct clk_core **gate_clk); +struct clk_core *clk_register_frac(const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, struct frac_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock); -struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned +struct clk_core *clk_register_gpt(const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, struct gpt_rate_tbl *rtbl, u8 rtbl_cnt, spinlock_t *lock); -struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name, +struct clk_core *clk_register_vco_pll(const char *vco_name, const char *pll_name, const char *vco_gate_name, const char *parent_name, unsigned long flags, void __iomem *mode_reg, void __iomem *cfg_reg, struct pll_rate_tbl *rtbl, u8 rtbl_cnt, - spinlock_t *lock, struct clk **pll_clk, - struct clk **vco_gate_clk); + spinlock_t *lock, struct clk_core **pll_clk, + struct clk_core **vco_gate_clk); long clk_round_rate_index(struct clk_hw *hw, unsigned long drate, unsigned long parent_rate, clk_calc_rate calc_rate, u8 rtbl_cnt, diff --git a/drivers/clk/spear/spear1310_clock.c b/drivers/clk/spear/spear1310_clock.c index 4daa597..58206e0 100644 --- a/drivers/clk/spear/spear1310_clock.c +++ b/drivers/clk/spear/spear1310_clock.c @@ -11,7 +11,6 @@ * warranty of any kind, whether express or implied. */ -#include #include #include #include @@ -385,7 +384,7 @@ static const char *tdm_parents[] = { "ras_pll3_clk", "gen_syn1_clk", }; void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base) { - struct clk *clk, *clk1; + struct clk_core *clk, *clk1; clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, 32000); diff --git a/drivers/clk/spear/spear1340_clock.c b/drivers/clk/spear/spear1340_clock.c index 5a5c664..704301c 100644 --- a/drivers/clk/spear/spear1340_clock.c +++ b/drivers/clk/spear/spear1340_clock.c @@ -11,7 +11,6 @@ * warranty of any kind, whether express or implied. */ -#include #include #include #include @@ -442,7 +441,7 @@ static const char *gen_synth2_3_parents[] = { "vco1div4_clk", "vco2div2_clk", void __init spear1340_clk_init(void __iomem *misc_base) { - struct clk *clk, *clk1; + struct clk_core *clk, *clk1; clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, 32000); diff --git a/drivers/clk/spear/spear3xx_clock.c b/drivers/clk/spear/spear3xx_clock.c index bb5f387..40d1b08 100644 --- a/drivers/clk/spear/spear3xx_clock.c +++ b/drivers/clk/spear/spear3xx_clock.c @@ -9,7 +9,6 @@ * warranty of any kind, whether express or implied. */ -#include #include #include #include @@ -140,7 +139,7 @@ static const char *ddr_parents[] = { "ahb_clk", "ahbmult2_clk", "none", #ifdef CONFIG_MACH_SPEAR300 static void __init spear300_clk_init(void) { - struct clk *clk; + struct clk_core *clk; clk = clk_register_fixed_factor(NULL, "clcd_clk", "ras_pll3_clk", 0, 1, 1); @@ -170,7 +169,7 @@ static inline void spear300_clk_init(void) { } #ifdef CONFIG_MACH_SPEAR310 static void __init spear310_clk_init(void) { - struct clk *clk; + struct clk_core *clk; clk = clk_register_fixed_factor(NULL, "emi_clk", "ras_ahb_clk", 0, 1, 1); @@ -246,9 +245,9 @@ static const char *smii0_parents[] = { "smii_125m_pad", "ras_pll2_clk", static const char *uartx_parents[] = { "ras_syn1_gclk", "ras_apb_clk", }; static void __init spear320_clk_init(void __iomem *soc_config_base, - struct clk *ras_apb_clk) + struct clk_core *ras_apb_clk) { - struct clk *clk; + struct clk_core *clk; clk = clk_register_fixed_rate(NULL, "smii_125m_pad_clk", NULL, CLK_IS_ROOT, 125000000); @@ -344,7 +343,7 @@ static void __init spear320_clk_init(void __iomem *soc_config_base, 0, &_lock); clk_register_clkdev(clk, NULL, "a3000000.serial"); /* Enforce ras_apb_clk */ - clk_set_parent(clk, ras_apb_clk); + clk_provider_set_parent(clk, ras_apb_clk); clk = clk_register_mux(NULL, "uart2_clk", uartx_parents, ARRAY_SIZE(uartx_parents), @@ -353,7 +352,7 @@ static void __init spear320_clk_init(void __iomem *soc_config_base, SPEAR320_UARTX_PCLK_MASK, 0, &_lock); clk_register_clkdev(clk, NULL, "a4000000.serial"); /* Enforce ras_apb_clk */ - clk_set_parent(clk, ras_apb_clk); + clk_provider_set_parent(clk, ras_apb_clk); clk = clk_register_mux(NULL, "uart3_clk", uartx_parents, ARRAY_SIZE(uartx_parents), @@ -384,12 +383,12 @@ static void __init spear320_clk_init(void __iomem *soc_config_base, clk_register_clkdev(clk, NULL, "60100000.serial"); } #else -static inline void spear320_clk_init(void __iomem *sb, struct clk *rc) { } +static inline void spear320_clk_init(void __iomem *sb, struct clk_core *rc) { } #endif void __init spear3xx_clk_init(void __iomem *misc_base, void __iomem *soc_config_base) { - struct clk *clk, *clk1, *ras_apb_clk; + struct clk_core *clk, *clk1, *ras_apb_clk; clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, 32000); diff --git a/drivers/clk/spear/spear6xx_clock.c b/drivers/clk/spear/spear6xx_clock.c index 4f649c9..364a8d3 100644 --- a/drivers/clk/spear/spear6xx_clock.c +++ b/drivers/clk/spear/spear6xx_clock.c @@ -9,7 +9,6 @@ * warranty of any kind, whether express or implied. */ -#include #include #include #include @@ -116,7 +115,7 @@ static struct gpt_rate_tbl gpt_rtbl[] = { void __init spear6xx_clk_init(void __iomem *misc_base) { - struct clk *clk, *clk1; + struct clk_core *clk, *clk1; clk = clk_register_fixed_rate(NULL, "osc_32k_clk", NULL, CLK_IS_ROOT, 32000); diff --git a/drivers/clk/st/clk-flexgen.c b/drivers/clk/st/clk-flexgen.c index 2282cef..699f7a1 100644 --- a/drivers/clk/st/clk-flexgen.c +++ b/drivers/clk/st/clk-flexgen.c @@ -163,12 +163,12 @@ static const struct clk_ops flexgen_ops = { .set_rate = flexgen_set_rate, }; -struct clk *clk_register_flexgen(const char *name, +struct clk_core *clk_register_flexgen(const char *name, const char **parent_names, u8 num_parents, void __iomem *reg, spinlock_t *lock, u32 idx, unsigned long flexgen_flags) { struct flexgen *fgxbar; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; u32 xbar_shift; void __iomem *xbar_reg, *fdiv_reg; @@ -223,8 +223,8 @@ struct clk *clk_register_flexgen(const char *name, else pr_debug("%s: parent %s rate %u\n", __clk_get_name(clk), - __clk_get_name(clk_get_parent(clk)), - (unsigned int)clk_get_rate(clk)); + __clk_get_name(clk_provider_get_parent(clk)), + (unsigned int)clk_provider_get_rate(clk)); return clk; } @@ -283,7 +283,7 @@ void __init st_of_flexgen_setup(struct device_node *np) goto err; } - clk_data->clks = kcalloc(clk_data->clk_num, sizeof(struct clk *), + clk_data->clks = kcalloc(clk_data->clk_num, sizeof(struct clk_core *), GFP_KERNEL); if (!clk_data->clks) goto err; @@ -293,7 +293,7 @@ void __init st_of_flexgen_setup(struct device_node *np) goto err; for (i = 0; i < clk_data->clk_num; i++) { - struct clk *clk; + struct clk_core *clk; const char *clk_name; if (of_property_read_string_index(np, "clock-output-names", diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c index af94ed8..ceda1f2 100644 --- a/drivers/clk/st/clkgen-fsyn.c +++ b/drivers/clk/st/clkgen-fsyn.c @@ -614,13 +614,13 @@ static const struct clk_ops st_quadfs_pll_c32_ops = { .set_rate = quadfs_pll_fs660c32_set_rate, }; -static struct clk * __init st_clk_register_quadfs_pll( +static struct clk_core * __init st_clk_register_quadfs_pll( const char *name, const char *parent_name, struct clkgen_quadfs_data *quadfs, void __iomem *reg, spinlock_t *lock) { struct st_clk_quadfs_pll *pll; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; /* @@ -1018,13 +1018,13 @@ static const struct clk_ops st_quadfs_ops = { .recalc_rate = quadfs_recalc_rate, }; -static struct clk * __init st_clk_register_quadfs_fsynth( +static struct clk_core * __init st_clk_register_quadfs_fsynth( const char *name, const char *parent_name, struct clkgen_quadfs_data *quadfs, void __iomem *reg, u32 chan, spinlock_t *lock) { struct st_clk_quadfs_fsynth *fs; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; /* @@ -1102,7 +1102,7 @@ static void __init st_of_create_quadfs_fsynths( return; clk_data->clk_num = QUADFS_MAX_CHAN; - clk_data->clks = kzalloc(QUADFS_MAX_CHAN * sizeof(struct clk *), + clk_data->clks = kzalloc(QUADFS_MAX_CHAN * sizeof(struct clk_core *), GFP_KERNEL); if (!clk_data->clks) { @@ -1111,7 +1111,7 @@ static void __init st_of_create_quadfs_fsynths( } for (fschan = 0; fschan < QUADFS_MAX_CHAN; fschan++) { - struct clk *clk; + struct clk_core *clk; const char *clk_name; if (of_property_read_string_index(np, "clock-output-names", @@ -1136,8 +1136,8 @@ static void __init st_of_create_quadfs_fsynths( clk_data->clks[fschan] = clk; pr_debug("%s: parent %s rate %u\n", __clk_get_name(clk), - __clk_get_name(clk_get_parent(clk)), - (unsigned int)clk_get_rate(clk)); + __clk_get_name(clk_provider_get_parent(clk)), + (unsigned int)clk_provider_get_rate(clk)); } } @@ -1147,7 +1147,7 @@ static void __init st_of_create_quadfs_fsynths( static void __init st_of_quadfs_setup(struct device_node *np) { const struct of_device_id *match; - struct clk *clk; + struct clk_core *clk; const char *pll_name, *clk_parent_name; void __iomem *reg; spinlock_t *lock; @@ -1181,8 +1181,8 @@ static void __init st_of_quadfs_setup(struct device_node *np) else pr_debug("%s: parent %s rate %u\n", __clk_get_name(clk), - __clk_get_name(clk_get_parent(clk)), - (unsigned int)clk_get_rate(clk)); + __clk_get_name(clk_provider_get_parent(clk)), + (unsigned int)clk_provider_get_rate(clk)); st_of_create_quadfs_fsynths(np, pll_name, (struct clkgen_quadfs_data *)match->data, diff --git a/drivers/clk/st/clkgen-mux.c b/drivers/clk/st/clkgen-mux.c index 79dc40b..d2a951f 100644 --- a/drivers/clk/st/clkgen-mux.c +++ b/drivers/clk/st/clkgen-mux.c @@ -215,7 +215,7 @@ static const struct clk_ops clkgena_divmux_ops = { /** * clk_register_genamux - register a genamux clock with the clock framework */ -struct clk *clk_register_genamux(const char *name, +struct clk_core *clk_register_genamux(const char *name, const char **parent_names, u8 num_parents, void __iomem *reg, const struct clkgena_divmux_data *muxdata, @@ -227,7 +227,7 @@ struct clk *clk_register_genamux(const char *name, const int mux_width = 2; const int divider_width = 5; struct clkgena_divmux *genamux; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; int i; @@ -280,8 +280,8 @@ struct clk *clk_register_genamux(const char *name, pr_debug("%s: parent %s rate %lu\n", __clk_get_name(clk), - __clk_get_name(clk_get_parent(clk)), - clk_get_rate(clk)); + __clk_get_name(clk_provider_get_parent(clk)), + clk_provider_get_rate(clk)); err: return clk; } @@ -413,14 +413,14 @@ void __init st_of_clkgena_divmux_setup(struct device_node *np) goto err; clk_data->clk_num = data->num_outputs; - clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *), + clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *), GFP_KERNEL); if (!clk_data->clks) goto err; for (i = 0; i < clk_data->clk_num; i++) { - struct clk *clk; + struct clk_core *clk; const char *clk_name; if (of_property_read_string_index(np, "clock-output-names", @@ -490,7 +490,7 @@ void __init st_of_clkgena_prediv_setup(struct device_node *np) const struct of_device_id *match; void __iomem *reg; const char *parent_name, *clk_name; - struct clk *clk; + struct clk_core *clk; struct clkgena_prediv_data *data; match = of_match_node(clkgena_prediv_of_match, np); @@ -522,8 +522,8 @@ void __init st_of_clkgena_prediv_setup(struct device_node *np) of_clk_add_provider(np, of_clk_src_simple_get, clk); pr_debug("%s: parent %s rate %u\n", __clk_get_name(clk), - __clk_get_name(clk_get_parent(clk)), - (unsigned int)clk_get_rate(clk)); + __clk_get_name(clk_provider_get_parent(clk)), + (unsigned int)clk_provider_get_rate(clk)); return; } @@ -625,7 +625,7 @@ static struct of_device_id mux_of_match[] = { void __init st_of_clkgen_mux_setup(struct device_node *np) { const struct of_device_id *match; - struct clk *clk; + struct clk_core *clk; void __iomem *reg; const char **parents; int num_parents; @@ -662,8 +662,8 @@ void __init st_of_clkgen_mux_setup(struct device_node *np) pr_debug("%s: parent %s rate %u\n", __clk_get_name(clk), - __clk_get_name(clk_get_parent(clk)), - (unsigned int)clk_get_rate(clk)); + __clk_get_name(clk_provider_get_parent(clk)), + (unsigned int)clk_provider_get_rate(clk)); of_clk_add_provider(np, of_clk_src_simple_get, clk); @@ -726,14 +726,14 @@ void __init st_of_clkgen_vcc_setup(struct device_node *np) goto err; clk_data->clk_num = VCC_MAX_CHANNELS; - clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *), + clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *), GFP_KERNEL); if (!clk_data->clks) goto err; for (i = 0; i < clk_data->clk_num; i++) { - struct clk *clk; + struct clk_core *clk; const char *clk_name; struct clk_gate *gate; struct clk_divider *div; @@ -796,8 +796,8 @@ void __init st_of_clkgen_vcc_setup(struct device_node *np) pr_debug("%s: parent %s rate %u\n", __clk_get_name(clk), - __clk_get_name(clk_get_parent(clk)), - (unsigned int)clk_get_rate(clk)); + __clk_get_name(clk_provider_get_parent(clk)), + (unsigned int)clk_provider_get_rate(clk)); clk_data->clks[i] = clk; } diff --git a/drivers/clk/st/clkgen-pll.c b/drivers/clk/st/clkgen-pll.c index 29769d7..32bac02 100644 --- a/drivers/clk/st/clkgen-pll.c +++ b/drivers/clk/st/clkgen-pll.c @@ -390,13 +390,13 @@ static const struct clk_ops st_pll1200c32_ops = { .recalc_rate = recalc_stm_pll1200c32, }; -static struct clk * __init clkgen_pll_register(const char *parent_name, +static struct clk_core * __init clkgen_pll_register(const char *parent_name, struct clkgen_pll_data *pll_data, void __iomem *reg, const char *clk_name) { struct clkgen_pll *pll; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; pll = kzalloc(sizeof(*pll), GFP_KERNEL); @@ -422,16 +422,16 @@ static struct clk * __init clkgen_pll_register(const char *parent_name, pr_debug("%s: parent %s rate %lu\n", __clk_get_name(clk), - __clk_get_name(clk_get_parent(clk)), - clk_get_rate(clk)); + __clk_get_name(clk_provider_get_parent(clk)), + clk_provider_get_rate(clk)); return clk; } -static struct clk * __init clkgen_c65_lsdiv_register(const char *parent_name, +static struct clk_core * __init clkgen_c65_lsdiv_register(const char *parent_name, const char *clk_name) { - struct clk *clk; + struct clk_core *clk; clk = clk_register_fixed_factor(NULL, clk_name, parent_name, 0, 1, 2); if (IS_ERR(clk)) @@ -439,8 +439,8 @@ static struct clk * __init clkgen_c65_lsdiv_register(const char *parent_name, pr_debug("%s: parent %s rate %lu\n", __clk_get_name(clk), - __clk_get_name(clk_get_parent(clk)), - clk_get_rate(clk)); + __clk_get_name(clk_provider_get_parent(clk)), + clk_provider_get_rate(clk)); return clk; } @@ -484,7 +484,7 @@ static void __init clkgena_c65_pll_setup(struct device_node *np) return; clk_data->clk_num = num_pll_outputs; - clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *), + clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *), GFP_KERNEL); if (!clk_data->clks) @@ -543,14 +543,14 @@ err: CLK_OF_DECLARE(clkgena_c65_plls, "st,clkgena-plls-c65", clkgena_c65_pll_setup); -static struct clk * __init clkgen_odf_register(const char *parent_name, +static struct clk_core * __init clkgen_odf_register(const char *parent_name, void * __iomem reg, struct clkgen_pll_data *pll_data, int odf, spinlock_t *odf_lock, const char *odf_name) { - struct clk *clk; + struct clk_core *clk; unsigned long flags; struct clk_gate *gate; struct clk_divider *div; @@ -588,8 +588,8 @@ static struct clk * __init clkgen_odf_register(const char *parent_name, pr_debug("%s: parent %s rate %lu\n", __clk_get_name(clk), - __clk_get_name(clk_get_parent(clk)), - clk_get_rate(clk)); + __clk_get_name(clk_provider_get_parent(clk)), + clk_provider_get_rate(clk)); return clk; } @@ -640,7 +640,7 @@ static struct of_device_id c32_pll_of_match[] = { static void __init clkgen_c32_pll_setup(struct device_node *np) { const struct of_device_id *match; - struct clk *clk; + struct clk_core *clk; const char *parent_name, *pll_name; void __iomem *pll_base; int num_odfs, odf; @@ -676,14 +676,14 @@ static void __init clkgen_c32_pll_setup(struct device_node *np) return; clk_data->clk_num = num_odfs; - clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk *), + clk_data->clks = kzalloc(clk_data->clk_num * sizeof(struct clk_core *), GFP_KERNEL); if (!clk_data->clks) goto err; for (odf = 0; odf < num_odfs; odf++) { - struct clk *clk; + struct clk_core *clk; const char *clk_name; if (of_property_read_string_index(np, "clock-output-names", @@ -723,7 +723,7 @@ static struct of_device_id c32_gpu_pll_of_match[] = { static void __init clkgengpu_c32_pll_setup(struct device_node *np) { const struct of_device_id *match; - struct clk *clk; + struct clk_core *clk; const char *parent_name; void __iomem *reg; const char *clk_name; diff --git a/drivers/clk/sunxi/clk-a10-hosc.c b/drivers/clk/sunxi/clk-a10-hosc.c index 0481d5d..c5e4c41 100644 --- a/drivers/clk/sunxi/clk-a10-hosc.c +++ b/drivers/clk/sunxi/clk-a10-hosc.c @@ -25,7 +25,7 @@ static DEFINE_SPINLOCK(hosc_lock); static void __init sun4i_osc_clk_setup(struct device_node *node) { - struct clk *clk; + struct clk_core *clk; struct clk_fixed_rate *fixed; struct clk_gate *gate; const char *clk_name = node->name; diff --git a/drivers/clk/sunxi/clk-a20-gmac.c b/drivers/clk/sunxi/clk-a20-gmac.c index 5296fd6..63c7dd5 100644 --- a/drivers/clk/sunxi/clk-a20-gmac.c +++ b/drivers/clk/sunxi/clk-a20-gmac.c @@ -55,7 +55,7 @@ static DEFINE_SPINLOCK(gmac_lock); static void __init sun7i_a20_gmac_clk_setup(struct device_node *node) { - struct clk *clk; + struct clk_core *clk; struct clk_mux *mux; struct clk_gate *gate; const char *clk_name = node->name; diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c index 2057c8a..bb2d4b2 100644 --- a/drivers/clk/sunxi/clk-factors.c +++ b/drivers/clk/sunxi/clk-factors.c @@ -79,9 +79,9 @@ static long clk_factors_round_rate(struct clk_hw *hw, unsigned long rate, static long clk_factors_determine_rate(struct clk_hw *hw, unsigned long rate, unsigned long *best_parent_rate, - struct clk **best_parent_p) + struct clk_core **best_parent_p) { - struct clk *clk = hw->clk, *parent, *best_parent = NULL; + struct clk_core *clk = hw->clk, *parent, *best_parent = NULL; int i, num_parents; unsigned long parent_rate, best = 0, child_rate, best_child_rate = 0; diff --git a/drivers/clk/sunxi/clk-sun6i-apb0-gates.c b/drivers/clk/sunxi/clk-sun6i-apb0-gates.c index e10d052..f29b06e 100644 --- a/drivers/clk/sunxi/clk-sun6i-apb0-gates.c +++ b/drivers/clk/sunxi/clk-sun6i-apb0-gates.c @@ -74,7 +74,7 @@ static int sun6i_a31_apb0_gates_clk_probe(struct platform_device *pdev) /* Worst-case size approximation and memory allocation */ ngates = find_last_bit(data->mask, SUN6I_APB0_GATES_MAX_SIZE); clk_data->clks = devm_kcalloc(&pdev->dev, (ngates + 1), - sizeof(struct clk *), GFP_KERNEL); + sizeof(struct clk_core *), GFP_KERNEL); if (!clk_data->clks) return -ENOMEM; diff --git a/drivers/clk/sunxi/clk-sun6i-apb0.c b/drivers/clk/sunxi/clk-sun6i-apb0.c index 1fa2337..5e4649e 100644 --- a/drivers/clk/sunxi/clk-sun6i-apb0.c +++ b/drivers/clk/sunxi/clk-sun6i-apb0.c @@ -35,7 +35,7 @@ static int sun6i_a31_apb0_clk_probe(struct platform_device *pdev) const char *clk_parent; struct resource *r; void __iomem *reg; - struct clk *clk; + struct clk_core *clk; r = platform_get_resource(pdev, IORESOURCE_MEM, 0); reg = devm_ioremap_resource(&pdev->dev, r); diff --git a/drivers/clk/sunxi/clk-sun6i-ar100.c b/drivers/clk/sunxi/clk-sun6i-ar100.c index eca8ca0..984d5d0 100644 --- a/drivers/clk/sunxi/clk-sun6i-ar100.c +++ b/drivers/clk/sunxi/clk-sun6i-ar100.c @@ -46,7 +46,7 @@ static unsigned long ar100_recalc_rate(struct clk_hw *hw, static long ar100_determine_rate(struct clk_hw *hw, unsigned long rate, unsigned long *best_parent_rate, - struct clk **best_parent_clk) + struct clk_core **best_parent_clk) { int nparents = __clk_get_num_parents(hw->clk); long best_rate = -EINVAL; @@ -57,7 +57,7 @@ static long ar100_determine_rate(struct clk_hw *hw, unsigned long rate, for (i = 0; i < nparents; i++) { unsigned long parent_rate; unsigned long tmp_rate; - struct clk *parent; + struct clk_core *parent; unsigned long div; int shift; @@ -176,7 +176,7 @@ static int sun6i_a31_ar100_clk_probe(struct platform_device *pdev) struct clk_init_data init; struct ar100_clk *ar100; struct resource *r; - struct clk *clk; + struct clk_core *clk; int nparents; int i; diff --git a/drivers/clk/sunxi/clk-sun8i-apb0.c b/drivers/clk/sunxi/clk-sun8i-apb0.c index 1f5ba9b..fa308fd 100644 --- a/drivers/clk/sunxi/clk-sun8i-apb0.c +++ b/drivers/clk/sunxi/clk-sun8i-apb0.c @@ -26,7 +26,7 @@ static int sun8i_a23_apb0_clk_probe(struct platform_device *pdev) const char *clk_parent; struct resource *r; void __iomem *reg; - struct clk *clk; + struct clk_core *clk; r = platform_get_resource(pdev, IORESOURCE_MEM, 0); reg = devm_ioremap_resource(&pdev->dev, r); diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c index b654b7b..44c4470 100644 --- a/drivers/clk/sunxi/clk-sunxi.c +++ b/drivers/clk/sunxi/clk-sunxi.c @@ -403,7 +403,7 @@ static void sun7i_a20_get_out_factors(u32 *freq, u32 parent_rate, * clk_sunxi_mmc_phase_control() - configures MMC clock phase control */ -void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output) +void clk_sunxi_mmc_phase_control(struct clk_core *clk, u8 sample, u8 output) { #define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw) #define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw) @@ -582,10 +582,10 @@ static const struct factors_data sun7i_a20_out_data __initconst = { .getter = sun7i_a20_get_out_factors, }; -static struct clk * __init sunxi_factors_clk_setup(struct device_node *node, +static struct clk_core * __init sunxi_factors_clk_setup(struct device_node *node, const struct factors_data *data) { - struct clk *clk; + struct clk_core *clk; struct clk_factors *factors; struct clk_gate *gate = NULL; struct clk_mux *mux = NULL; @@ -695,7 +695,7 @@ static const struct mux_data sun4i_apb1_mux_data __initconst = { static void __init sunxi_mux_clk_setup(struct device_node *node, struct mux_data *data) { - struct clk *clk; + struct clk_core *clk; const char *clk_name = node->name; const char *parents[SUNXI_MAX_PARENTS]; void __iomem *reg; @@ -777,7 +777,7 @@ static const struct div_data sun6i_a31_apb2_div_data __initconst = { static void __init sunxi_divider_clk_setup(struct device_node *node, struct div_data *data) { - struct clk *clk; + struct clk_core *clk; const char *clk_name = node->name; const char *clk_parent; void __iomem *reg; @@ -976,7 +976,7 @@ static void __init sunxi_gates_clk_setup(struct device_node *node, clk_data = kmalloc(sizeof(struct clk_onecell_data), GFP_KERNEL); if (!clk_data) return; - clk_data->clks = kzalloc((qty+1) * sizeof(struct clk *), GFP_KERNEL); + clk_data->clks = kzalloc((qty+1) * sizeof(struct clk_core *), GFP_KERNEL); if (!clk_data->clks) { kfree(clk_data); return; @@ -1078,7 +1078,7 @@ static void __init sunxi_divs_clk_setup(struct device_node *node, struct clk_onecell_data *clk_data; const char *parent; const char *clk_name; - struct clk **clks, *pclk; + struct clk_core **clks, *pclk; struct clk_hw *gate_hw, *rate_hw; const struct clk_ops *rate_ops; struct clk_gate *gate = NULL; @@ -1291,10 +1291,10 @@ static void __init sunxi_init_clocks(const char *clocks[], int nclocks) /* Protect the clocks that needs to stay on */ for (i = 0; i < nclocks; i++) { - struct clk *clk = clk_get(NULL, clocks[i]); + struct clk_core *clk = clk_provider_get(NULL, clocks[i]); if (!IS_ERR(clk)) - clk_prepare_enable(clk); + clk_provider_prepare_enable(clk); } } diff --git a/drivers/clk/tegra/clk-audio-sync.c b/drivers/clk/tegra/clk-audio-sync.c index c0f7843..53c3488 100644 --- a/drivers/clk/tegra/clk-audio-sync.c +++ b/drivers/clk/tegra/clk-audio-sync.c @@ -54,12 +54,12 @@ const struct clk_ops tegra_clk_sync_source_ops = { .recalc_rate = clk_sync_source_recalc_rate, }; -struct clk *tegra_clk_register_sync_source(const char *name, +struct clk_core *tegra_clk_register_sync_source(const char *name, unsigned long rate, unsigned long max_rate) { struct tegra_clk_sync_source *sync; struct clk_init_data init; - struct clk *clk; + struct clk_core *clk; sync = kzalloc(sizeof(*sync), GFP_KERNEL); if (!sync) { diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c index 290f9c1..c69a728 100644 --- a/drivers/clk/tegra/clk-divider.c +++ b/drivers/clk/tegra/clk-divider.c @@ -19,7 +19,6 @@ #include #include #include -#include #include "clk.h" @@ -147,13 +146,13 @@ const struct clk_ops tegra_clk_frac_div_ops = { .round_rate = clk_frac_div_round_rate, }; -struct clk *tegra_clk_register_divider(const char *name, +struct clk_core *tegra_clk_register_divider(const char *name, const char *parent_name, void __iomem *reg, unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width, u8 frac_width, spinlock_t *lock) { struct tegra_clk_frac_div *divider; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; divider = kzalloc(sizeof(*divider), GFP_KERNEL); diff --git a/drivers/clk/tegra/clk-periph-gate.c b/drivers/clk/tegra/clk-periph-gate.c index 0aa8830..d59200f 100644 --- a/drivers/clk/tegra/clk-periph-gate.c +++ b/drivers/clk/tegra/clk-periph-gate.c @@ -14,7 +14,6 @@ * along with this program. If not, see . */ -#include #include #include #include @@ -128,12 +127,12 @@ const struct clk_ops tegra_clk_periph_gate_ops = { .disable = clk_periph_disable, }; -struct clk *tegra_clk_register_periph_gate(const char *name, +struct clk_core *tegra_clk_register_periph_gate(const char *name, const char *parent_name, u8 gate_flags, void __iomem *clk_base, unsigned long flags, int clk_num, int *enable_refcnt) { struct tegra_clk_periph_gate *gate; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; struct tegra_clk_periph_regs *pregs; diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c index 9e899c18..34a60fd 100644 --- a/drivers/clk/tegra/clk-periph.c +++ b/drivers/clk/tegra/clk-periph.c @@ -14,7 +14,6 @@ * along with this program. If not, see . */ -#include #include #include #include @@ -138,13 +137,13 @@ static const struct clk_ops tegra_clk_periph_no_gate_ops = { .set_rate = clk_periph_set_rate, }; -static struct clk *_tegra_clk_register_periph(const char *name, +static struct clk_core *_tegra_clk_register_periph(const char *name, const char **parent_names, int num_parents, struct tegra_clk_periph *periph, void __iomem *clk_base, u32 offset, unsigned long flags) { - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; struct tegra_clk_periph_regs *bank; bool div = !(periph->gate.flags & TEGRA_PERIPH_NO_DIV); @@ -186,7 +185,7 @@ static struct clk *_tegra_clk_register_periph(const char *name, return clk; } -struct clk *tegra_clk_register_periph(const char *name, +struct clk_core *tegra_clk_register_periph(const char *name, const char **parent_names, int num_parents, struct tegra_clk_periph *periph, void __iomem *clk_base, u32 offset, unsigned long flags) @@ -195,7 +194,7 @@ struct clk *tegra_clk_register_periph(const char *name, periph, clk_base, offset, flags); } -struct clk *tegra_clk_register_periph_nodiv(const char *name, +struct clk_core *tegra_clk_register_periph_nodiv(const char *name, const char **parent_names, int num_parents, struct tegra_clk_periph *periph, void __iomem *clk_base, u32 offset) diff --git a/drivers/clk/tegra/clk-pll-out.c b/drivers/clk/tegra/clk-pll-out.c index 3598987..3adbc24 100644 --- a/drivers/clk/tegra/clk-pll-out.c +++ b/drivers/clk/tegra/clk-pll-out.c @@ -20,7 +20,6 @@ #include #include #include -#include #include "clk.h" @@ -87,13 +86,13 @@ const struct clk_ops tegra_clk_pll_out_ops = { .disable = clk_pll_out_disable, }; -struct clk *tegra_clk_register_pll_out(const char *name, +struct clk_core *tegra_clk_register_pll_out(const char *name, const char *parent_name, void __iomem *reg, u8 enb_bit_idx, u8 rst_bit_idx, unsigned long flags, u8 pll_out_flags, spinlock_t *lock) { struct tegra_clk_pll_out *pll_out; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; pll_out = kzalloc(sizeof(*pll_out), GFP_KERNEL); diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index c7c6d8f..aa18eab 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -19,7 +19,6 @@ #include #include #include -#include #include "clk.h" @@ -729,7 +728,7 @@ static int clk_plle_training(struct tegra_clk_pll *pll) static int clk_plle_enable(struct clk_hw *hw) { struct tegra_clk_pll *pll = to_clk_pll(hw); - unsigned long input_rate = clk_get_rate(clk_get_parent(hw->clk)); + unsigned long input_rate = clk_provider_get_rate(clk_provider_get_parent(hw->clk)); struct tegra_clk_pll_freq_table sel; u32 val; int err; @@ -1033,7 +1032,7 @@ static int clk_pllm_set_rate(struct clk_hw *hw, unsigned long rate, state = clk_pll_is_enabled(hw); if (state) { - if (rate != clk_get_rate(hw->clk)) { + if (rate != clk_provider_get_rate(hw->clk)) { pr_err("%s: Cannot change active PLLM\n", __func__); ret = -EINVAL; goto out; @@ -1285,7 +1284,7 @@ static int clk_plle_tegra114_enable(struct clk_hw *hw) u32 val; int ret; unsigned long flags = 0; - unsigned long input_rate = clk_get_rate(clk_get_parent(hw->clk)); + unsigned long input_rate = clk_provider_get_rate(clk_provider_get_parent(hw->clk)); if (_get_table_rate(hw, &sel, pll->params->fixed_rate, input_rate)) return -EINVAL; @@ -1430,7 +1429,7 @@ static struct tegra_clk_pll *_tegra_init_pll(void __iomem *clk_base, return pll; } -static struct clk *_tegra_clk_register_pll(struct tegra_clk_pll *pll, +static struct clk_core *_tegra_clk_register_pll(struct tegra_clk_pll *pll, const char *name, const char *parent_name, unsigned long flags, const struct clk_ops *ops) { @@ -1448,13 +1447,13 @@ static struct clk *_tegra_clk_register_pll(struct tegra_clk_pll *pll, return clk_register(NULL, &pll->hw); } -struct clk *tegra_clk_register_pll(const char *name, const char *parent_name, +struct clk_core *tegra_clk_register_pll(const char *name, const char *parent_name, void __iomem *clk_base, void __iomem *pmc, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock) { struct tegra_clk_pll *pll; - struct clk *clk; + struct clk_core *clk; pll_params->flags |= TEGRA_PLL_BYPASS; pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE; @@ -1479,13 +1478,13 @@ static struct div_nmp pll_e_nmp = { .divp_width = PLLE_BASE_DIVP_WIDTH, }; -struct clk *tegra_clk_register_plle(const char *name, const char *parent_name, +struct clk_core *tegra_clk_register_plle(const char *name, const char *parent_name, void __iomem *clk_base, void __iomem *pmc, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock) { struct tegra_clk_pll *pll; - struct clk *clk; + struct clk_core *clk; pll_params->flags |= TEGRA_PLL_LOCK_MISC | TEGRA_PLL_BYPASS; pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE; @@ -1550,14 +1549,14 @@ static const struct clk_ops tegra_clk_plle_tegra114_ops = { }; -struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name, +struct clk_core *tegra_clk_register_pllxc(const char *name, const char *parent_name, void __iomem *clk_base, void __iomem *pmc, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock) { struct tegra_clk_pll *pll; - struct clk *clk, *parent; + struct clk_core *clk, *parent; unsigned long parent_rate; int err; u32 val, val_iddq; @@ -1603,7 +1602,7 @@ struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name, return clk; } -struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name, +struct clk_core *tegra_clk_register_pllre(const char *name, const char *parent_name, void __iomem *clk_base, void __iomem *pmc, unsigned long flags, struct tegra_clk_pll_params *pll_params, @@ -1611,7 +1610,7 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name, { u32 val; struct tegra_clk_pll *pll; - struct clk *clk; + struct clk_core *clk; pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE | TEGRA_PLL_LOCK_MISC; @@ -1649,14 +1648,14 @@ struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name, return clk; } -struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name, +struct clk_core *tegra_clk_register_pllm(const char *name, const char *parent_name, void __iomem *clk_base, void __iomem *pmc, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock) { struct tegra_clk_pll *pll; - struct clk *clk, *parent; + struct clk_core *clk, *parent; unsigned long parent_rate; if (!pll_params->pdiv_tohw) @@ -1688,13 +1687,13 @@ struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name, return clk; } -struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name, +struct clk_core *tegra_clk_register_pllc(const char *name, const char *parent_name, void __iomem *clk_base, void __iomem *pmc, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock) { - struct clk *parent, *clk; + struct clk_core *parent, *clk; struct pdiv_map *p_tohw = pll_params->pdiv_tohw; struct tegra_clk_pll *pll; struct tegra_clk_pll_freq_table cfg; @@ -1762,14 +1761,14 @@ struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name, return clk; } -struct clk *tegra_clk_register_plle_tegra114(const char *name, +struct clk_core *tegra_clk_register_plle_tegra114(const char *name, const char *parent_name, void __iomem *clk_base, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock) { struct tegra_clk_pll *pll; - struct clk *clk; + struct clk_core *clk; u32 val, val_aux; pll_params->flags |= TEGRA_PLL_HAS_LOCK_ENABLE; @@ -1812,13 +1811,13 @@ static const struct clk_ops tegra_clk_pllss_ops = { .set_rate = clk_pllxc_set_rate, }; -struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name, +struct clk_core *tegra_clk_register_pllss(const char *name, const char *parent_name, void __iomem *clk_base, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock) { struct tegra_clk_pll *pll; - struct clk *clk, *parent; + struct clk_core *clk, *parent; struct tegra_clk_pll_freq_table cfg; unsigned long parent_rate; u32 val; diff --git a/drivers/clk/tegra/clk-super.c b/drivers/clk/tegra/clk-super.c index 2fd924d..0d11346 100644 --- a/drivers/clk/tegra/clk-super.c +++ b/drivers/clk/tegra/clk-super.c @@ -20,7 +20,6 @@ #include #include #include -#include #include "clk.h" @@ -127,13 +126,13 @@ const struct clk_ops tegra_clk_super_ops = { .set_parent = clk_super_set_parent, }; -struct clk *tegra_clk_register_super_mux(const char *name, +struct clk_core *tegra_clk_register_super_mux(const char *name, const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 clk_super_flags, u8 width, u8 pllx_index, u8 div2_index, spinlock_t *lock) { struct tegra_clk_super_mux *super; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; super = kzalloc(sizeof(*super), GFP_KERNEL); diff --git a/drivers/clk/tegra/clk-tegra-audio.c b/drivers/clk/tegra/clk-tegra-audio.c index 5c38aab..038a22e 100644 --- a/drivers/clk/tegra/clk-tegra-audio.c +++ b/drivers/clk/tegra/clk-tegra-audio.c @@ -15,7 +15,6 @@ */ #include -#include #include #include #include @@ -128,8 +127,8 @@ void __init tegra_audio_clk_init(void __iomem *clk_base, void __iomem *pmc_base, struct tegra_clk *tegra_clks, struct tegra_clk_pll_params *pll_a_params) { - struct clk *clk; - struct clk **dt_clk; + struct clk_core *clk; + struct clk_core **dt_clk; int i; /* PLLA */ diff --git a/drivers/clk/tegra/clk-tegra-fixed.c b/drivers/clk/tegra/clk-tegra-fixed.c index f3b7738..5ee486a 100644 --- a/drivers/clk/tegra/clk-tegra-fixed.c +++ b/drivers/clk/tegra/clk-tegra-fixed.c @@ -15,7 +15,6 @@ */ #include -#include #include #include #include @@ -36,8 +35,8 @@ int __init tegra_osc_clk_init(void __iomem *clk_base, unsigned long *osc_freq, unsigned long *pll_ref_freq) { - struct clk *clk; - struct clk **dt_clk; + struct clk_core *clk; + struct clk_core **dt_clk; u32 val, pll_ref_div; unsigned osc_idx; @@ -81,8 +80,8 @@ int __init tegra_osc_clk_init(void __iomem *clk_base, void __init tegra_fixed_clk_init(struct tegra_clk *tegra_clks) { - struct clk *clk; - struct clk **dt_clk; + struct clk_core *clk; + struct clk_core **dt_clk; /* clk_32k */ dt_clk = tegra_lookup_dt_id(tegra_clk_clk_32k, tegra_clks); diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c index 37f32c4..5e17ad4 100644 --- a/drivers/clk/tegra/clk-tegra-periph.c +++ b/drivers/clk/tegra/clk-tegra-periph.c @@ -15,7 +15,6 @@ */ #include -#include #include #include #include @@ -585,8 +584,8 @@ static void __init periph_clk_init(void __iomem *clk_base, struct tegra_clk *tegra_clks) { int i; - struct clk *clk; - struct clk **dt_clk; + struct clk_core *clk; + struct clk_core **dt_clk; for (i = 0; i < ARRAY_SIZE(periph_clks); i++) { struct tegra_clk_periph_regs *bank; @@ -615,8 +614,8 @@ static void __init gate_clk_init(void __iomem *clk_base, struct tegra_clk *tegra_clks) { int i; - struct clk *clk; - struct clk **dt_clk; + struct clk_core *clk; + struct clk_core **dt_clk; for (i = 0; i < ARRAY_SIZE(gate_clks); i++) { struct tegra_periph_init_data *data; @@ -640,8 +639,8 @@ static void __init init_pllp(void __iomem *clk_base, void __iomem *pmc_base, struct tegra_clk *tegra_clks, struct tegra_clk_pll_params *pll_params) { - struct clk *clk; - struct clk **dt_clk; + struct clk_core *clk; + struct clk_core **dt_clk; int i; dt_clk = tegra_lookup_dt_id(tegra_clk_pll_p, tegra_clks); diff --git a/drivers/clk/tegra/clk-tegra-pmc.c b/drivers/clk/tegra/clk-tegra-pmc.c index 08b21c1..ddd39ca 100644 --- a/drivers/clk/tegra/clk-tegra-pmc.c +++ b/drivers/clk/tegra/clk-tegra-pmc.c @@ -15,7 +15,6 @@ */ #include -#include #include #include #include @@ -82,8 +81,8 @@ static struct pmc_clk_init_data pmc_clks[] = { void __init tegra_pmc_clk_init(void __iomem *pmc_base, struct tegra_clk *tegra_clks) { - struct clk *clk; - struct clk **dt_clk; + struct clk_core *clk; + struct clk_core **dt_clk; int i; for (i = 0; i < ARRAY_SIZE(pmc_clks); i++) { diff --git a/drivers/clk/tegra/clk-tegra-super-gen4.c b/drivers/clk/tegra/clk-tegra-super-gen4.c index feb3201..9d1cdaa 100644 --- a/drivers/clk/tegra/clk-tegra-super-gen4.c +++ b/drivers/clk/tegra/clk-tegra-super-gen4.c @@ -15,7 +15,6 @@ */ #include -#include #include #include #include @@ -53,8 +52,8 @@ static const char *cclk_lp_parents[] = { "clk_m", "pll_c", "clk_32k", "pll_m", static void __init tegra_sclk_init(void __iomem *clk_base, struct tegra_clk *tegra_clks) { - struct clk *clk; - struct clk **dt_clk; + struct clk_core *clk; + struct clk_core **dt_clk; /* SCLK */ dt_clk = tegra_lookup_dt_id(tegra_clk_sclk, tegra_clks); @@ -99,8 +98,8 @@ void __init tegra_super_clk_gen4_init(void __iomem *clk_base, struct tegra_clk *tegra_clks, struct tegra_clk_pll_params *params) { - struct clk *clk; - struct clk **dt_clk; + struct clk_core *clk; + struct clk_core **dt_clk; /* CCLKG */ dt_clk = tegra_lookup_dt_id(tegra_clk_cclk_g, tegra_clks); diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c index f760f31..00a2897 100644 --- a/drivers/clk/tegra/clk-tegra114.c +++ b/drivers/clk/tegra/clk-tegra114.c @@ -15,7 +15,6 @@ */ #include -#include #include #include #include @@ -936,14 +935,14 @@ static u32 mux_pllm_pllc2_c_c3_pllp_plla_idx[] = { [0] = 0, [1] = 1, [2] = 2, [3] = 3, [4] = 4, [5] = 6, }; -static struct clk **clks; +static struct clk_core **clks; static unsigned long osc_freq; static unsigned long pll_ref_freq; static int __init tegra114_osc_clk_init(void __iomem *clk_base) { - struct clk *clk; + struct clk_core *clk; u32 val, pll_ref_div; val = readl_relaxed(clk_base + OSC_CTRL); @@ -973,7 +972,7 @@ static int __init tegra114_osc_clk_init(void __iomem *clk_base) static void __init tegra114_fixed_clk_init(void __iomem *clk_base) { - struct clk *clk; + struct clk_core *clk; /* clk_32k */ clk = clk_register_fixed_rate(NULL, "clk_32k", NULL, CLK_IS_ROOT, @@ -1078,7 +1077,7 @@ static void __init tegra114_pll_init(void __iomem *clk_base, void __iomem *pmc) { u32 val; - struct clk *clk; + struct clk_core *clk; /* PLLC */ clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base, @@ -1200,7 +1199,7 @@ static struct tegra_periph_init_data tegra_periph_clk_list[] = { static __init void tegra114_periph_clk_init(void __iomem *clk_base, void __iomem *pmc_base) { - struct clk *clk; + struct clk_core *clk; struct tegra_periph_init_data *data; int i; diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index 9525c68..bf481c8 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -15,7 +15,6 @@ */ #include -#include #include #include #include @@ -1017,7 +1016,7 @@ static struct tegra_devclk devclks[] __initdata = { { .dev_id = "timer", .dt_id = TEGRA124_CLK_TIMER }, }; -static struct clk **clks; +static struct clk_core **clks; static void tegra124_utmi_param_configure(void __iomem *clk_base) { @@ -1104,7 +1103,7 @@ static void tegra124_utmi_param_configure(void __iomem *clk_base) static __init void tegra124_periph_clk_init(void __iomem *clk_base, void __iomem *pmc_base) { - struct clk *clk; + struct clk_core *clk; /* xusb_ss_div2 */ clk = clk_register_fixed_factor(NULL, "xusb_ss_div2", "xusb_ss_src", 0, @@ -1148,7 +1147,7 @@ static void __init tegra124_pll_init(void __iomem *clk_base, void __iomem *pmc) { u32 val; - struct clk *clk; + struct clk_core *clk; /* PLLC */ clk = tegra_clk_register_pllxc("pll_c", "pll_ref", clk_base, diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c index dace2b1..6e7d5e2 100644 --- a/drivers/clk/tegra/clk-tegra20.c +++ b/drivers/clk/tegra/clk-tegra20.c @@ -15,7 +15,6 @@ */ #include -#include #include #include #include @@ -162,7 +161,7 @@ static void __iomem *pmc_base; _clk_num, _gate_flags, \ _clk_id) -static struct clk **clks; +static struct clk_core **clks; static struct tegra_clk_pll_freq_table pll_c_freq_table[] = { { 12000000, 600000000, 600, 12, 0, 8 }, @@ -633,7 +632,7 @@ static unsigned int tegra20_get_pll_ref_div(void) static void tegra20_pll_init(void) { - struct clk *clk; + struct clk_core *clk; /* PLLC */ clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, NULL, 0, @@ -713,7 +712,7 @@ static const char *sclk_parents[] = { "clk_m", "pll_c_out1", "pll_p_out4", static void tegra20_super_clk_init(void) { - struct clk *clk; + struct clk_core *clk; /* CCLK */ clk = tegra_clk_register_super_mux("cclk", cclk_parents, @@ -738,7 +737,7 @@ static const char *audio_parents[] = {"spdif_in", "i2s1", "i2s2", "unused", static void __init tegra20_audio_clk_init(void) { - struct clk *clk; + struct clk_core *clk; /* audio */ clk = clk_register_mux(NULL, "audio_mux", audio_parents, @@ -800,7 +799,7 @@ static struct tegra_periph_init_data tegra_periph_nodiv_clk_list[] = { static void __init tegra20_periph_clk_init(void) { struct tegra_periph_init_data *data; - struct clk *clk; + struct clk_core *clk; int i; /* ac97 */ @@ -871,7 +870,7 @@ static void __init tegra20_periph_clk_init(void) static void __init tegra20_osc_clk_init(void) { - struct clk *clk; + struct clk_core *clk; unsigned long input_freq; unsigned int pll_ref_div; diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 5bbacd0..1e9f733 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -16,7 +16,6 @@ #include #include -#include #include #include #include @@ -205,7 +204,7 @@ static DEFINE_SPINLOCK(pll_d_lock); _clk_num, _gate_flags, \ _clk_id) -static struct clk **clks; +static struct clk_core **clks; /* * Structure defining the fields for USB UTMI clocks Parameters. @@ -921,7 +920,7 @@ static const char *pll_e_parents[] = {"pll_ref", "pll_p"}; static void __init tegra30_pll_init(void) { - struct clk *clk; + struct clk_core *clk; /* PLLC */ clk = tegra_clk_register_pll("pll_c", "pll_ref", clk_base, pmc_base, 0, @@ -1012,7 +1011,7 @@ static const char *sclk_parents[] = { "clk_m", "pll_c_out1", "pll_p_out4", static void __init tegra30_super_clk_init(void) { - struct clk *clk; + struct clk_core *clk; /* * Clock input to cclk_g divided from pll_p using @@ -1134,7 +1133,7 @@ static struct tegra_periph_init_data tegra_periph_nodiv_clk_list[] = { static void __init tegra30_periph_clk_init(void) { struct tegra_periph_init_data *data; - struct clk *clk; + struct clk_core *clk; int i; /* dsia */ diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c index f87c609..d5963f6 100644 --- a/drivers/clk/tegra/clk.c +++ b/drivers/clk/tegra/clk.c @@ -14,7 +14,6 @@ * along with this program. If not, see . */ -#include #include #include #include @@ -69,7 +68,7 @@ struct tegra_cpu_car_ops *tegra_cpu_car_ops = &dummy_car_ops; int *periph_clk_enb_refcnt; static int periph_banks; -static struct clk **clks; +static struct clk_core **clks; static int clk_num; static struct clk_onecell_data clk_data; @@ -165,7 +164,7 @@ struct tegra_clk_periph_regs *get_reg_bank(int clkid) } } -struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks) +struct clk_core ** __init tegra_clk_init(void __iomem *regs, int num, int banks) { clk_base = regs; @@ -179,7 +178,7 @@ struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks) periph_banks = banks; - clks = kzalloc(num * sizeof(struct clk *), GFP_KERNEL); + clks = kzalloc(num * sizeof(struct clk_core *), GFP_KERNEL); if (!clks) kfree(periph_clk_enb_refcnt); @@ -189,9 +188,9 @@ struct clk ** __init tegra_clk_init(void __iomem *regs, int num, int banks) } void __init tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list, - struct clk *clks[], int clk_max) + struct clk_core *clks[], int clk_max) { - struct clk *clk; + struct clk_core *clk; for (; dup_list->clk_id < clk_max; dup_list++) { clk = clks[dup_list->clk_id]; @@ -201,9 +200,9 @@ void __init tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list, } void __init tegra_init_from_table(struct tegra_clk_init_table *tbl, - struct clk *clks[], int clk_max) + struct clk_core *clks[], int clk_max) { - struct clk *clk; + struct clk_core *clk; for (; tbl->clk_id < clk_max; tbl++) { clk = clks[tbl->clk_id]; @@ -211,8 +210,8 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl, return; if (tbl->parent_id < clk_max) { - struct clk *parent = clks[tbl->parent_id]; - if (clk_set_parent(clk, parent)) { + struct clk_core *parent = clks[tbl->parent_id]; + if (clk_provider_set_parent(clk, parent)) { pr_err("%s: Failed to set parent %s of %s\n", __func__, __clk_get_name(parent), __clk_get_name(clk)); @@ -221,7 +220,7 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl, } if (tbl->rate) - if (clk_set_rate(clk, tbl->rate)) { + if (clk_provider_set_rate(clk, tbl->rate)) { pr_err("%s: Failed to set rate %lu of %s\n", __func__, tbl->rate, __clk_get_name(clk)); @@ -229,7 +228,7 @@ void __init tegra_init_from_table(struct tegra_clk_init_table *tbl, } if (tbl->state) - if (clk_prepare_enable(clk)) { + if (clk_provider_prepare_enable(clk)) { pr_err("%s: Failed to enable %s\n", __func__, __clk_get_name(clk)); WARN_ON(1); @@ -286,7 +285,7 @@ void __init tegra_register_devclks(struct tegra_devclk *dev_clks, int num) } } -struct clk ** __init tegra_lookup_dt_id(int clk_id, +struct clk_core ** __init tegra_lookup_dt_id(int clk_id, struct tegra_clk *tegra_clk) { if (tegra_clk[clk_id].present) diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index 16ec8d6..3093aa4 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -39,7 +39,7 @@ struct tegra_clk_sync_source { extern const struct clk_ops tegra_clk_sync_source_ops; extern int *periph_clk_enb_refcnt; -struct clk *tegra_clk_register_sync_source(const char *name, +struct clk_core *tegra_clk_register_sync_source(const char *name, unsigned long fixed_rate, unsigned long max_rate); /** @@ -82,7 +82,7 @@ struct tegra_clk_frac_div { #define TEGRA_DIVIDER_UART BIT(3) extern const struct clk_ops tegra_clk_frac_div_ops; -struct clk *tegra_clk_register_divider(const char *name, +struct clk_core *tegra_clk_register_divider(const char *name, const char *parent_name, void __iomem *reg, unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width, u8 frac_width, spinlock_t *lock); @@ -258,47 +258,47 @@ struct tegra_clk_pll { extern const struct clk_ops tegra_clk_pll_ops; extern const struct clk_ops tegra_clk_plle_ops; -struct clk *tegra_clk_register_pll(const char *name, const char *parent_name, +struct clk_core *tegra_clk_register_pll(const char *name, const char *parent_name, void __iomem *clk_base, void __iomem *pmc, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock); -struct clk *tegra_clk_register_plle(const char *name, const char *parent_name, +struct clk_core *tegra_clk_register_plle(const char *name, const char *parent_name, void __iomem *clk_base, void __iomem *pmc, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock); -struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name, +struct clk_core *tegra_clk_register_pllxc(const char *name, const char *parent_name, void __iomem *clk_base, void __iomem *pmc, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock); -struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name, +struct clk_core *tegra_clk_register_pllm(const char *name, const char *parent_name, void __iomem *clk_base, void __iomem *pmc, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock); -struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name, +struct clk_core *tegra_clk_register_pllc(const char *name, const char *parent_name, void __iomem *clk_base, void __iomem *pmc, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock); -struct clk *tegra_clk_register_pllre(const char *name, const char *parent_name, +struct clk_core *tegra_clk_register_pllre(const char *name, const char *parent_name, void __iomem *clk_base, void __iomem *pmc, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock, unsigned long parent_rate); -struct clk *tegra_clk_register_plle_tegra114(const char *name, +struct clk_core *tegra_clk_register_plle_tegra114(const char *name, const char *parent_name, void __iomem *clk_base, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock); -struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name, +struct clk_core *tegra_clk_register_pllss(const char *name, const char *parent_name, void __iomem *clk_base, unsigned long flags, struct tegra_clk_pll_params *pll_params, spinlock_t *lock); @@ -325,7 +325,7 @@ struct tegra_clk_pll_out { #define to_clk_pll_out(_hw) container_of(_hw, struct tegra_clk_pll_out, hw) extern const struct clk_ops tegra_clk_pll_out_ops; -struct clk *tegra_clk_register_pll_out(const char *name, +struct clk_core *tegra_clk_register_pll_out(const char *name, const char *parent_name, void __iomem *reg, u8 enb_bit_idx, u8 rst_bit_idx, unsigned long flags, u8 pll_div_flags, spinlock_t *lock); @@ -394,7 +394,7 @@ struct tegra_clk_periph_gate { #define TEGRA_PERIPH_NO_GATE BIT(5) extern const struct clk_ops tegra_clk_periph_gate_ops; -struct clk *tegra_clk_register_periph_gate(const char *name, +struct clk_core *tegra_clk_register_periph_gate(const char *name, const char *parent_name, u8 gate_flags, void __iomem *clk_base, unsigned long flags, int clk_num, int *enable_refcnt); @@ -427,11 +427,11 @@ struct tegra_clk_periph { #define TEGRA_CLK_PERIPH_MAGIC 0x18221223 extern const struct clk_ops tegra_clk_periph_ops; -struct clk *tegra_clk_register_periph(const char *name, +struct clk_core *tegra_clk_register_periph(const char *name, const char **parent_names, int num_parents, struct tegra_clk_periph *periph, void __iomem *clk_base, u32 offset, unsigned long flags); -struct clk *tegra_clk_register_periph_nodiv(const char *name, +struct clk_core *tegra_clk_register_periph_nodiv(const char *name, const char **parent_names, int num_parents, struct tegra_clk_periph *periph, void __iomem *clk_base, u32 offset); @@ -540,7 +540,7 @@ struct tegra_clk_super_mux { #define TEGRA_DIVIDER_2 BIT(0) extern const struct clk_ops tegra_clk_super_ops; -struct clk *tegra_clk_register_super_mux(const char *name, +struct clk_core *tegra_clk_register_super_mux(const char *name, const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 clk_super_flags, u8 width, u8 pllx_index, u8 div2_index, spinlock_t *lock); @@ -590,15 +590,15 @@ struct tegra_devclk { }; void tegra_init_from_table(struct tegra_clk_init_table *tbl, - struct clk *clks[], int clk_max); + struct clk_core *clks[], int clk_max); void tegra_init_dup_clks(struct tegra_clk_duplicate *dup_list, - struct clk *clks[], int clk_max); + struct clk_core *clks[], int clk_max); struct tegra_clk_periph_regs *get_reg_bank(int clkid); -struct clk **tegra_clk_init(void __iomem *clk_base, int num, int periph_banks); +struct clk_core **tegra_clk_init(void __iomem *clk_base, int num, int periph_banks); -struct clk **tegra_lookup_dt_id(int clk_id, struct tegra_clk *tegra_clk); +struct clk_core **tegra_lookup_dt_id(int clk_id, struct tegra_clk *tegra_clk); void tegra_add_of_provider(struct device_node *np); void tegra_register_devclks(struct tegra_devclk *dev_clks, int num); diff --git a/drivers/clk/ti/apll.c b/drivers/clk/ti/apll.c index 72d9727..a162c21 100644 --- a/drivers/clk/ti/apll.c +++ b/drivers/clk/ti/apll.c @@ -135,10 +135,10 @@ static void __init omap_clk_register_apll(struct clk_hw *hw, { struct clk_hw_omap *clk_hw = to_clk_hw_omap(hw); struct dpll_data *ad = clk_hw->dpll_data; - struct clk *clk; + struct clk_core *clk; - ad->clk_ref = of_clk_get(node, 0); - ad->clk_bypass = of_clk_get(node, 1); + ad->clk_ref = of_clk_provider_get(node, 0); + ad->clk_bypass = of_clk_provider_get(node, 1); if (IS_ERR(ad->clk_ref) || IS_ERR(ad->clk_bypass)) { pr_debug("clk-ref or clk-bypass for %s not ready, retry\n", @@ -332,7 +332,7 @@ static void __init of_omap2_apll_setup(struct device_node *node) struct dpll_data *ad = NULL; struct clk_hw_omap *clk_hw = NULL; struct clk_init_data *init = NULL; - struct clk *clk; + struct clk_core *clk; const char *parent_name; u32 val; diff --git a/drivers/clk/ti/clk-2xxx.c b/drivers/clk/ti/clk-2xxx.c index c808ab3..a48fe6f 100644 --- a/drivers/clk/ti/clk-2xxx.c +++ b/drivers/clk/ti/clk-2xxx.c @@ -237,10 +237,10 @@ static int __init omap2xxx_dt_clk_init(int soc_type) ARRAY_SIZE(enable_init_clks)); pr_info("Clocking rate (Crystal/DPLL/MPU): %ld.%01ld/%ld/%ld MHz\n", - (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 1000000), - (clk_get_rate(clk_get_sys(NULL, "sys_ck")) / 100000) % 10, - (clk_get_rate(clk_get_sys(NULL, "dpll_ck")) / 1000000), - (clk_get_rate(clk_get_sys(NULL, "mpu_ck")) / 1000000)); + (clk_provider_get_rate(clk_provider_get_sys(NULL, "sys_ck")) / 1000000), + (clk_provider_get_rate(clk_provider_get_sys(NULL, "sys_ck")) / 100000) % 10, + (clk_provider_get_rate(clk_provider_get_sys(NULL, "dpll_ck")) / 1000000), + (clk_provider_get_rate(clk_provider_get_sys(NULL, "mpu_ck")) / 1000000)); return 0; } diff --git a/drivers/clk/ti/clk-33xx.c b/drivers/clk/ti/clk-33xx.c index 028b337..0988f1e 100644 --- a/drivers/clk/ti/clk-33xx.c +++ b/drivers/clk/ti/clk-33xx.c @@ -121,7 +121,7 @@ static const char *enable_init_clks[] = { int __init am33xx_dt_clk_init(void) { - struct clk *clk1, *clk2; + struct clk_core *clk1, *clk2; ti_dt_clocks_register(am33xx_clks); @@ -139,12 +139,12 @@ int __init am33xx_dt_clk_init(void) * oscillator clock. */ - clk1 = clk_get_sys(NULL, "sys_clkin_ck"); - clk2 = clk_get_sys(NULL, "timer3_fck"); - clk_set_parent(clk2, clk1); + clk1 = clk_provider_get_sys(NULL, "sys_clkin_ck"); + clk2 = clk_provider_get_sys(NULL, "timer3_fck"); + clk_provider_set_parent(clk2, clk1); - clk2 = clk_get_sys(NULL, "timer6_fck"); - clk_set_parent(clk2, clk1); + clk2 = clk_provider_get_sys(NULL, "timer6_fck"); + clk_provider_set_parent(clk2, clk1); /* * The On-Chip 32K RC Osc clock is not an accurate clock-source as per * the design/spec, so as a result, for example, timer which supposed @@ -152,9 +152,9 @@ int __init am33xx_dt_clk_init(void) * not expected by any use-case, so change WDT1 clock source to PRCM * 32KHz clock. */ - clk1 = clk_get_sys(NULL, "wdt1_fck"); - clk2 = clk_get_sys(NULL, "clkdiv32k_ick"); - clk_set_parent(clk1, clk2); + clk1 = clk_provider_get_sys(NULL, "wdt1_fck"); + clk2 = clk_provider_get_sys(NULL, "clkdiv32k_ick"); + clk_provider_set_parent(clk1, clk2); return 0; } diff --git a/drivers/clk/ti/clk-3xxx.c b/drivers/clk/ti/clk-3xxx.c index 0d1750a..58ef20e 100644 --- a/drivers/clk/ti/clk-3xxx.c +++ b/drivers/clk/ti/clk-3xxx.c @@ -365,10 +365,10 @@ static int __init omap3xxx_dt_clk_init(int soc_type) ARRAY_SIZE(enable_init_clks)); pr_info("Clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n", - (clk_get_rate(clk_get_sys(NULL, "osc_sys_ck")) / 1000000), - (clk_get_rate(clk_get_sys(NULL, "osc_sys_ck")) / 100000) % 10, - (clk_get_rate(clk_get_sys(NULL, "core_ck")) / 1000000), - (clk_get_rate(clk_get_sys(NULL, "arm_fck")) / 1000000)); + (clk_provider_get_rate(clk_provider_get_sys(NULL, "osc_sys_ck")) / 1000000), + (clk_provider_get_rate(clk_provider_get_sys(NULL, "osc_sys_ck")) / 100000) % 10, + (clk_provider_get_rate(clk_provider_get_sys(NULL, "core_ck")) / 1000000), + (clk_provider_get_rate(clk_provider_get_sys(NULL, "arm_fck")) / 1000000)); if (soc_type != OMAP3_SOC_TI81XX && soc_type != OMAP3_SOC_OMAP3430_ES1) omap3_clk_lock_dpll5(); diff --git a/drivers/clk/ti/clk-43xx.c b/drivers/clk/ti/clk-43xx.c index 3795fce..1277452 100644 --- a/drivers/clk/ti/clk-43xx.c +++ b/drivers/clk/ti/clk-43xx.c @@ -116,7 +116,7 @@ static struct ti_dt_clk am43xx_clks[] = { int __init am43xx_dt_clk_init(void) { - struct clk *clk1, *clk2; + struct clk_core *clk1, *clk2; ti_dt_clocks_register(am43xx_clks); @@ -132,9 +132,9 @@ int __init am43xx_dt_clk_init(void) * By selecting dpll_core_m5_ck as the clocksource fixes this issue. * In AM335x dpll_core_m5_ck is the default clocksource. */ - clk1 = clk_get_sys(NULL, "cpsw_cpts_rft_clk"); - clk2 = clk_get_sys(NULL, "dpll_core_m5_ck"); - clk_set_parent(clk1, clk2); + clk1 = clk_provider_get_sys(NULL, "cpsw_cpts_rft_clk"); + clk2 = clk_provider_get_sys(NULL, "dpll_core_m5_ck"); + clk_provider_set_parent(clk1, clk2); return 0; } diff --git a/drivers/clk/ti/clk-44xx.c b/drivers/clk/ti/clk-44xx.c index 02517a8..1adc399 100644 --- a/drivers/clk/ti/clk-44xx.c +++ b/drivers/clk/ti/clk-44xx.c @@ -281,7 +281,7 @@ static struct ti_dt_clk omap44xx_clks[] = { int __init omap4xxx_dt_clk_init(void) { int rc; - struct clk *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll; + struct clk_core *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll; ti_dt_clocks_register(omap44xx_clks); @@ -291,8 +291,8 @@ int __init omap4xxx_dt_clk_init(void) * Lock USB DPLL on OMAP4 devices so that the L3INIT power * domain can transition to retention state when not in use. */ - usb_dpll = clk_get_sys(NULL, "dpll_usb_ck"); - rc = clk_set_rate(usb_dpll, OMAP4_DPLL_USB_DEFFREQ); + usb_dpll = clk_provider_get_sys(NULL, "dpll_usb_ck"); + rc = clk_provider_set_rate(usb_dpll, OMAP4_DPLL_USB_DEFFREQ); if (rc) pr_err("%s: failed to configure USB DPLL!\n", __func__); @@ -302,12 +302,12 @@ int __init omap4xxx_dt_clk_init(void) * locking the ABE DPLL on boot. * Lock the ABE DPLL in any case to avoid issues with audio. */ - abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_refclk_mux_ck"); - sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck"); - rc = clk_set_parent(abe_dpll_ref, sys_32k_ck); - abe_dpll = clk_get_sys(NULL, "dpll_abe_ck"); + abe_dpll_ref = clk_provider_get_sys(NULL, "abe_dpll_refclk_mux_ck"); + sys_32k_ck = clk_provider_get_sys(NULL, "sys_32k_ck"); + rc = clk_provider_set_parent(abe_dpll_ref, sys_32k_ck); + abe_dpll = clk_provider_get_sys(NULL, "dpll_abe_ck"); if (!rc) - rc = clk_set_rate(abe_dpll, OMAP4_DPLL_ABE_DEFFREQ); + rc = clk_provider_set_rate(abe_dpll, OMAP4_DPLL_ABE_DEFFREQ); if (rc) pr_err("%s: failed to configure ABE DPLL!\n", __func__); diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c index 5e18399..5b603b5 100644 --- a/drivers/clk/ti/clk-54xx.c +++ b/drivers/clk/ti/clk-54xx.c @@ -225,34 +225,35 @@ static struct ti_dt_clk omap54xx_clks[] = { int __init omap5xxx_dt_clk_init(void) { int rc; - struct clk *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll; + struct clk_core *abe_dpll_ref, *abe_dpll, *sys_32k_ck, *usb_dpll; ti_dt_clocks_register(omap54xx_clks); omap2_clk_disable_autoidle_all(); - abe_dpll_ref = clk_get_sys(NULL, "abe_dpll_clk_mux"); - sys_32k_ck = clk_get_sys(NULL, "sys_32k_ck"); - rc = clk_set_parent(abe_dpll_ref, sys_32k_ck); - abe_dpll = clk_get_sys(NULL, "dpll_abe_ck"); + abe_dpll_ref = clk_provider_get_sys(NULL, "abe_dpll_clk_mux"); + sys_32k_ck = clk_provider_get_sys(NULL, "sys_32k_ck"); + rc = clk_provider_set_parent(abe_dpll_ref, sys_32k_ck); + abe_dpll = clk_provider_get_sys(NULL, "dpll_abe_ck"); if (!rc) - rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ); + rc = clk_provider_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ); if (rc) pr_err("%s: failed to configure ABE DPLL!\n", __func__); - abe_dpll = clk_get_sys(NULL, "dpll_abe_m2x2_ck"); + abe_dpll = clk_provider_get_sys(NULL, "dpll_abe_m2x2_ck"); if (!rc) - rc = clk_set_rate(abe_dpll, OMAP5_DPLL_ABE_DEFFREQ * 2); + rc = clk_provider_set_rate(abe_dpll, + OMAP5_DPLL_ABE_DEFFREQ * 2); if (rc) pr_err("%s: failed to configure ABE m2x2 DPLL!\n", __func__); - usb_dpll = clk_get_sys(NULL, "dpll_usb_ck"); - rc = clk_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ); + usb_dpll = clk_provider_get_sys(NULL, "dpll_usb_ck"); + rc = clk_provider_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ); if (rc) pr_err("%s: failed to configure USB DPLL!\n", __func__); - usb_dpll = clk_get_sys(NULL, "dpll_usb_m2_ck"); - rc = clk_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ/2); + usb_dpll = clk_provider_get_sys(NULL, "dpll_usb_m2_ck"); + rc = clk_provider_set_rate(usb_dpll, OMAP5_DPLL_USB_DEFFREQ / 2); if (rc) pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__); diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c index 62ac8f6..9dba0bb 100644 --- a/drivers/clk/ti/clk-7xx.c +++ b/drivers/clk/ti/clk-7xx.c @@ -307,39 +307,39 @@ static struct ti_dt_clk dra7xx_clks[] = { int __init dra7xx_dt_clk_init(void) { int rc; - struct clk *abe_dpll_mux, *sys_clkin2, *dpll_ck; + struct clk_core *abe_dpll_mux, *sys_clkin2, *dpll_ck; ti_dt_clocks_register(dra7xx_clks); omap2_clk_disable_autoidle_all(); - abe_dpll_mux = clk_get_sys(NULL, "abe_dpll_sys_clk_mux"); - sys_clkin2 = clk_get_sys(NULL, "sys_clkin2"); - dpll_ck = clk_get_sys(NULL, "dpll_abe_ck"); + abe_dpll_mux = clk_provider_get_sys(NULL, "abe_dpll_sys_clk_mux"); + sys_clkin2 = clk_provider_get_sys(NULL, "sys_clkin2"); + dpll_ck = clk_provider_get_sys(NULL, "dpll_abe_ck"); - rc = clk_set_parent(abe_dpll_mux, sys_clkin2); + rc = clk_provider_set_parent(abe_dpll_mux, sys_clkin2); if (!rc) - rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ); + rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ); if (rc) pr_err("%s: failed to configure ABE DPLL!\n", __func__); - dpll_ck = clk_get_sys(NULL, "dpll_abe_m2x2_ck"); - rc = clk_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2); + dpll_ck = clk_provider_get_sys(NULL, "dpll_abe_m2x2_ck"); + rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_ABE_DEFFREQ * 2); if (rc) pr_err("%s: failed to configure ABE DPLL m2x2!\n", __func__); - dpll_ck = clk_get_sys(NULL, "dpll_gmac_ck"); - rc = clk_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ); + dpll_ck = clk_provider_get_sys(NULL, "dpll_gmac_ck"); + rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_GMAC_DEFFREQ); if (rc) pr_err("%s: failed to configure GMAC DPLL!\n", __func__); - dpll_ck = clk_get_sys(NULL, "dpll_usb_ck"); - rc = clk_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ); + dpll_ck = clk_provider_get_sys(NULL, "dpll_usb_ck"); + rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ); if (rc) pr_err("%s: failed to configure USB DPLL!\n", __func__); - dpll_ck = clk_get_sys(NULL, "dpll_usb_m2_ck"); - rc = clk_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ/2); + dpll_ck = clk_provider_get_sys(NULL, "dpll_usb_m2_ck"); + rc = clk_provider_set_rate(dpll_ck, DRA7_DPLL_USB_DEFFREQ / 2); if (rc) pr_err("%s: failed to set USB_DPLL M2 OUT\n", __func__); diff --git a/drivers/clk/ti/clk-dra7-atl.c b/drivers/clk/ti/clk-dra7-atl.c index 4a65b41..029a0d3 100644 --- a/drivers/clk/ti/clk-dra7-atl.c +++ b/drivers/clk/ti/clk-dra7-atl.c @@ -40,7 +40,7 @@ struct dra7_atl_clock_info; struct dra7_atl_desc { - struct clk *clk; + struct clk_core *clk; struct clk_hw hw; struct dra7_atl_clock_info *cinfo; int id; @@ -165,7 +165,7 @@ static void __init of_dra7_atl_clock_setup(struct device_node *node) struct dra7_atl_desc *clk_hw = NULL; struct clk_init_data init = { 0 }; const char **parent_names = NULL; - struct clk *clk; + struct clk_core *clk; clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL); if (!clk_hw) { @@ -233,7 +233,7 @@ static int of_dra7_atl_clk_probe(struct platform_device *pdev) char prop[5]; struct dra7_atl_desc *cdesc; struct of_phandle_args clkspec; - struct clk *clk; + struct clk_core *clk; int rc; rc = of_parse_phandle_with_args(node, "ti,provided-clocks", diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c index b1a6f71..d88a70d0 100644 --- a/drivers/clk/ti/clk.c +++ b/drivers/clk/ti/clk.c @@ -41,7 +41,7 @@ void __init ti_dt_clocks_register(struct ti_dt_clk oclks[]) { struct ti_dt_clk *c; struct device_node *node; - struct clk *clk; + struct clk_core *clk; struct of_phandle_args clkspec; for (c = oclks; c->node_name != NULL; c++) { diff --git a/drivers/clk/ti/clockdomain.c b/drivers/clk/ti/clockdomain.c index f1e0038..6bc75d8 100644 --- a/drivers/clk/ti/clockdomain.c +++ b/drivers/clk/ti/clockdomain.c @@ -26,7 +26,7 @@ static void __init of_ti_clockdomain_setup(struct device_node *node) { - struct clk *clk; + struct clk_core *clk; struct clk_hw *clk_hw; const char *clkdm_name = node->name; int i; @@ -35,7 +35,7 @@ static void __init of_ti_clockdomain_setup(struct device_node *node) num_clks = of_count_phandle_with_args(node, "clocks", "#clock-cells"); for (i = 0; i < num_clks; i++) { - clk = of_clk_get(node, i); + clk = of_clk_provider_get(node, i); if (__clk_get_flags(clk) & CLK_IS_BASIC) { pr_warn("can't setup clkdm for basic clk %s\n", __clk_get_name(clk)); diff --git a/drivers/clk/ti/composite.c b/drivers/clk/ti/composite.c index 19d8980..2cbee34 100644 --- a/drivers/clk/ti/composite.c +++ b/drivers/clk/ti/composite.c @@ -119,7 +119,7 @@ static inline struct clk_hw *_get_hw(struct clk_hw_omap_comp *clk, int idx) static void __init ti_clk_register_composite(struct clk_hw *hw, struct device_node *node) { - struct clk *clk; + struct clk_core *clk; struct clk_hw_omap_comp *cclk = to_clk_hw_comp(hw); struct component_clk *comp; int num_parents = 0; diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c index e6aa10d..1c41515 100644 --- a/drivers/clk/ti/divider.c +++ b/drivers/clk/ti/divider.c @@ -246,7 +246,7 @@ const struct clk_ops ti_clk_divider_ops = { .set_rate = ti_clk_divider_set_rate, }; -static struct clk *_register_divider(struct device *dev, const char *name, +static struct clk_core *_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, @@ -254,7 +254,7 @@ static struct clk *_register_divider(struct device *dev, const char *name, spinlock_t *lock) { struct clk_divider *div; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; if (clk_divider_flags & CLK_DIVIDER_HIWORD_MASK) { @@ -434,7 +434,7 @@ static int __init ti_clk_divider_populate(struct device_node *node, */ static void __init of_ti_divider_clk_setup(struct device_node *node) { - struct clk *clk; + struct clk_core *clk; const char *parent_name; void __iomem *reg; u8 clk_divider_flags = 0; diff --git a/drivers/clk/ti/dpll.c b/drivers/clk/ti/dpll.c index 79791e1..e1f74cc 100644 --- a/drivers/clk/ti/dpll.c +++ b/drivers/clk/ti/dpll.c @@ -128,10 +128,10 @@ static void __init ti_clk_register_dpll(struct clk_hw *hw, { struct clk_hw_omap *clk_hw = to_clk_hw_omap(hw); struct dpll_data *dd = clk_hw->dpll_data; - struct clk *clk; + struct clk_core *clk; - dd->clk_ref = of_clk_get(node, 0); - dd->clk_bypass = of_clk_get(node, 1); + dd->clk_ref = of_clk_provider_get(node, 0); + dd->clk_bypass = of_clk_provider_get(node, 1); if (IS_ERR(dd->clk_ref) || IS_ERR(dd->clk_bypass)) { pr_debug("clk-ref or clk-bypass missing for %s, retry later\n", @@ -175,7 +175,7 @@ static void ti_clk_register_dpll_x2(struct device_node *node, const struct clk_ops *ops, const struct clk_hw_omap_ops *hw_ops) { - struct clk *clk; + struct clk_core *clk; struct clk_init_data init = { NULL }; struct clk_hw_omap *clk_hw; const char *name = node->name; diff --git a/drivers/clk/ti/fixed-factor.c b/drivers/clk/ti/fixed-factor.c index c2c8a28..2aa2701 100644 --- a/drivers/clk/ti/fixed-factor.c +++ b/drivers/clk/ti/fixed-factor.c @@ -33,7 +33,7 @@ */ static void __init of_ti_fixed_factor_clk_setup(struct device_node *node) { - struct clk *clk; + struct clk_core *clk; const char *clk_name = node->name; const char *parent_name; u32 div, mult; diff --git a/drivers/clk/ti/gate.c b/drivers/clk/ti/gate.c index b326d27..dd1b813 100644 --- a/drivers/clk/ti/gate.c +++ b/drivers/clk/ti/gate.c @@ -94,7 +94,7 @@ static void __init _of_ti_gate_clk_setup(struct device_node *node, const struct clk_ops *ops, const struct clk_hw_omap_ops *hw_ops) { - struct clk *clk; + struct clk_core *clk; struct clk_init_data init = { NULL }; struct clk_hw_omap *clk_hw; const char *clk_name = node->name; diff --git a/drivers/clk/ti/interface.c b/drivers/clk/ti/interface.c index 9c3e8c4..e2f2bc0 100644 --- a/drivers/clk/ti/interface.c +++ b/drivers/clk/ti/interface.c @@ -34,7 +34,7 @@ static const struct clk_ops ti_interface_clk_ops = { static void __init _of_ti_interface_clk_setup(struct device_node *node, const struct clk_hw_omap_ops *ops) { - struct clk *clk; + struct clk_core *clk; struct clk_init_data init = { NULL }; struct clk_hw_omap *clk_hw; const char *parent_name; diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c index e9d650e..7456198 100644 --- a/drivers/clk/ti/mux.c +++ b/drivers/clk/ti/mux.c @@ -104,14 +104,14 @@ const struct clk_ops ti_clk_mux_ops = { .determine_rate = __clk_mux_determine_rate, }; -static struct clk *_register_mux(struct device *dev, const char *name, +static struct clk_core *_register_mux(struct device *dev, const char *name, const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u32 mask, u8 clk_mux_flags, u32 *table, spinlock_t *lock) { struct clk_mux *mux; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; /* allocate the mux */ @@ -152,7 +152,7 @@ static struct clk *_register_mux(struct device *dev, const char *name, */ static void of_mux_clk_setup(struct device_node *node) { - struct clk *clk; + struct clk_core *clk; void __iomem *reg; int num_parents; const char **parent_names; diff --git a/drivers/clk/ux500/abx500-clk.c b/drivers/clk/ux500/abx500-clk.c index e7bd62c..f27be78 100644 --- a/drivers/clk/ux500/abx500-clk.c +++ b/drivers/clk/ux500/abx500-clk.c @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include @@ -23,7 +22,7 @@ static int ab8500_reg_clks(struct device *dev) { int ret; - struct clk *clk; + struct clk_core *clk; const char *intclk_parents[] = {"ab8500_sysclk", "ulpclk"}; u16 intclk_reg_sel[] = {0 , AB8500_SYSULPCLKCTRL1}; diff --git a/drivers/clk/ux500/clk-prcc.c b/drivers/clk/ux500/clk-prcc.c index bd4769a..7eb055f 100644 --- a/drivers/clk/ux500/clk-prcc.c +++ b/drivers/clk/ux500/clk-prcc.c @@ -92,7 +92,7 @@ static struct clk_ops clk_prcc_kclk_ops = { .is_enabled = clk_prcc_is_enabled, }; -static struct clk *clk_reg_prcc(const char *name, +static struct clk_core *clk_reg_prcc(const char *name, const char *parent_name, resource_size_t phy_base, u32 cg_sel, @@ -101,7 +101,7 @@ static struct clk *clk_reg_prcc(const char *name, { struct clk_prcc *clk; struct clk_init_data clk_prcc_init; - struct clk *clk_reg; + struct clk_core *clk_reg; if (!name) { pr_err("clk_prcc: %s invalid arguments passed\n", __func__); @@ -142,7 +142,7 @@ free_clk: return ERR_PTR(-ENOMEM); } -struct clk *clk_reg_prcc_pclk(const char *name, +struct clk_core *clk_reg_prcc_pclk(const char *name, const char *parent_name, resource_size_t phy_base, u32 cg_sel, @@ -152,7 +152,7 @@ struct clk *clk_reg_prcc_pclk(const char *name, &clk_prcc_pclk_ops); } -struct clk *clk_reg_prcc_kclk(const char *name, +struct clk_core *clk_reg_prcc_kclk(const char *name, const char *parent_name, resource_size_t phy_base, u32 cg_sel, diff --git a/drivers/clk/ux500/clk-prcmu.c b/drivers/clk/ux500/clk-prcmu.c index e2d63bc..bac54c9 100644 --- a/drivers/clk/ux500/clk-prcmu.c +++ b/drivers/clk/ux500/clk-prcmu.c @@ -243,7 +243,7 @@ static struct clk_ops clk_prcmu_opp_volt_scalable_ops = { .set_rate = clk_prcmu_set_rate, }; -static struct clk *clk_reg_prcmu(const char *name, +static struct clk_core *clk_reg_prcmu(const char *name, const char *parent_name, u8 cg_sel, unsigned long rate, @@ -252,7 +252,7 @@ static struct clk *clk_reg_prcmu(const char *name, { struct clk_prcmu *clk; struct clk_init_data clk_prcmu_init; - struct clk *clk_reg; + struct clk_core *clk_reg; if (!name) { pr_err("clk_prcmu: %s invalid arguments passed\n", __func__); @@ -292,7 +292,7 @@ free_clk: return ERR_PTR(-ENOMEM); } -struct clk *clk_reg_prcmu_scalable(const char *name, +struct clk_core *clk_reg_prcmu_scalable(const char *name, const char *parent_name, u8 cg_sel, unsigned long rate, @@ -302,7 +302,7 @@ struct clk *clk_reg_prcmu_scalable(const char *name, &clk_prcmu_scalable_ops); } -struct clk *clk_reg_prcmu_gate(const char *name, +struct clk_core *clk_reg_prcmu_gate(const char *name, const char *parent_name, u8 cg_sel, unsigned long flags) @@ -311,7 +311,7 @@ struct clk *clk_reg_prcmu_gate(const char *name, &clk_prcmu_gate_ops); } -struct clk *clk_reg_prcmu_scalable_rate(const char *name, +struct clk_core *clk_reg_prcmu_scalable_rate(const char *name, const char *parent_name, u8 cg_sel, unsigned long rate, @@ -321,7 +321,7 @@ struct clk *clk_reg_prcmu_scalable_rate(const char *name, &clk_prcmu_scalable_rate_ops); } -struct clk *clk_reg_prcmu_rate(const char *name, +struct clk_core *clk_reg_prcmu_rate(const char *name, const char *parent_name, u8 cg_sel, unsigned long flags) @@ -330,7 +330,7 @@ struct clk *clk_reg_prcmu_rate(const char *name, &clk_prcmu_rate_ops); } -struct clk *clk_reg_prcmu_opp_gate(const char *name, +struct clk_core *clk_reg_prcmu_opp_gate(const char *name, const char *parent_name, u8 cg_sel, unsigned long flags) @@ -339,7 +339,7 @@ struct clk *clk_reg_prcmu_opp_gate(const char *name, &clk_prcmu_opp_gate_ops); } -struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name, +struct clk_core *clk_reg_prcmu_opp_volt_scalable(const char *name, const char *parent_name, u8 cg_sel, unsigned long rate, diff --git a/drivers/clk/ux500/clk-sysctrl.c b/drivers/clk/ux500/clk-sysctrl.c index e364c9d..dc6608a 100644 --- a/drivers/clk/ux500/clk-sysctrl.c +++ b/drivers/clk/ux500/clk-sysctrl.c @@ -114,7 +114,7 @@ static struct clk_ops clk_sysctrl_set_parent_ops = { .get_parent = clk_sysctrl_get_parent, }; -static struct clk *clk_reg_sysctrl(struct device *dev, +static struct clk_core *clk_reg_sysctrl(struct device *dev, const char *name, const char **parent_names, u8 num_parents, @@ -128,7 +128,7 @@ static struct clk *clk_reg_sysctrl(struct device *dev, { struct clk_sysctrl *clk; struct clk_init_data clk_sysctrl_init; - struct clk *clk_reg; + struct clk_core *clk_reg; int i; if (!dev) @@ -176,7 +176,7 @@ static struct clk *clk_reg_sysctrl(struct device *dev, return clk_reg; } -struct clk *clk_reg_sysctrl_gate(struct device *dev, +struct clk_core *clk_reg_sysctrl_gate(struct device *dev, const char *name, const char *parent_name, u16 reg_sel, @@ -193,7 +193,7 @@ struct clk *clk_reg_sysctrl_gate(struct device *dev, flags, &clk_sysctrl_gate_ops); } -struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev, +struct clk_core *clk_reg_sysctrl_gate_fixed_rate(struct device *dev, const char *name, const char *parent_name, u16 reg_sel, @@ -212,7 +212,7 @@ struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev, &clk_sysctrl_gate_fixed_rate_ops); } -struct clk *clk_reg_sysctrl_set_parent(struct device *dev, +struct clk_core *clk_reg_sysctrl_set_parent(struct device *dev, const char *name, const char **parent_names, u8 num_parents, diff --git a/drivers/clk/ux500/clk.h b/drivers/clk/ux500/clk.h index a2bb92d..acb50f8 100644 --- a/drivers/clk/ux500/clk.h +++ b/drivers/clk/ux500/clk.h @@ -10,56 +10,55 @@ #ifndef __UX500_CLK_H #define __UX500_CLK_H -#include #include #include -struct clk *clk_reg_prcc_pclk(const char *name, +struct clk_core *clk_reg_prcc_pclk(const char *name, const char *parent_name, resource_size_t phy_base, u32 cg_sel, unsigned long flags); -struct clk *clk_reg_prcc_kclk(const char *name, +struct clk_core *clk_reg_prcc_kclk(const char *name, const char *parent_name, resource_size_t phy_base, u32 cg_sel, unsigned long flags); -struct clk *clk_reg_prcmu_scalable(const char *name, +struct clk_core *clk_reg_prcmu_scalable(const char *name, const char *parent_name, u8 cg_sel, unsigned long rate, unsigned long flags); -struct clk *clk_reg_prcmu_gate(const char *name, +struct clk_core *clk_reg_prcmu_gate(const char *name, const char *parent_name, u8 cg_sel, unsigned long flags); -struct clk *clk_reg_prcmu_scalable_rate(const char *name, +struct clk_core *clk_reg_prcmu_scalable_rate(const char *name, const char *parent_name, u8 cg_sel, unsigned long rate, unsigned long flags); -struct clk *clk_reg_prcmu_rate(const char *name, +struct clk_core *clk_reg_prcmu_rate(const char *name, const char *parent_name, u8 cg_sel, unsigned long flags); -struct clk *clk_reg_prcmu_opp_gate(const char *name, +struct clk_core *clk_reg_prcmu_opp_gate(const char *name, const char *parent_name, u8 cg_sel, unsigned long flags); -struct clk *clk_reg_prcmu_opp_volt_scalable(const char *name, +struct clk_core *clk_reg_prcmu_opp_volt_scalable(const char *name, const char *parent_name, u8 cg_sel, unsigned long rate, unsigned long flags); -struct clk *clk_reg_sysctrl_gate(struct device *dev, +struct clk_core *clk_reg_sysctrl_gate(struct device *dev, const char *name, const char *parent_name, u16 reg_sel, @@ -68,7 +67,7 @@ struct clk *clk_reg_sysctrl_gate(struct device *dev, unsigned long enable_delay_us, unsigned long flags); -struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev, +struct clk_core *clk_reg_sysctrl_gate_fixed_rate(struct device *dev, const char *name, const char *parent_name, u16 reg_sel, @@ -78,7 +77,7 @@ struct clk *clk_reg_sysctrl_gate_fixed_rate(struct device *dev, unsigned long enable_delay_us, unsigned long flags); -struct clk *clk_reg_sysctrl_set_parent(struct device *dev, +struct clk_core *clk_reg_sysctrl_set_parent(struct device *dev, const char *name, const char **parent_names, u8 num_parents, diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c index 80069c3..708589f 100644 --- a/drivers/clk/ux500/u8500_clk.c +++ b/drivers/clk/ux500/u8500_clk.c @@ -7,7 +7,6 @@ * License terms: GNU General Public License (GPL) version 2 */ -#include #include #include #include @@ -19,7 +18,7 @@ void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, { struct prcmu_fw_version *fw_version; const char *sgaclk_parent = NULL; - struct clk *clk; + struct clk_core *clk; /* Clock sources */ clk = clk_reg_prcmu_gate("soc0_pll", NULL, PRCMU_PLLSOC0, diff --git a/drivers/clk/ux500/u8500_of_clk.c b/drivers/clk/ux500/u8500_of_clk.c index 7b55ef8..61efb85 100644 --- a/drivers/clk/ux500/u8500_of_clk.c +++ b/drivers/clk/ux500/u8500_of_clk.c @@ -8,7 +8,6 @@ */ #include -#include #include #include #include @@ -18,9 +17,9 @@ #define PRCC_NUM_PERIPH_CLUSTERS 6 #define PRCC_PERIPHS_PER_CLUSTER 32 -static struct clk *prcmu_clk[PRCMU_NUM_CLKS]; -static struct clk *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER]; -static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER]; +static struct clk_core *prcmu_clk[PRCMU_NUM_CLKS]; +static struct clk_core *prcc_pclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER]; +static struct clk_core *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_CLUSTER]; #define PRCC_SHOW(clk, base, bit) \ clk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] @@ -29,10 +28,10 @@ static struct clk *prcc_kclk[(PRCC_NUM_PERIPH_CLUSTERS + 1) * PRCC_PERIPHS_PER_C #define PRCC_KCLK_STORE(clk, base, bit) \ prcc_kclk[(base * PRCC_PERIPHS_PER_CLUSTER) + bit] = clk -static struct clk *ux500_twocell_get(struct of_phandle_args *clkspec, +static struct clk_core *ux500_twocell_get(struct of_phandle_args *clkspec, void *data) { - struct clk **clk_data = data; + struct clk_core **clk_data = data; unsigned int base, bit; if (clkspec->args_count != 2) @@ -61,7 +60,7 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, struct device_node *np = NULL; struct device_node *child = NULL; const char *sgaclk_parent = NULL; - struct clk *clk, *rtc_clk, *twd_clk; + struct clk_core *clk, *rtc_clk, *twd_clk; if (of_have_populated_dt()) np = of_find_matching_node(NULL, u8500_clk_of_match); diff --git a/drivers/clk/ux500/u8540_clk.c b/drivers/clk/ux500/u8540_clk.c index 20c8add..a508845 100644 --- a/drivers/clk/ux500/u8540_clk.c +++ b/drivers/clk/ux500/u8540_clk.c @@ -7,7 +7,6 @@ * License terms: GNU General Public License (GPL) version 2 */ -#include #include #include #include @@ -17,7 +16,7 @@ void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, u32 clkrst5_base, u32 clkrst6_base) { - struct clk *clk; + struct clk_core *clk; /* Clock sources. */ /* Fixed ClockGen */ diff --git a/drivers/clk/ux500/u9540_clk.c b/drivers/clk/ux500/u9540_clk.c index 4479478..89055ae 100644 --- a/drivers/clk/ux500/u9540_clk.c +++ b/drivers/clk/ux500/u9540_clk.c @@ -7,7 +7,6 @@ * License terms: GNU General Public License (GPL) version 2 */ -#include #include #include #include diff --git a/drivers/clk/versatile/clk-icst.c b/drivers/clk/versatile/clk-icst.c index bc96f10..d5719e0 100644 --- a/drivers/clk/versatile/clk-icst.c +++ b/drivers/clk/versatile/clk-icst.c @@ -13,7 +13,6 @@ * ICST clock code from the ARM tree should probably be merged into this * file. */ -#include #include #include #include @@ -121,13 +120,13 @@ static const struct clk_ops icst_ops = { .set_rate = icst_set_rate, }; -struct clk *icst_clk_register(struct device *dev, +struct clk_core *icst_clk_register(struct device *dev, const struct clk_icst_desc *desc, const char *name, const char *parent_name, void __iomem *base) { - struct clk *clk; + struct clk_core *clk; struct clk_icst *icst; struct clk_init_data init; struct icst_params *pclone; diff --git a/drivers/clk/versatile/clk-icst.h b/drivers/clk/versatile/clk-icst.h index 04e6f0a..ede867b 100644 --- a/drivers/clk/versatile/clk-icst.h +++ b/drivers/clk/versatile/clk-icst.h @@ -13,7 +13,7 @@ struct clk_icst_desc { u32 lock_offset; }; -struct clk *icst_clk_register(struct device *dev, +struct clk_core *icst_clk_register(struct device *dev, const struct clk_icst_desc *desc, const char *name, const char *parent_name, diff --git a/drivers/clk/versatile/clk-impd1.c b/drivers/clk/versatile/clk-impd1.c index 1cc1330..46680db 100644 --- a/drivers/clk/versatile/clk-impd1.c +++ b/drivers/clk/versatile/clk-impd1.c @@ -7,7 +7,6 @@ * published by the Free Software Foundation. */ #include -#include #include #include #include @@ -21,18 +20,18 @@ struct impd1_clk { char *pclkname; - struct clk *pclk; + struct clk_core *pclk; char *vco1name; - struct clk *vco1clk; + struct clk_core *vco1clk; char *vco2name; - struct clk *vco2clk; - struct clk *mmciclk; + struct clk_core *vco2clk; + struct clk_core *mmciclk; char *uartname; - struct clk *uartclk; + struct clk_core *uartclk; char *spiname; - struct clk *spiclk; + struct clk_core *spiclk; char *scname; - struct clk *scclk; + struct clk_core *scclk; struct clk_lookup *clks[15]; }; @@ -87,8 +86,8 @@ static const struct clk_icst_desc impd1_icst2_desc = { void integrator_impd1_clk_init(void __iomem *base, unsigned int id) { struct impd1_clk *imc; - struct clk *clk; - struct clk *pclk; + struct clk_core *clk; + struct clk_core *pclk; int i; if (id > 3) { diff --git a/drivers/clk/versatile/clk-realview.c b/drivers/clk/versatile/clk-realview.c index c8b5231..524cba5 100644 --- a/drivers/clk/versatile/clk-realview.c +++ b/drivers/clk/versatile/clk-realview.c @@ -6,7 +6,6 @@ * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ -#include #include #include #include @@ -50,7 +49,7 @@ static const struct clk_icst_desc __initdata realview_osc4_desc = { */ void __init realview_clk_init(void __iomem *sysbase, bool is_pb1176) { - struct clk *clk; + struct clk_core *clk; /* APB clock dummy */ clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0); diff --git a/drivers/clk/versatile/clk-sp810.c b/drivers/clk/versatile/clk-sp810.c index c6e86a9..9256d25 100644 --- a/drivers/clk/versatile/clk-sp810.c +++ b/drivers/clk/versatile/clk-sp810.c @@ -25,7 +25,7 @@ struct clk_sp810; struct clk_sp810_timerclken { struct clk_hw hw; - struct clk *clk; + struct clk_core *clk; struct clk_sp810 *sp810; int channel; }; @@ -36,8 +36,8 @@ struct clk_sp810 { void __iomem *base; spinlock_t lock; struct clk_sp810_timerclken timerclken[4]; - struct clk *refclk; - struct clk *timclk; + struct clk_core *refclk; + struct clk_core *timclk; }; static u8 clk_sp810_timerclken_get_parent(struct clk_hw *hw) @@ -79,29 +79,31 @@ static int clk_sp810_timerclken_prepare(struct clk_hw *hw) { struct clk_sp810_timerclken *timerclken = to_clk_sp810_timerclken(hw); struct clk_sp810 *sp810 = timerclken->sp810; - struct clk *old_parent = __clk_get_parent(hw->clk); - struct clk *new_parent; + struct clk_core *old_parent = __clk_get_parent(hw->clk); + struct clk_core *new_parent; if (!sp810->refclk) - sp810->refclk = of_clk_get(sp810->node, sp810->refclk_index); + sp810->refclk = of_clk_provider_get(sp810->node, + sp810->refclk_index); if (!sp810->timclk) - sp810->timclk = of_clk_get(sp810->node, sp810->timclk_index); + sp810->timclk = of_clk_provider_get(sp810->node, + sp810->timclk_index); if (WARN_ON(IS_ERR(sp810->refclk) || IS_ERR(sp810->timclk))) return -ENOENT; /* Select fastest parent */ - if (clk_get_rate(sp810->refclk) > clk_get_rate(sp810->timclk)) + if (clk_provider_get_rate(sp810->refclk) > clk_provider_get_rate(sp810->timclk)) new_parent = sp810->refclk; else new_parent = sp810->timclk; /* Switch the parent if necessary */ if (old_parent != new_parent) { - clk_prepare(new_parent); - clk_set_parent(hw->clk, new_parent); - clk_unprepare(old_parent); + clk_provider_prepare(new_parent); + clk_provider_set_parent(hw->clk, new_parent); + clk_provider_unprepare(old_parent); } return 0; @@ -112,8 +114,8 @@ static void clk_sp810_timerclken_unprepare(struct clk_hw *hw) struct clk_sp810_timerclken *timerclken = to_clk_sp810_timerclken(hw); struct clk_sp810 *sp810 = timerclken->sp810; - clk_put(sp810->timclk); - clk_put(sp810->refclk); + __clk_put(sp810->timclk); + __clk_put(sp810->refclk); } static const struct clk_ops clk_sp810_timerclken_ops = { @@ -123,7 +125,7 @@ static const struct clk_ops clk_sp810_timerclken_ops = { .set_parent = clk_sp810_timerclken_set_parent, }; -static struct clk *clk_sp810_timerclken_of_get(struct of_phandle_args *clkspec, +static struct clk_core *clk_sp810_timerclken_of_get(struct of_phandle_args *clkspec, void *data) { struct clk_sp810 *sp810 = data; diff --git a/drivers/clk/versatile/clk-versatile.c b/drivers/clk/versatile/clk-versatile.c index a76981e..1bdd542 100644 --- a/drivers/clk/versatile/clk-versatile.c +++ b/drivers/clk/versatile/clk-versatile.c @@ -8,7 +8,6 @@ * published by the Free Software Foundation. */ #include -#include #include #include #include @@ -60,7 +59,7 @@ static const struct clk_icst_desc versatile_auxosc_desc __initconst = { static void __init cm_osc_setup(struct device_node *np, const struct clk_icst_desc *desc) { - struct clk *clk = ERR_PTR(-EINVAL); + struct clk_core *clk = ERR_PTR(-EINVAL); const char *clk_name = np->name; const char *parent_name; diff --git a/drivers/clk/versatile/clk-vexpress-osc.c b/drivers/clk/versatile/clk-vexpress-osc.c index 529a59c..c9e175f 100644 --- a/drivers/clk/versatile/clk-vexpress-osc.c +++ b/drivers/clk/versatile/clk-vexpress-osc.c @@ -73,7 +73,7 @@ static int vexpress_osc_probe(struct platform_device *pdev) struct clk_lookup *cl = pdev->dev.platform_data; /* Non-DT lookup */ struct clk_init_data init; struct vexpress_osc *osc; - struct clk *clk; + struct clk_core *clk; u32 range[2]; osc = devm_kzalloc(&pdev->dev, sizeof(*osc), GFP_KERNEL); diff --git a/drivers/clk/versatile/clk-vexpress.c b/drivers/clk/versatile/clk-vexpress.c index 2d5e1b4..e77f3d5 100644 --- a/drivers/clk/versatile/clk-vexpress.c +++ b/drivers/clk/versatile/clk-vexpress.c @@ -17,7 +17,7 @@ #include #include -static struct clk *vexpress_sp810_timerclken[4]; +static struct clk_core *vexpress_sp810_timerclken[4]; static DEFINE_SPINLOCK(vexpress_sp810_lock); static void __init vexpress_sp810_init(void __iomem *base) @@ -54,7 +54,7 @@ static const char * const vexpress_clk_24mhz_periphs[] __initconst = { void __init vexpress_clk_init(void __iomem *sp810_base) { - struct clk *clk; + struct clk_core *clk; int i; clk = clk_register_fixed_rate(NULL, "dummy_apb_pclk", NULL, @@ -77,7 +77,7 @@ void __init vexpress_clk_init(void __iomem *sp810_base) vexpress_sp810_init(sp810_base); for (i = 0; i < ARRAY_SIZE(vexpress_sp810_timerclken); i++) - WARN_ON(clk_set_parent(vexpress_sp810_timerclken[i], clk)); + WARN_ON(clk_provider_set_parent(vexpress_sp810_timerclken[i], clk)); WARN_ON(clk_register_clkdev(vexpress_sp810_timerclken[0], "v2m-timer0", "sp804")); diff --git a/drivers/clk/x86/clk-lpt.c b/drivers/clk/x86/clk-lpt.c index 812f83f..fbb6807 100644 --- a/drivers/clk/x86/clk-lpt.c +++ b/drivers/clk/x86/clk-lpt.c @@ -10,7 +10,6 @@ * published by the Free Software Foundation. */ -#include #include #include #include @@ -21,7 +20,7 @@ static int lpt_clk_probe(struct platform_device *pdev) { struct lpss_clk_data *drvdata; - struct clk *clk; + struct clk_core *clk; drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); if (!drvdata) diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c index 246cf12..0efdd9a 100644 --- a/drivers/clk/zynq/clkc.c +++ b/drivers/clk/zynq/clkc.c @@ -67,8 +67,8 @@ enum zynq_clk { i2c0_aper, i2c1_aper, uart0_aper, uart1_aper, gpio_aper, lqspi_aper, smc_aper, swdt, dbg_trc, dbg_apb, clk_max}; -static struct clk *ps_clk; -static struct clk *clks[clk_max]; +static struct clk_core *ps_clk; +static struct clk_core *clks[clk_max]; static struct clk_onecell_data clk_data; static DEFINE_SPINLOCK(armpll_lock); @@ -108,7 +108,7 @@ static void __init zynq_clk_register_fclk(enum zynq_clk fclk, const char *clk_name, void __iomem *fclk_ctrl_reg, const char **parents, int enable) { - struct clk *clk; + struct clk_core *clk; u32 enable_reg; char *mux_name; char *div0_name; @@ -154,7 +154,7 @@ static void __init zynq_clk_register_fclk(enum zynq_clk fclk, 0, CLK_GATE_SET_TO_DISABLE, fclk_gate_lock); enable_reg = clk_readl(fclk_gate_reg) & 1; if (enable && !enable_reg) { - if (clk_prepare_enable(clks[fclk])) + if (clk_provider_prepare_enable(clks[fclk])) pr_warn("%s: FCLK%u enable failed\n", __func__, fclk - fclk0); } @@ -181,7 +181,7 @@ static void __init zynq_clk_register_periph_clk(enum zynq_clk clk0, const char *clk_name1, void __iomem *clk_ctrl, const char **parents, unsigned int two_gates) { - struct clk *clk; + struct clk_core *clk; char *mux_name; char *div_name; spinlock_t *lock; @@ -222,7 +222,7 @@ static void __init zynq_clk_setup(struct device_node *np) int i; u32 tmp; int ret; - struct clk *clk; + struct clk_core *clk; char *clk_name; unsigned int fclk_enable = 0; const char *clk_output_name[clk_max]; @@ -333,13 +333,13 @@ static void __init zynq_clk_setup(struct device_node *np) CLK_DIVIDER_ALLOW_ZERO, &ddrclk_lock); clks[ddr2x] = clk_register_gate(NULL, clk_output_name[ddr2x], "ddr2x_div", 0, SLCR_DDR_CLK_CTRL, 1, 0, &ddrclk_lock); - clk_prepare_enable(clks[ddr2x]); + clk_provider_prepare_enable(clks[ddr2x]); clk = clk_register_divider(NULL, "ddr3x_div", "ddrpll", 0, SLCR_DDR_CLK_CTRL, 20, 6, CLK_DIVIDER_ONE_BASED | CLK_DIVIDER_ALLOW_ZERO, &ddrclk_lock); clks[ddr3x] = clk_register_gate(NULL, clk_output_name[ddr3x], "ddr3x_div", 0, SLCR_DDR_CLK_CTRL, 0, 0, &ddrclk_lock); - clk_prepare_enable(clks[ddr3x]); + clk_provider_prepare_enable(clks[ddr3x]); clk = clk_register_divider(NULL, "dci_div0", "ddrpll", 0, SLCR_DCI_CLK_CTRL, 8, 6, CLK_DIVIDER_ONE_BASED | @@ -351,7 +351,7 @@ static void __init zynq_clk_setup(struct device_node *np) clks[dci] = clk_register_gate(NULL, clk_output_name[dci], "dci_div1", CLK_SET_RATE_PARENT, SLCR_DCI_CLK_CTRL, 0, 0, &dciclk_lock); - clk_prepare_enable(clks[dci]); + clk_provider_prepare_enable(clks[dci]); /* Peripheral clocks */ for (i = fclk0; i <= fclk3; i++) { @@ -505,10 +505,10 @@ static void __init zynq_clk_setup(struct device_node *np) /* leave debug clocks in the state the bootloader set them up to */ tmp = clk_readl(SLCR_DBG_CLK_CTRL); if (tmp & DBG_CLK_CTRL_CLKACT_TRC) - if (clk_prepare_enable(clks[dbg_trc])) + if (clk_provider_prepare_enable(clks[dbg_trc])) pr_warn("%s: trace clk enable failed\n", __func__); if (tmp & DBG_CLK_CTRL_CPU_1XCLKACT) - if (clk_prepare_enable(clks[dbg_apb])) + if (clk_provider_prepare_enable(clks[dbg_apb])) pr_warn("%s: debug APB clk enable failed\n", __func__); /* One gated clock for all APER clocks. */ diff --git a/drivers/clk/zynq/pll.c b/drivers/clk/zynq/pll.c index cec9759..5176f65 100644 --- a/drivers/clk/zynq/pll.c +++ b/drivers/clk/zynq/pll.c @@ -193,12 +193,12 @@ static const struct clk_ops zynq_pll_ops = { * @lock Register lock * Returns handle to the registered clock. */ -struct clk *clk_register_zynq_pll(const char *name, const char *parent, +struct clk_core *clk_register_zynq_pll(const char *name, const char *parent, void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index, spinlock_t *lock) { struct zynq_pll *pll; - struct clk *clk; + struct clk_core *clk; u32 reg; const char *parent_arr[1] = {parent}; unsigned long flags = 0; diff --git a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c index 902d768..8e97702 100644 --- a/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c +++ b/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c @@ -15,7 +15,6 @@ * this program. If not, see . */ -#include #include #include "hdmi.h" @@ -24,7 +23,7 @@ struct hdmi_phy_8960 { struct hdmi_phy base; struct hdmi *hdmi; struct clk_hw pll_hw; - struct clk *pll; + struct clk_core *pll; unsigned long pixclk; }; #define to_hdmi_phy_8960(x) container_of(x, struct hdmi_phy_8960, base) diff --git a/drivers/media/platform/exynos4-is/media-dev.c b/drivers/media/platform/exynos4-is/media-dev.c index 2620c48..2fdadd8 100644 --- a/drivers/media/platform/exynos4-is/media-dev.c +++ b/drivers/media/platform/exynos4-is/media-dev.c @@ -11,7 +11,6 @@ */ #include -#include #include #include #include @@ -215,7 +214,7 @@ static int __fimc_pipeline_open(struct exynos_media_pipeline *ep, /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */ if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) { - ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]); + ret = clk_provider_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]); if (ret < 0) return ret; } @@ -225,7 +224,7 @@ static int __fimc_pipeline_open(struct exynos_media_pipeline *ep, return 0; if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) - clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); + clk_provider_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); return ret; } @@ -254,7 +253,7 @@ static int __fimc_pipeline_close(struct exynos_media_pipeline *ep) /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */ if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) - clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); + clk_provider_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); return ret == -ENXIO ? 0 : ret; } @@ -954,7 +953,7 @@ static void fimc_md_put_clocks(struct fimc_md *fmd) while (--i >= 0) { if (IS_ERR(fmd->camclk[i].clock)) continue; - clk_put(fmd->camclk[i].clock); + __clk_put(fmd->camclk[i].clock); fmd->camclk[i].clock = ERR_PTR(-EINVAL); } @@ -962,7 +961,7 @@ static void fimc_md_put_clocks(struct fimc_md *fmd) for (i = 0; i < FIMC_MAX_WBCLKS; i++) { if (IS_ERR(fmd->wbclk[i])) continue; - clk_put(fmd->wbclk[i]); + __clk_put(fmd->wbclk[i]); fmd->wbclk[i] = ERR_PTR(-EINVAL); } } @@ -971,7 +970,7 @@ static int fimc_md_get_clocks(struct fimc_md *fmd) { struct device *dev = &fmd->pdev->dev; char clk_name[32]; - struct clk *clock; + struct clk_core *clock; int i, ret = 0; for (i = 0; i < FIMC_MAX_CAMCLKS; i++) @@ -979,7 +978,7 @@ static int fimc_md_get_clocks(struct fimc_md *fmd) for (i = 0; i < FIMC_MAX_CAMCLKS; i++) { snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i); - clock = clk_get(dev, clk_name); + clock = clk_provider_get(dev, clk_name); if (IS_ERR(clock)) { dev_err(dev, "Failed to get clock: %s\n", clk_name); @@ -1001,7 +1000,7 @@ static int fimc_md_get_clocks(struct fimc_md *fmd) for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) { snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i); - clock = clk_get(dev, clk_name); + clock = clk_provider_get(dev, clk_name); if (IS_ERR(clock)) { v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n", clk_name); diff --git a/drivers/media/platform/exynos4-is/media-dev.h b/drivers/media/platform/exynos4-is/media-dev.h index 0321454..f24dac6 100644 --- a/drivers/media/platform/exynos4-is/media-dev.h +++ b/drivers/media/platform/exynos4-is/media-dev.h @@ -9,7 +9,6 @@ #ifndef FIMC_MDEVICE_H_ #define FIMC_MDEVICE_H_ -#include #include #include #include @@ -72,7 +71,7 @@ struct fimc_csis_info { }; struct fimc_camclk_info { - struct clk *clock; + struct clk_core *clock; int use_count; unsigned long frequency; }; @@ -124,7 +123,7 @@ struct fimc_md { struct fimc_sensor_info sensor[FIMC_MAX_SENSORS]; int num_sensors; struct fimc_camclk_info camclk[FIMC_MAX_CAMCLKS]; - struct clk *wbclk[FIMC_MAX_WBCLKS]; + struct clk_core *wbclk[FIMC_MAX_WBCLKS]; struct fimc_lite *fimc_lite[FIMC_LITE_MAX_DEVS]; struct fimc_dev *fimc[FIMC_MAX_DEVS]; struct fimc_is *fimc_is; @@ -141,7 +140,7 @@ struct fimc_md { } pinctl; struct cam_clk_provider { - struct clk *clks[FIMC_MAX_CAMCLKS]; + struct clk_core *clks[FIMC_MAX_CAMCLKS]; struct clk_onecell_data clk_data; struct device_node *of_node; struct cam_clk camclk[FIMC_MAX_CAMCLKS]; diff --git a/drivers/media/platform/omap3isp/isp.h b/drivers/media/platform/omap3isp/isp.h index 2c314ee..5fcedd6 100644 --- a/drivers/media/platform/omap3isp/isp.h +++ b/drivers/media/platform/omap3isp/isp.h @@ -133,7 +133,7 @@ struct isp_xclk { struct isp_device *isp; struct clk_hw hw; struct clk_lookup *lookup; - struct clk *clk; + struct clk_core *clk; enum isp_xclk_id id; spinlock_t lock; /* Protects enabled and divider */ diff --git a/drivers/rtc/rtc-hym8563.c b/drivers/rtc/rtc-hym8563.c index b936bb4..ea21bd1 100644 --- a/drivers/rtc/rtc-hym8563.c +++ b/drivers/rtc/rtc-hym8563.c @@ -398,11 +398,11 @@ static const struct clk_ops hym8563_clkout_ops = { .set_rate = hym8563_clkout_set_rate, }; -static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563) +static struct clk_core *hym8563_clkout_register_clk(struct hym8563 *hym8563) { struct i2c_client *client = hym8563->client; struct device_node *node = client->dev.of_node; - struct clk *clk; + struct clk_core *clk; struct clk_init_data init; int ret; diff --git a/drivers/staging/imx-drm/imx-tve.c b/drivers/staging/imx-drm/imx-tve.c index c628fcd..458170b 100644 --- a/drivers/staging/imx-drm/imx-tve.c +++ b/drivers/staging/imx-drm/imx-tve.c @@ -18,7 +18,6 @@ * MA 02110-1301, USA. */ -#include #include #include #include @@ -121,10 +120,10 @@ struct imx_tve { struct regmap *regmap; struct regulator *dac_reg; struct i2c_adapter *ddc; - struct clk *clk; - struct clk *di_sel_clk; + struct clk_core *clk; + struct clk_core *di_sel_clk; struct clk_hw clk_hw_di; - struct clk *di_clk; + struct clk_core *di_clk; int vsync_pin; int hsync_pin; }; @@ -149,7 +148,7 @@ static void tve_enable(struct imx_tve *tve) if (!tve->enabled) { tve->enabled = true; - clk_prepare_enable(tve->clk); + clk_provider_prepare_enable(tve->clk); ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, TVE_IPU_CLK_EN | TVE_EN, TVE_IPU_CLK_EN | TVE_EN); @@ -176,7 +175,7 @@ static void tve_disable(struct imx_tve *tve) tve->enabled = false; ret = regmap_update_bits(tve->regmap, TVE_COM_CONF_REG, TVE_IPU_CLK_EN | TVE_EN, 0); - clk_disable_unprepare(tve->clk); + clk_provider_disable_unprepare(tve->clk); } } @@ -251,12 +250,12 @@ static int imx_tve_connector_mode_valid(struct drm_connector *connector, unsigned long rate; /* pixel clock with 2x oversampling */ - rate = clk_round_rate(tve->clk, 2000UL * mode->clock) / 2000; + rate = clk_provider_round_rate(tve->clk, 2000UL * mode->clock) / 2000; if (rate == mode->clock) return MODE_OK; /* pixel clock without oversampling */ - rate = clk_round_rate(tve->clk, 1000UL * mode->clock) / 1000; + rate = clk_provider_round_rate(tve->clk, 1000UL * mode->clock) / 1000; if (rate == mode->clock) return MODE_OK; @@ -325,13 +324,13 @@ static void imx_tve_encoder_mode_set(struct drm_encoder *encoder, * and enable 4x oversampling for lower resolutions */ rate = 2000UL * mode->clock; - clk_set_rate(tve->clk, rate); - rounded_rate = clk_get_rate(tve->clk); + clk_provider_set_rate(tve->clk, rate); + rounded_rate = clk_provider_get_rate(tve->clk); if (rounded_rate >= rate) div = 2; - clk_set_rate(tve->di_clk, rounded_rate / div); + clk_provider_set_rate(tve->di_clk, rounded_rate / div); - ret = clk_set_parent(tve->di_sel_clk, tve->di_clk); + ret = clk_provider_set_parent(tve->di_sel_clk, tve->di_clk); if (ret < 0) { dev_err(tve->dev, "failed to set di_sel parent to tve_di: %d\n", ret); @@ -643,7 +642,7 @@ static int imx_tve_bind(struct device *dev, struct device *master, void *data) return ret; } - tve->clk = devm_clk_get(dev, "tve"); + tve->clk = devm_clk_provider_get(dev, "tve"); if (IS_ERR(tve->clk)) { dev_err(dev, "failed to get high speed tve clock: %ld\n", PTR_ERR(tve->clk)); @@ -651,7 +650,7 @@ static int imx_tve_bind(struct device *dev, struct device *master, void *data) } /* this is the IPU DI clock input selector, can be parented to tve_di */ - tve->di_sel_clk = devm_clk_get(dev, "di_sel"); + tve->di_sel_clk = devm_clk_provider_get(dev, "di_sel"); if (IS_ERR(tve->di_sel_clk)) { dev_err(dev, "failed to get ipu di mux clock: %ld\n", PTR_ERR(tve->di_sel_clk)); diff --git a/include/asm-generic/clkdev.h b/include/asm-generic/clkdev.h index 90a32a6..4320225 100644 --- a/include/asm-generic/clkdev.h +++ b/include/asm-generic/clkdev.h @@ -15,10 +15,10 @@ #include -struct clk; +struct clk_core; -static inline int __clk_get(struct clk *clk) { return 1; } -static inline void __clk_put(struct clk *clk) { } +static inline int __clk_get(struct clk_core *clk) { return 1; } +static inline void __clk_put(struct clk_core *clk) { } static inline struct clk_lookup_alloc *__clkdev_alloc(size_t size) { diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h index e8d8a35..6b9e6b4 100644 --- a/include/linux/clk/ti.h +++ b/include/linux/clk/ti.h @@ -22,8 +22,8 @@ * @mult_div1_reg: register containing the DPLL M and N bitfields * @mult_mask: mask of the DPLL M bitfield in @mult_div1_reg * @div1_mask: mask of the DPLL N bitfield in @mult_div1_reg - * @clk_bypass: struct clk pointer to the clock's bypass clock input - * @clk_ref: struct clk pointer to the clock's reference clock input + * @clk_bypass: struct clk_core pointer to the clock's bypass clock input + * @clk_ref: struct clk_core pointer to the clock's reference clock input * @control_reg: register containing the DPLL mode bitfield * @enable_mask: mask of the DPLL mode bitfield in @control_reg * @last_rounded_rate: cache of the last rate result of omap2_dpll_round_rate() @@ -68,8 +68,8 @@ struct dpll_data { void __iomem *mult_div1_reg; u32 mult_mask; u32 div1_mask; - struct clk *clk_bypass; - struct clk *clk_ref; + struct clk_core *clk_bypass; + struct clk_core *clk_ref; void __iomem *control_reg; u32 enable_mask; unsigned long last_rounded_rate; @@ -251,7 +251,7 @@ extern const struct clk_ops ti_clk_mux_ops; #define to_clk_hw_omap(_hw) container_of(_hw, struct clk_hw_omap, hw) -void omap2_init_clk_hw_omap_clocks(struct clk *clk); +void omap2_init_clk_hw_omap_clocks(struct clk_core *clk); int omap3_noncore_dpll_enable(struct clk_hw *hw); void omap3_noncore_dpll_disable(struct clk_hw *hw); int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate, diff --git a/include/linux/clk/zynq.h b/include/linux/clk/zynq.h index a990a59..6c35291 100644 --- a/include/linux/clk/zynq.h +++ b/include/linux/clk/zynq.h @@ -25,7 +25,7 @@ void zynq_clock_init(void); -struct clk *clk_register_zynq_pll(const char *name, const char *parent, +struct clk_core *clk_register_zynq_pll(const char *name, const char *parent, void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index, spinlock_t *lock); #endif diff --git a/include/linux/platform_data/si5351.h b/include/linux/platform_data/si5351.h index a947ab8..4b34c69 100644 --- a/include/linux/platform_data/si5351.h +++ b/include/linux/platform_data/si5351.h @@ -107,8 +107,8 @@ struct si5351_clkout_config { * @clkout: array of clkout configuration */ struct si5351_platform_data { - struct clk *clk_xtal; - struct clk *clk_clkin; + struct clk_core *clk_xtal; + struct clk_core *clk_clkin; enum si5351_pll_src pll_src[2]; struct si5351_clkout_config clkout[8]; }; diff --git a/sound/soc/mxs/mxs-saif.c b/sound/soc/mxs/mxs-saif.c index 231d7e7..a24367d 100644 --- a/sound/soc/mxs/mxs-saif.c +++ b/sound/soc/mxs/mxs-saif.c @@ -682,11 +682,11 @@ static int mxs_saif_mclk_init(struct platform_device *pdev) { struct mxs_saif *saif = platform_get_drvdata(pdev); struct device_node *np = pdev->dev.of_node; - struct clk *clk; + struct clk_core *clk; int ret; clk = clk_register_divider(&pdev->dev, "mxs_saif_mclk", - __clk_get_name(saif->clk), 0, + clk_get_name(saif->clk), 0, saif->base + SAIF_CTRL, BP_SAIF_CTRL_BITCLK_MULT_RATE, 3, 0, NULL); -- 1.9.3