[U-Boot] [PATCH v5 14/14] dm: tegra: Enable driver model for serial

From: Simon Glass <sjg@chromium.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v5 14/14] dm: tegra: Enable driver model for serial
Date: Thu,  4 Sep 2014 16:27:36 -0600	[thread overview]
Message-ID: <1409869656-29160-15-git-send-email-sjg@chromium.org> (raw)
In-Reply-To: <1409869656-29160-1-git-send-email-sjg@chromium.org>

Use driver model for serial ports.

Since Tegra now uses driver model for serial, adjust the definition of
V_NS16550_CLK so that it is clear that this is only used for SPL.

Signed-off-by: Simon Glass <sjg@chromium.org>
---

Changes in v5: None
Changes in v4:
- Add a separate Tegra serial driver to deal with the clock issue
- Add new CONFIG_TEGRA_SERIAL option to enable dm driver
- Use hard-coded UART clock from Tegra configuration

Changes in v3:
- Add new patch to enable driver model for serial on tegra
- Add new patch to use V_NS16550_CLK only in SPL builds

Changes in v2: None

 drivers/serial/Makefile        |  1 +
 drivers/serial/serial_tegra.c  | 38 ++++++++++++++++++++++++++++++++++++++
 include/configs/tegra-common.h |  9 ++++++++-
 3 files changed, 47 insertions(+), 1 deletion(-)
 create mode 100644 drivers/serial/serial_tegra.c

diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 5ae6416..853a8c6 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -38,6 +38,7 @@ obj-$(CONFIG_BFIN_SERIAL) += serial_bfin.o
 obj-$(CONFIG_FSL_LPUART) += serial_lpuart.o
 obj-$(CONFIG_MXS_AUART) += mxs_auart.o
 obj-$(CONFIG_ARC_SERIAL) += serial_arc.o
+obj-$(CONFIG_TEGRA_SERIAL) += serial_tegra.o
 
 ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_USB_TTY) += usbtty.o
diff --git a/drivers/serial/serial_tegra.c b/drivers/serial/serial_tegra.c
new file mode 100644
index 0000000..7eb70e1
--- /dev/null
+++ b/drivers/serial/serial_tegra.c
@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2014 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <ns16550.h>
+#include <serial.h>
+
+static const struct udevice_id tegra_serial_ids[] = {
+	{ .compatible = "nvidia,tegra20-uart" },
+	{ }
+};
+
+static int tegra_serial_ofdata_to_platdata(struct udevice *dev)
+{
+	struct ns16550_platdata *plat = dev_get_platdata(dev);
+	int ret;
+
+	ret = ns16550_serial_ofdata_to_platdata(dev);
+	if (ret)
+		return ret;
+	plat->clock = V_NS16550_CLK;
+
+	return 0;
+}
+U_BOOT_DRIVER(serial_ns16550) = {
+	.name	= "serial_tegra20",
+	.id	= UCLASS_SERIAL,
+	.of_match = tegra_serial_ids,
+	.ofdata_to_platdata = tegra_serial_ofdata_to_platdata,
+	.platdata_auto_alloc_size = sizeof(struct ns16550_platdata),
+	.priv_auto_alloc_size = sizeof(struct NS16550),
+	.probe = ns16550_serial_probe,
+	.ops	= &ns16550_serial_ops,
+};
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index f1187f1..834b3d5 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -21,6 +21,9 @@
 #define CONFIG_DM
 #define CONFIG_CMD_DM
 #define CONFIG_DM_GPIO
+#ifndef CONFIG_SPL_BUILD
+#define CONFIG_DM_SERIAL
+#endif
 
 #define CONFIG_SYS_TIMER_RATE		1000000
 #define CONFIG_SYS_TIMER_COUNTER	NV_PA_TMRUS_BASE
@@ -46,10 +49,14 @@
 /*
  * NS16550 Configuration
  */
-#define CONFIG_SYS_NS16550
+#ifdef CONFIG_SPL_BUILD
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
+#else
+#define CONFIG_TEGRA_SERIAL
+#endif
+#define CONFIG_SYS_NS16550
 
 /*
  * Common HW configuration.
-- 
2.1.0.rc2.206.gedb03e5
