From mboxrd@z Thu Jan 1 00:00:00 1970 From: Yijing Wang Subject: [PATCH v1 07/21] x86/MSI: Use MSI chip framework to configure MSI/MSI-X irq Date: Fri, 5 Sep 2014 18:09:52 +0800 Message-ID: <1409911806-10519-8-git-send-email-wangyijing__36580.4468201988$1409910864$gmane$org@huawei.com> References: <1409911806-10519-1-git-send-email-wangyijing@huawei.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1XPqCw-0007Ab-01 for xen-devel@lists.xenproject.org; Fri, 05 Sep 2014 09:53:30 +0000 In-Reply-To: <1409911806-10519-1-git-send-email-wangyijing@huawei.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Bjorn Helgaas Cc: linux-mips@linux-mips.org, linux-ia64@vger.kernel.org, linux-pci@vger.kernel.org, Bharat.Bhushan@freescale.com, Yijing Wang , sparclinux@vger.kernel.org, linux-arch@vger.kernel.org, linux-s390@vger.kernel.org, Russell King , Joerg Roedel , x86@kernel.org, Sebastian Ott , Benjamin Herrenschmidt , xen-devel@lists.xenproject.org, arnab.basu@freescale.com, Arnd Bergmann , Chris Metcalf , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, Xinwei Hu , Tony Luck , Ralf Baechle , iommu@lists.linux-foundation.org, Wuyun , linuxppc-dev@lists.ozlabs.org, "David S. Miller" List-Id: xen-devel@lists.xenproject.org Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Signed-off-by: Yijing Wang --- arch/x86/include/asm/pci.h | 1 + arch/x86/kernel/apic/io_apic.c | 12 ++++++++++++ 2 files changed, 13 insertions(+), 0 deletions(-) diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h index 0892ea0..878a06d 100644 --- a/arch/x86/include/asm/pci.h +++ b/arch/x86/include/asm/pci.h @@ -101,6 +101,7 @@ void native_teardown_msi_irq(unsigned int irq); void native_restore_msi_irqs(struct pci_dev *dev); int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc, unsigned int irq_base, unsigned int irq_offset); +extern struct msi_chip *x86_msi_chip; #else #define native_setup_msi_irqs NULL #define native_teardown_msi_irq NULL diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 2a2ec28..882b95e 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c @@ -3337,6 +3337,18 @@ int default_setup_hpet_msi(unsigned int irq, unsigned int id) } #endif +struct msi_chip apic_msi_chip = { + .setup_irqs = native_setup_msi_irqs, + .teardown_irq = native_teardown_msi_irq, +}; + +struct msi_chip *arch_find_msi_chip(struct pci_dev *dev) +{ + return x86_msi_chip; +} + +struct msi_chip *x86_msi_chip = &apic_msi_chip; + #endif /* CONFIG_PCI_MSI */ /* * Hypertransport interrupt support -- 1.7.1