From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:52471) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XTXpA-0008N5-Ac for qemu-devel@nongnu.org; Mon, 15 Sep 2014 11:04:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XTXp1-0007rt-5l for qemu-devel@nongnu.org; Mon, 15 Sep 2014 11:04:16 -0400 Received: from mail-we0-x22c.google.com ([2a00:1450:400c:c03::22c]:46963) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XTXp0-0007rm-Rv for qemu-devel@nongnu.org; Mon, 15 Sep 2014 11:04:07 -0400 Received: by mail-we0-f172.google.com with SMTP id k48so4167600wev.3 for ; Mon, 15 Sep 2014 08:04:06 -0700 (PDT) Sender: Paolo Bonzini From: Paolo Bonzini Date: Mon, 15 Sep 2014 17:03:36 +0200 Message-Id: <1410793421-6453-10-git-send-email-pbonzini@redhat.com> In-Reply-To: <1410793421-6453-1-git-send-email-pbonzini@redhat.com> References: <1410793421-6453-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PATCH 09/14] ppc: introduce ppc_get_crf and ppc_set_crf List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: tommusta@gmail.com, agraf@suse.de These two functions will group together four CR bits into a single value, once we change the representation of condition registers. Signed-off-by: Paolo Bonzini --- linux-user/main.c | 2 +- target-ppc/cpu.h | 10 ++++++++++ target-ppc/excp_helper.c | 2 +- target-ppc/fpu_helper.c | 6 ++++-- target-ppc/int_helper.c | 14 +++++++------- target-ppc/translate.c | 13 +++++++------ 6 files changed, 30 insertions(+), 17 deletions(-) diff --git a/linux-user/main.c b/linux-user/main.c index 472a16d..152c031 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -1550,7 +1550,7 @@ static int do_store_exclusive(CPUPPCState *env) } } } - env->crf[0] = (stored << 1) | xer_so; + ppc_set_crf(env, 0, (stored << 1) | xer_so); env->reserve_addr = (target_ulong)-1; } if (!segv) { diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 0c0196d..91eac17 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1217,6 +1217,16 @@ static inline void ppc_set_cr(CPUPPCState *env, uint32_t cr) } } +static inline uint32_t ppc_get_crf(const CPUPPCState *env, int i) +{ + return env->crf[i]; +} + +static inline void ppc_set_crf(CPUPPCState *env, int i, uint32_t val) +{ + env->crf[i] = val; +} + static inline uint64_t ppc_dump_gpr(CPUPPCState *env, int gprn) { uint64_t gprv; diff --git a/target-ppc/excp_helper.c b/target-ppc/excp_helper.c index 96ad9d7..08637c1 100644 --- a/target-ppc/excp_helper.c +++ b/target-ppc/excp_helper.c @@ -504,7 +504,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp) env->error_code); } #endif - msr |= env->crf[0] << 28; + msr |= ppc_get_crf(env, 0) << 28; msr |= env->error_code; /* key, D/I, S/L bits */ /* Set way using a LRU mechanism */ msr |= ((env->last_way + 1) & (env->nb_ways - 1)) << 17; diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c index b4e6d72..8cf321b 100644 --- a/target-ppc/fpu_helper.c +++ b/target-ppc/fpu_helper.c @@ -1099,7 +1099,8 @@ void helper_fcmpu(CPUPPCState *env, uint64_t arg1, uint64_t arg2, env->fpscr &= ~(0x0F << FPSCR_FPRF); env->fpscr |= (0x01 << FPSCR_FPRF) << fpcc; - env->crf[crfD] = (1 << fpcc); + ppc_set_crf(env, crfD, 1 << fpcc); + if (unlikely(fpcc == CRF_SO && (float64_is_signaling_nan(farg1.d) || float64_is_signaling_nan(farg2.d)))) { @@ -1130,7 +1131,8 @@ void helper_fcmpo(CPUPPCState *env, uint64_t arg1, uint64_t arg2, env->fpscr &= ~(0x0F << FPSCR_FPRF); env->fpscr |= (0x01 << FPSCR_FPRF) << fpcc; - env->crf[crfD] = (1 << fpcc); + ppc_set_crf(env, crfD, 1 << fpcc); + if (unlikely(fpcc == CRF_SO)) { if (float64_is_signaling_nan(farg1.d) || float64_is_signaling_nan(farg2.d)) { diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c index 54e8998..b76a895 100644 --- a/target-ppc/int_helper.c +++ b/target-ppc/int_helper.c @@ -294,7 +294,7 @@ void helper_mtocrf(CPUPPCState *env, target_ulong cr, uint32_t mask) int i; for (i = ARRAY_SIZE(env->crf); --i >= 0; ) { if (mask & 1) { - env->crf[i] = cr & 0x0F; + ppc_set_crf(env, i, cr & 0x0F); } cr >>= 4; mask >>= 1; @@ -657,7 +657,7 @@ VCF(sx, int32_to_float32, s32) none |= result; \ } \ if (record) { \ - env->crf[6] = ((all != 0) << 3) | ((none == 0) << 1); \ + ppc_set_crf(env, 6, ((all != 0) << 3) | ((none == 0) << 1)); \ } \ } #define VCMP(suffix, compare, element) \ @@ -703,7 +703,7 @@ VCMP(gtsd, >, s64) none |= result; \ } \ if (record) { \ - env->crf[6] = ((all != 0) << 3) | ((none == 0) << 1); \ + ppc_set_crf(env, 6, ((all != 0) << 3) | ((none == 0) << 1)); \ } \ } #define VCMPFP(suffix, compare, order) \ @@ -737,7 +737,7 @@ static inline void vcmpbfp_internal(CPUPPCState *env, ppc_avr_t *r, } } if (record) { - env->crf[6] = (all_in == 0) << 1; + ppc_set_crf(env, 6, (all_in == 0) << 1); } } @@ -2558,7 +2558,7 @@ target_ulong helper_dlmzb(CPUPPCState *env, target_ulong high, for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { if ((high & mask) == 0) { if (update_Rc) { - env->crf[0] = 0x4; + ppc_set_crf(env, 0, 0x4); } goto done; } @@ -2567,7 +2567,7 @@ target_ulong helper_dlmzb(CPUPPCState *env, target_ulong high, for (mask = 0xFF000000; mask != 0; mask = mask >> 8) { if ((low & mask) == 0) { if (update_Rc) { - env->crf[0] = 0x8; + ppc_set_crf(env, 0, 0x8); } goto done; } @@ -2575,7 +2575,7 @@ target_ulong helper_dlmzb(CPUPPCState *env, target_ulong high, } i = 8; if (update_Rc) { - env->crf[0] = 0x2; + ppc_set_crf(env, 0, 0x2); } done: env->xer = (env->xer & ~0x7F) | i; diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 52062a8..9ff8763 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -11102,18 +11102,19 @@ void ppc_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function cpu_fprintf, cpu_fprintf(f, "\n"); } cpu_fprintf(f, "CR "); - for (i = 0; i < 8; i++) - cpu_fprintf(f, "%01x", env->crf[i]); + for (i = 0; i < 8; i++) { + cpu_fprintf(f, "%01x", ppc_get_crf(env, i)); + } cpu_fprintf(f, " ["); for (i = 0; i < 8; i++) { char a = '-'; - if (env->crf[i] & 0x08) + if (ppc_get_crf(env, i) & 0x08) a = 'L'; - else if (env->crf[i] & 0x04) + else if (ppc_get_crf(env, i) & 0x04) a = 'G'; - else if (env->crf[i] & 0x02) + else if (ppc_get_crf(env, i) & 0x02) a = 'E'; - cpu_fprintf(f, " %c%c", a, env->crf[i] & 0x01 ? 'O' : ' '); + cpu_fprintf(f, " %c%c", a, ppc_get_crf(env, i) & 0x01 ? 'O' : ' '); } cpu_fprintf(f, " ] RES " TARGET_FMT_lx "\n", env->reserve_addr); -- 1.8.3.1