From mboxrd@z Thu Jan  1 00:00:00 1970
From: Chin Liang See <clsee@altera.com>
Date: Wed, 17 Sep 2014 07:00:42 -0500
Subject: [U-Boot] [PATCH 00/35][RFC] arm: socfpga: Usability fixes
In-Reply-To: <201409171352.46679.marex@denx.de>
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	<1410953355.7769.16.camel@clsee-VirtualBox.altera.com>
	<201409171352.46679.marex@denx.de>
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On Wed, 2014-09-17 at 13:52 +0200, marex at denx.de wrote:
> On Wednesday, September 17, 2014 at 01:29:15 PM, Chin Liang See wrote:
> [...]
> > A quick test from my side and result as below:
> > 
> > 1. SDRAM access is working where I can read and write to few spots. :)
> > 
> > SOCFPGA_CYCLONE5 # md 0
> > 00000000: 00000000 aaaaaaaa aaaaaaaa aaaaaaaa    ................
> > SOCFPGA_CYCLONE5 # mw 0 12345678 100
> > SOCFPGA_CYCLONE5 # md 0
> > 00000000: 12345678 12345678 12345678 12345678    xV4.xV4.xV4.xV4.
> > SOCFPGA_CYCLONE5 # md 100000
> > 00100000: eafffffd fbff4b3f fffffffe fdff33be    ....?K.......3..
> > SOCFPGA_CYCLONE5 # mw 100000 23456789 100
> > SOCFPGA_CYCLONE5 # md 100000
> > 00100000: 23456789 23456789 23456789 23456789    .gE#.gE#.gE#.gE#
> > SOCFPGA_CYCLONE5 #
> 
> What does that mean?

I recall Pavel was having issue when he is accessing 1MB of memory at 0.
I believe this is gone as this new patch works well for me.

> 
> > 2. Ethernet seems not working for me.
> > But I will look into this to find out any missing pieces.
> > 
> > SOCFPGA_CYCLONE5 # setenv ethaddr 02:11:22:33:44:55
> > SOCFPGA_CYCLONE5 # dhcp
> > Speed: 1000, full duplex
> > BOOTP broadcast 1
> > BOOTP broadcast 2
> > BOOTP broadcast 3
> > BOOTP broadcast 4
> > BOOTP broadcast 5
> > BOOTP broadcast 6
> > BOOTP broadcast 7
> > BOOTP broadcast 8
> > BOOTP broadcast 9
> > BOOTP broadcast 10
> > BOOTP broadcast 11
> > BOOTP broadcast 12
> > BOOTP broadcast 13
> > BOOTP broadcast 14
> > BOOTP broadcast 15
> > BOOTP broadcast 16
> > BOOTP broadcast 17
> > 
> > Retry time exceeded; starting again
> 
> This is on the SoCDK, right ?

Yup, Altera SoCDK.


> 
> > 3. MMC is not enabled in SocFPGA.
> > I recall there is a patch from Pavel.
> > I believe its pending for v2 due to some comments.
> 
> This should be in the tree in fact. Is CONFIG_CMD_MMC defined ?

I didn't see any MMC configuration at include/configs/socfpga_cyclone5
at mainline nor the new patch series. Wonder I might miss out any ACKed
patch?

Thanks
Chin Liang