From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40249) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XWAgq-0005D4-CM for qemu-devel@nongnu.org; Mon, 22 Sep 2014 16:58:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1XWAgk-0005fw-D2 for qemu-devel@nongnu.org; Mon, 22 Sep 2014 16:58:32 -0400 Received: from mail-qc0-x22d.google.com ([2607:f8b0:400d:c01::22d]:49887) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1XWAgk-0005dz-9g for qemu-devel@nongnu.org; Mon, 22 Sep 2014 16:58:26 -0400 Received: by mail-qc0-f173.google.com with SMTP id w7so780563qcr.32 for ; Mon, 22 Sep 2014 13:58:20 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Mon, 22 Sep 2014 13:57:34 -0700 Message-Id: <1411419461-24390-5-git-send-email-rth@twiddle.net> In-Reply-To: <1411419461-24390-1-git-send-email-rth@twiddle.net> References: <1411419461-24390-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PULL 04/11] tcg-sparc: Use ADDXC in setcond_i64 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org Similar to the ADDC tricks we use in setcond_i32. Signed-off-by: Richard Henderson --- tcg/sparc/tcg-target.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index 3b232d6..d0bd08c 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -716,6 +716,23 @@ static void tcg_out_setcond_i32(TCGContext *s, TCGCond cond, TCGReg ret, static void tcg_out_setcond_i64(TCGContext *s, TCGCond cond, TCGReg ret, TCGReg c1, int32_t c2, int c2const) { + if (use_vis3_instructions) { + switch (cond) { + case TCG_COND_NE: + if (c2 != 0) { + break; + } + c2 = c1, c2const = 0, c1 = TCG_REG_G0; + /* FALLTHRU */ + case TCG_COND_LTU: + tcg_out_cmp(s, c1, c2, c2const); + tcg_out_arith(s, ret, TCG_REG_G0, TCG_REG_G0, ARITH_ADDXC); + return; + default: + break; + } + } + /* For 64-bit signed comparisons vs zero, we can avoid the compare if the input does not overlap the output. */ if (c2 == 0 && !is_unsigned_cond(cond) && c1 != ret) { -- 1.9.3