From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tamas K Lengyel Subject: [PATCH for-4.5 v8 16/19] xen/arm: Instruction prefetch abort (X) mem_event handling Date: Tue, 23 Sep 2014 15:14:27 +0200 Message-ID: <1411478070-13836-17-git-send-email-tklengyel@sec.in.tum.de> References: <1411478070-13836-1-git-send-email-tklengyel@sec.in.tum.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1411478070-13836-1-git-send-email-tklengyel@sec.in.tum.de> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: xen-devel@lists.xen.org Cc: ian.campbell@citrix.com, tim@xen.org, julien.grall@linaro.org, ian.jackson@eu.citrix.com, stefano.stabellini@citrix.com, andres@lagarcavilla.org, jbeulich@suse.com, dgdegra@tycho.nsa.gov, Tamas K Lengyel List-Id: xen-devel@lists.xenproject.org Add missing structure definition for iabt and update the trap handling mechanism to only inject the exception if the mem_access checker decides to do so. Signed-off-by: Tamas K Lengyel --- v8: - Revert to arch specific p2m_mem_access_check. - Retire iabt_fsc enum and use FSC_FLT instead. - Complete the struct definition of hsr_iabt. v7: - Use the new common mem_access_check. v6: - Make npfec a const. v4: - Don't mark instruction fetch violation as read violation. - Use new struct npfec to pass violation info. v2: - Add definition for instruction abort instruction fetch status codes (enum iabt_ifsc) and only call p2m_mem_access_check for traps triggered for permission violations. --- xen/arch/arm/traps.c | 31 +++++++++++++++++++++++++++++-- xen/include/asm-arm/processor.h | 13 ++++++++++++- 2 files changed, 41 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 695a33b..3d645b3 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -1844,8 +1844,35 @@ done: static void do_trap_instr_abort_guest(struct cpu_user_regs *regs, union hsr hsr) { - register_t addr = READ_SYSREG(FAR_EL2); - inject_iabt_exception(regs, addr, hsr.len); + struct hsr_iabt iabt = hsr.iabt; + int rc; + paddr_t gpa; + register_t gva = READ_SYSREG(FAR_EL2); + + rc = gva_to_ipa(gva, &gpa); + if ( -EFAULT == rc ) + return; + + switch ( iabt.ifsc & 0x3f ) + { + case FSC_FLT_PERM ... FSC_FLT_PERM + 3: + { + const struct npfec npfec = { + .insn_fetch = 1, + .gla_valid = 1, + .kind = iabt.s1ptw ? npfec_kind_in_gpt : npfec_kind_with_gla + }; + + rc = p2m_mem_access_check(gpa, gva, npfec); + + /* Trap was triggered by mem_access, work here is done */ + if ( !rc ) + return; + } + break; + } + + inject_iabt_exception(regs, gva, hsr.len); } static void do_trap_data_abort_guest(struct cpu_user_regs *regs, diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index 07a421c..46e408a 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -432,10 +432,21 @@ union hsr { } sysreg; /* HSR_EC_SYSREG */ #endif + struct hsr_iabt { + unsigned long ifsc:6; /* Instruction fault status code */ + unsigned long res0:1; + unsigned long s1ptw:1; /* Fault during a stage 1 translation table walk */ + unsigned long res1:1; + unsigned long eat:1; /* External abort type */ + unsigned long res2:15; + unsigned long len:1; /* Instruction length */ + unsigned long ec:6; /* Exception Class */ + } iabt; /* HSR_EC_INSTR_ABORT_* */ + struct hsr_dabt { unsigned long dfsc:6; /* Data Fault Status Code */ unsigned long write:1; /* Write / not Read */ - unsigned long s1ptw:1; /* */ + unsigned long s1ptw:1; /* Fault during a stage 1 translation table walk */ unsigned long cache:1; /* Cache Maintenance */ unsigned long eat:1; /* External Abort Type */ #ifdef CONFIG_ARM_32 -- 2.1.0