From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chao Zhu Subject: [PATCH 06/12] Add spinlock operation for IBM Power architecture Date: Fri, 26 Sep 2014 05:36:20 -0400 Message-ID: <1411724186-8036-7-git-send-email-bjzhuc@cn.ibm.com> References: <1411724186-8036-1-git-send-email-bjzhuc@cn.ibm.com> To: dev-VfR2kkLFssw@public.gmane.org Return-path: In-Reply-To: <1411724186-8036-1-git-send-email-bjzhuc-vtt25B2cwJLQT0dZR+AlfA@public.gmane.org> List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces-VfR2kkLFssw@public.gmane.org Sender: "dev" The spinlock operations implemented with assembly code in DPDK only support x86. This patch add spinlock operations for IBM Power architecture. Signed-off-by: Chao Zhu --- .../include/powerpc/arch/rte_spinlock_arch.h | 88 ++++++++++++++++++++ 1 files changed, 88 insertions(+), 0 deletions(-) create mode 100644 lib/librte_eal/common/include/powerpc/arch/rte_spinlock_arch.h diff --git a/lib/librte_eal/common/include/powerpc/arch/rte_spinlock_arch.h b/lib/librte_eal/common/include/powerpc/arch/rte_spinlock_arch.h new file mode 100644 index 0000000..3e4c0ea --- /dev/null +++ b/lib/librte_eal/common/include/powerpc/arch/rte_spinlock_arch.h @@ -0,0 +1,88 @@ +/* + * BSD LICENSE + * + * Copyright (C) IBM Corporation 2014. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of IBM Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _RTE_SPINLOCK_ARCH_H_ +#define _RTE_SPINLOCK_ARCH_H_ + +#include +#include + +/* Fixme: Use intrinsics to implement the spinlock on Power architecture */ + +/** + * The rte_spinlock_t type. + */ +typedef struct { + volatile int locked; /**< lock status 0 = unlocked, 1 = locked */ +} rte_spinlock_t; + +/** + * Take the spinlock. + * + * @param sl + * A pointer to the spinlock. + */ +static inline void +rte_arch_spinlock_lock(rte_spinlock_t *sl) +{ + while (__sync_lock_test_and_set(&sl->locked, 1)) + while(sl->locked) + rte_pause(); +} + +/** + * Release the spinlock. + * + * @param sl + * A pointer to the spinlock. + */ +static inline void +rte_arch_spinlock_unlock (rte_spinlock_t *sl) +{ + __sync_lock_release(&sl->locked); +} + +/** + * Try to take the lock. + * + * @param sl + * A pointer to the spinlock. + * @return + * 1 if the lock is successfully taken; 0 otherwise. + */ +static inline int +rte_arch_spinlock_trylock (rte_spinlock_t *sl) +{ + return (__sync_lock_test_and_set(&sl->locked,1) == 0); +} + +#endif /* _RTE_SPINLOCK_ARCH_H_ */ \ No newline at end of file -- 1.7.1