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From: Damien Lespiau <damien.lespiau@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH i-g-t 09/26] rendercopy/skl: update instruction length
Date: Fri, 26 Sep 2014 15:03:07 +0100	[thread overview]
Message-ID: <1411740204-25709-9-git-send-email-damien.lespiau@intel.com> (raw)
In-Reply-To: <1411740204-25709-1-git-send-email-damien.lespiau@intel.com>

From: Zhao Yakui <yakui.zhao@intel.com>

This is ported from that on BDW.

v2: Only bump the prefix when we need to program the instruction
differently with the previous generations.

Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
---
 lib/rendercopy_gen9.c | 89 +++++++++++++++++++++++++++++++++++----------------
 1 file changed, 61 insertions(+), 28 deletions(-)

diff --git a/lib/rendercopy_gen9.c b/lib/rendercopy_gen9.c
index 40f1c6f..2c769bc 100644
--- a/lib/rendercopy_gen9.c
+++ b/lib/rendercopy_gen9.c
@@ -490,8 +490,9 @@ gen6_create_scissor_rect(struct intel_batchbuffer *batch)
 }
 
 static void
-gen6_emit_sip(struct intel_batchbuffer *batch) {
-	OUT_BATCH(GEN6_STATE_SIP | 0);
+gen8_emit_sip(struct intel_batchbuffer *batch) {
+	OUT_BATCH(GEN6_STATE_SIP | (3 - 2));
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 }
 
@@ -575,9 +576,7 @@ gen8_emit_cc(struct intel_batchbuffer *batch) {
 
 static void
 gen8_emit_multisample(struct intel_batchbuffer *batch) {
-	OUT_BATCH(GEN8_3DSTATE_MULTISAMPLE | 2);
-	OUT_BATCH(0);
-	OUT_BATCH(0);
+	OUT_BATCH(GEN8_3DSTATE_MULTISAMPLE | 0);
 	OUT_BATCH(0);
 
 	OUT_BATCH(GEN6_3DSTATE_SAMPLE_MASK);
@@ -585,14 +584,18 @@ gen8_emit_multisample(struct intel_batchbuffer *batch) {
 }
 
 static void
-gen7_emit_vs(struct intel_batchbuffer *batch) {
+gen8_emit_vs(struct intel_batchbuffer *batch) {
 	OUT_BATCH(GEN7_3DSTATE_BINDING_TABLE_POINTERS_VS);
 	OUT_BATCH(0);
 
 	OUT_BATCH(GEN7_3DSTATE_SAMPLER_STATE_POINTERS_VS);
 	OUT_BATCH(0);
 
-	OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | (7-2));
+	OUT_BATCH(GEN6_3DSTATE_CONSTANT_VS | (11-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -600,7 +603,10 @@ gen7_emit_vs(struct intel_batchbuffer *batch) {
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
-	OUT_BATCH(GEN6_3DSTATE_VS | (6-2));
+	OUT_BATCH(GEN6_3DSTATE_VS | (9-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -609,8 +615,12 @@ gen7_emit_vs(struct intel_batchbuffer *batch) {
 }
 
 static void
-gen7_emit_hs(struct intel_batchbuffer *batch) {
-	OUT_BATCH(GEN7_3DSTATE_CONSTANT_HS | (7-2));
+gen8_emit_hs(struct intel_batchbuffer *batch) {
+	OUT_BATCH(GEN7_3DSTATE_CONSTANT_HS | (11-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -618,7 +628,9 @@ gen7_emit_hs(struct intel_batchbuffer *batch) {
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
-	OUT_BATCH(GEN7_3DSTATE_HS | (7-2));
+	OUT_BATCH(GEN7_3DSTATE_HS | (9-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -634,8 +646,12 @@ gen7_emit_hs(struct intel_batchbuffer *batch) {
 }
 
 static void
-gen7_emit_gs(struct intel_batchbuffer *batch) {
-	OUT_BATCH(GEN7_3DSTATE_CONSTANT_GS | (7-2));
+gen8_emit_gs(struct intel_batchbuffer *batch) {
+	OUT_BATCH(GEN7_3DSTATE_CONSTANT_GS | (11-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -643,7 +659,10 @@ gen7_emit_gs(struct intel_batchbuffer *batch) {
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
-	OUT_BATCH(GEN7_3DSTATE_GS | (7-2));
+	OUT_BATCH(GEN7_3DSTATE_GS | (10-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -659,8 +678,12 @@ gen7_emit_gs(struct intel_batchbuffer *batch) {
 }
 
 static void
-gen7_emit_ds(struct intel_batchbuffer *batch) {
-	OUT_BATCH(GEN7_3DSTATE_CONSTANT_DS | (7-2));
+gen8_emit_ds(struct intel_batchbuffer *batch) {
+	OUT_BATCH(GEN7_3DSTATE_CONSTANT_DS | (11-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -668,7 +691,10 @@ gen7_emit_ds(struct intel_batchbuffer *batch) {
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
-	OUT_BATCH(GEN7_3DSTATE_DS | (6-2));
+	OUT_BATCH(GEN7_3DSTATE_DS | (9-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -683,15 +709,15 @@ gen7_emit_ds(struct intel_batchbuffer *batch) {
 }
 
 static void
-gen7_emit_null_state(struct intel_batchbuffer *batch) {
-	gen7_emit_hs(batch);
+gen8_emit_null_state(struct intel_batchbuffer *batch) {
+	gen8_emit_hs(batch);
 	OUT_BATCH(GEN7_3DSTATE_TE | (4-2));
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
-	gen7_emit_gs(batch);
-	gen7_emit_ds(batch);
-	gen7_emit_vs(batch);
+	gen8_emit_gs(batch);
+	gen8_emit_ds(batch);
+	gen8_emit_vs(batch);
 }
 
 static void
@@ -782,7 +808,8 @@ gen8_emit_ps(struct intel_batchbuffer *batch, uint32_t kernel) {
 
 static void
 gen8_emit_depth(struct intel_batchbuffer *batch) {
-	OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (7-2));
+	OUT_BATCH(GEN7_3DSTATE_DEPTH_BUFFER | (8-2));
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
@@ -790,11 +817,15 @@ gen8_emit_depth(struct intel_batchbuffer *batch) {
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
-	OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER | (3-2));
+	OUT_BATCH(GEN7_3DSTATE_HIER_DEPTH_BUFFER | (5-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
-	OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER | (3-2));
+	OUT_BATCH(GEN7_3DSTATE_STENCIL_BUFFER | (5-2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 }
@@ -913,7 +944,7 @@ void gen9_render_copyfunc(struct intel_batchbuffer *batch,
 	 * order */
 	OUT_BATCH(GEN6_PIPELINE_SELECT | PIPELINE_SELECT_3D);
 
-	gen6_emit_sip(batch);
+	gen8_emit_sip(batch);
 
 	gen7_emit_push_constants(batch);
 
@@ -930,9 +961,11 @@ void gen9_render_copyfunc(struct intel_batchbuffer *batch,
 
 	gen8_emit_multisample(batch);
 
-	gen7_emit_null_state(batch);
+	gen8_emit_null_state(batch);
 
-	OUT_BATCH(GEN7_3DSTATE_STREAMOUT | 1);
+	OUT_BATCH(GEN7_3DSTATE_STREAMOUT | (5 - 2));
+	OUT_BATCH(0);
+	OUT_BATCH(0);
 	OUT_BATCH(0);
 	OUT_BATCH(0);
 
-- 
1.8.3.1

  parent reply	other threads:[~2014-09-26 14:04 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-09-26 14:02 [PATCH i-g-t 01/26] skl: Add SKL PCI ids Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 02/26] skl: Add gen9 to intel_gen() Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 03/26] skl: initialize instdone bits for gen9 Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 04/26] list-workarounds/skl: Add Skylake to the list of valid platorms Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 05/26] rendercopy/skl: Start the gen9 rendercopy from the gen8 version Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 06/26] rendercopy/skl: Set the 3DSTATE_VF state Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 07/26] rendercopy/skl: Update 3DSTATE_SBE Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 08/26] rendercopy/skl: Pass the context to rendercopy function on SKL Damien Lespiau
2014-09-26 14:03 ` Damien Lespiau [this message]
2014-09-26 14:03 ` [PATCH i-g-t 10/26] rendercopy/skl: Set Instruction Buffer size Modify Enable to 1 Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 11/26] rendercopy/skl: Fix the STATE_BASE_ADDRESS instruction length Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 12/26] rendercopy/skl: Fix the 3DSTATE_DS " Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 13/26] rendercopy/skl: Emit 3DSTATE_WM_HZ_OP Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 14/26] rendercopy/skl: Follow the spec to add the Pipeline selection mask Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 15/26] rendercopy/skl: Set the URB VS start address to 4 Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 16/26] assembler/skl: Add gen 9 to the -g option Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 17/26] assembler/skl: Redefine the cache agent type for some fixed functions Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 18/26] assembler/skl: update read(...) Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 19/26] assembler/skl: Add more cache agent for write(...) Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 20/26] assembler/skl: update the extdesc field for SEND instruction Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 21/26] mediafill/skl: Start the gen9 media_fill from the gen8 version Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 22/26] mediafill/skl: follow the spec to update STATE_BASE_ADDRESS command Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 23/26] mediafill/skl: Follow the spec to add pipeline_select mask Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 24/26] mediafill/skl: Follow spec to configure FORCE_MEDIA_AWAKE in PIPELINE_SELECTION Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 25/26] mediafill/skl: Follow spec to configure media sampler DOP clock gating " Damien Lespiau
2014-09-26 14:03 ` [PATCH i-g-t 26/26] lib/skl: Return the render copy and media fill functions Damien Lespiau
2014-09-30 11:24 ` [PATCH i-g-t 01/26] skl: Add SKL PCI ids Damien Lespiau

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