From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41144) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YEiqY-0002bd-Hr for qemu-devel@nongnu.org; Fri, 23 Jan 2015 13:20:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YEiqX-0000wS-Ke for qemu-devel@nongnu.org; Fri, 23 Jan 2015 13:20:42 -0500 Received: from mnementh.archaic.org.uk ([2001:8b0:1d0::1]:54980) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YEiqW-0000ph-V6 for qemu-devel@nongnu.org; Fri, 23 Jan 2015 13:20:41 -0500 From: Peter Maydell Date: Fri, 23 Jan 2015 18:20:17 +0000 Message-Id: <1422037228-5363-1-git-send-email-peter.maydell@linaro.org> Subject: [Qemu-devel] [PATCH 00/11] target-arm: handle mmu_idx/translation regimes properly List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Edgar E. Iglesias" , Andrew Jones , Greg Bellows , =?UTF-8?q?Alex=20Benn=C3=A9e?= , patches@linaro.org This patchseries fixes up our somewhat broken handling of mmu_idx values: * implement the full set of 7 mmu_idxes we need for supporting EL2 and EL3 * pass the mmu_idx in the TB flags rather than EL or a priv flag, so we can generate code with the correct kind of access * identify the correct mmu_idx to use for AT/ATS system insns * pass mmu_idx into get_phys_addr() and use it within that family of functions as an indication of which translation regime to do a v-to-p lookup for, instead of relying on an is_user flag plus the current CPU state * some minor indent stuff on the end It does not contain: * complete support for EL2 or 64-bit EL3; in some places I have added the code where it was obvious and easy; in others I have just left TODO marker comments * the 'tlb_flush_for_mmuidx' functionality I proposed in a previous mail; I preferred to get the semantics right in this patchset first before improving the efficiency later Peter Maydell (11): cpu_ldst.h: Allow NB_MMU_MODES to be 7 target-arm: Make arm_current_el() return sensible values for M profile target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT target-arm: Define correct mmu_idx values and pass them in TB flags target-arm: Use correct mmu_idx for unprivileged loads and stores target-arm: Don't define any MMU_MODE*_SUFFIXes target-arm: Split AArch64 cases out of ats_write() target-arm: Pass mmu_idx to get_phys_addr() target-arm: Use mmu_idx in get_phys_addr() target-arm: Reindent ancient page-table-walk code target-arm: Fix brace style in reindented code include/exec/cpu_ldst.h | 28 ++- target-arm/cpu.h | 119 ++++++++-- target-arm/helper.c | 534 +++++++++++++++++++++++++++++++-------------- target-arm/translate-a64.c | 24 +- target-arm/translate.c | 31 ++- target-arm/translate.h | 3 +- 6 files changed, 544 insertions(+), 195 deletions(-) -- 1.9.1