From: Wenyou Yang <wenyou.yang@atmel.com> To: <nicolas.ferre@atmel.com>, <linux@arm.linux.org.uk> Cc: <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <alexandre.belloni@free-electrons.com>, <sylvain.rochet@finsecur.com>, <peda@axentia.se>, <wenyou.yang@atmel.com> Subject: [PATCH 1/7] pm: at91: achieve the memory controller's type from the dts file. Date: Mon, 26 Jan 2015 18:04:24 +0800 [thread overview] Message-ID: <1422266664-24416-1-git-send-email-wenyou.yang@atmel.com> (raw) In-Reply-To: <1422266617-24381-1-git-send-email-wenyou.yang@atmel.com> Instead of achieve the ram controller's tpye through the SoC, through the sram controller configuration, it is more sensible. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> --- arch/arm/mach-at91/generic.h | 5 +++++ arch/arm/mach-at91/pm.c | 9 +-------- arch/arm/mach-at91/setup.c | 28 ++++++++++++++++++++++++---- 3 files changed, 30 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index a8ee83e..41796bf 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -44,4 +44,9 @@ void __init at91_sam9g45_pm_init(void) { } void __init at91_sam9x5_pm_init(void) { } #endif +struct at91_pm_struct { + unsigned long uhp_udp_mask; + int memctrl; +}; + #endif /* _AT91_GENERIC_H */ diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 7473978..f75dc32 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -35,10 +35,7 @@ #include "generic.h" #include "pm.h" -static struct { - unsigned long uhp_udp_mask; - int memctrl; -} at91_pm_data; +struct at91_pm_struct at91_pm_data; static int at91_pm_valid_state(suspend_state_t state) { @@ -287,14 +284,12 @@ void __init at91_rm9200_pm_init(void) at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0); at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP; - at91_pm_data.memctrl = AT91_MEMCTRL_MC; at91_pm_init(); } void __init at91_sam9260_pm_init(void) { - at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC; at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP; return at91_pm_init(); } @@ -302,13 +297,11 @@ void __init at91_sam9260_pm_init(void) void __init at91_sam9g45_pm_init(void) { at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP; - at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR; return at91_pm_init(); } void __init at91_sam9x5_pm_init(void) { at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP; - at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR; return at91_pm_init(); } diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index b8dba9f..7924663 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -26,6 +26,8 @@ #include "generic.h" #include "pm.h" +extern struct at91_pm_struct at91_pm_data; + struct at91_init_soc __initdata at91_boot_soc; struct at91_socinfo at91_soc_initdata; @@ -361,11 +363,25 @@ void __init at91_ioremap_matrix(u32 base_addr) panic(pr_fmt("Impossible to ioremap at91_matrix_base\n")); } +struct at91_ramc_of_data { + u8 ramc_type; +}; + +static const struct at91_ramc_of_data at91rm9200_ramc_of_data = { + .ramc_type = AT91_MEMCTRL_MC, +}; +static const struct at91_ramc_of_data at91sam9260_ramc_of_data = { + .ramc_type = AT91_MEMCTRL_SDRAMC, +}; +static const struct at91_ramc_of_data at91sam9g45_ramc_of_data = { + .ramc_type = AT91_MEMCTRL_DDRSDR, +}; + static struct of_device_id ramc_ids[] = { - { .compatible = "atmel,at91rm9200-sdramc" }, - { .compatible = "atmel,at91sam9260-sdramc" }, - { .compatible = "atmel,at91sam9g45-ddramc" }, - { .compatible = "atmel,sama5d3-ddramc" }, + { .compatible = "atmel,at91rm9200-sdramc", .data = &at91rm9200_ramc_of_data }, + { .compatible = "atmel,at91sam9260-sdramc", .data = &at91sam9260_ramc_of_data }, + { .compatible = "atmel,at91sam9g45-ddramc", .data = &at91sam9g45_ramc_of_data }, + { .compatible = "atmel,sama5d3-ddramc", .data = &at91sam9g45_ramc_of_data }, { /*sentinel*/ } }; @@ -374,12 +390,16 @@ static void at91_dt_ramc(void) struct device_node *np; const struct of_device_id *of_id; int idx = 0; + const struct at91_ramc_of_data *of_data; for_each_matching_node_and_match(np, ramc_ids, &of_id) { at91_ramc_base[idx] = of_iomap(np, 0); if (!at91_ramc_base[idx]) panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx); + of_data = of_id->data; + at91_pm_data.memctrl = of_data->ramc_type; + idx++; } -- 1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: wenyou.yang@atmel.com (Wenyou Yang) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/7] pm: at91: achieve the memory controller's type from the dts file. Date: Mon, 26 Jan 2015 18:04:24 +0800 [thread overview] Message-ID: <1422266664-24416-1-git-send-email-wenyou.yang@atmel.com> (raw) In-Reply-To: <1422266617-24381-1-git-send-email-wenyou.yang@atmel.com> Instead of achieve the ram controller's tpye through the SoC, through the sram controller configuration, it is more sensible. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> --- arch/arm/mach-at91/generic.h | 5 +++++ arch/arm/mach-at91/pm.c | 9 +-------- arch/arm/mach-at91/setup.c | 28 ++++++++++++++++++++++++---- 3 files changed, 30 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index a8ee83e..41796bf 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -44,4 +44,9 @@ void __init at91_sam9g45_pm_init(void) { } void __init at91_sam9x5_pm_init(void) { } #endif +struct at91_pm_struct { + unsigned long uhp_udp_mask; + int memctrl; +}; + #endif /* _AT91_GENERIC_H */ diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 7473978..f75dc32 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -35,10 +35,7 @@ #include "generic.h" #include "pm.h" -static struct { - unsigned long uhp_udp_mask; - int memctrl; -} at91_pm_data; +struct at91_pm_struct at91_pm_data; static int at91_pm_valid_state(suspend_state_t state) { @@ -287,14 +284,12 @@ void __init at91_rm9200_pm_init(void) at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0); at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP; - at91_pm_data.memctrl = AT91_MEMCTRL_MC; at91_pm_init(); } void __init at91_sam9260_pm_init(void) { - at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC; at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP; return at91_pm_init(); } @@ -302,13 +297,11 @@ void __init at91_sam9260_pm_init(void) void __init at91_sam9g45_pm_init(void) { at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP; - at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR; return at91_pm_init(); } void __init at91_sam9x5_pm_init(void) { at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP; - at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR; return at91_pm_init(); } diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index b8dba9f..7924663 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -26,6 +26,8 @@ #include "generic.h" #include "pm.h" +extern struct at91_pm_struct at91_pm_data; + struct at91_init_soc __initdata at91_boot_soc; struct at91_socinfo at91_soc_initdata; @@ -361,11 +363,25 @@ void __init at91_ioremap_matrix(u32 base_addr) panic(pr_fmt("Impossible to ioremap at91_matrix_base\n")); } +struct at91_ramc_of_data { + u8 ramc_type; +}; + +static const struct at91_ramc_of_data at91rm9200_ramc_of_data = { + .ramc_type = AT91_MEMCTRL_MC, +}; +static const struct at91_ramc_of_data at91sam9260_ramc_of_data = { + .ramc_type = AT91_MEMCTRL_SDRAMC, +}; +static const struct at91_ramc_of_data at91sam9g45_ramc_of_data = { + .ramc_type = AT91_MEMCTRL_DDRSDR, +}; + static struct of_device_id ramc_ids[] = { - { .compatible = "atmel,at91rm9200-sdramc" }, - { .compatible = "atmel,at91sam9260-sdramc" }, - { .compatible = "atmel,at91sam9g45-ddramc" }, - { .compatible = "atmel,sama5d3-ddramc" }, + { .compatible = "atmel,at91rm9200-sdramc", .data = &at91rm9200_ramc_of_data }, + { .compatible = "atmel,at91sam9260-sdramc", .data = &at91sam9260_ramc_of_data }, + { .compatible = "atmel,at91sam9g45-ddramc", .data = &at91sam9g45_ramc_of_data }, + { .compatible = "atmel,sama5d3-ddramc", .data = &at91sam9g45_ramc_of_data }, { /*sentinel*/ } }; @@ -374,12 +390,16 @@ static void at91_dt_ramc(void) struct device_node *np; const struct of_device_id *of_id; int idx = 0; + const struct at91_ramc_of_data *of_data; for_each_matching_node_and_match(np, ramc_ids, &of_id) { at91_ramc_base[idx] = of_iomap(np, 0); if (!at91_ramc_base[idx]) panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx); + of_data = of_id->data; + at91_pm_data.memctrl = of_data->ramc_type; + idx++; } -- 1.7.9.5
next prev parent reply other threads:[~2015-01-26 10:05 UTC|newest] Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-01-26 10:03 [PATCH 0/7] AT91 pm improvements for 3.20 Wenyou Yang 2015-01-26 10:03 ` Wenyou Yang 2015-01-26 10:04 ` Wenyou Yang [this message] 2015-01-26 10:04 ` [PATCH 1/7] pm: at91: achieve the memory controller's type from the dts file Wenyou Yang 2015-01-26 10:06 ` [PATCH 2/7] pm: at91: pm_suspend: add the WFI support for ARMv7 Wenyou Yang 2015-01-26 10:06 ` Wenyou Yang 2015-01-26 13:05 ` Sergei Shtylyov 2015-01-26 13:05 ` Sergei Shtylyov 2015-01-27 4:44 ` Yang, Wenyou 2015-01-27 4:44 ` Yang, Wenyou 2015-01-28 11:25 ` Lorenzo Pieralisi 2015-01-28 11:25 ` Lorenzo Pieralisi 2015-01-29 2:36 ` Yang, Wenyou 2015-01-29 2:36 ` Yang, Wenyou 2015-01-29 12:22 ` Lorenzo Pieralisi 2015-01-29 12:22 ` Lorenzo Pieralisi 2015-01-30 7:23 ` Yang, Wenyou 2015-01-30 7:23 ` Yang, Wenyou 2015-01-30 10:17 ` Lorenzo Pieralisi 2015-01-30 10:17 ` Lorenzo Pieralisi 2015-01-30 10:44 ` Lorenzo Pieralisi 2015-01-30 10:44 ` Lorenzo Pieralisi 2015-01-26 10:06 ` [PATCH 3/7] pm: at91: pm_suspend: MOR register KEY was missing Wenyou Yang 2015-01-26 10:06 ` Wenyou Yang 2015-01-26 10:07 ` [PATCH 4/7] ARM: at91: enable the L2 Cache controller Wenyou Yang 2015-01-26 10:07 ` Wenyou Yang 2015-01-26 11:46 ` Mark Rutland 2015-01-26 11:46 ` Mark Rutland 2015-01-26 12:45 ` Russell King - ARM Linux 2015-01-26 12:45 ` Russell King - ARM Linux 2015-01-26 22:36 ` Alexandre Belloni 2015-01-26 22:36 ` Alexandre Belloni 2015-01-27 5:11 ` Yang, Wenyou 2015-01-27 5:11 ` Yang, Wenyou 2015-01-26 10:07 ` [PATCH 5/7] pm: at91: add disable/enable the L1/L2 cache while suspend/resume Wenyou Yang 2015-01-26 10:07 ` Wenyou Yang 2015-01-26 10:08 ` [PATCH 6/7] pm: at91: add achieve the mpddrc peripheral ID and the DDR clock ID support Wenyou Yang 2015-01-26 10:08 ` Wenyou Yang 2015-01-26 11:49 ` Mark Rutland 2015-01-26 11:49 ` Mark Rutland 2015-01-27 5:24 ` Yang, Wenyou 2015-01-27 5:24 ` Yang, Wenyou 2015-01-26 10:08 ` [PATCH 7/7] pm: at91: add disable/enable the mpddrc's clock and DDR clock support Wenyou Yang 2015-01-26 10:08 ` Wenyou Yang
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