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From: Paul Bolle <pebolle@tiscali.nl>
To: Vikas Shivappa <vikas.shivappa@linux.intel.com>
Cc: linux-kernel@vger.kernel.org, vikas.shivappa@intel.com,
	hpa@zytor.com, tglx@linutronix.de, mingo@kernel.org,
	tj@kernel.org, peterz@infradead.org, matt.fleming@intel.com,
	will.auld@intel.com
Subject: Re: [PATCH 1/6] x86/intel_cat: Intel Cache Allocation Technology detection
Date: Wed, 28 Jan 2015 23:11:28 +0100	[thread overview]
Message-ID: <1422483088.3621.56.camel@x220> (raw)
In-Reply-To: <1422403209-15533-2-git-send-email-vikas.shivappa@linux.intel.com>

Trivial nit below.

On Tue, 2015-01-27 at 16:00 -0800, Vikas Shivappa wrote:
> This patch adds support for the new Cache Allocation Technology (CAT)
> feature found in future Intel Xeon processors.  It includes CPUID
> enumeration routines for CAT and new values to track CAT resources to
> the cpuinfo_x86 structure.
> 
> Cache Allocation Technology(CAT) provides a way for the Software
> (OS/VMM) to restrict cache allocation to a defined 'subset' of cache
> which may be overlapping with other 'subsets'.  This feature is used
> when allocating a line in cache ie when pulling new data into the cache.
> The programming of the h/w is done via programming  MSRs.
> 
> More information about CAT be found in the Intel (R) x86 Architecture
> Software Developer Manual, section 17.15.
> 
> Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com>

[...]

> diff --git a/init/Kconfig b/init/Kconfig
> index 9afb971..475b7b7 100644
> --- a/init/Kconfig
> +++ b/init/Kconfig
> @@ -961,6 +961,17 @@ config CPUSETS
>  
>  	  Say N if unsure.
>  
> +config CGROUP_CAT
> +  bool "Cache Allocation Technology cgroup subsystem"
> +  depends on X86_64

Odd indentation. Just make it a tab (as I suppose the indentation of
"help" already is).

> +	help
> +	  This option provides framework to allocate cache lines when
> +	  applications fill cache.
> +	  This can be used by users to configure how much cache that can be
> +	  allocated to different PIDs.
> +
> +	  Say N if unsure.
> +
>  config PROC_PID_CPUSET
>  	bool "Include legacy /proc/<pid>/cpuset file"
>  	depends on CPUSETS


Paul Bolle


  reply	other threads:[~2015-01-29  3:56 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-01-28  0:00 [PATCH V3 0/6] x86: Intel Cache Allocation Support Vikas Shivappa
2015-01-28  0:00 ` [PATCH 1/6] x86/intel_cat: Intel Cache Allocation Technology detection Vikas Shivappa
2015-01-28 22:11   ` Paul Bolle [this message]
2015-01-28 23:17     ` Vikas Shivappa
2015-02-09 19:50     ` [PATCH 1/6] x86/intel_cat: Intel Cache Allocation Technology Vikas Shivappa
2015-02-03 10:57   ` [PATCH 1/6] x86/intel_cat: Intel Cache Allocation Technology detection Matt Fleming
2015-01-28  0:00 ` [PATCH 2/6] x86/intel_cat: Adds support for Class of service management Vikas Shivappa
2015-01-28  0:00 ` [PATCH 3/6] x86/intel_cat: Support cache bit mask for Intel CAT Vikas Shivappa
2015-01-28  0:00 ` [PATCH 4/6] x86/intel_cat: Implement scheduling support " Vikas Shivappa
2015-01-28  0:00 ` [PATCH 5/6] x86/intel_rdt: Software Cache for IA32_PQR_MSR Vikas Shivappa
2015-01-28  0:00 ` [PATCH 6/6] x86/intel_cat: Intel haswell CAT enumeration Vikas Shivappa

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