From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966906AbbBDPZt (ORCPT ); Wed, 4 Feb 2015 10:25:49 -0500 Received: from mailapp01.imgtec.com ([195.59.15.196]:52650 "EHLO mailapp01.imgtec.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161160AbbBDPWt (ORCPT ); Wed, 4 Feb 2015 10:22:49 -0500 From: Zubair Lutfullah Kakakhel To: CC: , , , , , , , , , , , , Subject: [PATCH_V2 31/34] MIPS: add jz4780 Ingenic vendor ID Date: Wed, 4 Feb 2015 15:22:00 +0000 Message-ID: <1423063323-19419-32-git-send-email-Zubair.Kakakhel@imgtec.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1423063323-19419-1-git-send-email-Zubair.Kakakhel@imgtec.com> References: <1423063323-19419-1-git-send-email-Zubair.Kakakhel@imgtec.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [192.168.154.89] Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Paul Burton With the jz4780, Ingenic switched to use a different vendor ID in the coprocessor 0 PRID register (whilst keeping the product ID & revision the same as the jz4740 & jz4770...). Add a definition for the new vendor ID & handle it in the same way as the older one. Signed-off-by: Paul Burton Cc: Lars-Peter Clausen --- arch/mips/include/asm/cpu.h | 1 + arch/mips/kernel/cpu-probe.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 33866fc..ab00d3b 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -43,6 +43,7 @@ #define PRID_COMP_NETLOGIC 0x0c0000 #define PRID_COMP_CAVIUM 0x0d0000 #define PRID_COMP_INGENIC 0xd00000 +#define PRID_COMP_INGENIC_4780 0xe10000 /* * Assigned Processor ID (implementation) values for bits 15:8 of the PRId diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 5342674..ca98c4a 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1313,6 +1313,7 @@ void cpu_probe(void) cpu_probe_cavium(c, cpu); break; case PRID_COMP_INGENIC: + case PRID_COMP_INGENIC_4780: cpu_probe_ingenic(c, cpu); break; case PRID_COMP_NETLOGIC: -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Zubair Lutfullah Kakakhel Subject: [PATCH_V2 31/34] MIPS: add jz4780 Ingenic vendor ID Date: Wed, 4 Feb 2015 15:22:00 +0000 Message-ID: <1423063323-19419-32-git-send-email-Zubair.Kakakhel@imgtec.com> References: <1423063323-19419-1-git-send-email-Zubair.Kakakhel@imgtec.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1423063323-19419-1-git-send-email-Zubair.Kakakhel@imgtec.com> Sender: linux-kernel-owner@vger.kernel.org To: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org, linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org, Zubair.Kakakhel@imgtec.com, gregkh@linuxfoundation.org, mturquette@linaro.org, sboyd@codeaurora.org, ralf@linux-mips.org, jslaby@suse.cz, tglx@linutronix.de, jason@lakedaemon.net, lars@metafoo.de, paul.burton@imgtec.com List-Id: devicetree@vger.kernel.org From: Paul Burton With the jz4780, Ingenic switched to use a different vendor ID in the coprocessor 0 PRID register (whilst keeping the product ID & revision the same as the jz4740 & jz4770...). Add a definition for the new vendor ID & handle it in the same way as the older one. Signed-off-by: Paul Burton Cc: Lars-Peter Clausen --- arch/mips/include/asm/cpu.h | 1 + arch/mips/kernel/cpu-probe.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 33866fc..ab00d3b 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -43,6 +43,7 @@ #define PRID_COMP_NETLOGIC 0x0c0000 #define PRID_COMP_CAVIUM 0x0d0000 #define PRID_COMP_INGENIC 0xd00000 +#define PRID_COMP_INGENIC_4780 0xe10000 /* * Assigned Processor ID (implementation) values for bits 15:8 of the PRId diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 5342674..ca98c4a 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -1313,6 +1313,7 @@ void cpu_probe(void) cpu_probe_cavium(c, cpu); break; case PRID_COMP_INGENIC: + case PRID_COMP_INGENIC_4780: cpu_probe_ingenic(c, cpu); break; case PRID_COMP_NETLOGIC: -- 1.9.1