From mboxrd@z Thu Jan 1 00:00:00 1970 From: Vijay Purushothaman Subject: [v2 1/5] drm/i915: Add new PHY reg definitions for lock threshold Date: Mon, 16 Feb 2015 15:07:58 +0530 Message-ID: <1424079482-18327-2-git-send-email-vijay.a.purushothaman@linux.intel.com> References: <20150130110902.GB19354@intel.com> <1424079482-18327-1-git-send-email-vijay.a.purushothaman@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 87C226E231 for ; Mon, 16 Feb 2015 01:29:29 -0800 (PST) In-Reply-To: <1424079482-18327-1-git-send-email-vijay.a.purushothaman@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Intel Graphics List-Id: intel-gfx@lists.freedesktop.org QWRkZWQgbmV3IFBIWSByZWdpc3RlciBkZWZpbml0aW9ucyB0byBjb250cm9sIFREQyBidWZmZXIg Y2FsaWJyYXRpb24gYW5kCmRpZ2l0YWwgbG9jayB0aHJlc2hvbGQuCgpTaWduZWQtb2ZmLWJ5OiBW aWpheSBQdXJ1c2hvdGhhbWFuIDx2aWpheS5hLnB1cnVzaG90aGFtYW5AbGludXguaW50ZWwuY29t PgotLS0KIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcmVnLmggfCAgIDEwICsrKysrKysrKysK IDEgZmlsZSBjaGFuZ2VkLCAxMCBpbnNlcnRpb25zKCspCgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9n cHUvZHJtL2k5MTUvaTkxNV9yZWcuaCBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfcmVnLmgK aW5kZXggMWRjOTFkZS4uNTgxNGY2NyAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5MTUv aTkxNV9yZWcuaAorKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oCkBAIC0xMDI1 LDYgKzEwMjUsMTYgQEAgZW51bSBza2xfZGlzcF9wb3dlcl93ZWxscyB7CiAjZGVmaW5lICAgRFBJ T19DSFZfUFJPUF9DT0VGRl9TSElGVAkwCiAjZGVmaW5lIENIVl9QTExfRFc2KGNoKSBfUElQRShj aCwgX0NIVl9QTExfRFc2X0NIMCwgX0NIVl9QTExfRFc2X0NIMSkKIAorI2RlZmluZSBfQ0hWX1BM TF9EVzhfQ0gwCQkweDgwMjAKKyNkZWZpbmUgX0NIVl9QTExfRFc4X0NIMQkJMHg4MUEwCisjZGVm aW5lIENIVl9QTExfRFc4KGNoKSBfUElQRShjaCwgX0NIVl9QTExfRFc4X0NIMCwgX0NIVl9QTExf RFc4X0NIMSkKKworI2RlZmluZSBfQ0hWX1BMTF9EVzlfQ0gwCQkweDgwMjQKKyNkZWZpbmUgX0NI Vl9QTExfRFc5X0NIMQkJMHg4MUE0CisjZGVmaW5lICBEUElPX0NIVl9JTlRfTE9DS19USFJFU0hP TERfU0hJRlQJCTEgLyogMyBiaXRzICovCisjZGVmaW5lICBEUElPX0NIVl9JTlRfTE9DS19USFJF U0hPTERfU0VMX0NPQVJTRQkxIC8qIDE6IGNvYXJzZSAmIDAgOiBmaW5lICAqLworI2RlZmluZSBD SFZfUExMX0RXOShjaCkgX1BJUEUoY2gsIF9DSFZfUExMX0RXOV9DSDAsIF9DSFZfUExMX0RXOV9D SDEpCisKICNkZWZpbmUgX0NIVl9DTU5fRFc1X0NIMCAgICAgICAgICAgICAgIDB4ODExNAogI2Rl ZmluZSAgIENIVl9CVUZSSUdIVEVOQTFfRElTQUJMRQkoMCA8PCAyMCkKICNkZWZpbmUgICBDSFZf QlVGUklHSFRFTkExX05PUk1BTAkoMSA8PCAyMCkKLS0gCjEuNy45LjUKCl9fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QK SW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Au b3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==