From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60075) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YNQFa-0001GF-MR for qemu-devel@nongnu.org; Mon, 16 Feb 2015 13:18:31 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YNQFZ-0001P9-Ts for qemu-devel@nongnu.org; Mon, 16 Feb 2015 13:18:30 -0500 Received: from mail-wi0-x22c.google.com ([2a00:1450:400c:c05::22c]:43703) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YNQFZ-0001P3-Jl for qemu-devel@nongnu.org; Mon, 16 Feb 2015 13:18:29 -0500 Received: by mail-wi0-f172.google.com with SMTP id l15so27778446wiw.5 for ; Mon, 16 Feb 2015 10:18:29 -0800 (PST) Received: from playground.station (net-93-66-73-217.cust.vodafonedsl.it. [93.66.73.217]) by mx.google.com with ESMTPSA id p6sm20746248wia.14.2015.02.16.10.18.27 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 16 Feb 2015 10:18:28 -0800 (PST) Sender: Paolo Bonzini From: Paolo Bonzini Date: Mon, 16 Feb 2015 19:17:51 +0100 Message-Id: <1424110682-14334-11-git-send-email-pbonzini@redhat.com> In-Reply-To: <1424110682-14334-1-git-send-email-pbonzini@redhat.com> References: <1424110682-14334-1-git-send-email-pbonzini@redhat.com> Subject: [Qemu-devel] [PULL 10/21] pcie: remove mmconfig memory leak and wrap mmconfig update with transaction List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org This memory leak was introduced inadvertently by omitting object_unparent. A better fix is to use the new memory_region_set_size instead of destroying and recreating the MMIO region on the fly. Also, ensure that unmapping and remapping the region is done atomically. Acked-by: Michael S. Tsirkin Reviewed-by: Michael S. Tsirkin Reviewed-by: Igor Mammedov Signed-off-by: Paolo Bonzini --- hw/pci/pcie_host.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/hw/pci/pcie_host.c b/hw/pci/pcie_host.c index dfb4a2b..d8afba8 100644 --- a/hw/pci/pcie_host.c +++ b/hw/pci/pcie_host.c @@ -88,6 +88,8 @@ static void pcie_host_init(Object *obj) PCIExpressHost *e = PCIE_HOST_BRIDGE(obj); e->base_addr = PCIE_BASE_ADDR_UNMAPPED; + memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e, "pcie-mmcfg-mmio", + PCIE_MMCFG_SIZE_MAX); } void pcie_host_mmcfg_unmap(PCIExpressHost *e) @@ -104,8 +106,7 @@ void pcie_host_mmcfg_init(PCIExpressHost *e, uint32_t size) assert(size >= PCIE_MMCFG_SIZE_MIN); assert(size <= PCIE_MMCFG_SIZE_MAX); e->size = size; - memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e, - "pcie-mmcfg", e->size); + memory_region_set_size(&e->mmio, e->size); } void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr, @@ -121,10 +122,12 @@ void pcie_host_mmcfg_update(PCIExpressHost *e, hwaddr addr, uint32_t size) { + memory_region_transaction_begin(); pcie_host_mmcfg_unmap(e); if (enable) { pcie_host_mmcfg_map(e, addr, size); } + memory_region_transaction_commit(); } static const TypeInfo pcie_host_type_info = { -- 2.3.0