All of lore.kernel.org
 help / color / mirror / Atom feed
From: Lee Jones <lee.jones@linaro.org>
To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Cc: lee.jones@linaro.org, kernel@stlinux.com, tglx@linutronix.de,
	jason@lakedaemon.net, devicetree@vger.kernel.org
Subject: [PATCH v3 3/8] irqchip: irq-st: Add documentation for STi based syscfg IRQs
Date: Wed, 18 Feb 2015 15:13:59 +0000	[thread overview]
Message-ID: <1424272444-16230-4-git-send-email-lee.jones@linaro.org> (raw)
In-Reply-To: <1424272444-16230-1-git-send-email-lee.jones@linaro.org>

Cc: devicetree@vger.kernel.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 .../interrupt-controller/st,sti-irq-syscfg.txt     | 35 ++++++++++++++++++++++
 1 file changed, 35 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt

diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt
new file mode 100644
index 0000000..ced6014
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt
@@ -0,0 +1,35 @@
+STMicroelectronics STi System Configuration Controlled IRQs
+-----------------------------------------------------------
+
+On STi based systems; External, CTI (Core Sight), PMU (Performance Management),
+and PL310 L2 Cache IRQs are controlled using System Configuration registers.
+This driver is used to unmask them prior to use.
+
+Required properties:
+- compatible	: Should be set to one of:
+			"st,stih415-irq-syscfg"
+			"st,stih416-irq-syscfg"
+			"st,stih407-irq-syscfg"
+			"st,stid127-irq-syscfg"
+- st,syscfg	: Phandle to Cortex-A9 IRQ system config registers
+- st,irq-device	: Array of IRQs to enable - should be 2 in length
+- st,fiq-device	: Array of FIQs to enable - should be 2 in length
+
+Optional properties:
+- st,invert-ext	: External IRQs can be inverted at will.  This property inverts
+		  these IRQs using bitwise logic.  A number of defines have been
+		  provided for convenience:
+			ST_IRQ_SYSCFG_EXT_1_INV
+			ST_IRQ_SYSCFG_EXT_2_INV
+			ST_IRQ_SYSCFG_EXT_3_INV
+Example:
+
+irq-syscfg {
+	compatible    = "st,stih416-irq-syscfg";
+	st,syscfg     = <&syscfg_cpu>;
+	st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
+			<ST_IRQ_SYSCFG_PMU_1>;
+	st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
+			<ST_IRQ_SYSCFG_DISABLED>;
+	st,invert-ext = <(ST_IRQ_SYSCFG_EXT_1_INV | ST_IRQ_SYSCFG_EXT_3_INV)>;
+};
-- 
1.9.1


WARNING: multiple messages have this Message-ID
From: lee.jones@linaro.org (Lee Jones)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 3/8] irqchip: irq-st: Add documentation for STi based syscfg IRQs
Date: Wed, 18 Feb 2015 15:13:59 +0000	[thread overview]
Message-ID: <1424272444-16230-4-git-send-email-lee.jones@linaro.org> (raw)
In-Reply-To: <1424272444-16230-1-git-send-email-lee.jones@linaro.org>

Cc: devicetree at vger.kernel.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
---
 .../interrupt-controller/st,sti-irq-syscfg.txt     | 35 ++++++++++++++++++++++
 1 file changed, 35 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt

diff --git a/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt
new file mode 100644
index 0000000..ced6014
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/st,sti-irq-syscfg.txt
@@ -0,0 +1,35 @@
+STMicroelectronics STi System Configuration Controlled IRQs
+-----------------------------------------------------------
+
+On STi based systems; External, CTI (Core Sight), PMU (Performance Management),
+and PL310 L2 Cache IRQs are controlled using System Configuration registers.
+This driver is used to unmask them prior to use.
+
+Required properties:
+- compatible	: Should be set to one of:
+			"st,stih415-irq-syscfg"
+			"st,stih416-irq-syscfg"
+			"st,stih407-irq-syscfg"
+			"st,stid127-irq-syscfg"
+- st,syscfg	: Phandle to Cortex-A9 IRQ system config registers
+- st,irq-device	: Array of IRQs to enable - should be 2 in length
+- st,fiq-device	: Array of FIQs to enable - should be 2 in length
+
+Optional properties:
+- st,invert-ext	: External IRQs can be inverted at will.  This property inverts
+		  these IRQs using bitwise logic.  A number of defines have been
+		  provided for convenience:
+			ST_IRQ_SYSCFG_EXT_1_INV
+			ST_IRQ_SYSCFG_EXT_2_INV
+			ST_IRQ_SYSCFG_EXT_3_INV
+Example:
+
+irq-syscfg {
+	compatible    = "st,stih416-irq-syscfg";
+	st,syscfg     = <&syscfg_cpu>;
+	st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
+			<ST_IRQ_SYSCFG_PMU_1>;
+	st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
+			<ST_IRQ_SYSCFG_DISABLED>;
+	st,invert-ext = <(ST_IRQ_SYSCFG_EXT_1_INV | ST_IRQ_SYSCFG_EXT_3_INV)>;
+};
-- 
1.9.1

  parent reply	other threads:[~2015-02-18 15:14 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-18 15:13 [PATCH v3 0/8] irqchip: New driver for ST's SysCfg controlled IRQs Lee Jones
2015-02-18 15:13 ` Lee Jones
2015-02-18 15:13 ` [PATCH v3 1/8] dt: bindings: Supply shared ST IRQ defines Lee Jones
2015-02-18 15:13   ` Lee Jones
2015-02-18 15:13   ` Lee Jones
2015-02-18 15:13 ` [PATCH v3 2/8] irqchip: Supply new driver for STi based devices Lee Jones
2015-02-18 15:13   ` Lee Jones
2015-02-18 15:13   ` Lee Jones
2015-02-18 15:13 ` Lee Jones [this message]
2015-02-18 15:13   ` [PATCH v3 3/8] irqchip: irq-st: Add documentation for STi based syscfg IRQs Lee Jones
2015-02-18 15:14 ` [PATCH v3 4/8] ARM: STi: STiH416: Enable Cortex-A9 PMU support Lee Jones
2015-02-18 15:14   ` Lee Jones
2015-02-18 15:14 ` [PATCH v3 5/8] ARM: STi: STiH416: Enable PMU IRQs Lee Jones
2015-02-18 15:14   ` Lee Jones
2015-02-18 15:14   ` Lee Jones
2015-02-18 15:14 ` [PATCH v3 6/8] ARM: STi: STiH407: Enable Cortex-A9 PMU support Lee Jones
2015-02-18 15:14   ` Lee Jones
2015-02-18 15:14 ` [PATCH v3 7/8] ARM: STi: STiH407: Enable PMU IRQs Lee Jones
2015-02-18 15:14   ` Lee Jones
2015-02-18 15:14 ` [PATCH v3 8/8] ARM: STI: Ensure requested STi's SysCfg Controlled IRQs are enabled at boot Lee Jones
2015-02-18 15:14   ` Lee Jones
2015-03-08  4:02 ` [PATCH v3 0/8] irqchip: New driver for ST's SysCfg controlled IRQs Jason Cooper
2015-03-08  4:02   ` Jason Cooper
2015-03-08  4:02   ` Jason Cooper
2015-03-09  7:48   ` Lee Jones
2015-03-09  7:48     ` Lee Jones
2015-03-09  7:48     ` Lee Jones

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1424272444-16230-4-git-send-email-lee.jones@linaro.org \
    --to=lee.jones@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=jason@lakedaemon.net \
    --cc=kernel@stlinux.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.