From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752330AbbBRPQO (ORCPT ); Wed, 18 Feb 2015 10:16:14 -0500 Received: from mail-wg0-f46.google.com ([74.125.82.46]:50813 "EHLO mail-wg0-f46.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751952AbbBRPOT (ORCPT ); Wed, 18 Feb 2015 10:14:19 -0500 From: Lee Jones To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: lee.jones@linaro.org, kernel@stlinux.com, tglx@linutronix.de, jason@lakedaemon.net, devicetree@vger.kernel.org Subject: [PATCH v3 5/8] ARM: STi: STiH416: Enable PMU IRQs Date: Wed, 18 Feb 2015 15:14:01 +0000 Message-Id: <1424272444-16230-6-git-send-email-lee.jones@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1424272444-16230-1-git-send-email-lee.jones@linaro.org> References: <1424272444-16230-1-git-send-email-lee.jones@linaro.org> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This driver is used to enable System Configuration Register controlled External, CTI (Core Sight), PMU (Performance Management), and PL310 L2 Cache IRQs prior to use. Here we are enabling PMU IRQs on both channels. Signed-off-by: Lee Jones --- arch/arm/boot/dts/stih416.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi index cdbf29c..de2afb9 100644 --- a/arch/arm/boot/dts/stih416.dtsi +++ b/arch/arm/boot/dts/stih416.dtsi @@ -13,6 +13,7 @@ #include #include #include +#include / { L2: cache-controller { compatible = "arm,pl310-cache"; @@ -92,6 +93,15 @@ reg = <0xfe4b5100 0x8>; }; + irq-syscfg { + compatible = "st,stih416-irq-syscfg"; + st,syscfg = <&syscfg_cpu>; + st,irq-device = , + ; + st,fiq-device = , + ; + }; + serial2: serial@fed32000{ compatible = "st,asc"; status = "disabled"; -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lee Jones Subject: [PATCH v3 5/8] ARM: STi: STiH416: Enable PMU IRQs Date: Wed, 18 Feb 2015 15:14:01 +0000 Message-ID: <1424272444-16230-6-git-send-email-lee.jones@linaro.org> References: <1424272444-16230-1-git-send-email-lee.jones@linaro.org> Return-path: In-Reply-To: <1424272444-16230-1-git-send-email-lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, kernel-F5mvAk5X5gdBDgjK7y7TUQ@public.gmane.org, tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org, jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org This driver is used to enable System Configuration Register controlled External, CTI (Core Sight), PMU (Performance Management), and PL310 L2 Cache IRQs prior to use. Here we are enabling PMU IRQs on both channels. Signed-off-by: Lee Jones --- arch/arm/boot/dts/stih416.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi index cdbf29c..de2afb9 100644 --- a/arch/arm/boot/dts/stih416.dtsi +++ b/arch/arm/boot/dts/stih416.dtsi @@ -13,6 +13,7 @@ #include #include #include +#include / { L2: cache-controller { compatible = "arm,pl310-cache"; @@ -92,6 +93,15 @@ reg = <0xfe4b5100 0x8>; }; + irq-syscfg { + compatible = "st,stih416-irq-syscfg"; + st,syscfg = <&syscfg_cpu>; + st,irq-device = , + ; + st,fiq-device = , + ; + }; + serial2: serial@fed32000{ compatible = "st,asc"; status = "disabled"; -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: lee.jones@linaro.org (Lee Jones) Date: Wed, 18 Feb 2015 15:14:01 +0000 Subject: [PATCH v3 5/8] ARM: STi: STiH416: Enable PMU IRQs In-Reply-To: <1424272444-16230-1-git-send-email-lee.jones@linaro.org> References: <1424272444-16230-1-git-send-email-lee.jones@linaro.org> Message-ID: <1424272444-16230-6-git-send-email-lee.jones@linaro.org> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This driver is used to enable System Configuration Register controlled External, CTI (Core Sight), PMU (Performance Management), and PL310 L2 Cache IRQs prior to use. Here we are enabling PMU IRQs on both channels. Signed-off-by: Lee Jones --- arch/arm/boot/dts/stih416.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/stih416.dtsi b/arch/arm/boot/dts/stih416.dtsi index cdbf29c..de2afb9 100644 --- a/arch/arm/boot/dts/stih416.dtsi +++ b/arch/arm/boot/dts/stih416.dtsi @@ -13,6 +13,7 @@ #include #include #include +#include / { L2: cache-controller { compatible = "arm,pl310-cache"; @@ -92,6 +93,15 @@ reg = <0xfe4b5100 0x8>; }; + irq-syscfg { + compatible = "st,stih416-irq-syscfg"; + st,syscfg = <&syscfg_cpu>; + st,irq-device = , + ; + st,fiq-device = , + ; + }; + serial2: serial at fed32000{ compatible = "st,asc"; status = "disabled"; -- 1.9.1