From: Sascha Hauer <s.hauer@pengutronix.de> To: Mike Turquette <mturquette@linaro.org> Cc: Matthias Brugger <matthias.bgg@gmail.com>, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, YH Chen <yh.chen@mediatek.com>, kernel@pengutronix.de, Yingjoe Chen <Yingjoe.Chen@mediatek.com>, Eddie Huang <eddie.huang@mediatek.com>, Henry Chen <henryc.chen@mediatek.com> Subject: [PATCH v6]: clk: Add common clock support for Mediatek MT8135 and MT8173 Date: Sun, 22 Feb 2015 12:49:20 +0100 [thread overview] Message-ID: <1424605765-19751-1-git-send-email-s.hauer@pengutronix.de> (raw) This patchset contains the initial common clock support for Mediatek SoCs. Mediatek SoC's clock architecture comprises of various PLLs, dividers, muxes and clock gates. Sascha Changes in v2: - Re-ordered patchset. Fold include/dt-bindings and DT document in 1st patch. Changes in v3: - Rebase to 3.19-rc1. - Refine code. Remove unneed functions, debug logs and comments, and fine tune error logs. Changes in v4: - Support MT8173 platform. - Re-ordered patchset. driver/clk/Makefile in 2nd patch. - Extract the common part definition(mtk_gate/mtk_pll/mtk_mux) from clk-mt8135.c/clk-mt8173.c to clk-mtk.c. - Refine code. Rmove unnessacary debug information and unsed defines, add prefix "mtk_" for static functions. - Remove flag CLK_IGNORE_UNUSED and set flag CLK_SET_RATE_PARENT on gate/mux/fixed-factor. - Use spin_lock_irqsave(&clk_ops_lock, flags) instead of mtk_clk_lock. - Example above include a node for the clock controller itself, followed by the i2c controller example above. Changes in v5: - Add reset controller support for pericfg/infracfg - Use regmap for the gates - remove now unnecessary spinlock for the gates - Add PMIC wrapper support as of v3 Changes in v6: - rework PLL support, only a fraction of original size now - Move binding docs to Documentation/devicetree/bindings/arm/mediatek since the units are not really clock specific (they contain reset controllers)
WARNING: multiple messages have this Message-ID (diff)
From: s.hauer@pengutronix.de (Sascha Hauer) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v6]: clk: Add common clock support for Mediatek MT8135 and MT8173 Date: Sun, 22 Feb 2015 12:49:20 +0100 [thread overview] Message-ID: <1424605765-19751-1-git-send-email-s.hauer@pengutronix.de> (raw) This patchset contains the initial common clock support for Mediatek SoCs. Mediatek SoC's clock architecture comprises of various PLLs, dividers, muxes and clock gates. Sascha Changes in v2: - Re-ordered patchset. Fold include/dt-bindings and DT document in 1st patch. Changes in v3: - Rebase to 3.19-rc1. - Refine code. Remove unneed functions, debug logs and comments, and fine tune error logs. Changes in v4: - Support MT8173 platform. - Re-ordered patchset. driver/clk/Makefile in 2nd patch. - Extract the common part definition(mtk_gate/mtk_pll/mtk_mux) from clk-mt8135.c/clk-mt8173.c to clk-mtk.c. - Refine code. Rmove unnessacary debug information and unsed defines, add prefix "mtk_" for static functions. - Remove flag CLK_IGNORE_UNUSED and set flag CLK_SET_RATE_PARENT on gate/mux/fixed-factor. - Use spin_lock_irqsave(&clk_ops_lock, flags) instead of mtk_clk_lock. - Example above include a node for the clock controller itself, followed by the i2c controller example above. Changes in v5: - Add reset controller support for pericfg/infracfg - Use regmap for the gates - remove now unnecessary spinlock for the gates - Add PMIC wrapper support as of v3 Changes in v6: - rework PLL support, only a fraction of original size now - Move binding docs to Documentation/devicetree/bindings/arm/mediatek since the units are not really clock specific (they contain reset controllers)
next reply other threads:[~2015-02-22 11:49 UTC|newest] Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top 2015-02-22 11:49 Sascha Hauer [this message] 2015-02-22 11:49 ` [PATCH v6]: clk: Add common clock support for Mediatek MT8135 and MT8173 Sascha Hauer 2015-02-22 11:49 ` [PATCH 1/5] clk: mediatek: Add initial common clock support for Mediatek SoCs Sascha Hauer 2015-02-22 11:49 ` Sascha Hauer 2015-03-13 16:46 ` Matthias Brugger 2015-03-13 16:46 ` Matthias Brugger 2015-03-16 5:34 ` Sascha Hauer 2015-03-16 5:34 ` Sascha Hauer 2015-02-22 11:49 ` [PATCH 2/5] clk: mediatek: Add reset controller support Sascha Hauer 2015-02-22 11:49 ` Sascha Hauer 2015-02-22 11:49 ` [PATCH 3/5] clk: mediatek: Add basic clocks for Mediatek MT8135 Sascha Hauer 2015-02-22 11:49 ` Sascha Hauer 2015-03-13 7:44 ` Henry Chen 2015-03-13 7:44 ` Henry Chen 2015-03-16 5:33 ` Sascha Hauer 2015-03-16 5:33 ` Sascha Hauer 2015-03-15 16:27 ` Daniel Kurtz 2015-03-15 16:27 ` Daniel Kurtz 2015-03-15 16:27 ` Daniel Kurtz 2015-03-16 5:33 ` Sascha Hauer 2015-03-16 5:33 ` Sascha Hauer 2015-03-16 5:33 ` Sascha Hauer 2015-02-22 11:49 ` [PATCH 4/5] clk: mediatek: Add basic clocks for Mediatek MT8173 Sascha Hauer 2015-02-22 11:49 ` Sascha Hauer 2015-02-22 11:49 ` [PATCH 5/5] dt-bindings: ARM: Mediatek: Document devicetree bindings for clock/reset controllers Sascha Hauer 2015-02-22 11:49 ` Sascha Hauer 2015-03-09 6:15 ` [PATCH v6]: clk: Add common clock support for Mediatek MT8135 and MT8173 Sascha Hauer 2015-03-09 6:15 ` Sascha Hauer
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