* [PATCH v3 0/9] ARM: at91 cleanups for 4.1 #1
@ 2015-03-11 17:00 ` Alexandre Belloni
0 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
Boris Brezillon, Alexander Stein, Alexandre Belloni
This series removes more mach/headers.
Then it introduces a more scalable SoC detection infrastructure which allows to
remove the at91_map_io/at91_alt_map_io and iotable_init ugliness.
Changes in v3:
- Stop trying to unmap a range that failed ot be mapped
Changes in v2:
- All the SoC names are lowercased
- Removed the unused compatible string
- Use name/subname to display the type and subtype
Alexandre Belloni (7):
ARM: at91: remove unused at91_ioremap_matrix and header
ARM: at91: remove unused _matrix.h headers
ARM: at91/dt: introduce atmel,<chip>-dbgu
ARM: at91: at91rm9200 use SoC detection infrastructure
ARM: at91: at91sam9: use SoC detection infrastructure
ARM: at91: sama5 use SoC detection infrastructure
ARM: at91: remove old setup
Arnd Bergmann (1):
ARM: at91: remove NEED_MACH_IO_H
Boris BREZILLON (1):
ARM: at91: add soc detection infrastructure
.../devicetree/bindings/serial/atmel-usart.txt | 3 +-
arch/arm/Kconfig | 2 +-
arch/arm/boot/dts/at91rm9200.dtsi | 2 +-
arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
arch/arm/boot/dts/at91sam9261.dtsi | 2 +-
arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
arch/arm/boot/dts/at91sam9rl.dtsi | 2 +-
arch/arm/boot/dts/at91sam9x5.dtsi | 2 +-
arch/arm/boot/dts/sama5d3.dtsi | 2 +-
arch/arm/boot/dts/sama5d4.dtsi | 2 +-
arch/arm/mach-at91/Kconfig | 1 +
arch/arm/mach-at91/Makefile | 2 +-
arch/arm/mach-at91/at91rm9200.c | 34 ++-
arch/arm/mach-at91/at91sam9.c | 86 ++++--
arch/arm/mach-at91/generic.h | 4 -
arch/arm/mach-at91/include/mach/at91_matrix.h | 23 --
.../mach-at91/include/mach/at91sam9260_matrix.h | 80 -----
.../mach-at91/include/mach/at91sam9261_matrix.h | 64 ----
.../mach-at91/include/mach/at91sam9263_matrix.h | 129 --------
.../mach-at91/include/mach/at91sam9g45_matrix.h | 153 ----------
.../mach-at91/include/mach/at91sam9n12_matrix.h | 53 ----
.../arm/mach-at91/include/mach/at91sam9rl_matrix.h | 96 ------
.../arm/mach-at91/include/mach/at91sam9x5_matrix.h | 53 ----
arch/arm/mach-at91/include/mach/io.h | 27 --
arch/arm/mach-at91/sama5.c | 54 +++-
arch/arm/mach-at91/setup.c | 330 ---------------------
arch/arm/mach-at91/soc.c | 110 +++++++
arch/arm/mach-at91/soc.h | 95 ++++++
drivers/pcmcia/Kconfig | 1 +
drivers/pcmcia/at91_cf.c | 13 +-
32 files changed, 351 insertions(+), 1082 deletions(-)
delete mode 100644 arch/arm/mach-at91/include/mach/at91_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/io.h
delete mode 100644 arch/arm/mach-at91/setup.c
create mode 100644 arch/arm/mach-at91/soc.c
create mode 100644 arch/arm/mach-at91/soc.h
--
2.1.0
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 0/9] ARM: at91 cleanups for 4.1 #1
@ 2015-03-11 17:00 ` Alexandre Belloni
0 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: linux-arm-kernel
This series removes more mach/headers.
Then it introduces a more scalable SoC detection infrastructure which allows to
remove the at91_map_io/at91_alt_map_io and iotable_init ugliness.
Changes in v3:
- Stop trying to unmap a range that failed ot be mapped
Changes in v2:
- All the SoC names are lowercased
- Removed the unused compatible string
- Use name/subname to display the type and subtype
Alexandre Belloni (7):
ARM: at91: remove unused at91_ioremap_matrix and header
ARM: at91: remove unused _matrix.h headers
ARM: at91/dt: introduce atmel,<chip>-dbgu
ARM: at91: at91rm9200 use SoC detection infrastructure
ARM: at91: at91sam9: use SoC detection infrastructure
ARM: at91: sama5 use SoC detection infrastructure
ARM: at91: remove old setup
Arnd Bergmann (1):
ARM: at91: remove NEED_MACH_IO_H
Boris BREZILLON (1):
ARM: at91: add soc detection infrastructure
.../devicetree/bindings/serial/atmel-usart.txt | 3 +-
arch/arm/Kconfig | 2 +-
arch/arm/boot/dts/at91rm9200.dtsi | 2 +-
arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
arch/arm/boot/dts/at91sam9261.dtsi | 2 +-
arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
arch/arm/boot/dts/at91sam9rl.dtsi | 2 +-
arch/arm/boot/dts/at91sam9x5.dtsi | 2 +-
arch/arm/boot/dts/sama5d3.dtsi | 2 +-
arch/arm/boot/dts/sama5d4.dtsi | 2 +-
arch/arm/mach-at91/Kconfig | 1 +
arch/arm/mach-at91/Makefile | 2 +-
arch/arm/mach-at91/at91rm9200.c | 34 ++-
arch/arm/mach-at91/at91sam9.c | 86 ++++--
arch/arm/mach-at91/generic.h | 4 -
arch/arm/mach-at91/include/mach/at91_matrix.h | 23 --
.../mach-at91/include/mach/at91sam9260_matrix.h | 80 -----
.../mach-at91/include/mach/at91sam9261_matrix.h | 64 ----
.../mach-at91/include/mach/at91sam9263_matrix.h | 129 --------
.../mach-at91/include/mach/at91sam9g45_matrix.h | 153 ----------
.../mach-at91/include/mach/at91sam9n12_matrix.h | 53 ----
.../arm/mach-at91/include/mach/at91sam9rl_matrix.h | 96 ------
.../arm/mach-at91/include/mach/at91sam9x5_matrix.h | 53 ----
arch/arm/mach-at91/include/mach/io.h | 27 --
arch/arm/mach-at91/sama5.c | 54 +++-
arch/arm/mach-at91/setup.c | 330 ---------------------
arch/arm/mach-at91/soc.c | 110 +++++++
arch/arm/mach-at91/soc.h | 95 ++++++
drivers/pcmcia/Kconfig | 1 +
drivers/pcmcia/at91_cf.c | 13 +-
32 files changed, 351 insertions(+), 1082 deletions(-)
delete mode 100644 arch/arm/mach-at91/include/mach/at91_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/io.h
delete mode 100644 arch/arm/mach-at91/setup.c
create mode 100644 arch/arm/mach-at91/soc.c
create mode 100644 arch/arm/mach-at91/soc.h
--
2.1.0
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 1/9] ARM: at91: remove NEED_MACH_IO_H
2015-03-11 17:00 ` Alexandre Belloni
@ 2015-03-11 17:00 ` Alexandre Belloni
-1 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
Boris Brezillon, Alexander Stein, Arnd Bergmann,
Alexandre Belloni
From: Arnd Bergmann <arnd@arndb.de>
The mach/io.h header on at91 is used to support a nonstandard I/O space
window for the cf card driver. This changes the driver to use pci_ioremap_io
in order to have the standard location, and then removes the custom
mach/io.h.
[alexandre.belloni@free-electrons.com: Added PCI dependency]
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/Kconfig | 1 -
arch/arm/mach-at91/Kconfig | 1 +
arch/arm/mach-at91/include/mach/io.h | 27 ---------------------------
drivers/pcmcia/Kconfig | 1 +
drivers/pcmcia/at91_cf.c | 13 +++++++------
5 files changed, 9 insertions(+), 34 deletions(-)
delete mode 100644 arch/arm/mach-at91/include/mach/io.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9f1f09a2bc9b..e7ce6612bc42 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -361,7 +361,6 @@ config ARCH_AT91
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select IRQ_DOMAIN
- select NEED_MACH_IO_H if PCCARD
select PINCTRL
select PINCTRL_AT91
select USE_OF
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index c74a44324e5b..7ecde7de69da 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -81,6 +81,7 @@ config SOC_AT91RM9200
select CPU_ARM920T
select GENERIC_CLOCKEVENTS
select HAVE_AT91_USB_CLK
+ select MIGHT_HAVE_PCI
config SOC_AT91SAM9
bool "AT91SAM9"
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
deleted file mode 100644
index 2d9ca0455745..000000000000
--- a/arch/arm/mach-at91/include/mach/io.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/io.h
- *
- * Copyright (C) 2003 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xFFFFFFFF
-#define __io(a) __typesafe_io(a)
-
-#endif
diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
index 3bb49252a098..075d5cd4c5ab 100644
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -278,6 +278,7 @@ config BFIN_CFPCMCIA
config AT91_CF
tristate "AT91 CompactFlash Controller"
+ depends on PCI
depends on PCMCIA && ARCH_AT91
depends on !ARCH_MULTIPLATFORM
help
diff --git a/drivers/pcmcia/at91_cf.c b/drivers/pcmcia/at91_cf.c
index bfb799c7b343..e7775a41ae5d 100644
--- a/drivers/pcmcia/at91_cf.c
+++ b/drivers/pcmcia/at91_cf.c
@@ -317,13 +317,14 @@ static int at91_cf_probe(struct platform_device *pdev)
} else
cf->socket.pci_irq = nr_irqs + 1;
- /* pcmcia layer only remaps "real" memory not iospace */
- cf->socket.io_offset = (unsigned long) devm_ioremap(&pdev->dev,
- cf->phys_baseaddr + CF_IO_PHYS, SZ_2K);
- if (!cf->socket.io_offset) {
- status = -ENXIO;
+ /*
+ * pcmcia layer only remaps "real" memory not iospace
+ * io_offset is set to 0x10000 to avoid the check in static_find_io().
+ * */
+ cf->socket.io_offset = 0x10000;
+ status = pci_ioremap_io(0x10000, cf->phys_baseaddr + CF_IO_PHYS);
+ if (status)
goto fail0a;
- }
/* reserve chip-select regions */
if (!devm_request_mem_region(&pdev->dev, io->start, resource_size(io), "at91_cf")) {
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 1/9] ARM: at91: remove NEED_MACH_IO_H
@ 2015-03-11 17:00 ` Alexandre Belloni
0 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: linux-arm-kernel
From: Arnd Bergmann <arnd@arndb.de>
The mach/io.h header on at91 is used to support a nonstandard I/O space
window for the cf card driver. This changes the driver to use pci_ioremap_io
in order to have the standard location, and then removes the custom
mach/io.h.
[alexandre.belloni at free-electrons.com: Added PCI dependency]
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
---
arch/arm/Kconfig | 1 -
arch/arm/mach-at91/Kconfig | 1 +
arch/arm/mach-at91/include/mach/io.h | 27 ---------------------------
drivers/pcmcia/Kconfig | 1 +
drivers/pcmcia/at91_cf.c | 13 +++++++------
5 files changed, 9 insertions(+), 34 deletions(-)
delete mode 100644 arch/arm/mach-at91/include/mach/io.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9f1f09a2bc9b..e7ce6612bc42 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -361,7 +361,6 @@ config ARCH_AT91
select ARCH_REQUIRE_GPIOLIB
select CLKDEV_LOOKUP
select IRQ_DOMAIN
- select NEED_MACH_IO_H if PCCARD
select PINCTRL
select PINCTRL_AT91
select USE_OF
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index c74a44324e5b..7ecde7de69da 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -81,6 +81,7 @@ config SOC_AT91RM9200
select CPU_ARM920T
select GENERIC_CLOCKEVENTS
select HAVE_AT91_USB_CLK
+ select MIGHT_HAVE_PCI
config SOC_AT91SAM9
bool "AT91SAM9"
diff --git a/arch/arm/mach-at91/include/mach/io.h b/arch/arm/mach-at91/include/mach/io.h
deleted file mode 100644
index 2d9ca0455745..000000000000
--- a/arch/arm/mach-at91/include/mach/io.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/io.h
- *
- * Copyright (C) 2003 SAN People
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-
-#ifndef __ASM_ARCH_IO_H
-#define __ASM_ARCH_IO_H
-
-#define IO_SPACE_LIMIT 0xFFFFFFFF
-#define __io(a) __typesafe_io(a)
-
-#endif
diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
index 3bb49252a098..075d5cd4c5ab 100644
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -278,6 +278,7 @@ config BFIN_CFPCMCIA
config AT91_CF
tristate "AT91 CompactFlash Controller"
+ depends on PCI
depends on PCMCIA && ARCH_AT91
depends on !ARCH_MULTIPLATFORM
help
diff --git a/drivers/pcmcia/at91_cf.c b/drivers/pcmcia/at91_cf.c
index bfb799c7b343..e7775a41ae5d 100644
--- a/drivers/pcmcia/at91_cf.c
+++ b/drivers/pcmcia/at91_cf.c
@@ -317,13 +317,14 @@ static int at91_cf_probe(struct platform_device *pdev)
} else
cf->socket.pci_irq = nr_irqs + 1;
- /* pcmcia layer only remaps "real" memory not iospace */
- cf->socket.io_offset = (unsigned long) devm_ioremap(&pdev->dev,
- cf->phys_baseaddr + CF_IO_PHYS, SZ_2K);
- if (!cf->socket.io_offset) {
- status = -ENXIO;
+ /*
+ * pcmcia layer only remaps "real" memory not iospace
+ * io_offset is set to 0x10000 to avoid the check in static_find_io().
+ * */
+ cf->socket.io_offset = 0x10000;
+ status = pci_ioremap_io(0x10000, cf->phys_baseaddr + CF_IO_PHYS);
+ if (status)
goto fail0a;
- }
/* reserve chip-select regions */
if (!devm_request_mem_region(&pdev->dev, io->start, resource_size(io), "at91_cf")) {
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 2/9] ARM: at91: remove unused at91_ioremap_matrix and header
2015-03-11 17:00 ` Alexandre Belloni
@ 2015-03-11 17:00 ` Alexandre Belloni
-1 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
Boris Brezillon, Alexander Stein, Alexandre Belloni
at91_ioremap_matrix and the at91_matrix.h header are not used anymore, remove
them.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/generic.h | 4 ----
arch/arm/mach-at91/include/mach/at91_matrix.h | 23 -----------------------
arch/arm/mach-at91/setup.c | 10 ----------
3 files changed, 37 deletions(-)
delete mode 100644 arch/arm/mach-at91/include/mach/at91_matrix.h
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 583369ffc284..2b396c4e1fc1 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -25,10 +25,6 @@ extern void at91rm9200_timer_init(void);
extern void at91rm9200_idle(void);
extern void at91sam9_idle(void);
-/* Matrix */
-extern void at91_ioremap_matrix(u32 base_addr);
-
-
#ifdef CONFIG_PM
extern void __init at91rm9200_pm_init(void);
extern void __init at91sam9260_pm_init(void);
diff --git a/arch/arm/mach-at91/include/mach/at91_matrix.h b/arch/arm/mach-at91/include/mach/at91_matrix.h
deleted file mode 100644
index f8996c954131..000000000000
--- a/arch/arm/mach-at91/include/mach/at91_matrix.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- *
- * Under GPLv2
- */
-
-#ifndef __MACH_AT91_MATRIX_H__
-#define __MACH_AT91_MATRIX_H__
-
-#ifndef __ASSEMBLY__
-extern void __iomem *at91_matrix_base;
-
-#define at91_matrix_read(field) \
- __raw_readl(at91_matrix_base + field)
-
-#define at91_matrix_write(field, value) \
- __raw_writel(value, at91_matrix_base + field)
-
-#else
-.extern at91_matrix_base
-#endif
-
-#endif /* __MACH_AT91_MATRIX_H__ */
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 4e58bc90ed21..ef778f33c488 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -318,13 +318,3 @@ void __init at91_alt_map_io(void)
pr_info("AT91: Detected soc subtype: %s\n",
at91_get_soc_subtype(&at91_soc_initdata));
}
-
-void __iomem *at91_matrix_base;
-EXPORT_SYMBOL_GPL(at91_matrix_base);
-
-void __init at91_ioremap_matrix(u32 base_addr)
-{
- at91_matrix_base = ioremap(base_addr, 512);
- if (!at91_matrix_base)
- panic(pr_fmt("Impossible to ioremap at91_matrix_base\n"));
-}
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 2/9] ARM: at91: remove unused at91_ioremap_matrix and header
@ 2015-03-11 17:00 ` Alexandre Belloni
0 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: linux-arm-kernel
at91_ioremap_matrix and the at91_matrix.h header are not used anymore, remove
them.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/generic.h | 4 ----
arch/arm/mach-at91/include/mach/at91_matrix.h | 23 -----------------------
arch/arm/mach-at91/setup.c | 10 ----------
3 files changed, 37 deletions(-)
delete mode 100644 arch/arm/mach-at91/include/mach/at91_matrix.h
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index 583369ffc284..2b396c4e1fc1 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -25,10 +25,6 @@ extern void at91rm9200_timer_init(void);
extern void at91rm9200_idle(void);
extern void at91sam9_idle(void);
-/* Matrix */
-extern void at91_ioremap_matrix(u32 base_addr);
-
-
#ifdef CONFIG_PM
extern void __init at91rm9200_pm_init(void);
extern void __init at91sam9260_pm_init(void);
diff --git a/arch/arm/mach-at91/include/mach/at91_matrix.h b/arch/arm/mach-at91/include/mach/at91_matrix.h
deleted file mode 100644
index f8996c954131..000000000000
--- a/arch/arm/mach-at91/include/mach/at91_matrix.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- *
- * Under GPLv2
- */
-
-#ifndef __MACH_AT91_MATRIX_H__
-#define __MACH_AT91_MATRIX_H__
-
-#ifndef __ASSEMBLY__
-extern void __iomem *at91_matrix_base;
-
-#define at91_matrix_read(field) \
- __raw_readl(at91_matrix_base + field)
-
-#define at91_matrix_write(field, value) \
- __raw_writel(value, at91_matrix_base + field)
-
-#else
-.extern at91_matrix_base
-#endif
-
-#endif /* __MACH_AT91_MATRIX_H__ */
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
index 4e58bc90ed21..ef778f33c488 100644
--- a/arch/arm/mach-at91/setup.c
+++ b/arch/arm/mach-at91/setup.c
@@ -318,13 +318,3 @@ void __init at91_alt_map_io(void)
pr_info("AT91: Detected soc subtype: %s\n",
at91_get_soc_subtype(&at91_soc_initdata));
}
-
-void __iomem *at91_matrix_base;
-EXPORT_SYMBOL_GPL(at91_matrix_base);
-
-void __init at91_ioremap_matrix(u32 base_addr)
-{
- at91_matrix_base = ioremap(base_addr, 512);
- if (!at91_matrix_base)
- panic(pr_fmt("Impossible to ioremap at91_matrix_base\n"));
-}
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 3/9] ARM: at91: remove unused _matrix.h headers
2015-03-11 17:00 ` Alexandre Belloni
@ 2015-03-11 17:00 ` Alexandre Belloni
-1 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
Boris Brezillon, Alexander Stein, Alexandre Belloni
The matrix headers are not used anymore, remove them.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
.../mach-at91/include/mach/at91sam9260_matrix.h | 80 -----------
.../mach-at91/include/mach/at91sam9261_matrix.h | 64 ---------
.../mach-at91/include/mach/at91sam9263_matrix.h | 129 -----------------
.../mach-at91/include/mach/at91sam9g45_matrix.h | 153 ---------------------
.../mach-at91/include/mach/at91sam9n12_matrix.h | 53 -------
.../arm/mach-at91/include/mach/at91sam9rl_matrix.h | 96 -------------
.../arm/mach-at91/include/mach/at91sam9x5_matrix.h | 53 -------
7 files changed, 628 deletions(-)
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
deleted file mode 100644
index f459df420629..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
- *
- * Copyright (C) 2007 Atmel Corporation.
- *
- * Memory Controllers (MATRIX, EBI) - System peripherals registers.
- * Based on AT91SAM9260 datasheet revision B.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91SAM9260_MATRIX_H
-#define AT91SAM9260_MATRIX_H
-
-#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */
-#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
-#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
-#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
-#define AT91_MATRIX_ULBT_FOUR (2 << 0)
-#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
-#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
-
-#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
-#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
-#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
-#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */
-#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */
-#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
-#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
-
-#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
-#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
-#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
-#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */
-#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
-#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
-
-#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */
-#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-
-#define AT91_MATRIX_EBICSA 0x11C /* EBI Chip Select Assignment Register */
-#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_CS3A_SMC (0 << 3)
-#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
-#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */
-#define AT91_MATRIX_CS4A_SMC (0 << 4)
-#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
-#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */
-#define AT91_MATRIX_CS5A_SMC (0 << 5)
-#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
-#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16)
-#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16)
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
deleted file mode 100644
index a50cdf8b8ca4..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
- *
- * Copyright (C) 2007 Atmel Corporation.
- *
- * Memory Controllers (MATRIX, EBI) - System peripherals registers.
- * Based on AT91SAM9261 datasheet revision D.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91SAM9261_MATRIX_H
-#define AT91SAM9261_MATRIX_H
-
-#define AT91_MATRIX_MCFG 0x00 /* Master Configuration Register */
-#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-
-#define AT91_MATRIX_SCFG0 0x04 /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 0x08 /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 0x0C /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 0x10 /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 0x14 /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
-#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
-#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
-#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */
-
-#define AT91_MATRIX_TCR 0x24 /* TCM Configuration Register */
-#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
-#define AT91_MATRIX_ITCM_0 (0 << 0)
-#define AT91_MATRIX_ITCM_16 (5 << 0)
-#define AT91_MATRIX_ITCM_32 (6 << 0)
-#define AT91_MATRIX_ITCM_64 (7 << 0)
-#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */
-#define AT91_MATRIX_DTCM_0 (0 << 4)
-#define AT91_MATRIX_DTCM_16 (5 << 4)
-#define AT91_MATRIX_DTCM_32 (6 << 4)
-#define AT91_MATRIX_DTCM_64 (7 << 4)
-
-#define AT91_MATRIX_EBICSA 0x30 /* EBI Chip Select Assignment Register */
-#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_CS3A_SMC (0 << 3)
-#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
-#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */
-#define AT91_MATRIX_CS4A_SMC (0 << 4)
-#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
-#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */
-#define AT91_MATRIX_CS5A_SMC (0 << 5)
-#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
-#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-
-#define AT91_MATRIX_USBPUCR 0x34 /* USB Pad Pull-Up Control Register */
-#define AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
deleted file mode 100644
index ebb5fdb565e0..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
- *
- * Copyright (C) 2006 Atmel Corporation.
- *
- * Memory Controllers (MATRIX, EBI) - System peripherals registers.
- * Based on AT91SAM9263 datasheet revision B (Preliminary).
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91SAM9263_MATRIX_H
-#define AT91SAM9263_MATRIX_H
-
-#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */
-#define AT91_MATRIX_MCFG6 0x18 /* Master Configuration Register 6 */
-#define AT91_MATRIX_MCFG7 0x1C /* Master Configuration Register 7 */
-#define AT91_MATRIX_MCFG8 0x20 /* Master Configuration Register 8 */
-#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
-#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
-#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
-#define AT91_MATRIX_ULBT_FOUR (2 << 0)
-#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
-#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
-
-#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SCFG6 0x58 /* Slave Configuration Register 6 */
-#define AT91_MATRIX_SCFG7 0x5C /* Slave Configuration Register 7 */
-#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
-#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
-#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
-#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */
-#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */
-#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
-#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
-
-#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRBS0 0x84 /* Priority Register B for Slave 0 */
-#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRBS1 0x8C /* Priority Register B for Slave 1 */
-#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRBS2 0x94 /* Priority Register B for Slave 2 */
-#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRBS3 0x9C /* Priority Register B for Slave 3 */
-#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRBS4 0xA4 /* Priority Register B for Slave 4 */
-#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_PRBS5 0xAC /* Priority Register B for Slave 5 */
-#define AT91_MATRIX_PRAS6 0xB0 /* Priority Register A for Slave 6 */
-#define AT91_MATRIX_PRBS6 0xB4 /* Priority Register B for Slave 6 */
-#define AT91_MATRIX_PRAS7 0xB8 /* Priority Register A for Slave 7 */
-#define AT91_MATRIX_PRBS7 0xBC /* Priority Register B for Slave 7 */
-#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
-#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
-#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
-#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */
-#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
-#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
-#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */
-#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */
-#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */
-
-#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */
-#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-#define AT91_MATRIX_RCB2 (1 << 2)
-#define AT91_MATRIX_RCB3 (1 << 3)
-#define AT91_MATRIX_RCB4 (1 << 4)
-#define AT91_MATRIX_RCB5 (1 << 5)
-#define AT91_MATRIX_RCB6 (1 << 6)
-#define AT91_MATRIX_RCB7 (1 << 7)
-#define AT91_MATRIX_RCB8 (1 << 8)
-
-#define AT91_MATRIX_TCMR 0x114 /* TCM Configuration Register */
-#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
-#define AT91_MATRIX_ITCM_0 (0 << 0)
-#define AT91_MATRIX_ITCM_16 (5 << 0)
-#define AT91_MATRIX_ITCM_32 (6 << 0)
-#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */
-#define AT91_MATRIX_DTCM_0 (0 << 4)
-#define AT91_MATRIX_DTCM_16 (5 << 4)
-#define AT91_MATRIX_DTCM_32 (6 << 4)
-
-#define AT91_MATRIX_EBI0CSA 0x120 /* EBI0 Chip Select Assignment Register */
-#define AT91_MATRIX_EBI0_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_EBI0_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_EBI0_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_EBI0_CS3A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_EBI0_CS3A_SMC (0 << 3)
-#define AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA (1 << 3)
-#define AT91_MATRIX_EBI0_CS4A (1 << 4) /* Chip Select 4 Assignment */
-#define AT91_MATRIX_EBI0_CS4A_SMC (0 << 4)
-#define AT91_MATRIX_EBI0_CS4A_SMC_CF1 (1 << 4)
-#define AT91_MATRIX_EBI0_CS5A (1 << 5) /* Chip Select 5 Assignment */
-#define AT91_MATRIX_EBI0_CS5A_SMC (0 << 5)
-#define AT91_MATRIX_EBI0_CS5A_SMC_CF2 (1 << 5)
-#define AT91_MATRIX_EBI0_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_EBI0_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-#define AT91_MATRIX_EBI0_VDDIOMSEL_1_8V (0 << 16)
-#define AT91_MATRIX_EBI0_VDDIOMSEL_3_3V (1 << 16)
-
-#define AT91_MATRIX_EBI1CSA 0x124 /* EBI1 Chip Select Assignment Register */
-#define AT91_MATRIX_EBI1_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_EBI1_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_EBI1_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_EBI1_CS2A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_EBI1_CS2A_SMC (0 << 3)
-#define AT91_MATRIX_EBI1_CS2A_SMC_SMARTMEDIA (1 << 3)
-#define AT91_MATRIX_EBI1_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_EBI1_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-#define AT91_MATRIX_EBI1_VDDIOMSEL_1_8V (0 << 16)
-#define AT91_MATRIX_EBI1_VDDIOMSEL_3_3V (1 << 16)
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
deleted file mode 100644
index b76e2ed2fbc2..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * Matrix-centric header file for the AT91SAM9G45 family
- *
- * Copyright (C) 2008-2009 Atmel Corporation.
- *
- * Memory Controllers (MATRIX, EBI) - System peripherals registers.
- * Based on AT91SAM9G45 preliminary datasheet.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91SAM9G45_MATRIX_H
-#define AT91SAM9G45_MATRIX_H
-
-#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */
-#define AT91_MATRIX_MCFG6 0x18 /* Master Configuration Register 6 */
-#define AT91_MATRIX_MCFG7 0x1C /* Master Configuration Register 7 */
-#define AT91_MATRIX_MCFG8 0x20 /* Master Configuration Register 8 */
-#define AT91_MATRIX_MCFG9 0x24 /* Master Configuration Register 9 */
-#define AT91_MATRIX_MCFG10 0x28 /* Master Configuration Register 10 */
-#define AT91_MATRIX_MCFG11 0x2C /* Master Configuration Register 11 */
-#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
-#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
-#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
-#define AT91_MATRIX_ULBT_FOUR (2 << 0)
-#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
-#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
-#define AT91_MATRIX_ULBT_THIRTYTWO (5 << 0)
-#define AT91_MATRIX_ULBT_SIXTYFOUR (6 << 0)
-#define AT91_MATRIX_ULBT_128 (7 << 0)
-
-#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SCFG6 0x58 /* Slave Configuration Register 6 */
-#define AT91_MATRIX_SCFG7 0x5C /* Slave Configuration Register 7 */
-#define AT91_MATRIX_SLOT_CYCLE (0x1ff << 0) /* Maximum Number of Allowed Cycles for a Burst */
-#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
-#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
-#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */
-
-#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRBS0 0x84 /* Priority Register B for Slave 0 */
-#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRBS1 0x8C /* Priority Register B for Slave 1 */
-#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRBS2 0x94 /* Priority Register B for Slave 2 */
-#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRBS3 0x9C /* Priority Register B for Slave 3 */
-#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRBS4 0xA4 /* Priority Register B for Slave 4 */
-#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_PRBS5 0xAC /* Priority Register B for Slave 5 */
-#define AT91_MATRIX_PRAS6 0xB0 /* Priority Register A for Slave 6 */
-#define AT91_MATRIX_PRBS6 0xB4 /* Priority Register B for Slave 6 */
-#define AT91_MATRIX_PRAS7 0xB8 /* Priority Register A for Slave 7 */
-#define AT91_MATRIX_PRBS7 0xBC /* Priority Register B for Slave 7 */
-#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
-#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
-#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
-#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */
-#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
-#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
-#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */
-#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */
-#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */
-#define AT91_MATRIX_M9PR (3 << 4) /* Master 9 Priority (in Register B) */
-#define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */
-#define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */
-
-#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */
-#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-#define AT91_MATRIX_RCB2 (1 << 2)
-#define AT91_MATRIX_RCB3 (1 << 3)
-#define AT91_MATRIX_RCB4 (1 << 4)
-#define AT91_MATRIX_RCB5 (1 << 5)
-#define AT91_MATRIX_RCB6 (1 << 6)
-#define AT91_MATRIX_RCB7 (1 << 7)
-#define AT91_MATRIX_RCB8 (1 << 8)
-#define AT91_MATRIX_RCB9 (1 << 9)
-#define AT91_MATRIX_RCB10 (1 << 10)
-#define AT91_MATRIX_RCB11 (1 << 11)
-
-#define AT91_MATRIX_TCMR 0x110 /* TCM Configuration Register */
-#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
-#define AT91_MATRIX_ITCM_0 (0 << 0)
-#define AT91_MATRIX_ITCM_32 (6 << 0)
-#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */
-#define AT91_MATRIX_DTCM_0 (0 << 4)
-#define AT91_MATRIX_DTCM_32 (6 << 4)
-#define AT91_MATRIX_DTCM_64 (7 << 4)
-#define AT91_MATRIX_TCM_NWS (0x1 << 11) /* Wait state TCM register */
-#define AT91_MATRIX_TCM_NO_WS (0x0 << 11)
-#define AT91_MATRIX_TCM_ONE_WS (0x1 << 11)
-
-#define AT91_MATRIX_VIDEO 0x118 /* Video Mode Configuration Register */
-#define AT91C_VDEC_SEL (0x1 << 0) /* Video Mode Selection */
-#define AT91C_VDEC_SEL_OFF (0 << 0)
-#define AT91C_VDEC_SEL_ON (1 << 0)
-
-#define AT91_MATRIX_EBICSA 0x128 /* EBI Chip Select Assignment Register */
-#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3)
-#define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA (1 << 3)
-#define AT91_MATRIX_EBI_CS4A (1 << 4) /* Chip Select 4 Assignment */
-#define AT91_MATRIX_EBI_CS4A_SMC (0 << 4)
-#define AT91_MATRIX_EBI_CS4A_SMC_CF0 (1 << 4)
-#define AT91_MATRIX_EBI_CS5A (1 << 5) /* Chip Select 5 Assignment */
-#define AT91_MATRIX_EBI_CS5A_SMC (0 << 5)
-#define AT91_MATRIX_EBI_CS5A_SMC_CF1 (1 << 5)
-#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_EBI_DBPU_ON (0 << 8)
-#define AT91_MATRIX_EBI_DBPU_OFF (1 << 8)
-#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16)
-#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16)
-#define AT91_MATRIX_EBI_EBI_IOSR (1 << 17) /* EBI I/O slew rate selection */
-#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17)
-#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17)
-#define AT91_MATRIX_EBI_DDR_IOSR (1 << 18) /* DDR2 dedicated port I/O slew rate selection */
-#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18)
-#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18)
-
-#define AT91_MATRIX_WPMR 0x1E4 /* Write Protect Mode Register */
-#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */
-#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0)
-#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0)
-#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */
-
-#define AT91_MATRIX_WPSR 0x1E8 /* Write Protect Status Register */
-#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */
-#define AT91_MATRIX_WPSR_NO_WPV (0 << 0)
-#define AT91_MATRIX_WPSR_WPV (1 << 0)
-#define AT91_MATRIX_WPSR_WPVSRC (0xFFFF << 8) /* Write Protect Violation Source */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h
deleted file mode 100644
index 40060cd62fa9..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Matrix-centric header file for the AT91SAM9N12
- *
- * Copyright (C) 2012 Atmel Corporation.
- *
- * Only EBI related registers.
- * Write Protect register definitions may be useful.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef _AT91SAM9N12_MATRIX_H_
-#define _AT91SAM9N12_MATRIX_H_
-
-#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x118) /* EBI Chip Select Assignment Register */
-#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3)
-#define AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH (1 << 3)
-#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_EBI_DBPU_ON (0 << 8)
-#define AT91_MATRIX_EBI_DBPU_OFF (1 << 8)
-#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16)
-#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16)
-#define AT91_MATRIX_EBI_EBI_IOSR (1 << 17) /* EBI I/O slew rate selection */
-#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17)
-#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17)
-#define AT91_MATRIX_EBI_DDR_IOSR (1 << 18) /* DDR2 dedicated port I/O slew rate selection */
-#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18)
-#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18)
-#define AT91_MATRIX_NFD0_SELECT (1 << 24) /* NAND Flash Data Bus Selection */
-#define AT91_MATRIX_NFD0_ON_D0 (0 << 24)
-#define AT91_MATRIX_NFD0_ON_D16 (1 << 24)
-#define AT91_MATRIX_DDR_MP_EN (1 << 25) /* DDR Multi-port Enable */
-#define AT91_MATRIX_MP_OFF (0 << 25)
-#define AT91_MATRIX_MP_ON (1 << 25)
-
-#define AT91_MATRIX_WPMR (AT91_MATRIX + 0x1E4) /* Write Protect Mode Register */
-#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */
-#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0)
-#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0)
-#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */
-
-#define AT91_MATRIX_WPSR (AT91_MATRIX + 0x1E8) /* Write Protect Status Register */
-#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */
-#define AT91_MATRIX_WPSR_NO_WPV (0 << 0)
-#define AT91_MATRIX_WPSR_WPV (1 << 0)
-#define AT91_MATRIX_WPSR_WPVSRC (0xFFFF << 8) /* Write Protect Violation Source */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
deleted file mode 100644
index 6d160adadafc..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
- *
- * Copyright (C) 2007 Atmel Corporation
- *
- * Memory Controllers (MATRIX, EBI) - System peripherals registers.
- * Based on AT91SAM9RL datasheet revision A. (Preliminary)
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive for
- * more details.
- */
-
-#ifndef AT91SAM9RL_MATRIX_H
-#define AT91SAM9RL_MATRIX_H
-
-#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */
-#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
-#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
-#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
-#define AT91_MATRIX_ULBT_FOUR (2 << 0)
-#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
-#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
-
-#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
-#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
-#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
-#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */
-#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */
-#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
-#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
-
-#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
-#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
-#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
-#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */
-#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
-#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
-
-#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */
-#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-#define AT91_MATRIX_RCB2 (1 << 2)
-#define AT91_MATRIX_RCB3 (1 << 3)
-#define AT91_MATRIX_RCB4 (1 << 4)
-#define AT91_MATRIX_RCB5 (1 << 5)
-
-#define AT91_MATRIX_TCMR 0x114 /* TCM Configuration Register */
-#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
-#define AT91_MATRIX_ITCM_0 (0 << 0)
-#define AT91_MATRIX_ITCM_16 (5 << 0)
-#define AT91_MATRIX_ITCM_32 (6 << 0)
-#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */
-#define AT91_MATRIX_DTCM_0 (0 << 4)
-#define AT91_MATRIX_DTCM_16 (5 << 4)
-#define AT91_MATRIX_DTCM_32 (6 << 4)
-
-#define AT91_MATRIX_EBICSA 0x120 /* EBI0 Chip Select Assignment Register */
-#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_CS3A_SMC (0 << 3)
-#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
-#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */
-#define AT91_MATRIX_CS4A_SMC (0 << 4)
-#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
-#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */
-#define AT91_MATRIX_CS5A_SMC (0 << 5)
-#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
-#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16)
-#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16)
-
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h
deleted file mode 100644
index a606d3966470..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Matrix-centric header file for the AT91SAM9x5 family
- *
- * Copyright (C) 2009-2012 Atmel Corporation.
- *
- * Only EBI related registers.
- * Write Protect register definitions may be useful.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef AT91SAM9X5_MATRIX_H
-#define AT91SAM9X5_MATRIX_H
-
-#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI Chip Select Assignment Register */
-#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3)
-#define AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH (1 << 3)
-#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_EBI_DBPU_ON (0 << 8)
-#define AT91_MATRIX_EBI_DBPU_OFF (1 << 8)
-#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16)
-#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16)
-#define AT91_MATRIX_EBI_EBI_IOSR (1 << 17) /* EBI I/O slew rate selection */
-#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17)
-#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17)
-#define AT91_MATRIX_EBI_DDR_IOSR (1 << 18) /* DDR2 dedicated port I/O slew rate selection */
-#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18)
-#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18)
-#define AT91_MATRIX_NFD0_SELECT (1 << 24) /* NAND Flash Data Bus Selection */
-#define AT91_MATRIX_NFD0_ON_D0 (0 << 24)
-#define AT91_MATRIX_NFD0_ON_D16 (1 << 24)
-#define AT91_MATRIX_DDR_MP_EN (1 << 25) /* DDR Multi-port Enable */
-#define AT91_MATRIX_MP_OFF (0 << 25)
-#define AT91_MATRIX_MP_ON (1 << 25)
-
-#define AT91_MATRIX_WPMR (AT91_MATRIX + 0x1E4) /* Write Protect Mode Register */
-#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */
-#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0)
-#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0)
-#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */
-
-#define AT91_MATRIX_WPSR (AT91_MATRIX + 0x1E8) /* Write Protect Status Register */
-#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */
-#define AT91_MATRIX_WPSR_NO_WPV (0 << 0)
-#define AT91_MATRIX_WPSR_WPV (1 << 0)
-#define AT91_MATRIX_WPSR_WPVSRC (0xFFFF << 8) /* Write Protect Violation Source */
-
-#endif
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 3/9] ARM: at91: remove unused _matrix.h headers
@ 2015-03-11 17:00 ` Alexandre Belloni
0 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: linux-arm-kernel
The matrix headers are not used anymore, remove them.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
.../mach-at91/include/mach/at91sam9260_matrix.h | 80 -----------
.../mach-at91/include/mach/at91sam9261_matrix.h | 64 ---------
.../mach-at91/include/mach/at91sam9263_matrix.h | 129 -----------------
.../mach-at91/include/mach/at91sam9g45_matrix.h | 153 ---------------------
.../mach-at91/include/mach/at91sam9n12_matrix.h | 53 -------
.../arm/mach-at91/include/mach/at91sam9rl_matrix.h | 96 -------------
.../arm/mach-at91/include/mach/at91sam9x5_matrix.h | 53 -------
7 files changed, 628 deletions(-)
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h
diff --git a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
deleted file mode 100644
index f459df420629..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
- *
- * Copyright (C) 2007 Atmel Corporation.
- *
- * Memory Controllers (MATRIX, EBI) - System peripherals registers.
- * Based on AT91SAM9260 datasheet revision B.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91SAM9260_MATRIX_H
-#define AT91SAM9260_MATRIX_H
-
-#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */
-#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
-#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
-#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
-#define AT91_MATRIX_ULBT_FOUR (2 << 0)
-#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
-#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
-
-#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
-#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
-#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
-#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */
-#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */
-#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
-#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
-
-#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
-#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
-#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
-#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */
-#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
-#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
-
-#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */
-#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-
-#define AT91_MATRIX_EBICSA 0x11C /* EBI Chip Select Assignment Register */
-#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_CS3A_SMC (0 << 3)
-#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
-#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */
-#define AT91_MATRIX_CS4A_SMC (0 << 4)
-#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
-#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */
-#define AT91_MATRIX_CS5A_SMC (0 << 5)
-#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
-#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16)
-#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16)
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
deleted file mode 100644
index a50cdf8b8ca4..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
- *
- * Copyright (C) 2007 Atmel Corporation.
- *
- * Memory Controllers (MATRIX, EBI) - System peripherals registers.
- * Based on AT91SAM9261 datasheet revision D.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91SAM9261_MATRIX_H
-#define AT91SAM9261_MATRIX_H
-
-#define AT91_MATRIX_MCFG 0x00 /* Master Configuration Register */
-#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-
-#define AT91_MATRIX_SCFG0 0x04 /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 0x08 /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 0x0C /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 0x10 /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 0x14 /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
-#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
-#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
-#define AT91_MATRIX_FIXED_DEFMSTR (7 << 18) /* Fixed Index of Default Master */
-
-#define AT91_MATRIX_TCR 0x24 /* TCM Configuration Register */
-#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
-#define AT91_MATRIX_ITCM_0 (0 << 0)
-#define AT91_MATRIX_ITCM_16 (5 << 0)
-#define AT91_MATRIX_ITCM_32 (6 << 0)
-#define AT91_MATRIX_ITCM_64 (7 << 0)
-#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */
-#define AT91_MATRIX_DTCM_0 (0 << 4)
-#define AT91_MATRIX_DTCM_16 (5 << 4)
-#define AT91_MATRIX_DTCM_32 (6 << 4)
-#define AT91_MATRIX_DTCM_64 (7 << 4)
-
-#define AT91_MATRIX_EBICSA 0x30 /* EBI Chip Select Assignment Register */
-#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_CS3A_SMC (0 << 3)
-#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
-#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */
-#define AT91_MATRIX_CS4A_SMC (0 << 4)
-#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
-#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */
-#define AT91_MATRIX_CS5A_SMC (0 << 5)
-#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
-#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-
-#define AT91_MATRIX_USBPUCR 0x34 /* USB Pad Pull-Up Control Register */
-#define AT91_MATRIX_USBPUCR_PUON (1 << 30) /* USB Device PAD Pull-up Enable */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
deleted file mode 100644
index ebb5fdb565e0..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
- *
- * Copyright (C) 2006 Atmel Corporation.
- *
- * Memory Controllers (MATRIX, EBI) - System peripherals registers.
- * Based on AT91SAM9263 datasheet revision B (Preliminary).
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91SAM9263_MATRIX_H
-#define AT91SAM9263_MATRIX_H
-
-#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */
-#define AT91_MATRIX_MCFG6 0x18 /* Master Configuration Register 6 */
-#define AT91_MATRIX_MCFG7 0x1C /* Master Configuration Register 7 */
-#define AT91_MATRIX_MCFG8 0x20 /* Master Configuration Register 8 */
-#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
-#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
-#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
-#define AT91_MATRIX_ULBT_FOUR (2 << 0)
-#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
-#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
-
-#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SCFG6 0x58 /* Slave Configuration Register 6 */
-#define AT91_MATRIX_SCFG7 0x5C /* Slave Configuration Register 7 */
-#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
-#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
-#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
-#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */
-#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */
-#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
-#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
-
-#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRBS0 0x84 /* Priority Register B for Slave 0 */
-#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRBS1 0x8C /* Priority Register B for Slave 1 */
-#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRBS2 0x94 /* Priority Register B for Slave 2 */
-#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRBS3 0x9C /* Priority Register B for Slave 3 */
-#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRBS4 0xA4 /* Priority Register B for Slave 4 */
-#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_PRBS5 0xAC /* Priority Register B for Slave 5 */
-#define AT91_MATRIX_PRAS6 0xB0 /* Priority Register A for Slave 6 */
-#define AT91_MATRIX_PRBS6 0xB4 /* Priority Register B for Slave 6 */
-#define AT91_MATRIX_PRAS7 0xB8 /* Priority Register A for Slave 7 */
-#define AT91_MATRIX_PRBS7 0xBC /* Priority Register B for Slave 7 */
-#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
-#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
-#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
-#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */
-#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
-#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
-#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */
-#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */
-#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */
-
-#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */
-#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-#define AT91_MATRIX_RCB2 (1 << 2)
-#define AT91_MATRIX_RCB3 (1 << 3)
-#define AT91_MATRIX_RCB4 (1 << 4)
-#define AT91_MATRIX_RCB5 (1 << 5)
-#define AT91_MATRIX_RCB6 (1 << 6)
-#define AT91_MATRIX_RCB7 (1 << 7)
-#define AT91_MATRIX_RCB8 (1 << 8)
-
-#define AT91_MATRIX_TCMR 0x114 /* TCM Configuration Register */
-#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
-#define AT91_MATRIX_ITCM_0 (0 << 0)
-#define AT91_MATRIX_ITCM_16 (5 << 0)
-#define AT91_MATRIX_ITCM_32 (6 << 0)
-#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */
-#define AT91_MATRIX_DTCM_0 (0 << 4)
-#define AT91_MATRIX_DTCM_16 (5 << 4)
-#define AT91_MATRIX_DTCM_32 (6 << 4)
-
-#define AT91_MATRIX_EBI0CSA 0x120 /* EBI0 Chip Select Assignment Register */
-#define AT91_MATRIX_EBI0_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_EBI0_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_EBI0_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_EBI0_CS3A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_EBI0_CS3A_SMC (0 << 3)
-#define AT91_MATRIX_EBI0_CS3A_SMC_SMARTMEDIA (1 << 3)
-#define AT91_MATRIX_EBI0_CS4A (1 << 4) /* Chip Select 4 Assignment */
-#define AT91_MATRIX_EBI0_CS4A_SMC (0 << 4)
-#define AT91_MATRIX_EBI0_CS4A_SMC_CF1 (1 << 4)
-#define AT91_MATRIX_EBI0_CS5A (1 << 5) /* Chip Select 5 Assignment */
-#define AT91_MATRIX_EBI0_CS5A_SMC (0 << 5)
-#define AT91_MATRIX_EBI0_CS5A_SMC_CF2 (1 << 5)
-#define AT91_MATRIX_EBI0_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_EBI0_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-#define AT91_MATRIX_EBI0_VDDIOMSEL_1_8V (0 << 16)
-#define AT91_MATRIX_EBI0_VDDIOMSEL_3_3V (1 << 16)
-
-#define AT91_MATRIX_EBI1CSA 0x124 /* EBI1 Chip Select Assignment Register */
-#define AT91_MATRIX_EBI1_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_EBI1_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_EBI1_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_EBI1_CS2A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_EBI1_CS2A_SMC (0 << 3)
-#define AT91_MATRIX_EBI1_CS2A_SMC_SMARTMEDIA (1 << 3)
-#define AT91_MATRIX_EBI1_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_EBI1_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-#define AT91_MATRIX_EBI1_VDDIOMSEL_1_8V (0 << 16)
-#define AT91_MATRIX_EBI1_VDDIOMSEL_3_3V (1 << 16)
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
deleted file mode 100644
index b76e2ed2fbc2..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * Matrix-centric header file for the AT91SAM9G45 family
- *
- * Copyright (C) 2008-2009 Atmel Corporation.
- *
- * Memory Controllers (MATRIX, EBI) - System peripherals registers.
- * Based on AT91SAM9G45 preliminary datasheet.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef AT91SAM9G45_MATRIX_H
-#define AT91SAM9G45_MATRIX_H
-
-#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */
-#define AT91_MATRIX_MCFG6 0x18 /* Master Configuration Register 6 */
-#define AT91_MATRIX_MCFG7 0x1C /* Master Configuration Register 7 */
-#define AT91_MATRIX_MCFG8 0x20 /* Master Configuration Register 8 */
-#define AT91_MATRIX_MCFG9 0x24 /* Master Configuration Register 9 */
-#define AT91_MATRIX_MCFG10 0x28 /* Master Configuration Register 10 */
-#define AT91_MATRIX_MCFG11 0x2C /* Master Configuration Register 11 */
-#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
-#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
-#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
-#define AT91_MATRIX_ULBT_FOUR (2 << 0)
-#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
-#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
-#define AT91_MATRIX_ULBT_THIRTYTWO (5 << 0)
-#define AT91_MATRIX_ULBT_SIXTYFOUR (6 << 0)
-#define AT91_MATRIX_ULBT_128 (7 << 0)
-
-#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SCFG6 0x58 /* Slave Configuration Register 6 */
-#define AT91_MATRIX_SCFG7 0x5C /* Slave Configuration Register 7 */
-#define AT91_MATRIX_SLOT_CYCLE (0x1ff << 0) /* Maximum Number of Allowed Cycles for a Burst */
-#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
-#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
-#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */
-
-#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRBS0 0x84 /* Priority Register B for Slave 0 */
-#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRBS1 0x8C /* Priority Register B for Slave 1 */
-#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRBS2 0x94 /* Priority Register B for Slave 2 */
-#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRBS3 0x9C /* Priority Register B for Slave 3 */
-#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRBS4 0xA4 /* Priority Register B for Slave 4 */
-#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_PRBS5 0xAC /* Priority Register B for Slave 5 */
-#define AT91_MATRIX_PRAS6 0xB0 /* Priority Register A for Slave 6 */
-#define AT91_MATRIX_PRBS6 0xB4 /* Priority Register B for Slave 6 */
-#define AT91_MATRIX_PRAS7 0xB8 /* Priority Register A for Slave 7 */
-#define AT91_MATRIX_PRBS7 0xBC /* Priority Register B for Slave 7 */
-#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
-#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
-#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
-#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */
-#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
-#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
-#define AT91_MATRIX_M6PR (3 << 24) /* Master 6 Priority */
-#define AT91_MATRIX_M7PR (3 << 28) /* Master 7 Priority */
-#define AT91_MATRIX_M8PR (3 << 0) /* Master 8 Priority (in Register B) */
-#define AT91_MATRIX_M9PR (3 << 4) /* Master 9 Priority (in Register B) */
-#define AT91_MATRIX_M10PR (3 << 8) /* Master 10 Priority (in Register B) */
-#define AT91_MATRIX_M11PR (3 << 12) /* Master 11 Priority (in Register B) */
-
-#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */
-#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-#define AT91_MATRIX_RCB2 (1 << 2)
-#define AT91_MATRIX_RCB3 (1 << 3)
-#define AT91_MATRIX_RCB4 (1 << 4)
-#define AT91_MATRIX_RCB5 (1 << 5)
-#define AT91_MATRIX_RCB6 (1 << 6)
-#define AT91_MATRIX_RCB7 (1 << 7)
-#define AT91_MATRIX_RCB8 (1 << 8)
-#define AT91_MATRIX_RCB9 (1 << 9)
-#define AT91_MATRIX_RCB10 (1 << 10)
-#define AT91_MATRIX_RCB11 (1 << 11)
-
-#define AT91_MATRIX_TCMR 0x110 /* TCM Configuration Register */
-#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
-#define AT91_MATRIX_ITCM_0 (0 << 0)
-#define AT91_MATRIX_ITCM_32 (6 << 0)
-#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */
-#define AT91_MATRIX_DTCM_0 (0 << 4)
-#define AT91_MATRIX_DTCM_32 (6 << 4)
-#define AT91_MATRIX_DTCM_64 (7 << 4)
-#define AT91_MATRIX_TCM_NWS (0x1 << 11) /* Wait state TCM register */
-#define AT91_MATRIX_TCM_NO_WS (0x0 << 11)
-#define AT91_MATRIX_TCM_ONE_WS (0x1 << 11)
-
-#define AT91_MATRIX_VIDEO 0x118 /* Video Mode Configuration Register */
-#define AT91C_VDEC_SEL (0x1 << 0) /* Video Mode Selection */
-#define AT91C_VDEC_SEL_OFF (0 << 0)
-#define AT91C_VDEC_SEL_ON (1 << 0)
-
-#define AT91_MATRIX_EBICSA 0x128 /* EBI Chip Select Assignment Register */
-#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3)
-#define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA (1 << 3)
-#define AT91_MATRIX_EBI_CS4A (1 << 4) /* Chip Select 4 Assignment */
-#define AT91_MATRIX_EBI_CS4A_SMC (0 << 4)
-#define AT91_MATRIX_EBI_CS4A_SMC_CF0 (1 << 4)
-#define AT91_MATRIX_EBI_CS5A (1 << 5) /* Chip Select 5 Assignment */
-#define AT91_MATRIX_EBI_CS5A_SMC (0 << 5)
-#define AT91_MATRIX_EBI_CS5A_SMC_CF1 (1 << 5)
-#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_EBI_DBPU_ON (0 << 8)
-#define AT91_MATRIX_EBI_DBPU_OFF (1 << 8)
-#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16)
-#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16)
-#define AT91_MATRIX_EBI_EBI_IOSR (1 << 17) /* EBI I/O slew rate selection */
-#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17)
-#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17)
-#define AT91_MATRIX_EBI_DDR_IOSR (1 << 18) /* DDR2 dedicated port I/O slew rate selection */
-#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18)
-#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18)
-
-#define AT91_MATRIX_WPMR 0x1E4 /* Write Protect Mode Register */
-#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */
-#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0)
-#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0)
-#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */
-
-#define AT91_MATRIX_WPSR 0x1E8 /* Write Protect Status Register */
-#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */
-#define AT91_MATRIX_WPSR_NO_WPV (0 << 0)
-#define AT91_MATRIX_WPSR_WPV (1 << 0)
-#define AT91_MATRIX_WPSR_WPVSRC (0xFFFF << 8) /* Write Protect Violation Source */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h
deleted file mode 100644
index 40060cd62fa9..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Matrix-centric header file for the AT91SAM9N12
- *
- * Copyright (C) 2012 Atmel Corporation.
- *
- * Only EBI related registers.
- * Write Protect register definitions may be useful.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef _AT91SAM9N12_MATRIX_H_
-#define _AT91SAM9N12_MATRIX_H_
-
-#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x118) /* EBI Chip Select Assignment Register */
-#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3)
-#define AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH (1 << 3)
-#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_EBI_DBPU_ON (0 << 8)
-#define AT91_MATRIX_EBI_DBPU_OFF (1 << 8)
-#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16)
-#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16)
-#define AT91_MATRIX_EBI_EBI_IOSR (1 << 17) /* EBI I/O slew rate selection */
-#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17)
-#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17)
-#define AT91_MATRIX_EBI_DDR_IOSR (1 << 18) /* DDR2 dedicated port I/O slew rate selection */
-#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18)
-#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18)
-#define AT91_MATRIX_NFD0_SELECT (1 << 24) /* NAND Flash Data Bus Selection */
-#define AT91_MATRIX_NFD0_ON_D0 (0 << 24)
-#define AT91_MATRIX_NFD0_ON_D16 (1 << 24)
-#define AT91_MATRIX_DDR_MP_EN (1 << 25) /* DDR Multi-port Enable */
-#define AT91_MATRIX_MP_OFF (0 << 25)
-#define AT91_MATRIX_MP_ON (1 << 25)
-
-#define AT91_MATRIX_WPMR (AT91_MATRIX + 0x1E4) /* Write Protect Mode Register */
-#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */
-#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0)
-#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0)
-#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */
-
-#define AT91_MATRIX_WPSR (AT91_MATRIX + 0x1E8) /* Write Protect Status Register */
-#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */
-#define AT91_MATRIX_WPSR_NO_WPV (0 << 0)
-#define AT91_MATRIX_WPSR_WPV (1 << 0)
-#define AT91_MATRIX_WPSR_WPVSRC (0xFFFF << 8) /* Write Protect Violation Source */
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
deleted file mode 100644
index 6d160adadafc..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
- *
- * Copyright (C) 2007 Atmel Corporation
- *
- * Memory Controllers (MATRIX, EBI) - System peripherals registers.
- * Based on AT91SAM9RL datasheet revision A. (Preliminary)
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file COPYING in the main directory of this archive for
- * more details.
- */
-
-#ifndef AT91SAM9RL_MATRIX_H
-#define AT91SAM9RL_MATRIX_H
-
-#define AT91_MATRIX_MCFG0 0x00 /* Master Configuration Register 0 */
-#define AT91_MATRIX_MCFG1 0x04 /* Master Configuration Register 1 */
-#define AT91_MATRIX_MCFG2 0x08 /* Master Configuration Register 2 */
-#define AT91_MATRIX_MCFG3 0x0C /* Master Configuration Register 3 */
-#define AT91_MATRIX_MCFG4 0x10 /* Master Configuration Register 4 */
-#define AT91_MATRIX_MCFG5 0x14 /* Master Configuration Register 5 */
-#define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */
-#define AT91_MATRIX_ULBT_INFINITE (0 << 0)
-#define AT91_MATRIX_ULBT_SINGLE (1 << 0)
-#define AT91_MATRIX_ULBT_FOUR (2 << 0)
-#define AT91_MATRIX_ULBT_EIGHT (3 << 0)
-#define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
-
-#define AT91_MATRIX_SCFG0 0x40 /* Slave Configuration Register 0 */
-#define AT91_MATRIX_SCFG1 0x44 /* Slave Configuration Register 1 */
-#define AT91_MATRIX_SCFG2 0x48 /* Slave Configuration Register 2 */
-#define AT91_MATRIX_SCFG3 0x4C /* Slave Configuration Register 3 */
-#define AT91_MATRIX_SCFG4 0x50 /* Slave Configuration Register 4 */
-#define AT91_MATRIX_SCFG5 0x54 /* Slave Configuration Register 5 */
-#define AT91_MATRIX_SLOT_CYCLE (0xff << 0) /* Maximum Number of Allowed Cycles for a Burst */
-#define AT91_MATRIX_DEFMSTR_TYPE (3 << 16) /* Default Master Type */
-#define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
-#define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
-#define AT91_MATRIX_FIXED_DEFMSTR (0xf << 18) /* Fixed Index of Default Master */
-#define AT91_MATRIX_ARBT (3 << 24) /* Arbitration Type */
-#define AT91_MATRIX_ARBT_ROUND_ROBIN (0 << 24)
-#define AT91_MATRIX_ARBT_FIXED_PRIORITY (1 << 24)
-
-#define AT91_MATRIX_PRAS0 0x80 /* Priority Register A for Slave 0 */
-#define AT91_MATRIX_PRAS1 0x88 /* Priority Register A for Slave 1 */
-#define AT91_MATRIX_PRAS2 0x90 /* Priority Register A for Slave 2 */
-#define AT91_MATRIX_PRAS3 0x98 /* Priority Register A for Slave 3 */
-#define AT91_MATRIX_PRAS4 0xA0 /* Priority Register A for Slave 4 */
-#define AT91_MATRIX_PRAS5 0xA8 /* Priority Register A for Slave 5 */
-#define AT91_MATRIX_M0PR (3 << 0) /* Master 0 Priority */
-#define AT91_MATRIX_M1PR (3 << 4) /* Master 1 Priority */
-#define AT91_MATRIX_M2PR (3 << 8) /* Master 2 Priority */
-#define AT91_MATRIX_M3PR (3 << 12) /* Master 3 Priority */
-#define AT91_MATRIX_M4PR (3 << 16) /* Master 4 Priority */
-#define AT91_MATRIX_M5PR (3 << 20) /* Master 5 Priority */
-
-#define AT91_MATRIX_MRCR 0x100 /* Master Remap Control Register */
-#define AT91_MATRIX_RCB0 (1 << 0) /* Remap Command for AHB Master 0 (ARM926EJ-S Instruction Master) */
-#define AT91_MATRIX_RCB1 (1 << 1) /* Remap Command for AHB Master 1 (ARM926EJ-S Data Master) */
-#define AT91_MATRIX_RCB2 (1 << 2)
-#define AT91_MATRIX_RCB3 (1 << 3)
-#define AT91_MATRIX_RCB4 (1 << 4)
-#define AT91_MATRIX_RCB5 (1 << 5)
-
-#define AT91_MATRIX_TCMR 0x114 /* TCM Configuration Register */
-#define AT91_MATRIX_ITCM_SIZE (0xf << 0) /* Size of ITCM enabled memory block */
-#define AT91_MATRIX_ITCM_0 (0 << 0)
-#define AT91_MATRIX_ITCM_16 (5 << 0)
-#define AT91_MATRIX_ITCM_32 (6 << 0)
-#define AT91_MATRIX_DTCM_SIZE (0xf << 4) /* Size of DTCM enabled memory block */
-#define AT91_MATRIX_DTCM_0 (0 << 4)
-#define AT91_MATRIX_DTCM_16 (5 << 4)
-#define AT91_MATRIX_DTCM_32 (6 << 4)
-
-#define AT91_MATRIX_EBICSA 0x120 /* EBI0 Chip Select Assignment Register */
-#define AT91_MATRIX_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_CS3A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_CS3A_SMC (0 << 3)
-#define AT91_MATRIX_CS3A_SMC_SMARTMEDIA (1 << 3)
-#define AT91_MATRIX_CS4A (1 << 4) /* Chip Select 4 Assignment */
-#define AT91_MATRIX_CS4A_SMC (0 << 4)
-#define AT91_MATRIX_CS4A_SMC_CF1 (1 << 4)
-#define AT91_MATRIX_CS5A (1 << 5) /* Chip Select 5 Assignment */
-#define AT91_MATRIX_CS5A_SMC (0 << 5)
-#define AT91_MATRIX_CS5A_SMC_CF2 (1 << 5)
-#define AT91_MATRIX_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-#define AT91_MATRIX_VDDIOMSEL_1_8V (0 << 16)
-#define AT91_MATRIX_VDDIOMSEL_3_3V (1 << 16)
-
-
-#endif
diff --git a/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h b/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h
deleted file mode 100644
index a606d3966470..000000000000
--- a/arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * Matrix-centric header file for the AT91SAM9x5 family
- *
- * Copyright (C) 2009-2012 Atmel Corporation.
- *
- * Only EBI related registers.
- * Write Protect register definitions may be useful.
- *
- * Licensed under GPLv2 or later.
- */
-
-#ifndef AT91SAM9X5_MATRIX_H
-#define AT91SAM9X5_MATRIX_H
-
-#define AT91_MATRIX_EBICSA (AT91_MATRIX + 0x120) /* EBI Chip Select Assignment Register */
-#define AT91_MATRIX_EBI_CS1A (1 << 1) /* Chip Select 1 Assignment */
-#define AT91_MATRIX_EBI_CS1A_SMC (0 << 1)
-#define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1)
-#define AT91_MATRIX_EBI_CS3A (1 << 3) /* Chip Select 3 Assignment */
-#define AT91_MATRIX_EBI_CS3A_SMC (0 << 3)
-#define AT91_MATRIX_EBI_CS3A_SMC_NANDFLASH (1 << 3)
-#define AT91_MATRIX_EBI_DBPUC (1 << 8) /* Data Bus Pull-up Configuration */
-#define AT91_MATRIX_EBI_DBPU_ON (0 << 8)
-#define AT91_MATRIX_EBI_DBPU_OFF (1 << 8)
-#define AT91_MATRIX_EBI_VDDIOMSEL (1 << 16) /* Memory voltage selection */
-#define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16)
-#define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16)
-#define AT91_MATRIX_EBI_EBI_IOSR (1 << 17) /* EBI I/O slew rate selection */
-#define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17)
-#define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17)
-#define AT91_MATRIX_EBI_DDR_IOSR (1 << 18) /* DDR2 dedicated port I/O slew rate selection */
-#define AT91_MATRIX_EBI_DDR_IOSR_REDUCED (0 << 18)
-#define AT91_MATRIX_EBI_DDR_IOSR_NORMAL (1 << 18)
-#define AT91_MATRIX_NFD0_SELECT (1 << 24) /* NAND Flash Data Bus Selection */
-#define AT91_MATRIX_NFD0_ON_D0 (0 << 24)
-#define AT91_MATRIX_NFD0_ON_D16 (1 << 24)
-#define AT91_MATRIX_DDR_MP_EN (1 << 25) /* DDR Multi-port Enable */
-#define AT91_MATRIX_MP_OFF (0 << 25)
-#define AT91_MATRIX_MP_ON (1 << 25)
-
-#define AT91_MATRIX_WPMR (AT91_MATRIX + 0x1E4) /* Write Protect Mode Register */
-#define AT91_MATRIX_WPMR_WPEN (1 << 0) /* Write Protect ENable */
-#define AT91_MATRIX_WPMR_WP_WPDIS (0 << 0)
-#define AT91_MATRIX_WPMR_WP_WPEN (1 << 0)
-#define AT91_MATRIX_WPMR_WPKEY (0xFFFFFF << 8) /* Write Protect KEY */
-
-#define AT91_MATRIX_WPSR (AT91_MATRIX + 0x1E8) /* Write Protect Status Register */
-#define AT91_MATRIX_WPSR_WPVS (1 << 0) /* Write Protect Violation Status */
-#define AT91_MATRIX_WPSR_NO_WPV (0 << 0)
-#define AT91_MATRIX_WPSR_WPV (1 << 0)
-#define AT91_MATRIX_WPSR_WPVSRC (0xFFFF << 8) /* Write Protect Violation Source */
-
-#endif
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 4/9] ARM: at91/dt: introduce atmel,<chip>-dbgu
2015-03-11 17:00 ` Alexandre Belloni
@ 2015-03-11 17:00 ` Alexandre Belloni
-1 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
Boris Brezillon, Alexander Stein, Alexandre Belloni
The DBGU is not a simple UART and we need to be able to distinguish it from the
other UARTs, in particular to get its address and check the chip id.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
Documentation/devicetree/bindings/serial/atmel-usart.txt | 3 ++-
arch/arm/boot/dts/at91rm9200.dtsi | 2 +-
arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
arch/arm/boot/dts/at91sam9261.dtsi | 2 +-
arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
arch/arm/boot/dts/at91sam9rl.dtsi | 2 +-
arch/arm/boot/dts/at91sam9x5.dtsi | 2 +-
arch/arm/boot/dts/sama5d3.dtsi | 2 +-
arch/arm/boot/dts/sama5d4.dtsi | 2 +-
11 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/serial/atmel-usart.txt b/Documentation/devicetree/bindings/serial/atmel-usart.txt
index a6391e70a8fd..90787aa2e648 100644
--- a/Documentation/devicetree/bindings/serial/atmel-usart.txt
+++ b/Documentation/devicetree/bindings/serial/atmel-usart.txt
@@ -1,9 +1,10 @@
* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
Required properties:
-- compatible: Should be "atmel,<chip>-usart"
+- compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"
The compatible <chip> indicated will be the first SoC to support an
additional mode or an USART new feature.
+ For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart"
- reg: Should contain registers location and length
- interrupts: Should contain interrupt
- clock-names: tuple listing input clock names.
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 21c2b504f977..c515e4b160be 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -830,7 +830,7 @@
};
dbgu: serial@fffff200 {
- compatible = "atmel,at91rm9200-usart";
+ compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index fff0ee69aab4..9ea347eff3a7 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -753,7 +753,7 @@
};
dbgu: serial@fffff200 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index e247b0b5fdab..45973554f229 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -275,7 +275,7 @@
};
dbgu: serial@fffff200 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 1f67bb4c144e..111a4e029cca 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -762,7 +762,7 @@
};
dbgu: serial@ffffee00 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index ee80aa9c0759..d5ec0fb935fb 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -893,7 +893,7 @@
};
dbgu: serial@ffffee00 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index c2666a7cb5b1..00934c005ff9 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -757,7 +757,7 @@
};
dbgu: serial@fffff200 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index 40f645b8fe25..ebfd5ce9cb38 100644
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -377,7 +377,7 @@
};
dbgu: serial@fffff200 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 818dabdd8c0e..ce1494622205 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -860,7 +860,7 @@
};
dbgu: serial@fffff200 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 261311bdf65b..8e850d1bc588 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -439,7 +439,7 @@
};
dbgu: serial@ffffee00 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index d986b41b9654..d3627c4a58e0 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -1063,7 +1063,7 @@
};
dbgu: serial@fc069000 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfc069000 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 4/9] ARM: at91/dt: introduce atmel,<chip>-dbgu
@ 2015-03-11 17:00 ` Alexandre Belloni
0 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: linux-arm-kernel
The DBGU is not a simple UART and we need to be able to distinguish it from the
other UARTs, in particular to get its address and check the chip id.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
Documentation/devicetree/bindings/serial/atmel-usart.txt | 3 ++-
arch/arm/boot/dts/at91rm9200.dtsi | 2 +-
arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
arch/arm/boot/dts/at91sam9261.dtsi | 2 +-
arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
arch/arm/boot/dts/at91sam9rl.dtsi | 2 +-
arch/arm/boot/dts/at91sam9x5.dtsi | 2 +-
arch/arm/boot/dts/sama5d3.dtsi | 2 +-
arch/arm/boot/dts/sama5d4.dtsi | 2 +-
11 files changed, 12 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/serial/atmel-usart.txt b/Documentation/devicetree/bindings/serial/atmel-usart.txt
index a6391e70a8fd..90787aa2e648 100644
--- a/Documentation/devicetree/bindings/serial/atmel-usart.txt
+++ b/Documentation/devicetree/bindings/serial/atmel-usart.txt
@@ -1,9 +1,10 @@
* Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
Required properties:
-- compatible: Should be "atmel,<chip>-usart"
+- compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"
The compatible <chip> indicated will be the first SoC to support an
additional mode or an USART new feature.
+ For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart"
- reg: Should contain registers location and length
- interrupts: Should contain interrupt
- clock-names: tuple listing input clock names.
diff --git a/arch/arm/boot/dts/at91rm9200.dtsi b/arch/arm/boot/dts/at91rm9200.dtsi
index 21c2b504f977..c515e4b160be 100644
--- a/arch/arm/boot/dts/at91rm9200.dtsi
+++ b/arch/arm/boot/dts/at91rm9200.dtsi
@@ -830,7 +830,7 @@
};
dbgu: serial at fffff200 {
- compatible = "atmel,at91rm9200-usart";
+ compatible = "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index fff0ee69aab4..9ea347eff3a7 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -753,7 +753,7 @@
};
dbgu: serial at fffff200 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index e247b0b5fdab..45973554f229 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -275,7 +275,7 @@
};
dbgu: serial at fffff200 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 1f67bb4c144e..111a4e029cca 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -762,7 +762,7 @@
};
dbgu: serial at ffffee00 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index ee80aa9c0759..d5ec0fb935fb 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -893,7 +893,7 @@
};
dbgu: serial at ffffee00 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index c2666a7cb5b1..00934c005ff9 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -757,7 +757,7 @@
};
dbgu: serial at fffff200 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9rl.dtsi b/arch/arm/boot/dts/at91sam9rl.dtsi
index 40f645b8fe25..ebfd5ce9cb38 100644
--- a/arch/arm/boot/dts/at91sam9rl.dtsi
+++ b/arch/arm/boot/dts/at91sam9rl.dtsi
@@ -377,7 +377,7 @@
};
dbgu: serial at fffff200 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 818dabdd8c0e..ce1494622205 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -860,7 +860,7 @@
};
dbgu: serial at fffff200 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfffff200 0x200>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 261311bdf65b..8e850d1bc588 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -439,7 +439,7 @@
};
dbgu: serial at ffffee00 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xffffee00 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
dmas = <&dma1 2 AT91_DMA_CFG_PER_ID(13)>,
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index d986b41b9654..d3627c4a58e0 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -1063,7 +1063,7 @@
};
dbgu: serial at fc069000 {
- compatible = "atmel,at91sam9260-usart";
+ compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
reg = <0xfc069000 0x200>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>;
pinctrl-names = "default";
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 5/9] ARM: at91: add soc detection infrastructure
2015-03-11 17:00 ` Alexandre Belloni
@ 2015-03-11 17:00 ` Alexandre Belloni
-1 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
Boris Brezillon, Alexander Stein, Alexandre Belloni
From: Boris BREZILLON <boris.brezillon@free-electrons.com>
Add new structures and functions to handle AT91 SoC detection.
[alexandre.belloni@free-electrons.com: reworked DBGU detection]
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-at91/Makefile | 2 +-
arch/arm/mach-at91/soc.c | 110 ++++++++++++++++++++++++++++++++++++++++++++
arch/arm/mach-at91/soc.h | 48 +++++++++++++++++++
4 files changed, 160 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-at91/soc.c
create mode 100644 arch/arm/mach-at91/soc.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e7ce6612bc42..f6c5b05e8de8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -363,6 +363,7 @@ config ARCH_AT91
select IRQ_DOMAIN
select PINCTRL
select PINCTRL_AT91
+ select SOC_BUS
select USE_OF
help
This enables support for systems based on Atmel
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 827fdbcce1c7..44a5c1a92b39 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -2,7 +2,7 @@
# Makefile for the linux kernel.
#
-obj-y := setup.o
+obj-y := setup.o soc.o
obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o
diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
new file mode 100644
index 000000000000..332698dbf572
--- /dev/null
+++ b/arch/arm/mach-at91/soc.c
@@ -0,0 +1,110 @@
+/*
+ * Copyright (C) 2015 Atmel
+ *
+ * Alexandre Belloni <alexandre.belloni@free-electrons.com
+ * Boris Brezillon <boris.brezillon@free-electrons.com
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ */
+
+#define pr_fmt(fmt) "AT91: " fmt
+
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
+
+#include "soc.h"
+
+#define AT91_DBGU_CIDR 0x40
+#define AT91_DBGU_CIDR_ARCH(x) (((x) >> 20) & 0xff)
+#define AT91_DBGU_CIDR_VERSION(x) ((x) & 0x1f)
+#define AT91_DBGU_CIDR_EXT BIT(31)
+#define AT91_DBGU_CIDR_MATCH_MASK 0x7fffffe0
+#define AT91_DBGU_EXID 0x44
+
+struct soc_device * __init at91_soc_init(const struct at91_soc_family *families)
+{
+ struct soc_device_attribute *soc_dev_attr;
+ const struct at91_soc_family *family;
+ const struct at91_soc *soc;
+ struct soc_device *soc_dev;
+ struct device_node *np;
+ void __iomem *regs;
+ u32 cidr, exid;
+
+
+ np = of_find_compatible_node(NULL, NULL, "atmel,at91rm9200-dbgu");
+ if (!np)
+ np = of_find_compatible_node(NULL, NULL,
+ "atmel,at91sam9260-dbgu");
+
+ if (!np) {
+ pr_warn("Could not find DBGU node");
+ return NULL;
+ }
+
+ regs = of_iomap(np, 0);
+ of_node_put(np);
+
+ if (!regs) {
+ pr_warn("Could not map DBGU iomem range");
+ return NULL;
+ }
+
+ cidr = readl(regs + AT91_DBGU_CIDR);
+ exid = readl(regs + AT91_DBGU_EXID);
+
+ iounmap(regs);
+
+ for (family = families; family->name; family++) {
+ if (family->id == AT91_DBGU_CIDR_ARCH(cidr))
+ break;
+ }
+
+ if (!family->name) {
+ pr_warn("Could not find matching SoC family\n");
+ return NULL;
+ }
+
+ for (soc = family->socs; soc->name; soc++) {
+ if (soc->cidr_match != (cidr & AT91_DBGU_CIDR_MATCH_MASK))
+ continue;
+
+ if (!(cidr & AT91_DBGU_CIDR_EXT) || soc->exid_match == exid)
+ break;
+ }
+
+ if (!soc->name) {
+ pr_warn("Could not find matching SoC description\n");
+ return NULL;
+ }
+
+ soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+ if (!soc_dev_attr)
+ return NULL;
+
+ soc_dev_attr->family = family->name;
+ soc_dev_attr->soc_id = soc->subname ? soc->subname : soc->name;
+ soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X",
+ AT91_DBGU_CIDR_VERSION(cidr));
+ soc_dev = soc_device_register(soc_dev_attr);
+ if (IS_ERR(soc_dev)) {
+ kfree(soc_dev_attr->revision);
+ kfree(soc_dev_attr);
+ pr_warn("Could not register SoC device\n");
+ return NULL;
+ }
+
+ pr_info("Detected soc type: %s, revision %X\n", soc->name,
+ AT91_DBGU_CIDR_VERSION(cidr));
+ if (soc->subname)
+ pr_info("Detected soc subtype: %s\n", soc->subname);
+
+ return soc_dev;
+}
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
new file mode 100644
index 000000000000..66dcd146601a
--- /dev/null
+++ b/arch/arm/mach-at91/soc.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2015 Atmel
+ *
+ * Boris Brezillon <boris.brezillon@free-electrons.com
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ */
+
+#ifndef __AT91_SOC_H
+#define __AT91_SOC_H
+
+#include <linux/sys_soc.h>
+
+struct at91_soc {
+ u32 cidr_match;
+ u32 exid_match;
+ const char *name;
+ const char *subname;
+};
+
+struct at91_soc_family {
+ int id;
+ const char *name;
+ const struct at91_soc *socs;
+};
+
+#define AT91_SOC(__cidr, __exid, __name, __subname) \
+ { \
+ .cidr_match = (__cidr), \
+ .exid_match = (__exid), \
+ .name = (__name), \
+ .subname = (__subname), \
+ }
+
+#define AT91_SOC_FAMILY(__id, __name, __socs) \
+ { \
+ .id = (__id), \
+ .name = (__name), \
+ .socs = (__socs), \
+ }
+
+struct soc_device * __init
+at91_soc_init(const struct at91_soc_family *families);
+
+#endif /* __AT91_SOC_H */
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 5/9] ARM: at91: add soc detection infrastructure
@ 2015-03-11 17:00 ` Alexandre Belloni
0 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: linux-arm-kernel
From: Boris BREZILLON <boris.brezillon@free-electrons.com>
Add new structures and functions to handle AT91 SoC detection.
[alexandre.belloni at free-electrons.com: reworked DBGU detection]
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-at91/Makefile | 2 +-
arch/arm/mach-at91/soc.c | 110 ++++++++++++++++++++++++++++++++++++++++++++
arch/arm/mach-at91/soc.h | 48 +++++++++++++++++++
4 files changed, 160 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/mach-at91/soc.c
create mode 100644 arch/arm/mach-at91/soc.h
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index e7ce6612bc42..f6c5b05e8de8 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -363,6 +363,7 @@ config ARCH_AT91
select IRQ_DOMAIN
select PINCTRL
select PINCTRL_AT91
+ select SOC_BUS
select USE_OF
help
This enables support for systems based on Atmel
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 827fdbcce1c7..44a5c1a92b39 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -2,7 +2,7 @@
# Makefile for the linux kernel.
#
-obj-y := setup.o
+obj-y := setup.o soc.o
obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o
diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
new file mode 100644
index 000000000000..332698dbf572
--- /dev/null
+++ b/arch/arm/mach-at91/soc.c
@@ -0,0 +1,110 @@
+/*
+ * Copyright (C) 2015 Atmel
+ *
+ * Alexandre Belloni <alexandre.belloni at free-electrons.com
+ * Boris Brezillon <boris.brezillon@free-electrons.com
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ */
+
+#define pr_fmt(fmt) "AT91: " fmt
+
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+#include <linux/sys_soc.h>
+
+#include "soc.h"
+
+#define AT91_DBGU_CIDR 0x40
+#define AT91_DBGU_CIDR_ARCH(x) (((x) >> 20) & 0xff)
+#define AT91_DBGU_CIDR_VERSION(x) ((x) & 0x1f)
+#define AT91_DBGU_CIDR_EXT BIT(31)
+#define AT91_DBGU_CIDR_MATCH_MASK 0x7fffffe0
+#define AT91_DBGU_EXID 0x44
+
+struct soc_device * __init at91_soc_init(const struct at91_soc_family *families)
+{
+ struct soc_device_attribute *soc_dev_attr;
+ const struct at91_soc_family *family;
+ const struct at91_soc *soc;
+ struct soc_device *soc_dev;
+ struct device_node *np;
+ void __iomem *regs;
+ u32 cidr, exid;
+
+
+ np = of_find_compatible_node(NULL, NULL, "atmel,at91rm9200-dbgu");
+ if (!np)
+ np = of_find_compatible_node(NULL, NULL,
+ "atmel,at91sam9260-dbgu");
+
+ if (!np) {
+ pr_warn("Could not find DBGU node");
+ return NULL;
+ }
+
+ regs = of_iomap(np, 0);
+ of_node_put(np);
+
+ if (!regs) {
+ pr_warn("Could not map DBGU iomem range");
+ return NULL;
+ }
+
+ cidr = readl(regs + AT91_DBGU_CIDR);
+ exid = readl(regs + AT91_DBGU_EXID);
+
+ iounmap(regs);
+
+ for (family = families; family->name; family++) {
+ if (family->id == AT91_DBGU_CIDR_ARCH(cidr))
+ break;
+ }
+
+ if (!family->name) {
+ pr_warn("Could not find matching SoC family\n");
+ return NULL;
+ }
+
+ for (soc = family->socs; soc->name; soc++) {
+ if (soc->cidr_match != (cidr & AT91_DBGU_CIDR_MATCH_MASK))
+ continue;
+
+ if (!(cidr & AT91_DBGU_CIDR_EXT) || soc->exid_match == exid)
+ break;
+ }
+
+ if (!soc->name) {
+ pr_warn("Could not find matching SoC description\n");
+ return NULL;
+ }
+
+ soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
+ if (!soc_dev_attr)
+ return NULL;
+
+ soc_dev_attr->family = family->name;
+ soc_dev_attr->soc_id = soc->subname ? soc->subname : soc->name;
+ soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X",
+ AT91_DBGU_CIDR_VERSION(cidr));
+ soc_dev = soc_device_register(soc_dev_attr);
+ if (IS_ERR(soc_dev)) {
+ kfree(soc_dev_attr->revision);
+ kfree(soc_dev_attr);
+ pr_warn("Could not register SoC device\n");
+ return NULL;
+ }
+
+ pr_info("Detected soc type: %s, revision %X\n", soc->name,
+ AT91_DBGU_CIDR_VERSION(cidr));
+ if (soc->subname)
+ pr_info("Detected soc subtype: %s\n", soc->subname);
+
+ return soc_dev;
+}
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
new file mode 100644
index 000000000000..66dcd146601a
--- /dev/null
+++ b/arch/arm/mach-at91/soc.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright (C) 2015 Atmel
+ *
+ * Boris Brezillon <boris.brezillon@free-electrons.com
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ *
+ */
+
+#ifndef __AT91_SOC_H
+#define __AT91_SOC_H
+
+#include <linux/sys_soc.h>
+
+struct at91_soc {
+ u32 cidr_match;
+ u32 exid_match;
+ const char *name;
+ const char *subname;
+};
+
+struct at91_soc_family {
+ int id;
+ const char *name;
+ const struct at91_soc *socs;
+};
+
+#define AT91_SOC(__cidr, __exid, __name, __subname) \
+ { \
+ .cidr_match = (__cidr), \
+ .exid_match = (__exid), \
+ .name = (__name), \
+ .subname = (__subname), \
+ }
+
+#define AT91_SOC_FAMILY(__id, __name, __socs) \
+ { \
+ .id = (__id), \
+ .name = (__name), \
+ .socs = (__socs), \
+ }
+
+struct soc_device * __init
+at91_soc_init(const struct at91_soc_family *families);
+
+#endif /* __AT91_SOC_H */
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 6/9] ARM: at91: at91rm9200 use SoC detection infrastructure
2015-03-11 17:00 ` Alexandre Belloni
@ 2015-03-11 17:00 ` Alexandre Belloni
-1 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
Boris Brezillon, Alexander Stein, Alexandre Belloni
Use the soc detection infrastructure for at91rm9200 initialization.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/at91rm9200.c | 34 ++++++++++++++++++++--------------
arch/arm/mach-at91/soc.h | 3 +++
2 files changed, 23 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 8fcfb70f7124..9f3f91daf9fe 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -8,25 +8,27 @@
* Licensed under GPLv2 or later.
*/
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/gpio.h>
+#include <linux/clk-provider.h>
#include <linux/of.h>
-#include <linux/of_irq.h>
#include <linux/of_platform.h>
-#include <linux/clk-provider.h>
-#include <asm/setup.h>
-#include <asm/irq.h>
#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
#include <asm/system_misc.h>
#include <mach/at91_st.h>
#include "generic.h"
+#include "soc.h"
+
+static const struct at91_soc rm9200_socs[] = {
+ AT91_SOC(AT91RM9200_CIDR_MATCH, 0, "at91rm9200", "at91rm9200 BGA"),
+ { /* sentinel */ },
+};
+
+static const struct at91_soc_family rm9200_families[] = {
+ AT91_SOC_FAMILY(ARCH_ID_AT91RM9200, "AT91RM9200", rm9200_socs),
+ { /* sentinel */ },
+};
static void at91rm9200_restart(enum reboot_mode reboot_mode, const char *cmd)
{
@@ -45,15 +47,20 @@ static void __init at91rm9200_dt_timer_init(void)
static void __init at91rm9200_dt_device_init(void)
{
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ struct soc_device *soc;
+ struct device *soc_dev = NULL;
+
+ soc = at91_soc_init(rm9200_families);
+ if (soc != NULL)
+ soc_dev = soc_device_to_device(soc);
+
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev);
arm_pm_idle = at91rm9200_idle;
arm_pm_restart = at91rm9200_restart;
at91rm9200_pm_init();
}
-
-
static const char *at91rm9200_dt_board_compat[] __initconst = {
"atmel,at91rm9200",
NULL
@@ -61,7 +68,6 @@ static const char *at91rm9200_dt_board_compat[] __initconst = {
DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200")
.init_time = at91rm9200_dt_timer_init,
- .map_io = at91_map_io,
.init_machine = at91rm9200_dt_device_init,
.dt_compat = at91rm9200_dt_board_compat,
MACHINE_END
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 66dcd146601a..b330fcfe18a3 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -45,4 +45,7 @@ struct at91_soc_family {
struct soc_device * __init
at91_soc_init(const struct at91_soc_family *families);
+#define ARCH_ID_AT91RM9200 0x92
+#define AT91RM9200_CIDR_MATCH 0x09290780
+
#endif /* __AT91_SOC_H */
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 6/9] ARM: at91: at91rm9200 use SoC detection infrastructure
@ 2015-03-11 17:00 ` Alexandre Belloni
0 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: linux-arm-kernel
Use the soc detection infrastructure for at91rm9200 initialization.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/at91rm9200.c | 34 ++++++++++++++++++++--------------
arch/arm/mach-at91/soc.h | 3 +++
2 files changed, 23 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c
index 8fcfb70f7124..9f3f91daf9fe 100644
--- a/arch/arm/mach-at91/at91rm9200.c
+++ b/arch/arm/mach-at91/at91rm9200.c
@@ -8,25 +8,27 @@
* Licensed under GPLv2 or later.
*/
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/gpio.h>
+#include <linux/clk-provider.h>
#include <linux/of.h>
-#include <linux/of_irq.h>
#include <linux/of_platform.h>
-#include <linux/clk-provider.h>
-#include <asm/setup.h>
-#include <asm/irq.h>
#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
#include <asm/system_misc.h>
#include <mach/at91_st.h>
#include "generic.h"
+#include "soc.h"
+
+static const struct at91_soc rm9200_socs[] = {
+ AT91_SOC(AT91RM9200_CIDR_MATCH, 0, "at91rm9200", "at91rm9200 BGA"),
+ { /* sentinel */ },
+};
+
+static const struct at91_soc_family rm9200_families[] = {
+ AT91_SOC_FAMILY(ARCH_ID_AT91RM9200, "AT91RM9200", rm9200_socs),
+ { /* sentinel */ },
+};
static void at91rm9200_restart(enum reboot_mode reboot_mode, const char *cmd)
{
@@ -45,15 +47,20 @@ static void __init at91rm9200_dt_timer_init(void)
static void __init at91rm9200_dt_device_init(void)
{
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ struct soc_device *soc;
+ struct device *soc_dev = NULL;
+
+ soc = at91_soc_init(rm9200_families);
+ if (soc != NULL)
+ soc_dev = soc_device_to_device(soc);
+
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev);
arm_pm_idle = at91rm9200_idle;
arm_pm_restart = at91rm9200_restart;
at91rm9200_pm_init();
}
-
-
static const char *at91rm9200_dt_board_compat[] __initconst = {
"atmel,at91rm9200",
NULL
@@ -61,7 +68,6 @@ static const char *at91rm9200_dt_board_compat[] __initconst = {
DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200")
.init_time = at91rm9200_dt_timer_init,
- .map_io = at91_map_io,
.init_machine = at91rm9200_dt_device_init,
.dt_compat = at91rm9200_dt_board_compat,
MACHINE_END
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 66dcd146601a..b330fcfe18a3 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -45,4 +45,7 @@ struct at91_soc_family {
struct soc_device * __init
at91_soc_init(const struct at91_soc_family *families);
+#define ARCH_ID_AT91RM9200 0x92
+#define AT91RM9200_CIDR_MATCH 0x09290780
+
#endif /* __AT91_SOC_H */
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 7/9] ARM: at91: at91sam9: use SoC detection infrastructure
2015-03-11 17:00 ` Alexandre Belloni
@ 2015-03-11 17:00 ` Alexandre Belloni
-1 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
Boris Brezillon, Alexander Stein, Alexandre Belloni
Use the soc detection infrastructure for at91sam9 initialization.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/at91sam9.c | 86 ++++++++++++++++++++++++++++++++-----------
arch/arm/mach-at91/soc.h | 30 +++++++++++++++
2 files changed, 94 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-at91/at91sam9.c b/arch/arm/mach-at91/at91sam9.c
index 56e3ba73ec40..6aa0a5461be9 100644
--- a/arch/arm/mach-at91/at91sam9.c
+++ b/arch/arm/mach-at91/at91sam9.c
@@ -7,29 +7,78 @@
* Licensed under GPLv2 or later.
*/
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/gpio.h>
#include <linux/of.h>
-#include <linux/of_irq.h>
#include <linux/of_platform.h>
-#include <linux/clk-provider.h>
-#include <asm/system_misc.h>
-#include <asm/setup.h>
-#include <asm/irq.h>
#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
+#include <asm/system_misc.h>
#include "generic.h"
+#include "soc.h"
-static void __init at91sam9_dt_device_init(void)
+static const struct at91_soc at91sam9_socs[] = {
+ AT91_SOC(AT91SAM9260_CIDR_MATCH, 0, "at91sam9260", NULL),
+ AT91_SOC(AT91SAM9261_CIDR_MATCH, 0, "at91sam9261", NULL),
+ AT91_SOC(AT91SAM9263_CIDR_MATCH, 0, "at91sam9263", NULL),
+ AT91_SOC(AT91SAM9G20_CIDR_MATCH, 0, "at91sam9g20", NULL),
+ AT91_SOC(AT91SAM9RL64_CIDR_MATCH, 0, "at91sam9rl64", NULL),
+ AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M11_EXID_MATCH,
+ "at91sam9g45", "at91sam9m11"),
+ AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M10_EXID_MATCH,
+ "at91sam9g45", "at91sam9m10"),
+ AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G46_EXID_MATCH,
+ "at91sam9g45", "at91sam9g46"),
+ AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G45_EXID_MATCH,
+ "at91sam9g45", "at91sam9g45"),
+ AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G15_EXID_MATCH,
+ "at91sam9x5", "at91sam9g15"),
+ AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G35_EXID_MATCH,
+ "at91sam9x5", "at91sam9g35"),
+ AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X35_EXID_MATCH,
+ "at91sam9x5", "at91sam9x35"),
+ AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G25_EXID_MATCH,
+ "at91sam9x5", "at91sam9g25"),
+ AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X25_EXID_MATCH,
+ "at91sam9x5", "at91sam9x25"),
+ AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN12_EXID_MATCH,
+ "at91sam9n12", "at91sam9cn12"),
+ AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9N12_EXID_MATCH,
+ "at91sam9n12", "at91sam9n12"),
+ AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN11_EXID_MATCH,
+ "at91sam9n12", "at91sam9cn11"),
+ { /* sentinel */ },
+};
+
+static const struct at91_soc at91sam9xe_socs[] = {
+ AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe", "at91sam9xe128"),
+ AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe", "at91sam9xe256"),
+ AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe", "at91sam9xe512"),
+ { /* sentinel */ },
+};
+
+static const struct at91_soc_family at91sam9_families[] = {
+ AT91_SOC_FAMILY(ARCH_ID_AT91SAM9, "AT91SAM9", at91sam9_socs),
+ AT91_SOC_FAMILY(ARCH_ID_AT91SAM9XE, "AT91SAM9XE", at91sam9xe_socs),
+ { /* sentinel */ },
+};
+
+static void __init at91sam9_common_init(void)
{
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ struct soc_device *soc;
+ struct device *soc_dev = NULL;
+
+ soc = at91_soc_init(at91sam9_families);
+ if (soc != NULL)
+ soc_dev = soc_device_to_device(soc);
+
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev);
arm_pm_idle = at91sam9_idle;
+}
+
+static void __init at91sam9_dt_device_init(void)
+{
+ at91sam9_common_init();
at91sam9260_pm_init();
}
@@ -40,16 +89,13 @@ static const char *at91_dt_board_compat[] __initconst = {
DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9")
/* Maintainer: Atmel */
- .map_io = at91_map_io,
.init_machine = at91sam9_dt_device_init,
.dt_compat = at91_dt_board_compat,
MACHINE_END
static void __init at91sam9g45_dt_device_init(void)
{
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-
- arm_pm_idle = at91sam9_idle;
+ at91sam9_common_init();
at91sam9g45_pm_init();
}
@@ -60,16 +106,13 @@ static const char *at91sam9g45_board_compat[] __initconst = {
DT_MACHINE_START(at91sam9g45_dt, "Atmel AT91SAM9G45")
/* Maintainer: Atmel */
- .map_io = at91_map_io,
.init_machine = at91sam9g45_dt_device_init,
.dt_compat = at91sam9g45_board_compat,
MACHINE_END
static void __init at91sam9x5_dt_device_init(void)
{
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-
- arm_pm_idle = at91sam9_idle;
+ at91sam9_common_init();
at91sam9x5_pm_init();
}
@@ -81,7 +124,6 @@ static const char *at91sam9x5_board_compat[] __initconst = {
DT_MACHINE_START(at91sam9x5_dt, "Atmel AT91SAM9")
/* Maintainer: Atmel */
- .map_io = at91_map_io,
.init_machine = at91sam9x5_dt_device_init,
.dt_compat = at91sam9x5_board_compat,
MACHINE_END
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index b330fcfe18a3..4ed7e0bd7a62 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -48,4 +48,34 @@ at91_soc_init(const struct at91_soc_family *families);
#define ARCH_ID_AT91RM9200 0x92
#define AT91RM9200_CIDR_MATCH 0x09290780
+#define ARCH_ID_AT91SAM9 0x19
+#define AT91SAM9260_CIDR_MATCH 0x019803a0
+#define AT91SAM9261_CIDR_MATCH 0x019703a0
+#define AT91SAM9263_CIDR_MATCH 0x019607a0
+#define AT91SAM9G20_CIDR_MATCH 0x019905a0
+#define AT91SAM9RL64_CIDR_MATCH 0x019b03a0
+#define AT91SAM9G45_CIDR_MATCH 0x019b05a0
+#define AT91SAM9X5_CIDR_MATCH 0x019a05a0
+#define AT91SAM9N12_CIDR_MATCH 0x019a07a0
+
+#define AT91SAM9M11_EXID_MATCH 0x00000001
+#define AT91SAM9M10_EXID_MATCH 0x00000002
+#define AT91SAM9G46_EXID_MATCH 0x00000003
+#define AT91SAM9G45_EXID_MATCH 0x00000004
+
+#define AT91SAM9G15_EXID_MATCH 0x00000000
+#define AT91SAM9G35_EXID_MATCH 0x00000001
+#define AT91SAM9X35_EXID_MATCH 0x00000002
+#define AT91SAM9G25_EXID_MATCH 0x00000003
+#define AT91SAM9X25_EXID_MATCH 0x00000004
+
+#define AT91SAM9CN12_EXID_MATCH 0x00000005
+#define AT91SAM9N12_EXID_MATCH 0x00000006
+#define AT91SAM9CN11_EXID_MATCH 0x00000009
+
+#define ARCH_ID_AT91SAM9XE 0x29
+#define AT91SAM9XE128_CIDR_MATCH 0x329973a0
+#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0
+#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0
+
#endif /* __AT91_SOC_H */
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 7/9] ARM: at91: at91sam9: use SoC detection infrastructure
@ 2015-03-11 17:00 ` Alexandre Belloni
0 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: linux-arm-kernel
Use the soc detection infrastructure for at91sam9 initialization.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/at91sam9.c | 86 ++++++++++++++++++++++++++++++++-----------
arch/arm/mach-at91/soc.h | 30 +++++++++++++++
2 files changed, 94 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-at91/at91sam9.c b/arch/arm/mach-at91/at91sam9.c
index 56e3ba73ec40..6aa0a5461be9 100644
--- a/arch/arm/mach-at91/at91sam9.c
+++ b/arch/arm/mach-at91/at91sam9.c
@@ -7,29 +7,78 @@
* Licensed under GPLv2 or later.
*/
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/gpio.h>
#include <linux/of.h>
-#include <linux/of_irq.h>
#include <linux/of_platform.h>
-#include <linux/clk-provider.h>
-#include <asm/system_misc.h>
-#include <asm/setup.h>
-#include <asm/irq.h>
#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
+#include <asm/system_misc.h>
#include "generic.h"
+#include "soc.h"
-static void __init at91sam9_dt_device_init(void)
+static const struct at91_soc at91sam9_socs[] = {
+ AT91_SOC(AT91SAM9260_CIDR_MATCH, 0, "at91sam9260", NULL),
+ AT91_SOC(AT91SAM9261_CIDR_MATCH, 0, "at91sam9261", NULL),
+ AT91_SOC(AT91SAM9263_CIDR_MATCH, 0, "at91sam9263", NULL),
+ AT91_SOC(AT91SAM9G20_CIDR_MATCH, 0, "at91sam9g20", NULL),
+ AT91_SOC(AT91SAM9RL64_CIDR_MATCH, 0, "at91sam9rl64", NULL),
+ AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M11_EXID_MATCH,
+ "at91sam9g45", "at91sam9m11"),
+ AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9M10_EXID_MATCH,
+ "at91sam9g45", "at91sam9m10"),
+ AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G46_EXID_MATCH,
+ "at91sam9g45", "at91sam9g46"),
+ AT91_SOC(AT91SAM9G45_CIDR_MATCH, AT91SAM9G45_EXID_MATCH,
+ "at91sam9g45", "at91sam9g45"),
+ AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G15_EXID_MATCH,
+ "at91sam9x5", "at91sam9g15"),
+ AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G35_EXID_MATCH,
+ "at91sam9x5", "at91sam9g35"),
+ AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X35_EXID_MATCH,
+ "at91sam9x5", "at91sam9x35"),
+ AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9G25_EXID_MATCH,
+ "at91sam9x5", "at91sam9g25"),
+ AT91_SOC(AT91SAM9X5_CIDR_MATCH, AT91SAM9X25_EXID_MATCH,
+ "at91sam9x5", "at91sam9x25"),
+ AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN12_EXID_MATCH,
+ "at91sam9n12", "at91sam9cn12"),
+ AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9N12_EXID_MATCH,
+ "at91sam9n12", "at91sam9n12"),
+ AT91_SOC(AT91SAM9N12_CIDR_MATCH, AT91SAM9CN11_EXID_MATCH,
+ "at91sam9n12", "at91sam9cn11"),
+ { /* sentinel */ },
+};
+
+static const struct at91_soc at91sam9xe_socs[] = {
+ AT91_SOC(AT91SAM9XE128_CIDR_MATCH, 0, "at91sam9xe", "at91sam9xe128"),
+ AT91_SOC(AT91SAM9XE256_CIDR_MATCH, 0, "at91sam9xe", "at91sam9xe256"),
+ AT91_SOC(AT91SAM9XE512_CIDR_MATCH, 0, "at91sam9xe", "at91sam9xe512"),
+ { /* sentinel */ },
+};
+
+static const struct at91_soc_family at91sam9_families[] = {
+ AT91_SOC_FAMILY(ARCH_ID_AT91SAM9, "AT91SAM9", at91sam9_socs),
+ AT91_SOC_FAMILY(ARCH_ID_AT91SAM9XE, "AT91SAM9XE", at91sam9xe_socs),
+ { /* sentinel */ },
+};
+
+static void __init at91sam9_common_init(void)
{
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ struct soc_device *soc;
+ struct device *soc_dev = NULL;
+
+ soc = at91_soc_init(at91sam9_families);
+ if (soc != NULL)
+ soc_dev = soc_device_to_device(soc);
+
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev);
arm_pm_idle = at91sam9_idle;
+}
+
+static void __init at91sam9_dt_device_init(void)
+{
+ at91sam9_common_init();
at91sam9260_pm_init();
}
@@ -40,16 +89,13 @@ static const char *at91_dt_board_compat[] __initconst = {
DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9")
/* Maintainer: Atmel */
- .map_io = at91_map_io,
.init_machine = at91sam9_dt_device_init,
.dt_compat = at91_dt_board_compat,
MACHINE_END
static void __init at91sam9g45_dt_device_init(void)
{
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-
- arm_pm_idle = at91sam9_idle;
+ at91sam9_common_init();
at91sam9g45_pm_init();
}
@@ -60,16 +106,13 @@ static const char *at91sam9g45_board_compat[] __initconst = {
DT_MACHINE_START(at91sam9g45_dt, "Atmel AT91SAM9G45")
/* Maintainer: Atmel */
- .map_io = at91_map_io,
.init_machine = at91sam9g45_dt_device_init,
.dt_compat = at91sam9g45_board_compat,
MACHINE_END
static void __init at91sam9x5_dt_device_init(void)
{
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
-
- arm_pm_idle = at91sam9_idle;
+ at91sam9_common_init();
at91sam9x5_pm_init();
}
@@ -81,7 +124,6 @@ static const char *at91sam9x5_board_compat[] __initconst = {
DT_MACHINE_START(at91sam9x5_dt, "Atmel AT91SAM9")
/* Maintainer: Atmel */
- .map_io = at91_map_io,
.init_machine = at91sam9x5_dt_device_init,
.dt_compat = at91sam9x5_board_compat,
MACHINE_END
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index b330fcfe18a3..4ed7e0bd7a62 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -48,4 +48,34 @@ at91_soc_init(const struct at91_soc_family *families);
#define ARCH_ID_AT91RM9200 0x92
#define AT91RM9200_CIDR_MATCH 0x09290780
+#define ARCH_ID_AT91SAM9 0x19
+#define AT91SAM9260_CIDR_MATCH 0x019803a0
+#define AT91SAM9261_CIDR_MATCH 0x019703a0
+#define AT91SAM9263_CIDR_MATCH 0x019607a0
+#define AT91SAM9G20_CIDR_MATCH 0x019905a0
+#define AT91SAM9RL64_CIDR_MATCH 0x019b03a0
+#define AT91SAM9G45_CIDR_MATCH 0x019b05a0
+#define AT91SAM9X5_CIDR_MATCH 0x019a05a0
+#define AT91SAM9N12_CIDR_MATCH 0x019a07a0
+
+#define AT91SAM9M11_EXID_MATCH 0x00000001
+#define AT91SAM9M10_EXID_MATCH 0x00000002
+#define AT91SAM9G46_EXID_MATCH 0x00000003
+#define AT91SAM9G45_EXID_MATCH 0x00000004
+
+#define AT91SAM9G15_EXID_MATCH 0x00000000
+#define AT91SAM9G35_EXID_MATCH 0x00000001
+#define AT91SAM9X35_EXID_MATCH 0x00000002
+#define AT91SAM9G25_EXID_MATCH 0x00000003
+#define AT91SAM9X25_EXID_MATCH 0x00000004
+
+#define AT91SAM9CN12_EXID_MATCH 0x00000005
+#define AT91SAM9N12_EXID_MATCH 0x00000006
+#define AT91SAM9CN11_EXID_MATCH 0x00000009
+
+#define ARCH_ID_AT91SAM9XE 0x29
+#define AT91SAM9XE128_CIDR_MATCH 0x329973a0
+#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0
+#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0
+
#endif /* __AT91_SOC_H */
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 8/9] ARM: at91: sama5 use SoC detection infrastructure
2015-03-11 17:00 ` Alexandre Belloni
@ 2015-03-11 17:00 ` Alexandre Belloni
-1 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
Boris Brezillon, Alexander Stein, Alexandre Belloni
Use the soc detection infrastructure for sama5 initialization.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/sama5.c | 54 +++++++++++++++++++++++++++++++++-------------
arch/arm/mach-at91/soc.h | 14 ++++++++++++
2 files changed, 53 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-at91/sama5.c b/arch/arm/mach-at91/sama5.c
index 03dcb441f3d2..c033c58faf35 100644
--- a/arch/arm/mach-at91/sama5.c
+++ b/arch/arm/mach-at91/sama5.c
@@ -7,27 +7,46 @@
* Licensed under GPLv2 or later.
*/
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/gpio.h>
#include <linux/micrel_phy.h>
#include <linux/of.h>
-#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/phy.h>
-#include <linux/clk-provider.h>
-#include <linux/phy.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
+#include <asm/system_misc.h>
+
+#include <mach/hardware.h>
#include "generic.h"
+#include "soc.h"
+
+static const struct at91_soc sama5_socs[] = {
+ AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
+ "sama5d3", "sama5d31"),
+ AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
+ "sama5d3", "sama5d33"),
+ AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D34_EXID_MATCH,
+ "sama5d3", "sama5d34"),
+ AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D35_EXID_MATCH,
+ "sama5d3", "sama5d35"),
+ AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D36_EXID_MATCH,
+ "sama5d3", "sama5d36"),
+ AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D41_EXID_MATCH,
+ "sama5d4", "sama5d41"),
+ AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D42_EXID_MATCH,
+ "sama5d4", "sama5d41"),
+ AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D43_EXID_MATCH,
+ "sama5d4", "sama5d43"),
+ AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D44_EXID_MATCH,
+ "sama5d4", "sama5d44"),
+ { /* sentinel */ },
+};
+
+static const struct at91_soc_family sama5_families[] = {
+ AT91_SOC_FAMILY(ARCH_ID_SAMA5, "SAMA5", sama5_socs),
+ { /* sentinel */ },
+};
static int ksz8081_phy_fixup(struct phy_device *phy)
{
@@ -42,13 +61,20 @@ static int ksz8081_phy_fixup(struct phy_device *phy)
static void __init sama5_dt_device_init(void)
{
+ struct soc_device *soc;
+ struct device *soc_dev = NULL;
+
+ soc = at91_soc_init(sama5_families);
+ if (soc != NULL)
+ soc_dev = soc_device_to_device(soc);
+
if (of_machine_is_compatible("atmel,sama5d4ek") &&
IS_ENABLED(CONFIG_PHYLIB)) {
phy_register_fixup_for_id("fc028000.etherne:00",
ksz8081_phy_fixup);
}
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev);
at91sam9x5_pm_init();
}
@@ -59,7 +85,6 @@ static const char *sama5_dt_board_compat[] __initconst = {
DT_MACHINE_START(sama5_dt, "Atmel SAMA5")
/* Maintainer: Atmel */
- .map_io = at91_map_io,
.init_machine = sama5_dt_device_init,
.dt_compat = sama5_dt_board_compat,
MACHINE_END
@@ -93,7 +118,6 @@ static struct map_desc at91_io_desc[] __initdata = {
static void __init sama5_alt_map_io(void)
{
- at91_alt_map_io();
iotable_init(at91_io_desc, ARRAY_SIZE(at91_io_desc));
}
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 4ed7e0bd7a62..ed14c387e1b8 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -78,4 +78,18 @@ at91_soc_init(const struct at91_soc_family *families);
#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0
#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0
+#define ARCH_ID_SAMA5 0xa5
+#define SAMA5D3_CIDR_MATCH 0x0a5c07c0
+#define SAMA5D31_EXID_MATCH 0x00444300
+#define SAMA5D33_EXID_MATCH 0x00414300
+#define SAMA5D34_EXID_MATCH 0x00414301
+#define SAMA5D35_EXID_MATCH 0x00584300
+#define SAMA5D36_EXID_MATCH 0x00004301
+
+#define SAMA5D4_CIDR_MATCH 0x0a5c07c0
+#define SAMA5D41_EXID_MATCH 0x00000001
+#define SAMA5D42_EXID_MATCH 0x00000002
+#define SAMA5D43_EXID_MATCH 0x00000003
+#define SAMA5D44_EXID_MATCH 0x00000004
+
#endif /* __AT91_SOC_H */
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 8/9] ARM: at91: sama5 use SoC detection infrastructure
@ 2015-03-11 17:00 ` Alexandre Belloni
0 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: linux-arm-kernel
Use the soc detection infrastructure for sama5 initialization.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/sama5.c | 54 +++++++++++++++++++++++++++++++++-------------
arch/arm/mach-at91/soc.h | 14 ++++++++++++
2 files changed, 53 insertions(+), 15 deletions(-)
diff --git a/arch/arm/mach-at91/sama5.c b/arch/arm/mach-at91/sama5.c
index 03dcb441f3d2..c033c58faf35 100644
--- a/arch/arm/mach-at91/sama5.c
+++ b/arch/arm/mach-at91/sama5.c
@@ -7,27 +7,46 @@
* Licensed under GPLv2 or later.
*/
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/gpio.h>
#include <linux/micrel_phy.h>
#include <linux/of.h>
-#include <linux/of_irq.h>
#include <linux/of_platform.h>
#include <linux/phy.h>
-#include <linux/clk-provider.h>
-#include <linux/phy.h>
-
-#include <mach/hardware.h>
-#include <asm/setup.h>
-#include <asm/irq.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
+#include <asm/system_misc.h>
+
+#include <mach/hardware.h>
#include "generic.h"
+#include "soc.h"
+
+static const struct at91_soc sama5_socs[] = {
+ AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D31_EXID_MATCH,
+ "sama5d3", "sama5d31"),
+ AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D33_EXID_MATCH,
+ "sama5d3", "sama5d33"),
+ AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D34_EXID_MATCH,
+ "sama5d3", "sama5d34"),
+ AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D35_EXID_MATCH,
+ "sama5d3", "sama5d35"),
+ AT91_SOC(SAMA5D3_CIDR_MATCH, SAMA5D36_EXID_MATCH,
+ "sama5d3", "sama5d36"),
+ AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D41_EXID_MATCH,
+ "sama5d4", "sama5d41"),
+ AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D42_EXID_MATCH,
+ "sama5d4", "sama5d41"),
+ AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D43_EXID_MATCH,
+ "sama5d4", "sama5d43"),
+ AT91_SOC(SAMA5D4_CIDR_MATCH, SAMA5D44_EXID_MATCH,
+ "sama5d4", "sama5d44"),
+ { /* sentinel */ },
+};
+
+static const struct at91_soc_family sama5_families[] = {
+ AT91_SOC_FAMILY(ARCH_ID_SAMA5, "SAMA5", sama5_socs),
+ { /* sentinel */ },
+};
static int ksz8081_phy_fixup(struct phy_device *phy)
{
@@ -42,13 +61,20 @@ static int ksz8081_phy_fixup(struct phy_device *phy)
static void __init sama5_dt_device_init(void)
{
+ struct soc_device *soc;
+ struct device *soc_dev = NULL;
+
+ soc = at91_soc_init(sama5_families);
+ if (soc != NULL)
+ soc_dev = soc_device_to_device(soc);
+
if (of_machine_is_compatible("atmel,sama5d4ek") &&
IS_ENABLED(CONFIG_PHYLIB)) {
phy_register_fixup_for_id("fc028000.etherne:00",
ksz8081_phy_fixup);
}
- of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, soc_dev);
at91sam9x5_pm_init();
}
@@ -59,7 +85,6 @@ static const char *sama5_dt_board_compat[] __initconst = {
DT_MACHINE_START(sama5_dt, "Atmel SAMA5")
/* Maintainer: Atmel */
- .map_io = at91_map_io,
.init_machine = sama5_dt_device_init,
.dt_compat = sama5_dt_board_compat,
MACHINE_END
@@ -93,7 +118,6 @@ static struct map_desc at91_io_desc[] __initdata = {
static void __init sama5_alt_map_io(void)
{
- at91_alt_map_io();
iotable_init(at91_io_desc, ARRAY_SIZE(at91_io_desc));
}
diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
index 4ed7e0bd7a62..ed14c387e1b8 100644
--- a/arch/arm/mach-at91/soc.h
+++ b/arch/arm/mach-at91/soc.h
@@ -78,4 +78,18 @@ at91_soc_init(const struct at91_soc_family *families);
#define AT91SAM9XE256_CIDR_MATCH 0x329a93a0
#define AT91SAM9XE512_CIDR_MATCH 0x329aa3a0
+#define ARCH_ID_SAMA5 0xa5
+#define SAMA5D3_CIDR_MATCH 0x0a5c07c0
+#define SAMA5D31_EXID_MATCH 0x00444300
+#define SAMA5D33_EXID_MATCH 0x00414300
+#define SAMA5D34_EXID_MATCH 0x00414301
+#define SAMA5D35_EXID_MATCH 0x00584300
+#define SAMA5D36_EXID_MATCH 0x00004301
+
+#define SAMA5D4_CIDR_MATCH 0x0a5c07c0
+#define SAMA5D41_EXID_MATCH 0x00000001
+#define SAMA5D42_EXID_MATCH 0x00000002
+#define SAMA5D43_EXID_MATCH 0x00000003
+#define SAMA5D44_EXID_MATCH 0x00000004
+
#endif /* __AT91_SOC_H */
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 9/9] ARM: at91: remove old setup
2015-03-11 17:00 ` Alexandre Belloni
@ 2015-03-11 17:00 ` Alexandre Belloni
-1 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: Nicolas Ferre
Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
Boris Brezillon, Alexander Stein, Alexandre Belloni
The old setup is not used anymore, remove it
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/Makefile | 2 +-
arch/arm/mach-at91/setup.c | 320 --------------------------------------------
2 files changed, 1 insertion(+), 321 deletions(-)
delete mode 100644 arch/arm/mach-at91/setup.c
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 44a5c1a92b39..50c0b526dcd8 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -2,7 +2,7 @@
# Makefile for the linux kernel.
#
-obj-y := setup.o soc.o
+obj-y := soc.o
obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
deleted file mode 100644
index ef778f33c488..000000000000
--- a/arch/arm/mach-at91/setup.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/*
- * Copyright (C) 2007 Atmel Corporation.
- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- *
- * Under GPLv2
- */
-
-#define pr_fmt(fmt) "AT91: " fmt
-
-#include <linux/module.h>
-#include <linux/io.h>
-#include <linux/mm.h>
-#include <linux/pm.h>
-#include <linux/of_address.h>
-#include <linux/pinctrl/machine.h>
-#include <linux/clk/at91_pmc.h>
-
-#include <asm/system_misc.h>
-#include <asm/mach/map.h>
-
-#include <mach/hardware.h>
-#include <mach/cpu.h>
-#include <mach/at91_dbgu.h>
-
-#include "generic.h"
-#include "pm.h"
-
-struct at91_socinfo at91_soc_initdata;
-EXPORT_SYMBOL(at91_soc_initdata);
-
-static struct map_desc at91_io_desc __initdata __maybe_unused = {
- .virtual = (unsigned long)AT91_VA_BASE_SYS,
- .pfn = __phys_to_pfn(AT91_BASE_SYS),
- .length = SZ_16K,
- .type = MT_DEVICE,
-};
-
-static struct map_desc at91_alt_io_desc __initdata __maybe_unused = {
- .virtual = (unsigned long)AT91_ALT_VA_BASE_SYS,
- .pfn = __phys_to_pfn(AT91_ALT_BASE_SYS),
- .length = 24 * SZ_1K,
- .type = MT_DEVICE,
-};
-
-static void __init soc_detect(u32 dbgu_base)
-{
- u32 cidr, socid;
-
- cidr = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_CIDR);
- socid = cidr & ~AT91_CIDR_VERSION;
-
- switch (socid) {
- case ARCH_ID_AT91RM9200:
- at91_soc_initdata.type = AT91_SOC_RM9200;
- if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_UNKNOWN)
- at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
- break;
-
- case ARCH_ID_AT91SAM9260:
- at91_soc_initdata.type = AT91_SOC_SAM9260;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- break;
-
- case ARCH_ID_AT91SAM9261:
- at91_soc_initdata.type = AT91_SOC_SAM9261;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- break;
-
- case ARCH_ID_AT91SAM9263:
- at91_soc_initdata.type = AT91_SOC_SAM9263;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- break;
-
- case ARCH_ID_AT91SAM9G20:
- at91_soc_initdata.type = AT91_SOC_SAM9G20;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- break;
-
- case ARCH_ID_AT91SAM9G45:
- at91_soc_initdata.type = AT91_SOC_SAM9G45;
- if (cidr == ARCH_ID_AT91SAM9G45ES)
- at91_soc_initdata.subtype = AT91_SOC_SAM9G45ES;
- break;
-
- case ARCH_ID_AT91SAM9RL64:
- at91_soc_initdata.type = AT91_SOC_SAM9RL;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- break;
-
- case ARCH_ID_AT91SAM9X5:
- at91_soc_initdata.type = AT91_SOC_SAM9X5;
- break;
-
- case ARCH_ID_AT91SAM9N12:
- at91_soc_initdata.type = AT91_SOC_SAM9N12;
- break;
-
- case ARCH_ID_SAMA5:
- at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
- if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
- at91_soc_initdata.type = AT91_SOC_SAMA5D3;
- }
- break;
- }
-
- /* at91sam9g10 */
- if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
- at91_soc_initdata.type = AT91_SOC_SAM9G10;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- }
- /* at91sam9xe */
- else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
- at91_soc_initdata.type = AT91_SOC_SAM9260;
- at91_soc_initdata.subtype = AT91_SOC_SAM9XE;
- }
-
- if (!at91_soc_is_detected())
- return;
-
- at91_soc_initdata.cidr = cidr;
-
- /* sub version of soc */
- if (!at91_soc_initdata.exid)
- at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
-
- if (at91_soc_initdata.type == AT91_SOC_SAM9G45) {
- switch (at91_soc_initdata.exid) {
- case ARCH_EXID_AT91SAM9M10:
- at91_soc_initdata.subtype = AT91_SOC_SAM9M10;
- break;
- case ARCH_EXID_AT91SAM9G46:
- at91_soc_initdata.subtype = AT91_SOC_SAM9G46;
- break;
- case ARCH_EXID_AT91SAM9M11:
- at91_soc_initdata.subtype = AT91_SOC_SAM9M11;
- break;
- }
- }
-
- if (at91_soc_initdata.type == AT91_SOC_SAM9X5) {
- switch (at91_soc_initdata.exid) {
- case ARCH_EXID_AT91SAM9G15:
- at91_soc_initdata.subtype = AT91_SOC_SAM9G15;
- break;
- case ARCH_EXID_AT91SAM9G35:
- at91_soc_initdata.subtype = AT91_SOC_SAM9G35;
- break;
- case ARCH_EXID_AT91SAM9X35:
- at91_soc_initdata.subtype = AT91_SOC_SAM9X35;
- break;
- case ARCH_EXID_AT91SAM9G25:
- at91_soc_initdata.subtype = AT91_SOC_SAM9G25;
- break;
- case ARCH_EXID_AT91SAM9X25:
- at91_soc_initdata.subtype = AT91_SOC_SAM9X25;
- break;
- }
- }
-
- if (at91_soc_initdata.type == AT91_SOC_SAMA5D3) {
- switch (at91_soc_initdata.exid) {
- case ARCH_EXID_SAMA5D31:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D31;
- break;
- case ARCH_EXID_SAMA5D33:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D33;
- break;
- case ARCH_EXID_SAMA5D34:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D34;
- break;
- case ARCH_EXID_SAMA5D35:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D35;
- break;
- case ARCH_EXID_SAMA5D36:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D36;
- break;
- }
- }
-}
-
-static void __init alt_soc_detect(u32 dbgu_base)
-{
- u32 cidr, socid;
-
- /* SoC ID */
- cidr = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_CIDR);
- socid = cidr & ~AT91_CIDR_VERSION;
-
- switch (socid) {
- case ARCH_ID_SAMA5:
- at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
- if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
- at91_soc_initdata.type = AT91_SOC_SAMA5D3;
- } else if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D4) {
- at91_soc_initdata.type = AT91_SOC_SAMA5D4;
- }
- break;
- }
-
- if (!at91_soc_is_detected())
- return;
-
- at91_soc_initdata.cidr = cidr;
-
- /* sub version of soc */
- if (!at91_soc_initdata.exid)
- at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
-
- if (at91_soc_initdata.type == AT91_SOC_SAMA5D4) {
- switch (at91_soc_initdata.exid) {
- case ARCH_EXID_SAMA5D41:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D41;
- break;
- case ARCH_EXID_SAMA5D42:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D42;
- break;
- case ARCH_EXID_SAMA5D43:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D43;
- break;
- case ARCH_EXID_SAMA5D44:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D44;
- break;
- }
- }
-}
-
-static const char *soc_name[] = {
- [AT91_SOC_RM9200] = "at91rm9200",
- [AT91_SOC_SAM9260] = "at91sam9260",
- [AT91_SOC_SAM9261] = "at91sam9261",
- [AT91_SOC_SAM9263] = "at91sam9263",
- [AT91_SOC_SAM9G10] = "at91sam9g10",
- [AT91_SOC_SAM9G20] = "at91sam9g20",
- [AT91_SOC_SAM9G45] = "at91sam9g45",
- [AT91_SOC_SAM9RL] = "at91sam9rl",
- [AT91_SOC_SAM9X5] = "at91sam9x5",
- [AT91_SOC_SAM9N12] = "at91sam9n12",
- [AT91_SOC_SAMA5D3] = "sama5d3",
- [AT91_SOC_SAMA5D4] = "sama5d4",
- [AT91_SOC_UNKNOWN] = "Unknown",
-};
-
-const char *at91_get_soc_type(struct at91_socinfo *c)
-{
- return soc_name[c->type];
-}
-EXPORT_SYMBOL(at91_get_soc_type);
-
-static const char *soc_subtype_name[] = {
- [AT91_SOC_RM9200_BGA] = "at91rm9200 BGA",
- [AT91_SOC_RM9200_PQFP] = "at91rm9200 PQFP",
- [AT91_SOC_SAM9XE] = "at91sam9xe",
- [AT91_SOC_SAM9G45ES] = "at91sam9g45es",
- [AT91_SOC_SAM9M10] = "at91sam9m10",
- [AT91_SOC_SAM9G46] = "at91sam9g46",
- [AT91_SOC_SAM9M11] = "at91sam9m11",
- [AT91_SOC_SAM9G15] = "at91sam9g15",
- [AT91_SOC_SAM9G35] = "at91sam9g35",
- [AT91_SOC_SAM9X35] = "at91sam9x35",
- [AT91_SOC_SAM9G25] = "at91sam9g25",
- [AT91_SOC_SAM9X25] = "at91sam9x25",
- [AT91_SOC_SAMA5D31] = "sama5d31",
- [AT91_SOC_SAMA5D33] = "sama5d33",
- [AT91_SOC_SAMA5D34] = "sama5d34",
- [AT91_SOC_SAMA5D35] = "sama5d35",
- [AT91_SOC_SAMA5D36] = "sama5d36",
- [AT91_SOC_SAMA5D41] = "sama5d41",
- [AT91_SOC_SAMA5D42] = "sama5d42",
- [AT91_SOC_SAMA5D43] = "sama5d43",
- [AT91_SOC_SAMA5D44] = "sama5d44",
- [AT91_SOC_SUBTYPE_NONE] = "None",
- [AT91_SOC_SUBTYPE_UNKNOWN] = "Unknown",
-};
-
-const char *at91_get_soc_subtype(struct at91_socinfo *c)
-{
- return soc_subtype_name[c->subtype];
-}
-EXPORT_SYMBOL(at91_get_soc_subtype);
-
-void __init at91_map_io(void)
-{
- /* Map peripherals */
- iotable_init(&at91_io_desc, 1);
-
- at91_soc_initdata.type = AT91_SOC_UNKNOWN;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;
-
- soc_detect(AT91_BASE_DBGU0);
- if (!at91_soc_is_detected())
- soc_detect(AT91_BASE_DBGU1);
-
- if (!at91_soc_is_detected())
- panic(pr_fmt("Impossible to detect the SOC type"));
-
- pr_info("Detected soc type: %s\n",
- at91_get_soc_type(&at91_soc_initdata));
- if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
- pr_info("Detected soc subtype: %s\n",
- at91_get_soc_subtype(&at91_soc_initdata));
-}
-
-void __init at91_alt_map_io(void)
-{
- /* Map peripherals */
- iotable_init(&at91_alt_io_desc, 1);
-
- at91_soc_initdata.type = AT91_SOC_UNKNOWN;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;
-
- alt_soc_detect(AT91_BASE_DBGU2);
- if (!at91_soc_is_detected())
- panic("AT91: Impossible to detect the SOC type");
-
- pr_info("AT91: Detected soc type: %s\n",
- at91_get_soc_type(&at91_soc_initdata));
- if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
- pr_info("AT91: Detected soc subtype: %s\n",
- at91_get_soc_subtype(&at91_soc_initdata));
-}
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v3 9/9] ARM: at91: remove old setup
@ 2015-03-11 17:00 ` Alexandre Belloni
0 siblings, 0 replies; 24+ messages in thread
From: Alexandre Belloni @ 2015-03-11 17:00 UTC (permalink / raw)
To: linux-arm-kernel
The old setup is not used anymore, remove it
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
---
arch/arm/mach-at91/Makefile | 2 +-
arch/arm/mach-at91/setup.c | 320 --------------------------------------------
2 files changed, 1 insertion(+), 321 deletions(-)
delete mode 100644 arch/arm/mach-at91/setup.c
diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
index 44a5c1a92b39..50c0b526dcd8 100644
--- a/arch/arm/mach-at91/Makefile
+++ b/arch/arm/mach-at91/Makefile
@@ -2,7 +2,7 @@
# Makefile for the linux kernel.
#
-obj-y := setup.o soc.o
+obj-y := soc.o
obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o
diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c
deleted file mode 100644
index ef778f33c488..000000000000
--- a/arch/arm/mach-at91/setup.c
+++ /dev/null
@@ -1,320 +0,0 @@
-/*
- * Copyright (C) 2007 Atmel Corporation.
- * Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
- *
- * Under GPLv2
- */
-
-#define pr_fmt(fmt) "AT91: " fmt
-
-#include <linux/module.h>
-#include <linux/io.h>
-#include <linux/mm.h>
-#include <linux/pm.h>
-#include <linux/of_address.h>
-#include <linux/pinctrl/machine.h>
-#include <linux/clk/at91_pmc.h>
-
-#include <asm/system_misc.h>
-#include <asm/mach/map.h>
-
-#include <mach/hardware.h>
-#include <mach/cpu.h>
-#include <mach/at91_dbgu.h>
-
-#include "generic.h"
-#include "pm.h"
-
-struct at91_socinfo at91_soc_initdata;
-EXPORT_SYMBOL(at91_soc_initdata);
-
-static struct map_desc at91_io_desc __initdata __maybe_unused = {
- .virtual = (unsigned long)AT91_VA_BASE_SYS,
- .pfn = __phys_to_pfn(AT91_BASE_SYS),
- .length = SZ_16K,
- .type = MT_DEVICE,
-};
-
-static struct map_desc at91_alt_io_desc __initdata __maybe_unused = {
- .virtual = (unsigned long)AT91_ALT_VA_BASE_SYS,
- .pfn = __phys_to_pfn(AT91_ALT_BASE_SYS),
- .length = 24 * SZ_1K,
- .type = MT_DEVICE,
-};
-
-static void __init soc_detect(u32 dbgu_base)
-{
- u32 cidr, socid;
-
- cidr = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_CIDR);
- socid = cidr & ~AT91_CIDR_VERSION;
-
- switch (socid) {
- case ARCH_ID_AT91RM9200:
- at91_soc_initdata.type = AT91_SOC_RM9200;
- if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_UNKNOWN)
- at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
- break;
-
- case ARCH_ID_AT91SAM9260:
- at91_soc_initdata.type = AT91_SOC_SAM9260;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- break;
-
- case ARCH_ID_AT91SAM9261:
- at91_soc_initdata.type = AT91_SOC_SAM9261;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- break;
-
- case ARCH_ID_AT91SAM9263:
- at91_soc_initdata.type = AT91_SOC_SAM9263;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- break;
-
- case ARCH_ID_AT91SAM9G20:
- at91_soc_initdata.type = AT91_SOC_SAM9G20;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- break;
-
- case ARCH_ID_AT91SAM9G45:
- at91_soc_initdata.type = AT91_SOC_SAM9G45;
- if (cidr == ARCH_ID_AT91SAM9G45ES)
- at91_soc_initdata.subtype = AT91_SOC_SAM9G45ES;
- break;
-
- case ARCH_ID_AT91SAM9RL64:
- at91_soc_initdata.type = AT91_SOC_SAM9RL;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- break;
-
- case ARCH_ID_AT91SAM9X5:
- at91_soc_initdata.type = AT91_SOC_SAM9X5;
- break;
-
- case ARCH_ID_AT91SAM9N12:
- at91_soc_initdata.type = AT91_SOC_SAM9N12;
- break;
-
- case ARCH_ID_SAMA5:
- at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
- if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
- at91_soc_initdata.type = AT91_SOC_SAMA5D3;
- }
- break;
- }
-
- /* at91sam9g10 */
- if ((socid & ~AT91_CIDR_EXT) == ARCH_ID_AT91SAM9G10) {
- at91_soc_initdata.type = AT91_SOC_SAM9G10;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_NONE;
- }
- /* at91sam9xe */
- else if ((cidr & AT91_CIDR_ARCH) == ARCH_FAMILY_AT91SAM9XE) {
- at91_soc_initdata.type = AT91_SOC_SAM9260;
- at91_soc_initdata.subtype = AT91_SOC_SAM9XE;
- }
-
- if (!at91_soc_is_detected())
- return;
-
- at91_soc_initdata.cidr = cidr;
-
- /* sub version of soc */
- if (!at91_soc_initdata.exid)
- at91_soc_initdata.exid = __raw_readl(AT91_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
-
- if (at91_soc_initdata.type == AT91_SOC_SAM9G45) {
- switch (at91_soc_initdata.exid) {
- case ARCH_EXID_AT91SAM9M10:
- at91_soc_initdata.subtype = AT91_SOC_SAM9M10;
- break;
- case ARCH_EXID_AT91SAM9G46:
- at91_soc_initdata.subtype = AT91_SOC_SAM9G46;
- break;
- case ARCH_EXID_AT91SAM9M11:
- at91_soc_initdata.subtype = AT91_SOC_SAM9M11;
- break;
- }
- }
-
- if (at91_soc_initdata.type == AT91_SOC_SAM9X5) {
- switch (at91_soc_initdata.exid) {
- case ARCH_EXID_AT91SAM9G15:
- at91_soc_initdata.subtype = AT91_SOC_SAM9G15;
- break;
- case ARCH_EXID_AT91SAM9G35:
- at91_soc_initdata.subtype = AT91_SOC_SAM9G35;
- break;
- case ARCH_EXID_AT91SAM9X35:
- at91_soc_initdata.subtype = AT91_SOC_SAM9X35;
- break;
- case ARCH_EXID_AT91SAM9G25:
- at91_soc_initdata.subtype = AT91_SOC_SAM9G25;
- break;
- case ARCH_EXID_AT91SAM9X25:
- at91_soc_initdata.subtype = AT91_SOC_SAM9X25;
- break;
- }
- }
-
- if (at91_soc_initdata.type == AT91_SOC_SAMA5D3) {
- switch (at91_soc_initdata.exid) {
- case ARCH_EXID_SAMA5D31:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D31;
- break;
- case ARCH_EXID_SAMA5D33:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D33;
- break;
- case ARCH_EXID_SAMA5D34:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D34;
- break;
- case ARCH_EXID_SAMA5D35:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D35;
- break;
- case ARCH_EXID_SAMA5D36:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D36;
- break;
- }
- }
-}
-
-static void __init alt_soc_detect(u32 dbgu_base)
-{
- u32 cidr, socid;
-
- /* SoC ID */
- cidr = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_CIDR);
- socid = cidr & ~AT91_CIDR_VERSION;
-
- switch (socid) {
- case ARCH_ID_SAMA5:
- at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
- if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D3) {
- at91_soc_initdata.type = AT91_SOC_SAMA5D3;
- } else if (at91_soc_initdata.exid & ARCH_EXID_SAMA5D4) {
- at91_soc_initdata.type = AT91_SOC_SAMA5D4;
- }
- break;
- }
-
- if (!at91_soc_is_detected())
- return;
-
- at91_soc_initdata.cidr = cidr;
-
- /* sub version of soc */
- if (!at91_soc_initdata.exid)
- at91_soc_initdata.exid = __raw_readl(AT91_ALT_IO_P2V(dbgu_base) + AT91_DBGU_EXID);
-
- if (at91_soc_initdata.type == AT91_SOC_SAMA5D4) {
- switch (at91_soc_initdata.exid) {
- case ARCH_EXID_SAMA5D41:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D41;
- break;
- case ARCH_EXID_SAMA5D42:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D42;
- break;
- case ARCH_EXID_SAMA5D43:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D43;
- break;
- case ARCH_EXID_SAMA5D44:
- at91_soc_initdata.subtype = AT91_SOC_SAMA5D44;
- break;
- }
- }
-}
-
-static const char *soc_name[] = {
- [AT91_SOC_RM9200] = "at91rm9200",
- [AT91_SOC_SAM9260] = "at91sam9260",
- [AT91_SOC_SAM9261] = "at91sam9261",
- [AT91_SOC_SAM9263] = "at91sam9263",
- [AT91_SOC_SAM9G10] = "at91sam9g10",
- [AT91_SOC_SAM9G20] = "at91sam9g20",
- [AT91_SOC_SAM9G45] = "at91sam9g45",
- [AT91_SOC_SAM9RL] = "at91sam9rl",
- [AT91_SOC_SAM9X5] = "at91sam9x5",
- [AT91_SOC_SAM9N12] = "at91sam9n12",
- [AT91_SOC_SAMA5D3] = "sama5d3",
- [AT91_SOC_SAMA5D4] = "sama5d4",
- [AT91_SOC_UNKNOWN] = "Unknown",
-};
-
-const char *at91_get_soc_type(struct at91_socinfo *c)
-{
- return soc_name[c->type];
-}
-EXPORT_SYMBOL(at91_get_soc_type);
-
-static const char *soc_subtype_name[] = {
- [AT91_SOC_RM9200_BGA] = "at91rm9200 BGA",
- [AT91_SOC_RM9200_PQFP] = "at91rm9200 PQFP",
- [AT91_SOC_SAM9XE] = "at91sam9xe",
- [AT91_SOC_SAM9G45ES] = "at91sam9g45es",
- [AT91_SOC_SAM9M10] = "at91sam9m10",
- [AT91_SOC_SAM9G46] = "at91sam9g46",
- [AT91_SOC_SAM9M11] = "at91sam9m11",
- [AT91_SOC_SAM9G15] = "at91sam9g15",
- [AT91_SOC_SAM9G35] = "at91sam9g35",
- [AT91_SOC_SAM9X35] = "at91sam9x35",
- [AT91_SOC_SAM9G25] = "at91sam9g25",
- [AT91_SOC_SAM9X25] = "at91sam9x25",
- [AT91_SOC_SAMA5D31] = "sama5d31",
- [AT91_SOC_SAMA5D33] = "sama5d33",
- [AT91_SOC_SAMA5D34] = "sama5d34",
- [AT91_SOC_SAMA5D35] = "sama5d35",
- [AT91_SOC_SAMA5D36] = "sama5d36",
- [AT91_SOC_SAMA5D41] = "sama5d41",
- [AT91_SOC_SAMA5D42] = "sama5d42",
- [AT91_SOC_SAMA5D43] = "sama5d43",
- [AT91_SOC_SAMA5D44] = "sama5d44",
- [AT91_SOC_SUBTYPE_NONE] = "None",
- [AT91_SOC_SUBTYPE_UNKNOWN] = "Unknown",
-};
-
-const char *at91_get_soc_subtype(struct at91_socinfo *c)
-{
- return soc_subtype_name[c->subtype];
-}
-EXPORT_SYMBOL(at91_get_soc_subtype);
-
-void __init at91_map_io(void)
-{
- /* Map peripherals */
- iotable_init(&at91_io_desc, 1);
-
- at91_soc_initdata.type = AT91_SOC_UNKNOWN;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;
-
- soc_detect(AT91_BASE_DBGU0);
- if (!at91_soc_is_detected())
- soc_detect(AT91_BASE_DBGU1);
-
- if (!at91_soc_is_detected())
- panic(pr_fmt("Impossible to detect the SOC type"));
-
- pr_info("Detected soc type: %s\n",
- at91_get_soc_type(&at91_soc_initdata));
- if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
- pr_info("Detected soc subtype: %s\n",
- at91_get_soc_subtype(&at91_soc_initdata));
-}
-
-void __init at91_alt_map_io(void)
-{
- /* Map peripherals */
- iotable_init(&at91_alt_io_desc, 1);
-
- at91_soc_initdata.type = AT91_SOC_UNKNOWN;
- at91_soc_initdata.subtype = AT91_SOC_SUBTYPE_UNKNOWN;
-
- alt_soc_detect(AT91_BASE_DBGU2);
- if (!at91_soc_is_detected())
- panic("AT91: Impossible to detect the SOC type");
-
- pr_info("AT91: Detected soc type: %s\n",
- at91_get_soc_type(&at91_soc_initdata));
- if (at91_soc_initdata.subtype != AT91_SOC_SUBTYPE_NONE)
- pr_info("AT91: Detected soc subtype: %s\n",
- at91_get_soc_subtype(&at91_soc_initdata));
-}
--
2.1.0
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v3 5/9] ARM: at91: add soc detection infrastructure
2015-03-11 17:00 ` Alexandre Belloni
@ 2015-03-12 13:18 ` Nicolas Ferre
-1 siblings, 0 replies; 24+ messages in thread
From: Nicolas Ferre @ 2015-03-12 13:18 UTC (permalink / raw)
To: Alexandre Belloni
Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
Boris Brezillon, Alexander Stein
Le 11/03/2015 18:00, Alexandre Belloni a écrit :
> From: Boris BREZILLON <boris.brezillon@free-electrons.com>
>
> Add new structures and functions to handle AT91 SoC detection.
>
> [alexandre.belloni@free-electrons.com: reworked DBGU detection]
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
> ---
> arch/arm/Kconfig | 1 +
> arch/arm/mach-at91/Makefile | 2 +-
> arch/arm/mach-at91/soc.c | 110 ++++++++++++++++++++++++++++++++++++++++++++
> arch/arm/mach-at91/soc.h | 48 +++++++++++++++++++
> 4 files changed, 160 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/mach-at91/soc.c
> create mode 100644 arch/arm/mach-at91/soc.h
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index e7ce6612bc42..f6c5b05e8de8 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -363,6 +363,7 @@ config ARCH_AT91
> select IRQ_DOMAIN
> select PINCTRL
> select PINCTRL_AT91
> + select SOC_BUS
> select USE_OF
> help
> This enables support for systems based on Atmel
> diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
> index 827fdbcce1c7..44a5c1a92b39 100644
> --- a/arch/arm/mach-at91/Makefile
> +++ b/arch/arm/mach-at91/Makefile
> @@ -2,7 +2,7 @@
> # Makefile for the linux kernel.
> #
>
> -obj-y := setup.o
> +obj-y := setup.o soc.o
>
> obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o
>
> diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
> new file mode 100644
> index 000000000000..332698dbf572
> --- /dev/null
> +++ b/arch/arm/mach-at91/soc.c
> @@ -0,0 +1,110 @@
> +/*
> + * Copyright (C) 2015 Atmel
> + *
> + * Alexandre Belloni <alexandre.belloni@free-electrons.com
> + * Boris Brezillon <boris.brezillon@free-electrons.com
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + *
> + */
> +
> +#define pr_fmt(fmt) "AT91: " fmt
> +
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_platform.h>
> +#include <linux/slab.h>
> +#include <linux/sys_soc.h>
> +
> +#include "soc.h"
> +
> +#define AT91_DBGU_CIDR 0x40
> +#define AT91_DBGU_CIDR_ARCH(x) (((x) >> 20) & 0xff)
> +#define AT91_DBGU_CIDR_VERSION(x) ((x) & 0x1f)
> +#define AT91_DBGU_CIDR_EXT BIT(31)
> +#define AT91_DBGU_CIDR_MATCH_MASK 0x7fffffe0
> +#define AT91_DBGU_EXID 0x44
> +
> +struct soc_device * __init at91_soc_init(const struct at91_soc_family *families)
> +{
> + struct soc_device_attribute *soc_dev_attr;
> + const struct at91_soc_family *family;
> + const struct at91_soc *soc;
> + struct soc_device *soc_dev;
> + struct device_node *np;
> + void __iomem *regs;
> + u32 cidr, exid;
> +
> +
> + np = of_find_compatible_node(NULL, NULL, "atmel,at91rm9200-dbgu");
> + if (!np)
> + np = of_find_compatible_node(NULL, NULL,
> + "atmel,at91sam9260-dbgu");
> +
> + if (!np) {
> + pr_warn("Could not find DBGU node");
> + return NULL;
> + }
> +
> + regs = of_iomap(np, 0);
> + of_node_put(np);
> +
> + if (!regs) {
> + pr_warn("Could not map DBGU iomem range");
> + return NULL;
> + }
> +
> + cidr = readl(regs + AT91_DBGU_CIDR);
> + exid = readl(regs + AT91_DBGU_EXID);
> +
> + iounmap(regs);
> +
> + for (family = families; family->name; family++) {
> + if (family->id == AT91_DBGU_CIDR_ARCH(cidr))
Well, I wouldn't use this field as a "family" differentiator.
For SoC which are part of a family, if there is one, we usually have a
more precise distinction than at91sam9/sama5/sam9xe.
The families are a group of SoCs that share the same IPs and same design
(usually the same die as well...).
So, can you please re-spin the series and remove this notion: only keep
type as family and sub-type as SoC (you can even use these words for the
comment (see below)).
> + break;
> + }
> +
> + if (!family->name) {
> + pr_warn("Could not find matching SoC family\n");
> + return NULL;
> + }
> +
> + for (soc = family->socs; soc->name; soc++) {
> + if (soc->cidr_match != (cidr & AT91_DBGU_CIDR_MATCH_MASK))
> + continue;
> +
> + if (!(cidr & AT91_DBGU_CIDR_EXT) || soc->exid_match == exid)
> + break;
> + }
> +
> + if (!soc->name) {
> + pr_warn("Could not find matching SoC description\n");
> + return NULL;
> + }
> +
> + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
> + if (!soc_dev_attr)
> + return NULL;
> +
> + soc_dev_attr->family = family->name;
> + soc_dev_attr->soc_id = soc->subname ? soc->subname : soc->name;
> + soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X",
> + AT91_DBGU_CIDR_VERSION(cidr));
> + soc_dev = soc_device_register(soc_dev_attr);
> + if (IS_ERR(soc_dev)) {
> + kfree(soc_dev_attr->revision);
> + kfree(soc_dev_attr);
> + pr_warn("Could not register SoC device\n");
> + return NULL;
> + }
> +
> + pr_info("Detected soc type: %s, revision %X\n", soc->name,
Well, we can have a more appropriated wording:
s/soc type/SoC family/
> + AT91_DBGU_CIDR_VERSION(cidr));
> + if (soc->subname)
> + pr_info("Detected soc subtype: %s\n", soc->subname);
s/soc subtype/SoC/
> +
> + return soc_dev;
> +}
> diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
> new file mode 100644
> index 000000000000..66dcd146601a
> --- /dev/null
> +++ b/arch/arm/mach-at91/soc.h
> @@ -0,0 +1,48 @@
> +/*
> + * Copyright (C) 2015 Atmel
> + *
> + * Boris Brezillon <boris.brezillon@free-electrons.com
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + *
> + */
> +
> +#ifndef __AT91_SOC_H
> +#define __AT91_SOC_H
> +
> +#include <linux/sys_soc.h>
> +
> +struct at91_soc {
> + u32 cidr_match;
> + u32 exid_match;
> + const char *name;
> + const char *subname;
> +};
> +
> +struct at91_soc_family {
> + int id;
> + const char *name;
> + const struct at91_soc *socs;
> +};
> +
> +#define AT91_SOC(__cidr, __exid, __name, __subname) \
> + { \
> + .cidr_match = (__cidr), \
> + .exid_match = (__exid), \
> + .name = (__name), \
> + .subname = (__subname), \
> + }
> +
> +#define AT91_SOC_FAMILY(__id, __name, __socs) \
> + { \
> + .id = (__id), \
> + .name = (__name), \
> + .socs = (__socs), \
> + }
> +
> +struct soc_device * __init
> +at91_soc_init(const struct at91_soc_family *families);
> +
> +#endif /* __AT91_SOC_H */
>
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 5/9] ARM: at91: add soc detection infrastructure
@ 2015-03-12 13:18 ` Nicolas Ferre
0 siblings, 0 replies; 24+ messages in thread
From: Nicolas Ferre @ 2015-03-12 13:18 UTC (permalink / raw)
To: linux-arm-kernel
Le 11/03/2015 18:00, Alexandre Belloni a ?crit :
> From: Boris BREZILLON <boris.brezillon@free-electrons.com>
>
> Add new structures and functions to handle AT91 SoC detection.
>
> [alexandre.belloni at free-electrons.com: reworked DBGU detection]
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
> ---
> arch/arm/Kconfig | 1 +
> arch/arm/mach-at91/Makefile | 2 +-
> arch/arm/mach-at91/soc.c | 110 ++++++++++++++++++++++++++++++++++++++++++++
> arch/arm/mach-at91/soc.h | 48 +++++++++++++++++++
> 4 files changed, 160 insertions(+), 1 deletion(-)
> create mode 100644 arch/arm/mach-at91/soc.c
> create mode 100644 arch/arm/mach-at91/soc.h
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index e7ce6612bc42..f6c5b05e8de8 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -363,6 +363,7 @@ config ARCH_AT91
> select IRQ_DOMAIN
> select PINCTRL
> select PINCTRL_AT91
> + select SOC_BUS
> select USE_OF
> help
> This enables support for systems based on Atmel
> diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile
> index 827fdbcce1c7..44a5c1a92b39 100644
> --- a/arch/arm/mach-at91/Makefile
> +++ b/arch/arm/mach-at91/Makefile
> @@ -2,7 +2,7 @@
> # Makefile for the linux kernel.
> #
>
> -obj-y := setup.o
> +obj-y := setup.o soc.o
>
> obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o
>
> diff --git a/arch/arm/mach-at91/soc.c b/arch/arm/mach-at91/soc.c
> new file mode 100644
> index 000000000000..332698dbf572
> --- /dev/null
> +++ b/arch/arm/mach-at91/soc.c
> @@ -0,0 +1,110 @@
> +/*
> + * Copyright (C) 2015 Atmel
> + *
> + * Alexandre Belloni <alexandre.belloni@free-electrons.com
> + * Boris Brezillon <boris.brezillon@free-electrons.com
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + *
> + */
> +
> +#define pr_fmt(fmt) "AT91: " fmt
> +
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/of_address.h>
> +#include <linux/of_platform.h>
> +#include <linux/slab.h>
> +#include <linux/sys_soc.h>
> +
> +#include "soc.h"
> +
> +#define AT91_DBGU_CIDR 0x40
> +#define AT91_DBGU_CIDR_ARCH(x) (((x) >> 20) & 0xff)
> +#define AT91_DBGU_CIDR_VERSION(x) ((x) & 0x1f)
> +#define AT91_DBGU_CIDR_EXT BIT(31)
> +#define AT91_DBGU_CIDR_MATCH_MASK 0x7fffffe0
> +#define AT91_DBGU_EXID 0x44
> +
> +struct soc_device * __init at91_soc_init(const struct at91_soc_family *families)
> +{
> + struct soc_device_attribute *soc_dev_attr;
> + const struct at91_soc_family *family;
> + const struct at91_soc *soc;
> + struct soc_device *soc_dev;
> + struct device_node *np;
> + void __iomem *regs;
> + u32 cidr, exid;
> +
> +
> + np = of_find_compatible_node(NULL, NULL, "atmel,at91rm9200-dbgu");
> + if (!np)
> + np = of_find_compatible_node(NULL, NULL,
> + "atmel,at91sam9260-dbgu");
> +
> + if (!np) {
> + pr_warn("Could not find DBGU node");
> + return NULL;
> + }
> +
> + regs = of_iomap(np, 0);
> + of_node_put(np);
> +
> + if (!regs) {
> + pr_warn("Could not map DBGU iomem range");
> + return NULL;
> + }
> +
> + cidr = readl(regs + AT91_DBGU_CIDR);
> + exid = readl(regs + AT91_DBGU_EXID);
> +
> + iounmap(regs);
> +
> + for (family = families; family->name; family++) {
> + if (family->id == AT91_DBGU_CIDR_ARCH(cidr))
Well, I wouldn't use this field as a "family" differentiator.
For SoC which are part of a family, if there is one, we usually have a
more precise distinction than at91sam9/sama5/sam9xe.
The families are a group of SoCs that share the same IPs and same design
(usually the same die as well...).
So, can you please re-spin the series and remove this notion: only keep
type as family and sub-type as SoC (you can even use these words for the
comment (see below)).
> + break;
> + }
> +
> + if (!family->name) {
> + pr_warn("Could not find matching SoC family\n");
> + return NULL;
> + }
> +
> + for (soc = family->socs; soc->name; soc++) {
> + if (soc->cidr_match != (cidr & AT91_DBGU_CIDR_MATCH_MASK))
> + continue;
> +
> + if (!(cidr & AT91_DBGU_CIDR_EXT) || soc->exid_match == exid)
> + break;
> + }
> +
> + if (!soc->name) {
> + pr_warn("Could not find matching SoC description\n");
> + return NULL;
> + }
> +
> + soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
> + if (!soc_dev_attr)
> + return NULL;
> +
> + soc_dev_attr->family = family->name;
> + soc_dev_attr->soc_id = soc->subname ? soc->subname : soc->name;
> + soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%X",
> + AT91_DBGU_CIDR_VERSION(cidr));
> + soc_dev = soc_device_register(soc_dev_attr);
> + if (IS_ERR(soc_dev)) {
> + kfree(soc_dev_attr->revision);
> + kfree(soc_dev_attr);
> + pr_warn("Could not register SoC device\n");
> + return NULL;
> + }
> +
> + pr_info("Detected soc type: %s, revision %X\n", soc->name,
Well, we can have a more appropriated wording:
s/soc type/SoC family/
> + AT91_DBGU_CIDR_VERSION(cidr));
> + if (soc->subname)
> + pr_info("Detected soc subtype: %s\n", soc->subname);
s/soc subtype/SoC/
> +
> + return soc_dev;
> +}
> diff --git a/arch/arm/mach-at91/soc.h b/arch/arm/mach-at91/soc.h
> new file mode 100644
> index 000000000000..66dcd146601a
> --- /dev/null
> +++ b/arch/arm/mach-at91/soc.h
> @@ -0,0 +1,48 @@
> +/*
> + * Copyright (C) 2015 Atmel
> + *
> + * Boris Brezillon <boris.brezillon@free-electrons.com
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without any
> + * warranty of any kind, whether express or implied.
> + *
> + */
> +
> +#ifndef __AT91_SOC_H
> +#define __AT91_SOC_H
> +
> +#include <linux/sys_soc.h>
> +
> +struct at91_soc {
> + u32 cidr_match;
> + u32 exid_match;
> + const char *name;
> + const char *subname;
> +};
> +
> +struct at91_soc_family {
> + int id;
> + const char *name;
> + const struct at91_soc *socs;
> +};
> +
> +#define AT91_SOC(__cidr, __exid, __name, __subname) \
> + { \
> + .cidr_match = (__cidr), \
> + .exid_match = (__exid), \
> + .name = (__name), \
> + .subname = (__subname), \
> + }
> +
> +#define AT91_SOC_FAMILY(__id, __name, __socs) \
> + { \
> + .id = (__id), \
> + .name = (__name), \
> + .socs = (__socs), \
> + }
> +
> +struct soc_device * __init
> +at91_soc_init(const struct at91_soc_family *families);
> +
> +#endif /* __AT91_SOC_H */
>
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v3 0/9] ARM: at91 cleanups for 4.1 #1
2015-03-11 17:00 ` Alexandre Belloni
@ 2015-03-12 13:19 ` Nicolas Ferre
-1 siblings, 0 replies; 24+ messages in thread
From: Nicolas Ferre @ 2015-03-12 13:19 UTC (permalink / raw)
To: Alexandre Belloni
Cc: Jean-Christophe Plagniol-Villard, linux-arm-kernel, linux-kernel,
Boris Brezillon, Alexander Stein
Le 11/03/2015 18:00, Alexandre Belloni a écrit :
> This series removes more mach/headers.
>
> Then it introduces a more scalable SoC detection infrastructure which allows to
> remove the at91_map_io/at91_alt_map_io and iotable_init ugliness.
>
> Changes in v3:
> - Stop trying to unmap a range that failed ot be mapped
>
> Changes in v2:
> - All the SoC names are lowercased
> - Removed the unused compatible string
> - Use name/subname to display the type and subtype
>
>
>
> Alexandre Belloni (7):
> ARM: at91: remove unused at91_ioremap_matrix and header
> ARM: at91: remove unused _matrix.h headers
> ARM: at91/dt: introduce atmel,<chip>-dbgu
> ARM: at91: at91rm9200 use SoC detection infrastructure
> ARM: at91: at91sam9: use SoC detection infrastructure
> ARM: at91: sama5 use SoC detection infrastructure
> ARM: at91: remove old setup
>
> Arnd Bergmann (1):
> ARM: at91: remove NEED_MACH_IO_H
>
> Boris BREZILLON (1):
> ARM: at91: add soc detection infrastructure
I agree with the whole series with little comments on the way to sort
SoCs and families (if it exists).
Please have a look in patch 5/9.
Thanks a lot, bye.
> .../devicetree/bindings/serial/atmel-usart.txt | 3 +-
> arch/arm/Kconfig | 2 +-
> arch/arm/boot/dts/at91rm9200.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9261.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9rl.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9x5.dtsi | 2 +-
> arch/arm/boot/dts/sama5d3.dtsi | 2 +-
> arch/arm/boot/dts/sama5d4.dtsi | 2 +-
> arch/arm/mach-at91/Kconfig | 1 +
> arch/arm/mach-at91/Makefile | 2 +-
> arch/arm/mach-at91/at91rm9200.c | 34 ++-
> arch/arm/mach-at91/at91sam9.c | 86 ++++--
> arch/arm/mach-at91/generic.h | 4 -
> arch/arm/mach-at91/include/mach/at91_matrix.h | 23 --
> .../mach-at91/include/mach/at91sam9260_matrix.h | 80 -----
> .../mach-at91/include/mach/at91sam9261_matrix.h | 64 ----
> .../mach-at91/include/mach/at91sam9263_matrix.h | 129 --------
> .../mach-at91/include/mach/at91sam9g45_matrix.h | 153 ----------
> .../mach-at91/include/mach/at91sam9n12_matrix.h | 53 ----
> .../arm/mach-at91/include/mach/at91sam9rl_matrix.h | 96 ------
> .../arm/mach-at91/include/mach/at91sam9x5_matrix.h | 53 ----
> arch/arm/mach-at91/include/mach/io.h | 27 --
> arch/arm/mach-at91/sama5.c | 54 +++-
> arch/arm/mach-at91/setup.c | 330 ---------------------
> arch/arm/mach-at91/soc.c | 110 +++++++
> arch/arm/mach-at91/soc.h | 95 ++++++
> drivers/pcmcia/Kconfig | 1 +
> drivers/pcmcia/at91_cf.c | 13 +-
> 32 files changed, 351 insertions(+), 1082 deletions(-)
> delete mode 100644 arch/arm/mach-at91/include/mach/at91_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/io.h
> delete mode 100644 arch/arm/mach-at91/setup.c
> create mode 100644 arch/arm/mach-at91/soc.c
> create mode 100644 arch/arm/mach-at91/soc.h
>
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v3 0/9] ARM: at91 cleanups for 4.1 #1
@ 2015-03-12 13:19 ` Nicolas Ferre
0 siblings, 0 replies; 24+ messages in thread
From: Nicolas Ferre @ 2015-03-12 13:19 UTC (permalink / raw)
To: linux-arm-kernel
Le 11/03/2015 18:00, Alexandre Belloni a ?crit :
> This series removes more mach/headers.
>
> Then it introduces a more scalable SoC detection infrastructure which allows to
> remove the at91_map_io/at91_alt_map_io and iotable_init ugliness.
>
> Changes in v3:
> - Stop trying to unmap a range that failed ot be mapped
>
> Changes in v2:
> - All the SoC names are lowercased
> - Removed the unused compatible string
> - Use name/subname to display the type and subtype
>
>
>
> Alexandre Belloni (7):
> ARM: at91: remove unused at91_ioremap_matrix and header
> ARM: at91: remove unused _matrix.h headers
> ARM: at91/dt: introduce atmel,<chip>-dbgu
> ARM: at91: at91rm9200 use SoC detection infrastructure
> ARM: at91: at91sam9: use SoC detection infrastructure
> ARM: at91: sama5 use SoC detection infrastructure
> ARM: at91: remove old setup
>
> Arnd Bergmann (1):
> ARM: at91: remove NEED_MACH_IO_H
>
> Boris BREZILLON (1):
> ARM: at91: add soc detection infrastructure
I agree with the whole series with little comments on the way to sort
SoCs and families (if it exists).
Please have a look in patch 5/9.
Thanks a lot, bye.
> .../devicetree/bindings/serial/atmel-usart.txt | 3 +-
> arch/arm/Kconfig | 2 +-
> arch/arm/boot/dts/at91rm9200.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9260.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9261.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9263.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9g45.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9n12.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9rl.dtsi | 2 +-
> arch/arm/boot/dts/at91sam9x5.dtsi | 2 +-
> arch/arm/boot/dts/sama5d3.dtsi | 2 +-
> arch/arm/boot/dts/sama5d4.dtsi | 2 +-
> arch/arm/mach-at91/Kconfig | 1 +
> arch/arm/mach-at91/Makefile | 2 +-
> arch/arm/mach-at91/at91rm9200.c | 34 ++-
> arch/arm/mach-at91/at91sam9.c | 86 ++++--
> arch/arm/mach-at91/generic.h | 4 -
> arch/arm/mach-at91/include/mach/at91_matrix.h | 23 --
> .../mach-at91/include/mach/at91sam9260_matrix.h | 80 -----
> .../mach-at91/include/mach/at91sam9261_matrix.h | 64 ----
> .../mach-at91/include/mach/at91sam9263_matrix.h | 129 --------
> .../mach-at91/include/mach/at91sam9g45_matrix.h | 153 ----------
> .../mach-at91/include/mach/at91sam9n12_matrix.h | 53 ----
> .../arm/mach-at91/include/mach/at91sam9rl_matrix.h | 96 ------
> .../arm/mach-at91/include/mach/at91sam9x5_matrix.h | 53 ----
> arch/arm/mach-at91/include/mach/io.h | 27 --
> arch/arm/mach-at91/sama5.c | 54 +++-
> arch/arm/mach-at91/setup.c | 330 ---------------------
> arch/arm/mach-at91/soc.c | 110 +++++++
> arch/arm/mach-at91/soc.h | 95 ++++++
> drivers/pcmcia/Kconfig | 1 +
> drivers/pcmcia/at91_cf.c | 13 +-
> 32 files changed, 351 insertions(+), 1082 deletions(-)
> delete mode 100644 arch/arm/mach-at91/include/mach/at91_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9260_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9261_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9263_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9g45_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9n12_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9rl_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/at91sam9x5_matrix.h
> delete mode 100644 arch/arm/mach-at91/include/mach/io.h
> delete mode 100644 arch/arm/mach-at91/setup.c
> create mode 100644 arch/arm/mach-at91/soc.c
> create mode 100644 arch/arm/mach-at91/soc.h
>
--
Nicolas Ferre
^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2015-03-12 13:19 UTC | newest]
Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-03-11 17:00 [PATCH v3 0/9] ARM: at91 cleanups for 4.1 #1 Alexandre Belloni
2015-03-11 17:00 ` Alexandre Belloni
2015-03-11 17:00 ` [PATCH v3 1/9] ARM: at91: remove NEED_MACH_IO_H Alexandre Belloni
2015-03-11 17:00 ` Alexandre Belloni
2015-03-11 17:00 ` [PATCH v3 2/9] ARM: at91: remove unused at91_ioremap_matrix and header Alexandre Belloni
2015-03-11 17:00 ` Alexandre Belloni
2015-03-11 17:00 ` [PATCH v3 3/9] ARM: at91: remove unused _matrix.h headers Alexandre Belloni
2015-03-11 17:00 ` Alexandre Belloni
2015-03-11 17:00 ` [PATCH v3 4/9] ARM: at91/dt: introduce atmel,<chip>-dbgu Alexandre Belloni
2015-03-11 17:00 ` Alexandre Belloni
2015-03-11 17:00 ` [PATCH v3 5/9] ARM: at91: add soc detection infrastructure Alexandre Belloni
2015-03-11 17:00 ` Alexandre Belloni
2015-03-12 13:18 ` Nicolas Ferre
2015-03-12 13:18 ` Nicolas Ferre
2015-03-11 17:00 ` [PATCH v3 6/9] ARM: at91: at91rm9200 use SoC " Alexandre Belloni
2015-03-11 17:00 ` Alexandre Belloni
2015-03-11 17:00 ` [PATCH v3 7/9] ARM: at91: at91sam9: " Alexandre Belloni
2015-03-11 17:00 ` Alexandre Belloni
2015-03-11 17:00 ` [PATCH v3 8/9] ARM: at91: sama5 " Alexandre Belloni
2015-03-11 17:00 ` Alexandre Belloni
2015-03-11 17:00 ` [PATCH v3 9/9] ARM: at91: remove old setup Alexandre Belloni
2015-03-11 17:00 ` Alexandre Belloni
2015-03-12 13:19 ` [PATCH v3 0/9] ARM: at91 cleanups for 4.1 #1 Nicolas Ferre
2015-03-12 13:19 ` Nicolas Ferre
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