From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1030399AbbCLXjc (ORCPT ); Thu, 12 Mar 2015 19:39:32 -0400 Received: from mail.kmu-office.ch ([178.209.48.109]:52702 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755171AbbCLXgZ (ORCPT ); Thu, 12 Mar 2015 19:36:25 -0400 From: Stefan Agner To: shawn.guo@linaro.org, kernel@pengutronix.de, linux@arm.linux.org.uk, u.kleine-koenig@pengutronix.de, jason@lakedaemon.net, olof@lixom.net, arnd@arndb.de, daniel.lezcano@linaro.org, tglx@linutronix.de, mark.rutland@arm.com, pawel.moll@arm.com, robh+dt@kernel.org, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, marc.zyngier@arm.com, mcoquelin.stm32@gmail.com Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Stefan Agner Subject: [PATCH v3 04/12] ARM: ARMv7M: define size of vector table for Vybrid Date: Fri, 13 Mar 2015 00:36:12 +0100 Message-Id: <1426203380-7155-5-git-send-email-stefan@agner.ch> X-Mailer: git-send-email 2.3.1 In-Reply-To: <1426203380-7155-1-git-send-email-stefan@agner.ch> References: <1426203380-7155-1-git-send-email-stefan@agner.ch> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Vybrids has 112 peripherial interrupts which can be routed to the Cortex-M4's NVIC interrupt controller. Signed-off-by: Stefan Agner --- arch/arm/mm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 16d077e..8eebc0d 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -609,6 +609,7 @@ config CPUV7M_NUM_IRQ depends on CPU_V7M default 90 if ARCH_STM32 default 38 if ARCH_EFM32 + default 112 if SOC_VF610 default 240 help This option indicates the number of interrupts connected to the NVIC. -- 2.3.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Agner Subject: [PATCH v3 04/12] ARM: ARMv7M: define size of vector table for Vybrid Date: Fri, 13 Mar 2015 00:36:12 +0100 Message-ID: <1426203380-7155-5-git-send-email-stefan@agner.ch> References: <1426203380-7155-1-git-send-email-stefan@agner.ch> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1426203380-7155-1-git-send-email-stefan@agner.ch> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: shawn.guo@linaro.org, kernel@pengutronix.de, linux@arm.linux.org.uk, u.kleine-koenig@pengutronix.de, jason@lakedaemon.net, olof@lixom.net, arnd@arndb.de, daniel.lezcano@linaro.org, tglx@linutronix.de, mark.rutland@arm.com, pawel.moll@arm.com, robh+dt@kernel.org, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, marc.zyngier@arm.com, mcoquelin.stm32@gmail.com Cc: devicetree@vger.kernel.org, Stefan Agner , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org Vybrids has 112 peripherial interrupts which can be routed to the Cortex-M4's NVIC interrupt controller. Signed-off-by: Stefan Agner --- arch/arm/mm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 16d077e..8eebc0d 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -609,6 +609,7 @@ config CPUV7M_NUM_IRQ depends on CPU_V7M default 90 if ARCH_STM32 default 38 if ARCH_EFM32 + default 112 if SOC_VF610 default 240 help This option indicates the number of interrupts connected to the NVIC. -- 2.3.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: stefan@agner.ch (Stefan Agner) Date: Fri, 13 Mar 2015 00:36:12 +0100 Subject: [PATCH v3 04/12] ARM: ARMv7M: define size of vector table for Vybrid In-Reply-To: <1426203380-7155-1-git-send-email-stefan@agner.ch> References: <1426203380-7155-1-git-send-email-stefan@agner.ch> Message-ID: <1426203380-7155-5-git-send-email-stefan@agner.ch> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Vybrids has 112 peripherial interrupts which can be routed to the Cortex-M4's NVIC interrupt controller. Signed-off-by: Stefan Agner --- arch/arm/mm/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 16d077e..8eebc0d 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -609,6 +609,7 @@ config CPUV7M_NUM_IRQ depends on CPU_V7M default 90 if ARCH_STM32 default 38 if ARCH_EFM32 + default 112 if SOC_VF610 default 240 help This option indicates the number of interrupts connected to the NVIC. -- 2.3.1