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From: Scott Wood <scottwood@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v4 24/28] armv8/ls2085aqds: NAND boot support
Date: Sat, 21 Mar 2015 18:47:14 -0500	[thread overview]
Message-ID: <1426981634.27998.259.camel@freescale.com> (raw)
In-Reply-To: <550C94BB.3080404@freescale.com>

On Fri, 2015-03-20 at 14:44 -0700, York Sun wrote:
> 
> On 03/20/2015 02:33 PM, Scott Wood wrote:
> > On Fri, 2015-03-20 at 14:23 -0700, York Sun wrote:
> >>
> >> On 03/20/2015 02:15 PM, Scott Wood wrote:
> >>> On Fri, 2015-03-20 at 12:21 -0700, York Sun wrote:
> >>>> From: Scott Wood <scottwood@freescale.com>
> >>>>
> >>>> This adds NAND boot support for LS2085AQDS, using SPL framework.
> >>>>
> >>>> To form a NAND image, append u-boot-with-spl.bin after a proper
> >>>> nand boot RCW and flash to the beginning of NAND.
> >>>
> >>> Do we want to do it this way, or should we keep the RCW in a separate
> >>> block?
> >>
> >> I would like to see RCW in a separated block.
> > 
> > OK.  In that case the offsets in this patch will need to change.
> > 
> >>> What constitutes a "proper nand boot RCW" (those were not my words)?
> >>> There are details in this patch regarding offsets that need to match
> >>> details in the PBI (which is more than just RCW).
> >>
> >> It is not your original words. Yours was "To form a NAND image, append
> >> u-boot-with-spl.bin after PBL_0x3_0x07_1333_nand.bin and flash to the beginning
> >> of NAND.". I try to make the message generic. A proper nand boot RCW means the
> >> RCW should contains PBI commands to set bootloc and block copy the image. Since
> >> RCW is not in the scope of u-boot, I cannot refer to any specific file.
> > 
> > Yes, I know you can't refer to the file, but it needs to be made clear
> > what the expectations of that PBI file are.
> 
> I think a proper solution would be to put detail instruction into board README
> file by adding
> 
> To form the NAND image, append u-boot-with-spl.bin after RCW image. The RCW
> image should have these PBI commands
> 
> CCSR 4-byte write to 0x00e00404, data=0x00000000
> CCSR 4-byte write to 0x00e00400, data=0x1800a000
> Block Copy: SRC=0x0104, SRC_ADDR=0x000000c0, DEST_ADDR=0x1800a000,
> BLOCK_SIZE=0x00014000
> 
> We need to revise the SRS_ADDR if moving u-boot to a separated block. Please
> advise what address is appropriate.

It should be equal to the NAND block size (not to be confused with PBI
block copy size).

> Please also advise the BLOCK_SIZE. Does it need to be fixed, or min(0x14000,
> sizeof(u-boot-spl.bin))?

It should be fixed because we don't want it to have to be updated every
time the SPL build changes.

-Scott

  reply	other threads:[~2015-03-21 23:47 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-20 19:21 [U-Boot] [PATCH v4 04/28] armv8/ls2085a: Fix generic timer clock source York Sun
2015-03-20 19:21 ` [U-Boot] [PATCH v4 24/28] armv8/ls2085aqds: NAND boot support York Sun
2015-03-20 21:15   ` Scott Wood
2015-03-20 21:23     ` York Sun
2015-03-20 21:33       ` Scott Wood
2015-03-20 21:44         ` York Sun
2015-03-21 23:47           ` Scott Wood [this message]
2015-03-20 21:37     ` Tom Rini
2015-03-20 21:44       ` Scott Wood
2015-03-21  0:18         ` Tom Rini
2015-03-21  0:28           ` Scott Wood
2015-03-23  0:46             ` Tom Rini
2015-03-20 19:21 ` [U-Boot] [PATCH v4 26/28] armv8/ls2085ardb: Enable NAND SPL support York Sun

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