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From: ville.syrjala@linux.intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH i-g-t 9/9] tools/intel_iosf_sb_read: Support different register strides
Date: Mon, 23 Mar 2015 15:14:59 +0200	[thread overview]
Message-ID: <1427116499-11396-9-git-send-email-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <1427116499-11396-1-git-send-email-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Some IOSF SB units ogranize their registers in a pecualiar way. Even
though the registers are 32 bits wide, the register offsets only
increment by one when going from one register to the next. Correctly
deal with this when dumping several consecutive registers.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 tools/intel_iosf_sb_read.c | 32 ++++++++++++++++++--------------
 1 file changed, 18 insertions(+), 14 deletions(-)

diff --git a/tools/intel_iosf_sb_read.c b/tools/intel_iosf_sb_read.c
index 2b0704a..f188cda 100644
--- a/tools/intel_iosf_sb_read.c
+++ b/tools/intel_iosf_sb_read.c
@@ -35,16 +35,17 @@
 static const struct iosf_sb_port {
 	const char *name;
 	uint8_t port;
+	uint8_t reg_stride;
 } iosf_sb_ports[] = {
-	{ "bunit",   0x03, },
-	{ "cck",     0x14, },
-	{ "ccu",     0xa9, },
-	{ "dpio",    0x12, },
-	{ "dpio2",   0x1a, },
-	{ "flisdsi", 0x1b, },
-	{ "gpio_nc", 0x13, },
-	{ "nc",      0x11, },
-	{ "punit",   0x04, },
+	{ "bunit",   0x03, 1, },
+	{ "cck",     0x14, 1, },
+	{ "ccu",     0xa9, 4, },
+	{ "dpio",    0x12, 4, },
+	{ "dpio2",   0x1a, 4, },
+	{ "flisdsi", 0x1b, 1, },
+	{ "gpio_nc", 0x13, 4, },
+	{ "nc",      0x11, 4, },
+	{ "punit",   0x04, 1, },
 };
 
 static int iosf_sb_port_compare(const void *a, const void *b)
@@ -55,16 +56,19 @@ static int iosf_sb_port_compare(const void *a, const void *b)
 	return strcasecmp(name, p->name);
 }
 
-static int iosf_sb_port_parse(const char *name)
+static int iosf_sb_port_parse(const char *name, int *reg_stride)
 {
 	const struct iosf_sb_port *p;
 
 	p = bsearch(name, iosf_sb_ports, ARRAY_SIZE(iosf_sb_ports),
 		    sizeof(iosf_sb_ports[0]),
 		    iosf_sb_port_compare);
-	if (p)
+	if (p) {
+		*reg_stride = p->reg_stride;
 		return p->port;
+	}
 
+	*reg_stride = 4;
 	return strtoul(name, NULL, 16);
 }
 
@@ -87,7 +91,7 @@ int main(int argc, char *argv[])
 {
 	uint32_t port, reg, val;
 	struct pci_device *dev = intel_get_pci_device();
-	int i, nregs, count = 1;
+	int i, nregs, count = 1, reg_stride;
 	const char *name;
 
 	if (!IS_VALLEYVIEW(dev->device_id) &&
@@ -124,7 +128,7 @@ int main(int argc, char *argv[])
 
 	i = optind;
 	name = argv[i++];
-	port = iosf_sb_port_parse(name);
+	port = iosf_sb_port_parse(name, &reg_stride);
 
 	intel_register_access_init(dev, 0);
 
@@ -136,7 +140,7 @@ int main(int argc, char *argv[])
 		for (j = 0; j < count; j++) {
 			val = intel_iosf_sb_read(port, reg);
 			printf("0x%02x(%s)/0x%04x : 0x%08x\n", port, name, reg, val);
-			reg += 4;
+			reg += reg_stride;
 		}
 	}
 
-- 
2.0.5

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      parent reply	other threads:[~2015-03-23 13:15 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-03-23 13:14 [PATCH i-g-t 1/9] lib: Change IOSF SB devfn to 0.0 ville.syrjala
2015-03-23 13:14 ` [PATCH i-g-t 2/9] lib: Allow 32bit addresses for IOSF-SB registers ville.syrjala
2015-03-23 13:14 ` [PATCH i-g-t 3/9] toos/intel_iosf_sb_*: Fix DPIO IOSF SB port number ville.syrjala
2015-03-23 13:14 ` [PATCH i-g-t 4/9] tools: Remove intel_dpio_{read, write} tools ville.syrjala
2015-03-23 13:14 ` [PATCH i-g-t 5/9] tools/intel_iosf_sb_*: Replace if ladder with an array and bsearch() ville.syrjala
2015-03-23 13:14 ` [PATCH i-g-t 6/9] tools/intel_iosf_sb_*: Use getopt() to parse the options ville.syrjala
2015-03-23 13:14 ` [PATCH i-g-t 7/9] tools/intel_iosf_sb_*: Support reading/writing multiple registers at once ville.syrjala
2015-03-23 13:14 ` [PATCH i-g-t 8/9] tools/intel_iosf_sb_read: Add -c command line option like intel_reg_read ville.syrjala
2015-03-23 13:14 ` ville.syrjala [this message]

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