From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44447) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ya2Xl-0005pA-Bm for qemu-devel@nongnu.org; Mon, 23 Mar 2015 09:37:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Ya2Xi-0002MI-2M for qemu-devel@nongnu.org; Mon, 23 Mar 2015 09:37:25 -0400 Received: from e23smtp07.au.ibm.com ([202.81.31.140]:54954) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Ya2Xh-0002M1-Ej for qemu-devel@nongnu.org; Mon, 23 Mar 2015 09:37:21 -0400 Received: from /spool/local by e23smtp07.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 23 Mar 2015 23:37:18 +1000 From: Bharata B Rao Date: Mon, 23 Mar 2015 19:05:43 +0530 Message-Id: <1427117764-23008-3-git-send-email-bharata@linux.vnet.ibm.com> In-Reply-To: <1427117764-23008-1-git-send-email-bharata@linux.vnet.ibm.com> References: <1427117764-23008-1-git-send-email-bharata@linux.vnet.ibm.com> Subject: [Qemu-devel] [RFC PATCH v2 02/23] spapr: Add DRC dt entries for CPUs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Bharata B Rao , mdroth@linux.vnet.ibm.com, agraf@suse.de, qemu-ppc@nongnu.org, tyreld@linux.vnet.ibm.com, nfont@linux.vnet.ibm.com, imammedo@redhat.com, afaerber@suse.de, david@gibson.dropbear.id.au Advertise CPU DR-capability to the guest via device tree. Signed-off-by: Bharata B Rao Signed-off-by: Michael Roth [spapr_drc_reset implementation] Reviewed-by: David Gibson --- hw/ppc/spapr.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index a782e28..920e650 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -807,6 +807,15 @@ static void spapr_finalize_fdt(sPAPREnvironment *spapr, spapr_populate_chosen_stdout(fdt, spapr->vio_bus); } + if (spapr->dr_cpu_enabled) { + int offset = fdt_path_offset(fdt, "/cpus"); + ret = spapr_drc_populate_dt(fdt, offset, NULL, + SPAPR_DR_CONNECTOR_TYPE_CPU); + if (ret < 0) { + fprintf(stderr, "Couldn't set up CPU DR device tree properties\n"); + } + } + _FDT((fdt_pack(fdt))); if (fdt_totalsize(fdt) > FDT_MAX_SIZE) { @@ -1393,6 +1402,16 @@ static SaveVMHandlers savevm_htab_handlers = { .load_state = htab_load, }; +static void spapr_drc_reset(void *opaque) +{ + sPAPRDRConnector *drc = opaque; + DeviceState *d = DEVICE(drc); + + if (d) { + device_reset(d); + } +} + /* pSeries LPAR / sPAPR hardware init */ static void ppc_spapr_init(MachineState *machine) { @@ -1418,6 +1437,7 @@ static void ppc_spapr_init(MachineState *machine) long load_limit, fw_size; bool kernel_le = false; char *filename; + int smt = kvmppc_smt_threads(); msi_supported = true; @@ -1564,6 +1584,15 @@ static void ppc_spapr_init(MachineState *machine) spapr->dr_cpu_enabled = smc->dr_cpu_enabled; spapr->dr_lmb_enabled = smc->dr_lmb_enabled; + if (spapr->dr_cpu_enabled) { + for (i = 0; i < max_cpus/smp_threads; i++) { + sPAPRDRConnector *drc = + spapr_dr_connector_new(OBJECT(machine), + SPAPR_DR_CONNECTOR_TYPE_CPU, i * smt); + qemu_register_reset(spapr_drc_reset, drc); + } + } + /* Set up PCI */ spapr_pci_rtas_init(); -- 2.1.0