From mboxrd@z Thu Jan 1 00:00:00 1970 From: nitin.garg at freescale.com Date: Mon, 6 Apr 2015 14:01:08 -0500 Subject: [U-Boot] [PATCH v3 1/3] ARM: mx6: Fix errata workarounds for i.MX6 Message-ID: <1428346870-15227-1-git-send-email-nitin.garg@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Nitin Garg Since MX6 is Cortex-A9 r2p10, enable ARM errata 751472, 794072, 761320 only applied to the following configuration: This erratum affects configurations with either: - One processor if the ACP is present - Two or more processors i.MX6 family does not have the ACP and thus only the MPCore system will be impacted, which are the i.MX6DQ, i.MX6DL. Signed-off-by: Nitin Garg --- Changes in v3: Split the patch as suggested by Fabio. Changes in v2: None include/configs/mx6_common.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h index e0528ce..e22336e 100644 --- a/include/configs/mx6_common.h +++ b/include/configs/mx6_common.h @@ -18,9 +18,12 @@ #define __MX6_COMMON_H #define CONFIG_ARM_ERRATA_743622 +#if (defined(CONFIG_MX6Q) || defined(CONFIG_MX6DL) ||\ +defined(CONFIG_MX6QDL)) && !defined(CONFIG_MX6S) #define CONFIG_ARM_ERRATA_751472 #define CONFIG_ARM_ERRATA_794072 #define CONFIG_ARM_ERRATA_761320 +#endif #define CONFIG_BOARD_POSTCLK_INIT #ifndef CONFIG_SYS_L2CACHE_OFF -- 1.7.9.5