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Subject: Re: Missing support for ECC_SOFT_BCH in fsl-elbc-nand
From: Scott Wood <scottwood@freescale.com>
To: Tomas Hlavacek <tomas.hlavacek@nic.cz>
Date: Mon, 13 Apr 2015 19:58:28 -0500
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On Mon, 2015-04-13 at 23:56 +0200, Tomas Hlavacek wrote:
> Hi!
> 
> On Monday, April 13, 2015 9:12:33 PM CEST, Scott Wood wrote:
> > On Mon, 2015-04-13 at 00:30 +0200, Tomas Hlavacek wrote:
> >> 1) How to disable HW ECC?
> >> 
> >> What I have done is this:
> >> 
> >> diff --git a/drivers/mtd/nand/fsl_elbc_nand.c  ...
> >
> > You shouldn't be setting BR_DECC if you don't want to use HW ECC, so
> > this ifdef doesn't accomplish anything.
> >
> > Also, while a compile-time hack may be suitable for your own use, to get
> > a mergable patch it should be a runtime decision.  You should be able to
> > read at runtime the level of ECC that the flash requires.
> 
> How? Could you please point me to some starting point what to read in order 
> to implement it?

The information should be in the chip's identification bytes, either via
ONFI or a manufacturer-specific format.  Or, if that's too complicated,
at least indicate the type of ECC to be used in the device tree.

-Scott