Re: [Qemu-devel] [PATCH 5/6] [wip] tseg, part1, not (yet) tested

[Gerd Hoffmann <kraxel@redhat.com>]

  Hi,

> Thanks, that sounds good. So, as far as I understand, no changes to what
> we've discussed thus far.
> 
> But, I have another question -- am I allowed to use "top of below-4g
> memory" directly, as discussed earlier, or should I use the above PCI
> registers? The tseg size will actually come from me (because I'll select
> it), but the top I could take from "top of below-4g memory" (preferably,
> see earlier), or reading the 0xA8 register.

I've figured there is one more register, with the funky name "Top of Low
Usable DRAM".  Which should hold our "top of below-4g memory" value.  I
guess I should read the whole mch spec from start to end once ...

But as I read the specs it is the job of the firmware to set all these
registers.  On physical hardware you can go into the firmware setup and
configure all sorts of stuff there, like the pci io window size,
graphics memory size etc.  And probably the firmware then goes setup all
those chipset registers for low memory size, gfx regions size, tseg etc.
according to the setup configuration.

I'd recommend to likewise just write the correct values into those
registers.  Right now it has no effect (other than the guest os seeing
realistic values when reading those registers).  But if the tseg memory
base register is implemented some day it surely is helpful if ovmf sets
it correctly ;)

cheers,
  Gerd