From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1031189AbbD1Wqy (ORCPT ); Tue, 28 Apr 2015 18:46:54 -0400 Received: from mga03.intel.com ([134.134.136.65]:34689 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1031021AbbD1Wqw (ORCPT ); Tue, 28 Apr 2015 18:46:52 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.11,666,1422950400"; d="scan'208";a="486901780" From: Ross Zwisler To: linux-kernel@vger.kernel.org Cc: Ross Zwisler , H Peter Anvin , Ingo Molnar , Thomas Gleixner , Borislav Petkov Subject: [PATCH v2] x86: Add kerneldoc for pcommit_sfence() Date: Tue, 28 Apr 2015 16:46:36 -0600 Message-Id: <1430261196-2401-1-git-send-email-ross.zwisler@linux.intel.com> X-Mailer: git-send-email 1.9.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add kerneldoc comments for pcommit_sfence() describing the purpose of the pcommit instruction and demonstrating the usage of that instruction. Signed-off-by: Ross Zwisler Cc: H Peter Anvin Cc: Ingo Molnar Cc: Thomas Gleixner Cc: Borislav Petkov --- arch/x86/include/asm/special_insns.h | 37 ++++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/x86/include/asm/special_insns.h b/arch/x86/include/asm/special_insns.h index aeb4666e0c0a..c9f2ebec33ac 100644 --- a/arch/x86/include/asm/special_insns.h +++ b/arch/x86/include/asm/special_insns.h @@ -215,6 +215,43 @@ static inline void clwb(volatile void *__p) : [pax] "a" (p)); } +/** + * pcommit_sfence() - persistent commit and fence + * + * The PCOMMIT instruction ensures that data that has been flushed from the + * processor's cache hierarchy with CLWB, CLFLUSHOPT or CLFLUSH is accepted to + * memory and is durable on the DIMM. The primary use case for this is + * persistent memory. + * + * This function shows how to properly use CLWB/CLFLUSHOPT/CLFLUSH and PCOMMIT + * with appropriate fencing: + * + * void flush_and_commit_buffer(void *vaddr, unsigned int size) + * { + * unsigned long clflush_mask = boot_cpu_data.x86_clflush_size - 1; + * void *vend = vaddr + size; + * void *p; + * + * for (p = (void *)((unsigned long)vaddr & ~clflush_mask); + * p < vend; p += boot_cpu_data.x86_clflush_size) + * clwb(p); + * + * // SFENCE to order CLWB/CLFLUSHOPT/CLFLUSH cache flushes + * // MFENCE via mb() also works + * wmb(); + * + * // PCOMMIT and the required SFENCE for ordering + * pcommit_sfence(); + * } + * + * After this function completes the data pointed to by 'vaddr' has been + * accepted to memory and will be durable if the 'vaddr' points to persistent + * memory. + * + * PCOMMIT must always be ordered by an MFENCE or SFENCE, so to help simplify + * things we include both the PCOMMIT and the required SFENCE in the + * alternatives generated by pcommit_sfence(). + */ static inline void pcommit_sfence(void) { alternative(ASM_NOP7, -- 1.9.3