From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58543) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YqhiL-0003NY-E9 for qemu-devel@nongnu.org; Fri, 08 May 2015 08:49:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YqhiK-0002Al-3M for qemu-devel@nongnu.org; Fri, 08 May 2015 08:49:13 -0400 Received: from mx1.redhat.com ([209.132.183.28]:48238) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YqhiJ-0002Ad-VC for qemu-devel@nongnu.org; Fri, 08 May 2015 08:49:12 -0400 From: Paolo Bonzini Date: Fri, 8 May 2015 14:48:57 +0200 Message-Id: <1431089344-20350-3-git-send-email-pbonzini@redhat.com> In-Reply-To: <1431089344-20350-1-git-send-email-pbonzini@redhat.com> References: <1431089344-20350-1-git-send-email-pbonzini@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL 2/9] apic_common: improve readability of apic_reset_common List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: "Denis V. Lunev" , =?UTF-8?q?Andreas=20F=C3=83=C2=A4rber?= From: "Denis V. Lunev" Replace call of cpu_is_bsp(s->cpu) which really returns !!(s->apicbase & MSR_IA32_APICBASE_BSP) with directly collected value. Due to this the tracepoint trace_cpu_get_apic_base((uint64_t)s->apicbase); will not be hit anymore in apic_reset_common. Signed-off-by: Denis V. Lunev CC: Andreas F=C3=83=C2=A4rber CC: Paolo Bonzini Message-Id: <1428414832-3104-1-git-send-email-den@openvz.org> Signed-off-by: Paolo Bonzini --- hw/intc/apic_common.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index d38d24b..d595d63 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -233,11 +233,10 @@ static void apic_reset_common(DeviceState *dev) { APICCommonState *s =3D APIC_COMMON(dev); APICCommonClass *info =3D APIC_COMMON_GET_CLASS(s); - bool bsp; + uint32_t bsp; =20 - bsp =3D cpu_is_bsp(s->cpu); - s->apicbase =3D APIC_DEFAULT_ADDRESS | - (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE; + bsp =3D s->apicbase & MSR_IA32_APICBASE_BSP; + s->apicbase =3D APIC_DEFAULT_ADDRESS | bsp | MSR_IA32_APICBASE_ENABL= E; =20 s->vapic_paddr =3D 0; info->vapic_base_update(s); --=20 2.3.5