From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rhyland Klein Subject: [PATCH v5 15/21] clk: tegra: pll: Add dyn_ramp callback Date: Tue, 12 May 2015 13:23:58 -0400 Message-ID: <1431451444-23155-17-git-send-email-rklein@nvidia.com> References: <1431451444-23155-1-git-send-email-rklein@nvidia.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1431451444-23155-1-git-send-email-rklein-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> Sender: linux-tegra-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Peter De Schrijver Cc: Mike Turquette , Stephen Warren , Stephen Boyd , Thierry Reding , Alexandre Courbot , Bill Huang , Paul Walmsley , Jim Lin , Benson Leung , linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-tegra@vger.kernel.org From: Bill Huang Add a callback to the pll_params for custom dynamic ramping functions which can be specified per PLL. Signed-off-by: Bill Huang --- drivers/clk/tegra/clk.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index 330729a822cf..a61d388364b3 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -160,6 +160,8 @@ struct div_nmp { #define MAX_PLL_MISC_REG_COUNT 6 +struct tegra_clk_pll; + /** * struct tegra_clk_pll_params - PLL parameters * @@ -271,6 +273,8 @@ struct tegra_clk_pll_params { unsigned long rate, unsigned long parent_rate); unsigned long (*adjust_vco)(struct tegra_clk_pll_params *pll_params, unsigned long parent_rate); + int (*dyn_ramp)(struct tegra_clk_pll *pll, + struct tegra_clk_pll_freq_table *cfg); }; #define TEGRA_PLL_USE_LOCK BIT(0) -- 1.7.9.5 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933705AbbELR3l (ORCPT ); Tue, 12 May 2015 13:29:41 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:6551 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933442AbbELR0e (ORCPT ); Tue, 12 May 2015 13:26:34 -0400 X-PGP-Universal: processed; by hqnvupgp08.nvidia.com on Tue, 12 May 2015 10:24:12 -0700 From: Rhyland Klein To: Peter De Schrijver CC: Mike Turquette , Stephen Warren , Stephen Boyd , Thierry Reding , Alexandre Courbot , Bill Huang , Paul Walmsley , Jim Lin , Benson Leung , linux-clk@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v5 15/21] clk: tegra: pll: Add dyn_ramp callback Date: Tue, 12 May 2015 13:23:58 -0400 Message-ID: <1431451444-23155-17-git-send-email-rklein@nvidia.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1431451444-23155-1-git-send-email-rklein@nvidia.com> References: <1431451444-23155-1-git-send-email-rklein@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Bill Huang Add a callback to the pll_params for custom dynamic ramping functions which can be specified per PLL. Signed-off-by: Bill Huang --- drivers/clk/tegra/clk.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h index 330729a822cf..a61d388364b3 100644 --- a/drivers/clk/tegra/clk.h +++ b/drivers/clk/tegra/clk.h @@ -160,6 +160,8 @@ struct div_nmp { #define MAX_PLL_MISC_REG_COUNT 6 +struct tegra_clk_pll; + /** * struct tegra_clk_pll_params - PLL parameters * @@ -271,6 +273,8 @@ struct tegra_clk_pll_params { unsigned long rate, unsigned long parent_rate); unsigned long (*adjust_vco)(struct tegra_clk_pll_params *pll_params, unsigned long parent_rate); + int (*dyn_ramp)(struct tegra_clk_pll *pll, + struct tegra_clk_pll_freq_table *cfg); }; #define TEGRA_PLL_USE_LOCK BIT(0) -- 1.7.9.5