From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754579AbbESIRa (ORCPT ); Tue, 19 May 2015 04:17:30 -0400 Received: from mail-bl2on0137.outbound.protection.outlook.com ([65.55.169.137]:62049 "EHLO na01-bl2-obe.outbound.protection.outlook.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1754480AbbESIRY (ORCPT ); Tue, 19 May 2015 04:17:24 -0400 X-Greylist: delayed 892 seconds by postgrey-1.27 at vger.kernel.org; Tue, 19 May 2015 04:17:24 EDT Authentication-Results: spf=none (sender IP is 165.204.84.222) smtp.mailfrom=amd.com; intel.com; dkim=none (message not signed) header.d=none; X-WSS-ID: 0NOL7NP-08-J59-02 X-M-MSG: From: Huang Rui To: Borislav Petkov , Len Brown , "Rafael J. Wysocki" , Thomas Gleixner CC: , , Fengguang Wu , Aaron Lu , Tony Li , Huang Rui Subject: [RFC PATCH 0/4] x86, mwaitt: introduce AMD mwaitt support Date: Tue, 19 May 2015 16:01:08 +0800 Message-ID: <1432022472-2224-1-git-send-email-ray.huang@amd.com> X-Mailer: git-send-email 2.1.0 MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-Microsoft-Exchange-Diagnostics: 1;BN1AFFO11FD030;1:iocf8y5eatE9jpp5lJv9rEPO+kUuAJEqw9h8rbNRzypJY8shXJgYK1b9e37dLbPDCdRBtGXHl1N6QLMku4MOyfLgMAlNYFzFq1A3mRHg96Z98I+lTLPr8XSe7/iPQphAOekynJG6x2EoTNOkFMpC+T2NzOSQt6RVjQopbAji7uvRKA2orZHgAONmr4J1VuCPe8Fi9TKi6kYtvKeZEF5MhO/VsVkziVm6vzv6Z+WlDnDPp+w5YJDLPzlgwxWc+7xm3suUaMTB6UMTMy1zqwyLH/pBIXvT/MYhYZfzb6NkWTGRAfjnb5ft8zpHPbOZjz0k5PAuAVz9InFLdCsbEsUSzA== X-Forefront-Antispam-Report: CIP:165.204.84.222;CTRY:US;IPV:NLI;EFV:NLI;SFV:NSPM;SFS:(10019020)(6009001)(428002)(209900001)(189002)(199003)(164054003)(15395725005)(189998001)(92566002)(105586002)(33646002)(101416001)(87936001)(19580395003)(106466001)(50226001)(68736005)(46102003)(229853001)(53416004)(77096005)(36756003)(77156002)(50466002)(62966003)(5001860100001)(5001830100001)(64706001)(15975445007)(5001770100001)(97736004)(48376002)(86362001)(50986999)(5001920100001)(47776003)(4001540100001)(217873001)(6606295002);DIR:OUT;SFP:1102;SCL:1;SRVR:CY1PR02MB1118;H:atltwp02.amd.com;FPR:;SPF:None;PTR:InfoDomainNonexistent;MX:1;A:1;LANG:en; X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:CY1PR02MB1118; X-Microsoft-Antispam-PRVS: X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:(601004)(5005006)(3002001);SRVR:CY1PR02MB1118;BCL:0;PCL:0;RULEID:;SRVR:CY1PR02MB1118; X-Forefront-PRVS: 0581B5AB35 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2015 08:02:19.4559 (UTC) X-MS-Exchange-CrossTenant-Id: fde4dada-be84-483f-92cc-e026cbee8e96 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=fde4dada-be84-483f-92cc-e026cbee8e96;Ip=[165.204.84.222];Helo=[atltwp02.amd.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR02MB1118 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, This patch set introduces a new instruction support on AMD Carrizo (Family 15h, Model 60h-6fh). It adds mwaitx idle function with a configurable timer. The user can configure the idle method and timer value via the idle kernel parameter. Some discussions of the background, please see: http://marc.info/?l=linux-kernel&m=143202042530498&w=2 http://marc.info/?l=linux-kernel&m=143161327003541&w=2 They are rebased on tip/sched/core. Thanks, Rui Huang Rui (4): x86, mwaitt: add monitorx and mwaitx instruction x86, mwaitt: introduce mwaitx idle with a configurable timer x86, mwaitt: add document to describe mwaitx x86, mwait: fix redundant comment Documentation/kernel-parameters.txt | 10 ++++- arch/x86/include/asm/cpufeature.h | 1 + arch/x86/include/asm/mwait.h | 27 +++++++++++++ arch/x86/include/asm/processor.h | 2 +- arch/x86/kernel/process.c | 81 ++++++++++++++++++++++++++++++++++++- 5 files changed, 118 insertions(+), 3 deletions(-) -- 2.1.0