From mboxrd@z Thu Jan 1 00:00:00 1970 From: Masahiro Yamada Subject: [RESEND PATCH 1/2] pinctrl: zynq: fix DEFINE_ZYNQ_PINMUX_FUNCTION_MUX macro Date: Wed, 20 May 2015 17:42:30 +0900 Message-ID: <1432111351-21336-2-git-send-email-yamada.masahiro@socionext.com> References: <1432111351-21336-1-git-send-email-yamada.masahiro@socionext.com> Return-path: In-Reply-To: <1432111351-21336-1-git-send-email-yamada.masahiro@socionext.com> Sender: linux-kernel-owner@vger.kernel.org To: linux-gpio@vger.kernel.org Cc: Masahiro Yamada , =?UTF-8?q?S=C3=B6ren=20Brinkmann?= , Michal Simek , Linus Walleij , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: linux-gpio@vger.kernel.org The offset to the mux register is missing. Signed-off-by: Masahiro Yamada --- drivers/pinctrl/pinctrl-zynq.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-zynq.c b/drivers/pinctrl/pinctrl-zynq.c index 3d5453a..77c5a98 100644 --- a/drivers/pinctrl/pinctrl-zynq.c +++ b/drivers/pinctrl/pinctrl-zynq.c @@ -714,12 +714,13 @@ static const char * const gpio0_groups[] = {"gpio0_0_grp", .mux_val = mval, \ } -#define DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(fname, mval, mux, mask, shift) \ +#define DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(fname, mval, offset, mask, shift)\ [ZYNQ_PMUX_##fname] = { \ .name = #fname, \ .groups = fname##_groups, \ .ngroups = ARRAY_SIZE(fname##_groups), \ .mux_val = mval, \ + .mux = offset, \ .mux_mask = mask, \ .mux_shift = shift, \ } -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: yamada.masahiro@socionext.com (Masahiro Yamada) Date: Wed, 20 May 2015 17:42:30 +0900 Subject: [RESEND PATCH 1/2] pinctrl: zynq: fix DEFINE_ZYNQ_PINMUX_FUNCTION_MUX macro In-Reply-To: <1432111351-21336-1-git-send-email-yamada.masahiro@socionext.com> References: <1432111351-21336-1-git-send-email-yamada.masahiro@socionext.com> Message-ID: <1432111351-21336-2-git-send-email-yamada.masahiro@socionext.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org The offset to the mux register is missing. Signed-off-by: Masahiro Yamada --- drivers/pinctrl/pinctrl-zynq.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pinctrl/pinctrl-zynq.c b/drivers/pinctrl/pinctrl-zynq.c index 3d5453a..77c5a98 100644 --- a/drivers/pinctrl/pinctrl-zynq.c +++ b/drivers/pinctrl/pinctrl-zynq.c @@ -714,12 +714,13 @@ static const char * const gpio0_groups[] = {"gpio0_0_grp", .mux_val = mval, \ } -#define DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(fname, mval, mux, mask, shift) \ +#define DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(fname, mval, offset, mask, shift)\ [ZYNQ_PMUX_##fname] = { \ .name = #fname, \ .groups = fname##_groups, \ .ngroups = ARRAY_SIZE(fname##_groups), \ .mux_val = mval, \ + .mux = offset, \ .mux_mask = mask, \ .mux_shift = shift, \ } -- 1.9.1