From mboxrd@z Thu Jan 1 00:00:00 1970 From: Philipp Zabel Subject: Re: [PATCH v8 14/16] ARM: dts: Introduce STM32F429 MCU Date: Fri, 22 May 2015 11:06:28 +0200 Message-ID: <1432285588.3929.28.camel@pengutronix.de> References: <1431158038-3813-1-git-send-email-mcoquelin.stm32@gmail.com> <2282066.NWoIT9ZyLc@wuerfel> <13641152.Yt4ZI3oT6L@wuerfel> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Maxime Coquelin Cc: Mark Rutland , "linux-doc@vger.kernel.org" , Linus Walleij , Will Deacon , Stefan Agner , Nikolay Borisov , Peter Meerwald , "linux-api@vger.kernel.org" , Lee Jones , Mauro Carvalho Chehab , Linux-Arch , Daniel Thompson , Russell King , Pawel Moll , Jonathan Corbet , Jiri Slaby , Daniel Lezcano , Nicolae Rosia , Chanwoo Choi , Andy Shevchenko , Antti Palosaari , Geert Uytterhoeven List-Id: linux-gpio@vger.kernel.org Am Mittwoch, den 20.05.2015, 18:17 +0200 schrieb Maxime Coquelin: > Hi Arnd, Philipp, > > 2015-05-13 21:11 GMT+02:00 Arnd Bergmann : > > Ideally the binding should follow closely what is documented > > in the data sheet. > > > > Daniel and myself would like your opinion about this binding: > > rcc: rcc@40023800 { > #reset-cells = <1>; > #clock-cells = <2>; > compatible = "st,stm32-rcc"; > reg = <0x40023800 0x10>, <0x40023810 0x20>, <0x40023830 0x20>; > reg-names = "clock-cfg", "reset", "clock-gates"; "reset" singular, "clock-gates" plural seems inconsistent to me. > }; > > It would solve a problem Daniel is facing due to conflicting mem > region when clock and reset drivers are enabled, as both would reserve > the same region. > > Also, it would make the reset driver very generic. > Doing that, we could even create a generic-reset.c driver that would > be used by STM32 and Sunxi (at least). Adding support for providing the reset register range via of_device_id data and the possibility to invert set/clear ops would allow to also include the socfpga driver. > In the probe function, it would check the number of reg resources. > If a single resource is passed, it would take it, else it would look > the one named "reset". > The driver and bindings would be the same for the two families, and > the bindings would be backward compatible with sunxi ones. > > Philip, Arnd, what do you think? I'm not a fan of describing the register layout in the device tree as detailed as the sunxi bindings do. I'd prefer the reg property to describe the device's register address space with one entry per contiguous block of registers. Unifying the mostly identical drivers is a good idea though, and reusing preexisting bindings is better than inventing new ones. I favor the socfpga binding, but I still like the sunxi bindings and this proposal better than encoding the register offset in the reset index. best regards Philipp From mboxrd@z Thu Jan 1 00:00:00 1970 From: p.zabel@pengutronix.de (Philipp Zabel) Date: Fri, 22 May 2015 11:06:28 +0200 Subject: [PATCH v8 14/16] ARM: dts: Introduce STM32F429 MCU In-Reply-To: References: <1431158038-3813-1-git-send-email-mcoquelin.stm32@gmail.com> <2282066.NWoIT9ZyLc@wuerfel> <13641152.Yt4ZI3oT6L@wuerfel> Message-ID: <1432285588.3929.28.camel@pengutronix.de> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Am Mittwoch, den 20.05.2015, 18:17 +0200 schrieb Maxime Coquelin: > Hi Arnd, Philipp, > > 2015-05-13 21:11 GMT+02:00 Arnd Bergmann : > > Ideally the binding should follow closely what is documented > > in the data sheet. > > > > Daniel and myself would like your opinion about this binding: > > rcc: rcc at 40023800 { > #reset-cells = <1>; > #clock-cells = <2>; > compatible = "st,stm32-rcc"; > reg = <0x40023800 0x10>, <0x40023810 0x20>, <0x40023830 0x20>; > reg-names = "clock-cfg", "reset", "clock-gates"; "reset" singular, "clock-gates" plural seems inconsistent to me. > }; > > It would solve a problem Daniel is facing due to conflicting mem > region when clock and reset drivers are enabled, as both would reserve > the same region. > > Also, it would make the reset driver very generic. > Doing that, we could even create a generic-reset.c driver that would > be used by STM32 and Sunxi (at least). Adding support for providing the reset register range via of_device_id data and the possibility to invert set/clear ops would allow to also include the socfpga driver. > In the probe function, it would check the number of reg resources. > If a single resource is passed, it would take it, else it would look > the one named "reset". > The driver and bindings would be the same for the two families, and > the bindings would be backward compatible with sunxi ones. > > Philip, Arnd, what do you think? I'm not a fan of describing the register layout in the device tree as detailed as the sunxi bindings do. I'd prefer the reg property to describe the device's register address space with one entry per contiguous block of registers. Unifying the mostly identical drivers is a good idea though, and reusing preexisting bindings is better than inventing new ones. I favor the socfpga binding, but I still like the sunxi bindings and this proposal better than encoding the register offset in the reset index. best regards Philipp