From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:46144) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YzXCq-0003Op-D0 for qemu-devel@nongnu.org; Mon, 01 Jun 2015 17:25:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1YzXCo-0008J2-Kx for qemu-devel@nongnu.org; Mon, 01 Jun 2015 17:25:12 -0400 Received: from hall.aurel32.net ([2001:bc8:30d7:101::1]:56072) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1YzXCo-0007qb-Ds for qemu-devel@nongnu.org; Mon, 01 Jun 2015 17:25:10 -0400 From: Aurelien Jarno Date: Mon, 1 Jun 2015 23:24:48 +0200 Message-Id: <1433193897-24110-5-git-send-email-aurelien@aurel32.net> In-Reply-To: <1433193897-24110-1-git-send-email-aurelien@aurel32.net> References: <1433193897-24110-1-git-send-email-aurelien@aurel32.net> Subject: [Qemu-devel] [PATCH 04/13] target-s390x: change CHRL and CGHRL format to RIL-b List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Alexander Graf , Aurelien Jarno , Richard Henderson Change to match the PoP. In practice both format RIL-a and RIL-b have the same fields. They differ on the way we decode the fields, and it's done correctly in QEMU. Cc: Alexander Graf Cc: Richard Henderson Signed-off-by: Aurelien Jarno --- target-s390x/insn-data.def | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index f83445a..7649098 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -159,8 +159,8 @@ C(0xe55c, CHSI, SIL, GIE, m1_32s, i2, 0, 0, 0, cmps64) C(0xe558, CGHSI, SIL, GIE, m1_64, i2, 0, 0, 0, cmps64) /* COMPARE HALFWORD RELATIVE LONG */ - C(0xc605, CHRL, RIL_a, GIE, r1_o, mri2_32s, 0, 0, 0, cmps32) - C(0xc604, CGHRL, RIL_a, GIE, r1_o, mri2_64, 0, 0, 0, cmps64) + C(0xc605, CHRL, RIL_b, GIE, r1_o, mri2_32s, 0, 0, 0, cmps32) + C(0xc604, CGHRL, RIL_b, GIE, r1_o, mri2_64, 0, 0, 0, cmps64) /* COMPARE LOGICAL */ C(0x1500, CLR, RR_a, Z, r1, r2, 0, 0, 0, cmpu32) -- 2.1.4