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From: Mika Kahola <mika.kahola@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v5 2/8] drm/i915: Use cached cdclk value
Date: Tue,  2 Jun 2015 10:21:00 +0300	[thread overview]
Message-ID: <1433229666-3152-3-git-send-email-mika.kahola@intel.com> (raw)
In-Reply-To: <1433229666-3152-1-git-send-email-mika.kahola@intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Rather than reading out the current cdclk value use the cached value we
have tucked away in dev_priv.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

v2: Rebased to the latest
v3: Rebased to the latest

Signed-off-by: Mika Kahola <mika.kahola@intel.com>

Author:    Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 3 +--
 drivers/gpu/drm/i915/intel_dp.c      | 5 +++--
 drivers/gpu/drm/i915/intel_pm.c      | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 4dd00a5..3e29d8c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6612,8 +6612,7 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
 
 	/* FIXME should check pixel clock limits on all platforms */
 	if (INTEL_INFO(dev)->gen < 4) {
-		int clock_limit =
-			dev_priv->display.get_display_clock_speed(dev);
+		int clock_limit = dev_priv->cdclk_freq;
 
 		/*
 		 * Enable pixel doubling when the dot clock
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 6f525093..9a6517d 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -708,7 +708,8 @@ static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 		return 0;
 
 	if (intel_dig_port->port == PORT_A) {
-		return DIV_ROUND_UP(dev_priv->display.get_display_clock_speed(dev), 2000);
+		return DIV_ROUND_UP(dev_priv->cdclk_freq, 2000);
+
 	} else {
 		return DIV_ROUND_UP(intel_pch_rawclk(dev), 2);
 	}
@@ -723,7 +724,7 @@ static uint32_t hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
 	if (intel_dig_port->port == PORT_A) {
 		if (index)
 			return 0;
-		return DIV_ROUND_CLOSEST(dev_priv->display.get_display_clock_speed(dev), 2000);
+		return DIV_ROUND_CLOSEST(dev_priv->cdclk_freq, 2000);
 	} else if (dev_priv->pch_id == INTEL_PCH_LPT_DEVICE_ID_TYPE) {
 		/* Workaround for non-ULT HSW */
 		switch (index) {
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index eadc15c..5db429e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -1815,7 +1815,7 @@ hsw_compute_linetime_wm(struct drm_device *dev, struct drm_crtc *crtc)
 	linetime = DIV_ROUND_CLOSEST(mode->crtc_htotal * 1000 * 8,
 				     mode->crtc_clock);
 	ips_linetime = DIV_ROUND_CLOSEST(mode->crtc_htotal * 1000 * 8,
-					 dev_priv->display.get_display_clock_speed(dev_priv->dev));
+					 dev_priv->cdclk_freq);
 
 	return PIPE_WM_LINETIME_IPS_LINETIME(ips_linetime) |
 	       PIPE_WM_LINETIME_TIME(linetime);
-- 
1.9.1

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  parent reply	other threads:[~2015-06-02  7:20 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-02  7:20 [PATCH v5 0/8] All sort of cdclk stuff Mika Kahola
2015-06-02  7:20 ` [PATCH v5 1/8] drm/i915: Cache current cdclk frequency in dev_priv Mika Kahola
2015-06-02 15:17   ` Jani Nikula
2015-06-03  6:57     ` Mika Kahola
2015-06-02  7:21 ` Mika Kahola [this message]
2015-06-02  7:21 ` [PATCH v5 3/8] drm/i915: Unify ilk and hsw .get_aux_clock_divider Mika Kahola
2015-06-02  7:21 ` [PATCH v5 4/8] drm/i915: Store max cdclk value in dev_priv Mika Kahola
2015-06-02  7:21 ` [PATCH v5 5/8] drm/i915: Don't enable IPS when pixel rate exceeds 95% Mika Kahola
2015-06-02  7:21 ` [PATCH v5 6/8] drm/i915: Add IS_BDW_ULX Mika Kahola
2015-06-02  7:21 ` [PATCH v5 7/8] drm/i915: BDW clock change support Mika Kahola
2015-06-02  7:21 ` [PATCH v5 8/8] drm/i915: HSW cdclk support Mika Kahola
2015-06-02 10:46   ` shuang.he
2015-06-02 10:57 ` [PATCH v5 0/8] All sort of cdclk stuff Damien Lespiau

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