From mboxrd@z Thu Jan 1 00:00:00 1970 From: Vikas Manocha Date: Mon, 15 Jun 2015 11:19:32 -0700 Subject: [U-Boot] [PATCH 4/6] spi: cadence_qspi: fix indirect read/write start address In-Reply-To: <1434392374-28193-1-git-send-email-vikas.manocha@st.com> References: <1434392374-28193-1-git-send-email-vikas.manocha@st.com> Message-ID: <1434392374-28193-5-git-send-email-vikas.manocha@st.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Indirect read/write start addresses are flash start addresses for indirect read or write transfers. These should be absolute flash addresses instead of offsets. Signed-off-by: Vikas Manocha --- drivers/spi/cadence_qspi_apb.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/spi/cadence_qspi_apb.c b/drivers/spi/cadence_qspi_apb.c index 515d88e..7174f7c 100644 --- a/drivers/spi/cadence_qspi_apb.c +++ b/drivers/spi/cadence_qspi_apb.c @@ -637,7 +637,8 @@ int cadence_qspi_apb_indirect_read_setup(struct cadence_spi_platdata *plat, /* Get address */ addr_value = cadence_qspi_apb_cmd2addr(&cmdbuf[1], addr_bytes); - writel(addr_value, plat->regbase + CQSPI_REG_INDIRECTRDSTARTADDR); + writel((u32)plat->ahbbase + addr_value, \ + plat->regbase + CQSPI_REG_INDIRECTRDSTARTADDR); /* The remaining lenght is dummy bytes. */ dummy_bytes = cmdlen - addr_bytes - 1; @@ -728,7 +729,8 @@ int cadence_qspi_apb_indirect_write_setup(struct cadence_spi_platdata *plat, /* Setup write address. */ reg = cadence_qspi_apb_cmd2addr(&cmdbuf[1], addr_bytes); - writel(reg, plat->regbase + CQSPI_REG_INDIRECTWRSTARTADDR); + writel((u32)plat->ahbbase + reg, \ + plat->regbase + CQSPI_REG_INDIRECTWRSTARTADDR); reg = readl(plat->regbase + CQSPI_REG_SIZE); reg &= ~CQSPI_REG_SIZE_ADDRESS_MASK; -- 1.7.9.5