From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56650) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z5biz-0002bd-1x for qemu-devel@nongnu.org; Thu, 18 Jun 2015 11:27:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Z5biy-00042s-6R for qemu-devel@nongnu.org; Thu, 18 Jun 2015 11:27:28 -0400 Received: from mx1.redhat.com ([209.132.183.28]:39355) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Z5biy-00042l-0L for qemu-devel@nongnu.org; Thu, 18 Jun 2015 11:27:28 -0400 From: =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= Date: Thu, 18 Jun 2015 17:24:24 +0200 Message-Id: <1434641064-8405-3-git-send-email-rkrcmar@redhat.com> In-Reply-To: <1434641064-8405-1-git-send-email-rkrcmar@redhat.com> References: <1434641064-8405-1-git-send-email-rkrcmar@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 2/2] target-i386: automatically raise cpuid level to 0xd List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, bsd@redhat.com, ehabkost@redhat.com, rth@twiddle.net We already bump to level 7 if features there are requested, so do the same for 0xD. Signed-off-by: Radim Kr=C4=8Dm=C3=A1=C5=99 --- If we want this behavior, we should not do it by writing a case for every level. target-i386/cpu.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index d392cf46f517..7a32ead690d2 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2796,6 +2796,10 @@ static void x86_cpu_realizefn(DeviceState *dev, Er= ror **errp) env->cpuid_level =3D 7; } =20 + if (env->features[FEAT_XSAVE] && env->cpuid_level < 0xd) { + env->cpuid_level =3D 0xd; + } + /* On AMD CPUs, some CPUID[8000_0001].EDX bits must match the bits o= n * CPUID[1].EDX. */ --=20 2.4.4