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From: "Antoine, Peter" <peter.antoine@intel.com>
To: "Lespiau, Damien" <damien.lespiau@intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"daniel.vetter.intel.com@irsmsx102.ger.corp.intel.com"
	<daniel.vetter.intel.com@irsmsx102.ger.corp.intel.com>
Subject: Re: [PATCH v5] drm/i915 : Added Programming of the MOCS
Date: Fri, 19 Jun 2015 06:34:22 +0000	[thread overview]
Message-ID: <1434695658.15415.64.camel@peterant-linux> (raw)
In-Reply-To: <20150618155006.GC29117@strange.ger.corp.intel.com>

On Thu, 2015-06-18 at 16:50 +0100, Damien Lespiau wrote:
> On Thu, Jun 18, 2015 at 03:45:44PM +0100, Antoine, Peter wrote:
> > Not a blocker. It gets a little more interesting, as the L3CC
> > registers are shared across all engines, but is only saved in the RCS
> > context. But, it is reset on the context switch when ELSP is set. So
> > we would have to program it (i.e. MMIO) and also set it in the batch
> > start for the RCS. Each ring would have to have a proper
> > init_context() and these registers programmed there.
> 
> Hum, so yes, it's like you say. I think leaving a comment somewhere in
> the init path telling us we rely on the RCS init_context() for all the
> rings would be nice, but that's extra topping that can be done any time.
> 
It is in the file header for the mocs.h in the comment before the table
is defines and in the function header for the init. I can add another
one before it's called, but that might be a little overkill. :)
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  reply	other threads:[~2015-06-19  6:34 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-18 12:29 [PATCH v5] drm/i915 : Added Programming of the MOCS Peter Antoine
2015-06-18 12:59 ` Chris Wilson
2015-06-18 13:50 ` Damien Lespiau
2015-06-18 14:45   ` Antoine, Peter
2015-06-18 15:25     ` Damien Lespiau
2015-06-18 15:35       ` chris
2015-06-18 15:50     ` Damien Lespiau
2015-06-19  6:34       ` Antoine, Peter [this message]
2015-06-22 13:50         ` Daniel Vetter

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