From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45375) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZDTYv-0004fl-Ve for qemu-devel@nongnu.org; Fri, 10 Jul 2015 04:21:39 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZDTYr-0001LF-Rz for qemu-devel@nongnu.org; Fri, 10 Jul 2015 04:21:37 -0400 Received: from mail-wi0-f182.google.com ([209.85.212.182]:35050) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZDTYr-0001Kh-LZ for qemu-devel@nongnu.org; Fri, 10 Jul 2015 04:21:33 -0400 Received: by wiga1 with SMTP id a1so8791305wig.0 for ; Fri, 10 Jul 2015 01:21:33 -0700 (PDT) From: Alvise Rigo Date: Fri, 10 Jul 2015 10:23:34 +0200 Message-Id: <1436516626-8322-2-git-send-email-a.rigo@virtualopensystems.com> In-Reply-To: <1436516626-8322-1-git-send-email-a.rigo@virtualopensystems.com> References: <1436516626-8322-1-git-send-email-a.rigo@virtualopensystems.com> Subject: [Qemu-devel] [RFC v3 01/13] exec: Add new exclusive bitmap to ram_list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, mttcg@listserver.greensocs.com Cc: alex.bennee@linaro.org, jani.kokkonen@huawei.com, tech@virtualopensystems.com, claudio.fontana@huawei.com, pbonzini@redhat.com The purpose of this new bitmap is to flag the memory pages that are in the middle of LL/SC operations (after a LL, before a SC). For all these pages, the corresponding TLB entries will be generated in such a way to force the slow-path. When the system starts, the whole memory is dirty (all the bitmap is set). A page, after being marked as exclusively-clean, will *not* be restored as dirty after the SC; the cputlb code will take care of that, lazily setting the page as dirty when the TLB EXCL entry is about to be overwritten. The accessors to this bitmap are currently not atomic, but they have to be so in a real multi-threading TCG. Suggested-by: Jani Kokkonen Suggested-by: Claudio Fontana Signed-off-by: Alvise Rigo --- include/exec/memory.h | 3 ++- include/exec/ram_addr.h | 22 ++++++++++++++++++++++ 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index 8ae004e..5ad6f20 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -19,7 +19,8 @@ #define DIRTY_MEMORY_VGA 0 #define DIRTY_MEMORY_CODE 1 #define DIRTY_MEMORY_MIGRATION 2 -#define DIRTY_MEMORY_NUM 3 /* num of dirty bits */ +#define DIRTY_MEMORY_EXCLUSIVE 3 +#define DIRTY_MEMORY_NUM 4 /* num of dirty bits */ #include #include diff --git a/include/exec/ram_addr.h b/include/exec/ram_addr.h index c113f21..2766541 100644 --- a/include/exec/ram_addr.h +++ b/include/exec/ram_addr.h @@ -135,6 +135,9 @@ static inline void cpu_physical_memory_set_dirty_range(ram_addr_t start, if (unlikely(mask & (1 << DIRTY_MEMORY_CODE))) { bitmap_set_atomic(d[DIRTY_MEMORY_CODE], page, end - page); } + if (unlikely(mask & (1 << DIRTY_MEMORY_EXCLUSIVE))) { + bitmap_set_atomic(d[DIRTY_MEMORY_EXCLUSIVE], page, end - page); + } xen_modified_memory(start, length); } @@ -249,5 +252,24 @@ uint64_t cpu_physical_memory_sync_dirty_bitmap(unsigned long *dest, return num_dirty; } +/* Exclusive bitmap accessors. */ +static inline void cpu_physical_memory_set_excl_dirty(ram_addr_t addr) +{ + set_bit(addr >> TARGET_PAGE_BITS, + ram_list.dirty_memory[DIRTY_MEMORY_EXCLUSIVE]); +} + +static inline int cpu_physical_memory_excl_is_dirty(ram_addr_t addr) +{ + return test_bit(addr >> TARGET_PAGE_BITS, + ram_list.dirty_memory[DIRTY_MEMORY_EXCLUSIVE]); +} + +static inline void cpu_physical_memory_clear_excl_dirty(ram_addr_t addr) +{ + clear_bit(addr >> TARGET_PAGE_BITS, + ram_list.dirty_memory[DIRTY_MEMORY_EXCLUSIVE]); +} + #endif #endif -- 2.4.5