From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753543AbbGWBSo (ORCPT ); Wed, 22 Jul 2015 21:18:44 -0400 Received: from mailgw02.mediatek.com ([218.249.47.111]:34373 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751154AbbGWBSm (ORCPT ); Wed, 22 Jul 2015 21:18:42 -0400 X-Listener-Flag: 11101 Message-ID: <1437614315.3040.3.camel@mhfsdcap03> Subject: Re: [PATCH v3 0/5] Mediatek xHCI support From: chunfeng yun To: Mathias Nyman CC: Rob Herring , Mark Rutland , Matthias Brugger , Felipe Balbi , Sascha Hauer , , , , "Roger Quadros" , , , John Crispin , Daniel Kurtz Date: Thu, 23 Jul 2015 09:18:35 +0800 In-Reply-To: <1437573945-31586-1-git-send-email-chunfeng.yun@mediatek.com> References: <1437573945-31586-1-git-send-email-chunfeng.yun@mediatek.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.2.3-0ubuntu6 Content-Transfer-Encoding: 7bit MIME-Version: 1.0 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Sorry, add a title On Wed, 2015-07-22 at 22:05 +0800, Chunfeng Yun wrote: > From ac1e8724bfa47494223bad0af450c1a63cd2fe0c Mon Sep 17 00:00:00 2001 > From: Chunfeng Yun > Date: Wed, 22 Jul 2015 21:15:15 +0800 > Subject: [PATCH 0/5] *** SUBJECT HERE *** > > The patch supports MediaTek's xHCI controller. > > There are some differences from xHCI spec: > 1. The interval is specified in 250 * 8ns increments for Interrupt Moderation > Interval(IMODI) of the Interrupter Moderation(IMOD) register, it is 8 times as > much as that defined in xHCI spec. > > 2. For the value of TD Size in Normal TRB, MTK's xHCI controller defines a > number of packets that remain to be transferred for a TD after processing all > Max packets in all previous TRBs,that means don't include the current TRB's, > but in xHCI spec it includes the current ones. > > 3. To minimize the scheduling effort for synchronous endpoints in xHC, the MTK > architecture defines some extra SW scheduling parameters for HW. According to > these parameters provided by SW, the xHC can easily decide whether a > synchronous endpoint should be scheduled in a specific uFrame. The extra SW > scheduling parameters are put into reserved DWs in Slot and Endpoint Context. > And a bandwidth scheduler algorithm is added to support such feature. > > A usb3.0 phy driver is also added which used by mt65xx SoCs platform, it > supports two usb2.0 ports and one usb3.0 port. > > Change in v3: > 1. implement generic phy > 2. move opperations for IPPC and wakeup from phy driver to xHCI driver > 3. seperate quirk functions into a single C file to fix up dependence issue > > Chunfeng Yun (5): > dt-bindings: Add usb3.0 phy binding for MT65xx SoCs > dt-bindings: Add a binding for Mediatek xHCI host controller > usb: phy: add usb3.0 phy driver for mt65xx SoCs > xhci: mediatek: support MTK xHCI host controller > arm64: dts: mediatek: add xHCI & usb phy for mt8173 > > .../devicetree/bindings/phy/phy-mt65xx-u3.txt | 21 + > .../devicetree/bindings/usb/mt8173-xhci.txt | 50 ++ > arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 15 + > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 31 + > drivers/phy/Kconfig | 9 + > drivers/phy/Makefile | 1 + > drivers/phy/phy-mt65xx-usb3.c | 426 +++++++++++ > drivers/usb/host/Kconfig | 9 + > drivers/usb/host/Makefile | 4 + > drivers/usb/host/xhci-mtk-sch.c | 436 +++++++++++ > drivers/usb/host/xhci-mtk.c | 836 +++++++++++++++++++++ > drivers/usb/host/xhci-mtk.h | 135 ++++ > drivers/usb/host/xhci-ring.c | 35 +- > drivers/usb/host/xhci.c | 19 +- > drivers/usb/host/xhci.h | 1 + > 15 files changed, 2021 insertions(+), 7 deletions(-) > create mode 100644 Documentation/devicetree/bindings/phy/phy-mt65xx-u3.txt > create mode 100644 Documentation/devicetree/bindings/usb/mt8173-xhci.txt > create mode 100644 drivers/phy/phy-mt65xx-usb3.c > create mode 100644 drivers/usb/host/xhci-mtk-sch.c > create mode 100644 drivers/usb/host/xhci-mtk.c > create mode 100644 drivers/usb/host/xhci-mtk.h > > -- > 1.8.1.1.dirty > > In-Reply-To: > From mboxrd@z Thu Jan 1 00:00:00 1970 From: chunfeng yun Subject: Re: [PATCH v3 0/5] Mediatek xHCI support Date: Thu, 23 Jul 2015 09:18:35 +0800 Message-ID: <1437614315.3040.3.camel@mhfsdcap03> References: <1437573945-31586-1-git-send-email-chunfeng.yun@mediatek.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1437573945-31586-1-git-send-email-chunfeng.yun@mediatek.com> Sender: linux-kernel-owner@vger.kernel.org To: Mathias Nyman Cc: Rob Herring , Mark Rutland , Matthias Brugger , Felipe Balbi , Sascha Hauer , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Roger Quadros , linux-usb@vger.kernel.org, linux-mediatek@lists.infradead.org, John Crispin , Daniel Kurtz List-Id: devicetree@vger.kernel.org Sorry, add a title On Wed, 2015-07-22 at 22:05 +0800, Chunfeng Yun wrote: > From ac1e8724bfa47494223bad0af450c1a63cd2fe0c Mon Sep 17 00:00:00 2001 > From: Chunfeng Yun > Date: Wed, 22 Jul 2015 21:15:15 +0800 > Subject: [PATCH 0/5] *** SUBJECT HERE *** > > The patch supports MediaTek's xHCI controller. > > There are some differences from xHCI spec: > 1. The interval is specified in 250 * 8ns increments for Interrupt Moderation > Interval(IMODI) of the Interrupter Moderation(IMOD) register, it is 8 times as > much as that defined in xHCI spec. > > 2. For the value of TD Size in Normal TRB, MTK's xHCI controller defines a > number of packets that remain to be transferred for a TD after processing all > Max packets in all previous TRBs,that means don't include the current TRB's, > but in xHCI spec it includes the current ones. > > 3. To minimize the scheduling effort for synchronous endpoints in xHC, the MTK > architecture defines some extra SW scheduling parameters for HW. According to > these parameters provided by SW, the xHC can easily decide whether a > synchronous endpoint should be scheduled in a specific uFrame. The extra SW > scheduling parameters are put into reserved DWs in Slot and Endpoint Context. > And a bandwidth scheduler algorithm is added to support such feature. > > A usb3.0 phy driver is also added which used by mt65xx SoCs platform, it > supports two usb2.0 ports and one usb3.0 port. > > Change in v3: > 1. implement generic phy > 2. move opperations for IPPC and wakeup from phy driver to xHCI driver > 3. seperate quirk functions into a single C file to fix up dependence issue > > Chunfeng Yun (5): > dt-bindings: Add usb3.0 phy binding for MT65xx SoCs > dt-bindings: Add a binding for Mediatek xHCI host controller > usb: phy: add usb3.0 phy driver for mt65xx SoCs > xhci: mediatek: support MTK xHCI host controller > arm64: dts: mediatek: add xHCI & usb phy for mt8173 > > .../devicetree/bindings/phy/phy-mt65xx-u3.txt | 21 + > .../devicetree/bindings/usb/mt8173-xhci.txt | 50 ++ > arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 15 + > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 31 + > drivers/phy/Kconfig | 9 + > drivers/phy/Makefile | 1 + > drivers/phy/phy-mt65xx-usb3.c | 426 +++++++++++ > drivers/usb/host/Kconfig | 9 + > drivers/usb/host/Makefile | 4 + > drivers/usb/host/xhci-mtk-sch.c | 436 +++++++++++ > drivers/usb/host/xhci-mtk.c | 836 +++++++++++++++++++++ > drivers/usb/host/xhci-mtk.h | 135 ++++ > drivers/usb/host/xhci-ring.c | 35 +- > drivers/usb/host/xhci.c | 19 +- > drivers/usb/host/xhci.h | 1 + > 15 files changed, 2021 insertions(+), 7 deletions(-) > create mode 100644 Documentation/devicetree/bindings/phy/phy-mt65xx-u3.txt > create mode 100644 Documentation/devicetree/bindings/usb/mt8173-xhci.txt > create mode 100644 drivers/phy/phy-mt65xx-usb3.c > create mode 100644 drivers/usb/host/xhci-mtk-sch.c > create mode 100644 drivers/usb/host/xhci-mtk.c > create mode 100644 drivers/usb/host/xhci-mtk.h > > -- > 1.8.1.1.dirty > > In-Reply-To: > From mboxrd@z Thu Jan 1 00:00:00 1970 From: chunfeng.yun@mediatek.com (chunfeng yun) Date: Thu, 23 Jul 2015 09:18:35 +0800 Subject: [PATCH v3 0/5] Mediatek xHCI support In-Reply-To: <1437573945-31586-1-git-send-email-chunfeng.yun@mediatek.com> References: <1437573945-31586-1-git-send-email-chunfeng.yun@mediatek.com> Message-ID: <1437614315.3040.3.camel@mhfsdcap03> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Sorry, add a title On Wed, 2015-07-22 at 22:05 +0800, Chunfeng Yun wrote: > From ac1e8724bfa47494223bad0af450c1a63cd2fe0c Mon Sep 17 00:00:00 2001 > From: Chunfeng Yun > Date: Wed, 22 Jul 2015 21:15:15 +0800 > Subject: [PATCH 0/5] *** SUBJECT HERE *** > > The patch supports MediaTek's xHCI controller. > > There are some differences from xHCI spec: > 1. The interval is specified in 250 * 8ns increments for Interrupt Moderation > Interval(IMODI) of the Interrupter Moderation(IMOD) register, it is 8 times as > much as that defined in xHCI spec. > > 2. For the value of TD Size in Normal TRB, MTK's xHCI controller defines a > number of packets that remain to be transferred for a TD after processing all > Max packets in all previous TRBs,that means don't include the current TRB's, > but in xHCI spec it includes the current ones. > > 3. To minimize the scheduling effort for synchronous endpoints in xHC, the MTK > architecture defines some extra SW scheduling parameters for HW. According to > these parameters provided by SW, the xHC can easily decide whether a > synchronous endpoint should be scheduled in a specific uFrame. The extra SW > scheduling parameters are put into reserved DWs in Slot and Endpoint Context. > And a bandwidth scheduler algorithm is added to support such feature. > > A usb3.0 phy driver is also added which used by mt65xx SoCs platform, it > supports two usb2.0 ports and one usb3.0 port. > > Change in v3: > 1. implement generic phy > 2. move opperations for IPPC and wakeup from phy driver to xHCI driver > 3. seperate quirk functions into a single C file to fix up dependence issue > > Chunfeng Yun (5): > dt-bindings: Add usb3.0 phy binding for MT65xx SoCs > dt-bindings: Add a binding for Mediatek xHCI host controller > usb: phy: add usb3.0 phy driver for mt65xx SoCs > xhci: mediatek: support MTK xHCI host controller > arm64: dts: mediatek: add xHCI & usb phy for mt8173 > > .../devicetree/bindings/phy/phy-mt65xx-u3.txt | 21 + > .../devicetree/bindings/usb/mt8173-xhci.txt | 50 ++ > arch/arm64/boot/dts/mediatek/mt8173-evb.dts | 15 + > arch/arm64/boot/dts/mediatek/mt8173.dtsi | 31 + > drivers/phy/Kconfig | 9 + > drivers/phy/Makefile | 1 + > drivers/phy/phy-mt65xx-usb3.c | 426 +++++++++++ > drivers/usb/host/Kconfig | 9 + > drivers/usb/host/Makefile | 4 + > drivers/usb/host/xhci-mtk-sch.c | 436 +++++++++++ > drivers/usb/host/xhci-mtk.c | 836 +++++++++++++++++++++ > drivers/usb/host/xhci-mtk.h | 135 ++++ > drivers/usb/host/xhci-ring.c | 35 +- > drivers/usb/host/xhci.c | 19 +- > drivers/usb/host/xhci.h | 1 + > 15 files changed, 2021 insertions(+), 7 deletions(-) > create mode 100644 Documentation/devicetree/bindings/phy/phy-mt65xx-u3.txt > create mode 100644 Documentation/devicetree/bindings/usb/mt8173-xhci.txt > create mode 100644 drivers/phy/phy-mt65xx-usb3.c > create mode 100644 drivers/usb/host/xhci-mtk-sch.c > create mode 100644 drivers/usb/host/xhci-mtk.c > create mode 100644 drivers/usb/host/xhci-mtk.h > > -- > 1.8.1.1.dirty > > In-Reply-To: >