From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752556AbbHEMZp (ORCPT ); Wed, 5 Aug 2015 08:25:45 -0400 Received: from metis.ext.pengutronix.de ([92.198.50.35]:51904 "EHLO metis.ext.pengutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751935AbbHEMZo (ORCPT ); Wed, 5 Aug 2015 08:25:44 -0400 From: Sascha Hauer To: linux-pm@vger.kernel.org, Zhang Rui , Eduardo Valentin Cc: linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, Daniel Kurtz , kernel@pengutronix.de, Matthias Brugger , Sascha Hauer Subject: [PATCH 3/3] ARM64: dts: mt8173: Add thermal/auxadc device nodes Date: Wed, 5 Aug 2015 14:25:38 +0200 Message-Id: <1438777538-1269-4-git-send-email-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.4.6 In-Reply-To: <1438777538-1269-1-git-send-email-s.hauer@pengutronix.de> References: <1438777538-1269-1-git-send-email-s.hauer@pengutronix.de> X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::7 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Signed-off-by: Sascha Hauer --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 27237a1..ddacb86 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -151,6 +151,11 @@ (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; }; + auxadc: auxadc@11001000 { + compatible = "mediatek,mt8173-auxadc"; + reg = <0 0x11001000 0 0x1000>; + }; + uart0: serial@11002000 { compatible = "mediatek,mt8173-uart", "mediatek,mt6577-uart"; @@ -186,6 +191,18 @@ clocks = <&uart_clk>; status = "disabled"; }; + + thermal: thermal@1100b000 { + #thermal-sensor-cells = <1>; + compatible = "mediatek,mt8173-thermal"; + reg = <0 0x1100b000 0 0x1000>; + interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>; + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>; + clock-names = "therm", "auxadc"; + resets = <&pericfg MT8173_PERI_THERM_SW_RST>; + mediatek,auxadc = <&auxadc>; + mediatek,apmixedsys = <&apmixedsys>; + }; }; }; -- 2.4.6