Re: [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel

From: Philipp Zabel <p.zabel@pengutronix.de>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: patchwork-lst@pengutronix.de, dri-devel@lists.freedesktop.org,
	kernel@pengutronix.de
Subject: Re: [PATCH 1/2] drm/panel: simple: Add bus format for HannStar HSD070PWW1 LVDS panel
Date: Fri, 07 Aug 2015 15:06:38 +0200	[thread overview]
Message-ID: <1438952798.3638.30.camel@pengutronix.de> (raw)
In-Reply-To: <20150807124243.GC25792@ulmo>

Am Freitag, den 07.08.2015, 14:42 +0200 schrieb Thierry Reding:
> On Fri, Jun 26, 2015 at 12:27:08PM +0200, Lucas Stach wrote:
> > From: Philipp Zabel <p.zabel@pengutronix.de>
> > 
> 
> Can you be more specific here? What kind of bus format is this?

The bus_format contains more information than just the bpc. In this
case, the SPWG default format for RGB666 via 3-pair LVDS specifies how
the 18 color bits are serialized in the 7 time slots for each pixel
clock. See
http://linuxtv.org/downloads/v4l-dvb-apis/subdev.html#v4l2-mbus-pixelcode-rgb-lvds
for details.

> Why is it that .bpc = 6 doesn't work here?

In this case a LVDS driver could indeed still decide itself that
bpc == 6 should be translated to MEDIA_BUS_FMT_RGB666_1X7X3_SPWG (and
not MEDIA_BUS_FMT_RGB666_1X18, or MEDIA_BUS_FMT_RGB666_1X24_CPADHI, for
example). But in the bpc == 8 case there are two different standard ways
to order the bits (SPWG/VESA vs JEIDA).
For consistency, I'd prefer to set bus_format to the correct value
everywhere.

regards
Philipp

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