[PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Olliver Schinagl]

Alexandru sent this patch over a year and a half ago, and I believe several
tree's have been carrying it since. We've been using this patch on an
Olimex OLinuxIno Lime1 and Lime2 using the mmc-spi driver to access SD cards
without problems. So bumping this and adding my

Tested-by: Olliver Schinagl <oliver@schinagl.nl>

Changes from v5as warned by checkpatch. No functional changes.
 * Added some newlines to make checkpatch happy. No functional changes.

Changes from v4:
 * use min3() instead of two if statements in sun4i_spi_fill_fifo()
 * fix trivial whitespace issue in if statement in sun4i_spi_handler()
 * use consistent style in assigning 'reg' in the added functions.

Alexandru Gagniuc (1):
  ARM: sun4i: spi: Allow transfers larger than FIFO size

 drivers/spi/spi-sun4i.c | 76 +++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 67 insertions(+), 9 deletions(-)

-- 
2.1.4

[PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Olliver Schinagl]

Alexandru sent this patch over a year and a half ago, and I believe several
tree's have been carrying it since. We've been using this patch on an
Olimex OLinuxIno Lime1 and Lime2 using the mmc-spi driver to access SD cards
without problems. So bumping this and adding my

Tested-by: Olliver Schinagl <oliver@schinagl.nl>

Changes from v5as warned by checkpatch. No functional changes.
 * Added some newlines to make checkpatch happy. No functional changes.

Changes from v4:
 * use min3() instead of two if statements in sun4i_spi_fill_fifo()
 * fix trivial whitespace issue in if statement in sun4i_spi_handler()
 * use consistent style in assigning 'reg' in the added functions.

Alexandru Gagniuc (1):
  ARM: sun4i: spi: Allow transfers larger than FIFO size

 drivers/spi/spi-sun4i.c | 76 +++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 67 insertions(+), 9 deletions(-)

-- 
2.1.4

[PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Olliver Schinagl]

Alexandru sent this patch over a year and a half ago, and I believe several
tree's have been carrying it since. We've been using this patch on an
Olimex OLinuxIno Lime1 and Lime2 using the mmc-spi driver to access SD cards
without problems. So bumping this and adding my

Tested-by: Olliver Schinagl <oliver-dxLnbx3+1qmEVqv0pETR8A@public.gmane.org>

Changes from v5as warned by checkpatch. No functional changes.
 * Added some newlines to make checkpatch happy. No functional changes.

Changes from v4:
 * use min3() instead of two if statements in sun4i_spi_fill_fifo()
 * fix trivial whitespace issue in if statement in sun4i_spi_handler()
 * use consistent style in assigning 'reg' in the added functions.

Alexandru Gagniuc (1):
  ARM: sun4i: spi: Allow transfers larger than FIFO size

 drivers/spi/spi-sun4i.c | 76 +++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 67 insertions(+), 9 deletions(-)

-- 
2.1.4

[PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Olliver Schinagl]

From: Alexandru Gagniuc <mr.nuke.me@gmail.com>

SPI transfers were limited to one FIFO depth, which is 64 bytes.
This was an artificial limitation, however, as the hardware can handle
much larger bursts. To accommodate this, we enable the interrupt when
the Rx FIFO is 3/4 full, and drain the FIFO within the interrupt
handler. The 3/4 ratio was chosen arbitrarily, with the intention to
reduce the potential number of interrupts.

Since the SUN4I_CTL_TP bit is set, the hardware will pause
transmission whenever the FIFO is full, so there is no risk of losing
data if we can't service the interrupt in time.

For the Tx side, enable and use the Tx FIFO 3/4 empty interrupt to
replenish the FIFO on large SPI bursts. This requires more care in
when the interrupt is left enabled, as this interrupt will continually
trigger when the FIFO is less than 1/4 full, even though we
acknowledge it.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Olliver Schinagl <o.schinagl@ultimaker.com>
---
 drivers/spi/spi-sun4i.c | 76 +++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 67 insertions(+), 9 deletions(-)

diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c
index fbb0a4d..9a30e49 100644
--- a/drivers/spi/spi-sun4i.c
+++ b/drivers/spi/spi-sun4i.c
@@ -46,6 +46,8 @@
 #define SUN4I_CTL_TP				BIT(18)
 
 #define SUN4I_INT_CTL_REG		0x0c
+#define SUN4I_INT_CTL_RF_F34			BIT(4)
+#define SUN4I_INT_CTL_TF_E34			BIT(12)
 #define SUN4I_INT_CTL_TC			BIT(16)
 
 #define SUN4I_INT_STA_REG		0x10
@@ -61,11 +63,14 @@
 #define SUN4I_CLK_CTL_CDR1(div)			(((div) & SUN4I_CLK_CTL_CDR1_MASK) << 8)
 #define SUN4I_CLK_CTL_DRS			BIT(12)
 
+#define SUN4I_MAX_XFER_SIZE			0xffffff
+
 #define SUN4I_BURST_CNT_REG		0x20
-#define SUN4I_BURST_CNT(cnt)			((cnt) & 0xffffff)
+#define SUN4I_BURST_CNT(cnt)			((cnt) & SUN4I_MAX_XFER_SIZE)
 
 #define SUN4I_XMIT_CNT_REG		0x24
-#define SUN4I_XMIT_CNT(cnt)			((cnt) & 0xffffff)
+#define SUN4I_XMIT_CNT(cnt)			((cnt) & SUN4I_MAX_XFER_SIZE)
+
 
 #define SUN4I_FIFO_STA_REG		0x28
 #define SUN4I_FIFO_STA_RF_CNT_MASK		0x7f
@@ -96,6 +101,31 @@ static inline void sun4i_spi_write(struct sun4i_spi *sspi, u32 reg, u32 value)
 	writel(value, sspi->base_addr + reg);
 }
 
+static inline u32 sun4i_spi_get_tx_fifo_count(struct sun4i_spi *sspi)
+{
+	u32 reg = sun4i_spi_read(sspi, SUN4I_FIFO_STA_REG);
+
+	reg >>= SUN4I_FIFO_STA_TF_CNT_BITS;
+
+	return reg & SUN4I_FIFO_STA_TF_CNT_MASK;
+}
+
+static inline void sun4i_spi_enable_interrupt(struct sun4i_spi *sspi, u32 mask)
+{
+	u32 reg = sun4i_spi_read(sspi, SUN4I_INT_CTL_REG);
+
+	reg |= mask;
+	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, reg);
+}
+
+static inline void sun4i_spi_disable_interrupt(struct sun4i_spi *sspi, u32 mask)
+{
+	u32 reg = sun4i_spi_read(sspi, SUN4I_INT_CTL_REG);
+
+	reg &= ~mask;
+	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, reg);
+}
+
 static inline void sun4i_spi_drain_fifo(struct sun4i_spi *sspi, int len)
 {
 	u32 reg, cnt;
@@ -118,10 +148,13 @@ static inline void sun4i_spi_drain_fifo(struct sun4i_spi *sspi, int len)
 
 static inline void sun4i_spi_fill_fifo(struct sun4i_spi *sspi, int len)
 {
+	u32 cnt;
 	u8 byte;
 
-	if (len > sspi->len)
-		len = sspi->len;
+	/* See how much data we can fit */
+	cnt = SUN4I_FIFO_DEPTH - sun4i_spi_get_tx_fifo_count(sspi);
+
+	len = min3(len, (int)cnt, sspi->len);
 
 	while (len--) {
 		byte = sspi->tx_buf ? *sspi->tx_buf++ : 0;
@@ -174,8 +207,8 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 	int ret = 0;
 	u32 reg;
 
-	/* We don't support transfer larger than the FIFO */
-	if (tfr->len > SUN4I_FIFO_DEPTH)
+	/* This is the maximum SPI burst size supported by the hardware */
+	if (tfr->len > SUN4I_MAX_XFER_SIZE)
 		return -EINVAL;
 
 	reinit_completion(&sspi->done);
@@ -273,7 +306,11 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 	sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH);
 
 	/* Enable the interrupts */
-	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, SUN4I_INT_CTL_TC);
+	sun4i_spi_enable_interrupt(sspi, SUN4I_INT_CTL_TC |
+					 SUN4I_INT_CTL_RF_F34);
+	/* Only enable Tx FIFO interrupt if we really need it */
+	if (tx_len > SUN4I_FIFO_DEPTH)
+		sun4i_spi_enable_interrupt(sspi, SUN4I_INT_CTL_TF_E34);
 
 	/* Start the transfer */
 	reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
@@ -286,8 +323,6 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 		goto out;
 	}
 
-	sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH);
-
 out:
 	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, 0);
 
@@ -302,10 +337,33 @@ static irqreturn_t sun4i_spi_handler(int irq, void *dev_id)
 	/* Transfer complete */
 	if (status & SUN4I_INT_CTL_TC) {
 		sun4i_spi_write(sspi, SUN4I_INT_STA_REG, SUN4I_INT_CTL_TC);
+		sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH);
 		complete(&sspi->done);
 		return IRQ_HANDLED;
 	}
 
+	/* Receive FIFO 3/4 full */
+	if (status & SUN4I_INT_CTL_RF_F34) {
+		sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH);
+		/* Only clear the interrupt _after_ draining the FIFO */
+		sun4i_spi_write(sspi, SUN4I_INT_STA_REG, SUN4I_INT_CTL_RF_F34);
+		return IRQ_HANDLED;
+	}
+
+	/* Transmit FIFO 3/4 empty */
+	if (status & SUN4I_INT_CTL_TF_E34) {
+		sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH);
+
+		if (!sspi->len)
+			/* nothing left to transmit */
+			sun4i_spi_disable_interrupt(sspi, SUN4I_INT_CTL_TF_E34);
+
+		/* Only clear the interrupt _after_ re-seeding the FIFO */
+		sun4i_spi_write(sspi, SUN4I_INT_STA_REG, SUN4I_INT_CTL_TF_E34);
+
+		return IRQ_HANDLED;
+	}
+
 	return IRQ_NONE;
 }
 
-- 
2.1.4

[PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Olliver Schinagl]

From: Alexandru Gagniuc <mr.nuke.me@gmail.com>

SPI transfers were limited to one FIFO depth, which is 64 bytes.
This was an artificial limitation, however, as the hardware can handle
much larger bursts. To accommodate this, we enable the interrupt when
the Rx FIFO is 3/4 full, and drain the FIFO within the interrupt
handler. The 3/4 ratio was chosen arbitrarily, with the intention to
reduce the potential number of interrupts.

Since the SUN4I_CTL_TP bit is set, the hardware will pause
transmission whenever the FIFO is full, so there is no risk of losing
data if we can't service the interrupt in time.

For the Tx side, enable and use the Tx FIFO 3/4 empty interrupt to
replenish the FIFO on large SPI bursts. This requires more care in
when the interrupt is left enabled, as this interrupt will continually
trigger when the FIFO is less than 1/4 full, even though we
acknowledge it.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Olliver Schinagl <o.schinagl@ultimaker.com>
---
 drivers/spi/spi-sun4i.c | 76 +++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 67 insertions(+), 9 deletions(-)

diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c
index fbb0a4d..9a30e49 100644
--- a/drivers/spi/spi-sun4i.c
+++ b/drivers/spi/spi-sun4i.c
@@ -46,6 +46,8 @@
 #define SUN4I_CTL_TP				BIT(18)
 
 #define SUN4I_INT_CTL_REG		0x0c
+#define SUN4I_INT_CTL_RF_F34			BIT(4)
+#define SUN4I_INT_CTL_TF_E34			BIT(12)
 #define SUN4I_INT_CTL_TC			BIT(16)
 
 #define SUN4I_INT_STA_REG		0x10
@@ -61,11 +63,14 @@
 #define SUN4I_CLK_CTL_CDR1(div)			(((div) & SUN4I_CLK_CTL_CDR1_MASK) << 8)
 #define SUN4I_CLK_CTL_DRS			BIT(12)
 
+#define SUN4I_MAX_XFER_SIZE			0xffffff
+
 #define SUN4I_BURST_CNT_REG		0x20
-#define SUN4I_BURST_CNT(cnt)			((cnt) & 0xffffff)
+#define SUN4I_BURST_CNT(cnt)			((cnt) & SUN4I_MAX_XFER_SIZE)
 
 #define SUN4I_XMIT_CNT_REG		0x24
-#define SUN4I_XMIT_CNT(cnt)			((cnt) & 0xffffff)
+#define SUN4I_XMIT_CNT(cnt)			((cnt) & SUN4I_MAX_XFER_SIZE)
+
 
 #define SUN4I_FIFO_STA_REG		0x28
 #define SUN4I_FIFO_STA_RF_CNT_MASK		0x7f
@@ -96,6 +101,31 @@ static inline void sun4i_spi_write(struct sun4i_spi *sspi, u32 reg, u32 value)
 	writel(value, sspi->base_addr + reg);
 }
 
+static inline u32 sun4i_spi_get_tx_fifo_count(struct sun4i_spi *sspi)
+{
+	u32 reg = sun4i_spi_read(sspi, SUN4I_FIFO_STA_REG);
+
+	reg >>= SUN4I_FIFO_STA_TF_CNT_BITS;
+
+	return reg & SUN4I_FIFO_STA_TF_CNT_MASK;
+}
+
+static inline void sun4i_spi_enable_interrupt(struct sun4i_spi *sspi, u32 mask)
+{
+	u32 reg = sun4i_spi_read(sspi, SUN4I_INT_CTL_REG);
+
+	reg |= mask;
+	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, reg);
+}
+
+static inline void sun4i_spi_disable_interrupt(struct sun4i_spi *sspi, u32 mask)
+{
+	u32 reg = sun4i_spi_read(sspi, SUN4I_INT_CTL_REG);
+
+	reg &= ~mask;
+	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, reg);
+}
+
 static inline void sun4i_spi_drain_fifo(struct sun4i_spi *sspi, int len)
 {
 	u32 reg, cnt;
@@ -118,10 +148,13 @@ static inline void sun4i_spi_drain_fifo(struct sun4i_spi *sspi, int len)
 
 static inline void sun4i_spi_fill_fifo(struct sun4i_spi *sspi, int len)
 {
+	u32 cnt;
 	u8 byte;
 
-	if (len > sspi->len)
-		len = sspi->len;
+	/* See how much data we can fit */
+	cnt = SUN4I_FIFO_DEPTH - sun4i_spi_get_tx_fifo_count(sspi);
+
+	len = min3(len, (int)cnt, sspi->len);
 
 	while (len--) {
 		byte = sspi->tx_buf ? *sspi->tx_buf++ : 0;
@@ -174,8 +207,8 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 	int ret = 0;
 	u32 reg;
 
-	/* We don't support transfer larger than the FIFO */
-	if (tfr->len > SUN4I_FIFO_DEPTH)
+	/* This is the maximum SPI burst size supported by the hardware */
+	if (tfr->len > SUN4I_MAX_XFER_SIZE)
 		return -EINVAL;
 
 	reinit_completion(&sspi->done);
@@ -273,7 +306,11 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 	sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH);
 
 	/* Enable the interrupts */
-	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, SUN4I_INT_CTL_TC);
+	sun4i_spi_enable_interrupt(sspi, SUN4I_INT_CTL_TC |
+					 SUN4I_INT_CTL_RF_F34);
+	/* Only enable Tx FIFO interrupt if we really need it */
+	if (tx_len > SUN4I_FIFO_DEPTH)
+		sun4i_spi_enable_interrupt(sspi, SUN4I_INT_CTL_TF_E34);
 
 	/* Start the transfer */
 	reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
@@ -286,8 +323,6 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 		goto out;
 	}
 
-	sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH);
-
 out:
 	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, 0);
 
@@ -302,10 +337,33 @@ static irqreturn_t sun4i_spi_handler(int irq, void *dev_id)
 	/* Transfer complete */
 	if (status & SUN4I_INT_CTL_TC) {
 		sun4i_spi_write(sspi, SUN4I_INT_STA_REG, SUN4I_INT_CTL_TC);
+		sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH);
 		complete(&sspi->done);
 		return IRQ_HANDLED;
 	}
 
+	/* Receive FIFO 3/4 full */
+	if (status & SUN4I_INT_CTL_RF_F34) {
+		sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH);
+		/* Only clear the interrupt _after_ draining the FIFO */
+		sun4i_spi_write(sspi, SUN4I_INT_STA_REG, SUN4I_INT_CTL_RF_F34);
+		return IRQ_HANDLED;
+	}
+
+	/* Transmit FIFO 3/4 empty */
+	if (status & SUN4I_INT_CTL_TF_E34) {
+		sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH);
+
+		if (!sspi->len)
+			/* nothing left to transmit */
+			sun4i_spi_disable_interrupt(sspi, SUN4I_INT_CTL_TF_E34);
+
+		/* Only clear the interrupt _after_ re-seeding the FIFO */
+		sun4i_spi_write(sspi, SUN4I_INT_STA_REG, SUN4I_INT_CTL_TF_E34);
+
+		return IRQ_HANDLED;
+	}
+
 	return IRQ_NONE;
 }
 
-- 
2.1.4

[PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Olliver Schinagl]

From: Alexandru Gagniuc <mr.nuke.me-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

SPI transfers were limited to one FIFO depth, which is 64 bytes.
This was an artificial limitation, however, as the hardware can handle
much larger bursts. To accommodate this, we enable the interrupt when
the Rx FIFO is 3/4 full, and drain the FIFO within the interrupt
handler. The 3/4 ratio was chosen arbitrarily, with the intention to
reduce the potential number of interrupts.

Since the SUN4I_CTL_TP bit is set, the hardware will pause
transmission whenever the FIFO is full, so there is no risk of losing
data if we can't service the interrupt in time.

For the Tx side, enable and use the Tx FIFO 3/4 empty interrupt to
replenish the FIFO on large SPI bursts. This requires more care in
when the interrupt is left enabled, as this interrupt will continually
trigger when the FIFO is less than 1/4 full, even though we
acknowledge it.

Signed-off-by: Alexandru Gagniuc <mr.nuke.me-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Acked-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Signed-off-by: Olliver Schinagl <o.schinagl-U3FVU11NWA554TAoqtyWWQ@public.gmane.org>
---
 drivers/spi/spi-sun4i.c | 76 +++++++++++++++++++++++++++++++++++++++++++------
 1 file changed, 67 insertions(+), 9 deletions(-)

diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c
index fbb0a4d..9a30e49 100644
--- a/drivers/spi/spi-sun4i.c
+++ b/drivers/spi/spi-sun4i.c
@@ -46,6 +46,8 @@
 #define SUN4I_CTL_TP				BIT(18)
 
 #define SUN4I_INT_CTL_REG		0x0c
+#define SUN4I_INT_CTL_RF_F34			BIT(4)
+#define SUN4I_INT_CTL_TF_E34			BIT(12)
 #define SUN4I_INT_CTL_TC			BIT(16)
 
 #define SUN4I_INT_STA_REG		0x10
@@ -61,11 +63,14 @@
 #define SUN4I_CLK_CTL_CDR1(div)			(((div) & SUN4I_CLK_CTL_CDR1_MASK) << 8)
 #define SUN4I_CLK_CTL_DRS			BIT(12)
 
+#define SUN4I_MAX_XFER_SIZE			0xffffff
+
 #define SUN4I_BURST_CNT_REG		0x20
-#define SUN4I_BURST_CNT(cnt)			((cnt) & 0xffffff)
+#define SUN4I_BURST_CNT(cnt)			((cnt) & SUN4I_MAX_XFER_SIZE)
 
 #define SUN4I_XMIT_CNT_REG		0x24
-#define SUN4I_XMIT_CNT(cnt)			((cnt) & 0xffffff)
+#define SUN4I_XMIT_CNT(cnt)			((cnt) & SUN4I_MAX_XFER_SIZE)
+
 
 #define SUN4I_FIFO_STA_REG		0x28
 #define SUN4I_FIFO_STA_RF_CNT_MASK		0x7f
@@ -96,6 +101,31 @@ static inline void sun4i_spi_write(struct sun4i_spi *sspi, u32 reg, u32 value)
 	writel(value, sspi->base_addr + reg);
 }
 
+static inline u32 sun4i_spi_get_tx_fifo_count(struct sun4i_spi *sspi)
+{
+	u32 reg = sun4i_spi_read(sspi, SUN4I_FIFO_STA_REG);
+
+	reg >>= SUN4I_FIFO_STA_TF_CNT_BITS;
+
+	return reg & SUN4I_FIFO_STA_TF_CNT_MASK;
+}
+
+static inline void sun4i_spi_enable_interrupt(struct sun4i_spi *sspi, u32 mask)
+{
+	u32 reg = sun4i_spi_read(sspi, SUN4I_INT_CTL_REG);
+
+	reg |= mask;
+	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, reg);
+}
+
+static inline void sun4i_spi_disable_interrupt(struct sun4i_spi *sspi, u32 mask)
+{
+	u32 reg = sun4i_spi_read(sspi, SUN4I_INT_CTL_REG);
+
+	reg &= ~mask;
+	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, reg);
+}
+
 static inline void sun4i_spi_drain_fifo(struct sun4i_spi *sspi, int len)
 {
 	u32 reg, cnt;
@@ -118,10 +148,13 @@ static inline void sun4i_spi_drain_fifo(struct sun4i_spi *sspi, int len)
 
 static inline void sun4i_spi_fill_fifo(struct sun4i_spi *sspi, int len)
 {
+	u32 cnt;
 	u8 byte;
 
-	if (len > sspi->len)
-		len = sspi->len;
+	/* See how much data we can fit */
+	cnt = SUN4I_FIFO_DEPTH - sun4i_spi_get_tx_fifo_count(sspi);
+
+	len = min3(len, (int)cnt, sspi->len);
 
 	while (len--) {
 		byte = sspi->tx_buf ? *sspi->tx_buf++ : 0;
@@ -174,8 +207,8 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 	int ret = 0;
 	u32 reg;
 
-	/* We don't support transfer larger than the FIFO */
-	if (tfr->len > SUN4I_FIFO_DEPTH)
+	/* This is the maximum SPI burst size supported by the hardware */
+	if (tfr->len > SUN4I_MAX_XFER_SIZE)
 		return -EINVAL;
 
 	reinit_completion(&sspi->done);
@@ -273,7 +306,11 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 	sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH);
 
 	/* Enable the interrupts */
-	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, SUN4I_INT_CTL_TC);
+	sun4i_spi_enable_interrupt(sspi, SUN4I_INT_CTL_TC |
+					 SUN4I_INT_CTL_RF_F34);
+	/* Only enable Tx FIFO interrupt if we really need it */
+	if (tx_len > SUN4I_FIFO_DEPTH)
+		sun4i_spi_enable_interrupt(sspi, SUN4I_INT_CTL_TF_E34);
 
 	/* Start the transfer */
 	reg = sun4i_spi_read(sspi, SUN4I_CTL_REG);
@@ -286,8 +323,6 @@ static int sun4i_spi_transfer_one(struct spi_master *master,
 		goto out;
 	}
 
-	sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH);
-
 out:
 	sun4i_spi_write(sspi, SUN4I_INT_CTL_REG, 0);
 
@@ -302,10 +337,33 @@ static irqreturn_t sun4i_spi_handler(int irq, void *dev_id)
 	/* Transfer complete */
 	if (status & SUN4I_INT_CTL_TC) {
 		sun4i_spi_write(sspi, SUN4I_INT_STA_REG, SUN4I_INT_CTL_TC);
+		sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH);
 		complete(&sspi->done);
 		return IRQ_HANDLED;
 	}
 
+	/* Receive FIFO 3/4 full */
+	if (status & SUN4I_INT_CTL_RF_F34) {
+		sun4i_spi_drain_fifo(sspi, SUN4I_FIFO_DEPTH);
+		/* Only clear the interrupt _after_ draining the FIFO */
+		sun4i_spi_write(sspi, SUN4I_INT_STA_REG, SUN4I_INT_CTL_RF_F34);
+		return IRQ_HANDLED;
+	}
+
+	/* Transmit FIFO 3/4 empty */
+	if (status & SUN4I_INT_CTL_TF_E34) {
+		sun4i_spi_fill_fifo(sspi, SUN4I_FIFO_DEPTH);
+
+		if (!sspi->len)
+			/* nothing left to transmit */
+			sun4i_spi_disable_interrupt(sspi, SUN4I_INT_CTL_TF_E34);
+
+		/* Only clear the interrupt _after_ re-seeding the FIFO */
+		sun4i_spi_write(sspi, SUN4I_INT_STA_REG, SUN4I_INT_CTL_TF_E34);
+
+		return IRQ_HANDLED;
+	}
+
 	return IRQ_NONE;
 }
 
-- 
2.1.4

Re: [PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Michael Weiser]

Hi all,

On Sat, Aug 08, 2015 at 09:41:51PM +0200, Olliver Schinagl wrote:

> Alexandru sent this patch over a year and a half ago, and I believe several
> tree's have been carrying it since. We've been using this patch on an
> Olimex OLinuxIno Lime1 and Lime2 using the mmc-spi driver to access SD cards
> without problems. So bumping this and adding my

I also have a need for this addition since it makes an ENC28J60 SPI
ethernet controller work on the Cubieboard2. I've successfully tested it
with 4.6.3 where it still applies cleanly.

(There's is a very minor conflict when applying against current Linus
master (EINVAL was changed to EMSGSIZE). I can supply a rebased version
if so desired.)

What is keeping the patch from being merged (i.e. into mainline)?

Thanks!
Michael

> Tested-by: Olliver Schinagl <oliver@schinagl.nl>

Tested-by: Michael Weiser <michael.weiser@gmx.de>

> Changes from v5as warned by checkpatch. No functional changes.
>  * Added some newlines to make checkpatch happy. No functional changes.

> Changes from v4:
>  * use min3() instead of two if statements in sun4i_spi_fill_fifo()
>  * fix trivial whitespace issue in if statement in sun4i_spi_handler()
>  * use consistent style in assigning 'reg' in the added functions.

> Alexandru Gagniuc (1):
>   ARM: sun4i: spi: Allow transfers larger than FIFO size

>  drivers/spi/spi-sun4i.c | 76 +++++++++++++++++++++++++++++++++++++++++++------
>  1 file changed, 67 insertions(+), 9 deletions(-)
-- 
Thanks,
Michael

[PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Michael Weiser]

Hi all,

On Sat, Aug 08, 2015 at 09:41:51PM +0200, Olliver Schinagl wrote:

> Alexandru sent this patch over a year and a half ago, and I believe several
> tree's have been carrying it since. We've been using this patch on an
> Olimex OLinuxIno Lime1 and Lime2 using the mmc-spi driver to access SD cards
> without problems. So bumping this and adding my

I also have a need for this addition since it makes an ENC28J60 SPI
ethernet controller work on the Cubieboard2. I've successfully tested it
with 4.6.3 where it still applies cleanly.

(There's is a very minor conflict when applying against current Linus
master (EINVAL was changed to EMSGSIZE). I can supply a rebased version
if so desired.)

What is keeping the patch from being merged (i.e. into mainline)?

Thanks!
Michael

> Tested-by: Olliver Schinagl <oliver@schinagl.nl>

Tested-by: Michael Weiser <michael.weiser@gmx.de>

> Changes from v5as warned by checkpatch. No functional changes.
>  * Added some newlines to make checkpatch happy. No functional changes.

> Changes from v4:
>  * use min3() instead of two if statements in sun4i_spi_fill_fifo()
>  * fix trivial whitespace issue in if statement in sun4i_spi_handler()
>  * use consistent style in assigning 'reg' in the added functions.

> Alexandru Gagniuc (1):
>   ARM: sun4i: spi: Allow transfers larger than FIFO size

>  drivers/spi/spi-sun4i.c | 76 +++++++++++++++++++++++++++++++++++++++++++------
>  1 file changed, 67 insertions(+), 9 deletions(-)
-- 
Thanks,
Michael

Re: [PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Michael Weiser]

Hi all,

On Sat, Aug 08, 2015 at 09:41:51PM +0200, Olliver Schinagl wrote:

> Alexandru sent this patch over a year and a half ago, and I believe several
> tree's have been carrying it since. We've been using this patch on an
> Olimex OLinuxIno Lime1 and Lime2 using the mmc-spi driver to access SD cards
> without problems. So bumping this and adding my

I also have a need for this addition since it makes an ENC28J60 SPI
ethernet controller work on the Cubieboard2. I've successfully tested it
with 4.6.3 where it still applies cleanly.

(There's is a very minor conflict when applying against current Linus
master (EINVAL was changed to EMSGSIZE). I can supply a rebased version
if so desired.)

What is keeping the patch from being merged (i.e. into mainline)?

Thanks!
Michael

> Tested-by: Olliver Schinagl <oliver@schinagl.nl>

Tested-by: Michael Weiser <michael.weiser@gmx.de>

> Changes from v5as warned by checkpatch. No functional changes.
>  * Added some newlines to make checkpatch happy. No functional changes.

> Changes from v4:
>  * use min3() instead of two if statements in sun4i_spi_fill_fifo()
>  * fix trivial whitespace issue in if statement in sun4i_spi_handler()
>  * use consistent style in assigning 'reg' in the added functions.

> Alexandru Gagniuc (1):
>   ARM: sun4i: spi: Allow transfers larger than FIFO size

>  drivers/spi/spi-sun4i.c | 76 +++++++++++++++++++++++++++++++++++++++++++------
>  1 file changed, 67 insertions(+), 9 deletions(-)
-- 
Thanks,
Michael

Re: [PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 230 bytes --]

On Thu, Jul 21, 2016 at 01:27:01PM +0200, Michael Weiser wrote:

> What is keeping the patch from being merged (i.e. into mainline)?

Someone needs to address whatever review comments there were on the last
version and submit it.

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[PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Mark Brown]

On Thu, Jul 21, 2016 at 01:27:01PM +0200, Michael Weiser wrote:

> What is keeping the patch from being merged (i.e. into mainline)?

Someone needs to address whatever review comments there were on the last
version and submit it.
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Re: [PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 230 bytes --]

On Thu, Jul 21, 2016 at 01:27:01PM +0200, Michael Weiser wrote:

> What is keeping the patch from being merged (i.e. into mainline)?

Someone needs to address whatever review comments there were on the last
version and submit it.

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Re: [PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Michael Weiser]

Hi Mark,

On Thu, Jul 21, 2016 at 05:31:53PM +0100, Mark Brown wrote:

> > What is keeping the patch from being merged (i.e. into mainline)?
> Someone needs to address whatever review comments there were on the last
> version and submit it.

That's my point: There don't seem to be any.

v6 was resend with fixes to checkpatch niggles on v5:
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-August/363073.html

v5 addressed comments by Maxime on v4:
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-April/244305.html
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-March/243995.html

I can't find any comments on v5 or v6.
-- 
Thanks,
Michael

[PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Michael Weiser]

Hi Mark,

On Thu, Jul 21, 2016 at 05:31:53PM +0100, Mark Brown wrote:

> > What is keeping the patch from being merged (i.e. into mainline)?
> Someone needs to address whatever review comments there were on the last
> version and submit it.

That's my point: There don't seem to be any.

v6 was resend with fixes to checkpatch niggles on v5:
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-August/363073.html

v5 addressed comments by Maxime on v4:
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-April/244305.html
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-March/243995.html

I can't find any comments on v5 or v6.
-- 
Thanks,
Michael

Re: [PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Michael Weiser]

Hi Mark,

On Thu, Jul 21, 2016 at 05:31:53PM +0100, Mark Brown wrote:

> > What is keeping the patch from being merged (i.e. into mainline)?
> Someone needs to address whatever review comments there were on the last
> version and submit it.

That's my point: There don't seem to be any.

v6 was resend with fixes to checkpatch niggles on v5:
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-August/363073.html

v5 addressed comments by Maxime on v4:
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-April/244305.html
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-March/243995.html

I can't find any comments on v5 or v6.
-- 
Thanks,
Michael

Re: [PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Olliver Schinagl]

[-- Attachment #1: Type: text/plain, Size: 1307 bytes --]

As i recall, some claimed it was needed as we have dma now, but i think this patch still scratches the same itch ...

On July 21, 2016 7:27:12 PM CEST, Michael Weiser <michael.weiser-Mmb7MZpHnFY@public.gmane.org> wrote:
>Hi Mark,
>
>On Thu, Jul 21, 2016 at 05:31:53PM +0100, Mark Brown wrote:
>
>> > What is keeping the patch from being merged (i.e. into mainline)?
>> Someone needs to address whatever review comments there were on the
>last
>> version and submit it.
>
>That's my point: There don't seem to be any.
>
>v6 was resend with fixes to checkpatch niggles on v5:
>http://lists.infradead.org/pipermail/linux-arm-kernel/2015-August/363073.html
>
>v5 addressed comments by Maxime on v4:
>http://lists.infradead.org/pipermail/linux-arm-kernel/2014-April/244305.html
>http://lists.infradead.org/pipermail/linux-arm-kernel/2014-March/243995.html
>
>I can't find any comments on v5 or v6.
>-- 
>Thanks,
>Michael

-- 
Sent from my Android device with K-9 Mail. Please excuse my brevity.

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Re: [PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 601 bytes --]

On Thu, Jul 21, 2016 at 08:03:16PM +0200, Olliver Schinagl wrote:
> As i recall, some claimed it was needed as we have dma now, but i think this patch still scratches the same itch ...

Please don't top post, reply in line with needed context.  This allows
readers to readily follow the flow of conversation and understand what
you are talking about and also helps ensure that everything in the
discussion is being addressed.

Please fix your mail client to word wrap within paragraphs at something
substantially less than 80 columns.  Doing this makes your messages much
easier to read and reply to.

[-- Attachment #2: signature.asc --]
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[PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Mark Brown]

On Thu, Jul 21, 2016 at 08:03:16PM +0200, Olliver Schinagl wrote:
> As i recall, some claimed it was needed as we have dma now, but i think this patch still scratches the same itch ...

Please don't top post, reply in line with needed context.  This allows
readers to readily follow the flow of conversation and understand what
you are talking about and also helps ensure that everything in the
discussion is being addressed.

Please fix your mail client to word wrap within paragraphs at something
substantially less than 80 columns.  Doing this makes your messages much
easier to read and reply to.
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Re: [PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 601 bytes --]

On Thu, Jul 21, 2016 at 08:03:16PM +0200, Olliver Schinagl wrote:
> As i recall, some claimed it was needed as we have dma now, but i think this patch still scratches the same itch ...

Please don't top post, reply in line with needed context.  This allows
readers to readily follow the flow of conversation and understand what
you are talking about and also helps ensure that everything in the
discussion is being addressed.

Please fix your mail client to word wrap within paragraphs at something
substantially less than 80 columns.  Doing this makes your messages much
easier to read and reply to.

[-- Attachment #2: signature.asc --]
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Re: [PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 696 bytes --]

On Thu, Jul 21, 2016 at 07:27:12PM +0200, Michael Weiser wrote:
> On Thu, Jul 21, 2016 at 05:31:53PM +0100, Mark Brown wrote:

> > > What is keeping the patch from being merged (i.e. into mainline)?
> > Someone needs to address whatever review comments there were on the last
> > version and submit it.

> That's my point: There don't seem to be any.

> v6 was resend with fixes to checkpatch niggles on v5:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-August/363073.html

I can't tell if that was even submitted, it's got a subject line of
"ARM: sun4i" so there's every chance that even if it was sent to me it
got deleted unread.  Whatever was going on it needs to be submited.

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[PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Mark Brown]

On Thu, Jul 21, 2016 at 07:27:12PM +0200, Michael Weiser wrote:
> On Thu, Jul 21, 2016 at 05:31:53PM +0100, Mark Brown wrote:

> > > What is keeping the patch from being merged (i.e. into mainline)?
> > Someone needs to address whatever review comments there were on the last
> > version and submit it.

> That's my point: There don't seem to be any.

> v6 was resend with fixes to checkpatch niggles on v5:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-August/363073.html

I can't tell if that was even submitted, it's got a subject line of
"ARM: sun4i" so there's every chance that even if it was sent to me it
got deleted unread.  Whatever was going on it needs to be submited.
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Re: [PATCH v6] ARM: sun4i: spi: Allow transfers larger than FIFO size

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 695 bytes --]

On Thu, Jul 21, 2016 at 07:27:12PM +0200, Michael Weiser wrote:
> On Thu, Jul 21, 2016 at 05:31:53PM +0100, Mark Brown wrote:

> > > What is keeping the patch from being merged (i.e. into mainline)?
> > Someone needs to address whatever review comments there were on the last
> > version and submit it.

> That's my point: There don't seem to be any.

> v6 was resend with fixes to checkpatch niggles on v5:
> http://lists.infradead.org/pipermail/linux-arm-kernel/2015-August/363073.html

I can't tell if that was even submitted, it's got a subject line of
"ARM: sun4i" so there's every chance that even if it was sent to me it
got deleted unread.  Whatever was going on it needs to be submited.