From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37959) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTuTC-0003qa-Fv for qemu-devel@nongnu.org; Mon, 24 Aug 2015 12:19:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZTuT8-0003GL-No for qemu-devel@nongnu.org; Mon, 24 Aug 2015 12:19:38 -0400 Received: from mail-qg0-x231.google.com ([2607:f8b0:400d:c04::231]:36789) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZTuT8-0003Fw-KO for qemu-devel@nongnu.org; Mon, 24 Aug 2015 12:19:34 -0400 Received: by qgeb6 with SMTP id b6so89617684qge.3 for ; Mon, 24 Aug 2015 09:19:34 -0700 (PDT) Sender: Richard Henderson From: Richard Henderson Date: Mon, 24 Aug 2015 09:17:58 -0700 Message-Id: <1440433079-14458-33-git-send-email-rth@twiddle.net> In-Reply-To: <1440433079-14458-1-git-send-email-rth@twiddle.net> References: <1440433079-14458-1-git-send-email-rth@twiddle.net> Subject: [Qemu-devel] [PATCH v14 32/33] target-tilegx: Handle v1shli, v1shrui List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: walt@tilera.com, cmetcalf@ezchip.com, xili_gchen_5257@hotmail.com, peter.maydell@linaro.org Signed-off-by: Richard Henderson --- target-tilegx/translate.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index e922aee..e417c2a 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -1175,6 +1175,7 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, TCGv tsrca = load_gr(dc, srca); const char *mnemonic; TCGMemOp memop; + int i2, i3; switch (opext) { case OE(ADDI_OPCODE_Y0, 0, Y0): @@ -1369,10 +1370,23 @@ static TileExcp gen_rri_opcode(DisasContext *dc, unsigned opext, break; case OE_SH(V1SHLI, X0): case OE_SH(V1SHLI, X1): + i2 = imm & 7; + i3 = 0xff >> i2; + tcg_gen_andi_tl(tdest, tsrca, V1_IMM(i3)); + tcg_gen_shli_tl(tdest, tdest, i2); + mnemonic = "v1shli"; + break; case OE_SH(V1SHRSI, X0): case OE_SH(V1SHRSI, X1): + return TILEGX_EXCP_OPCODE_UNIMPLEMENTED; case OE_SH(V1SHRUI, X0): case OE_SH(V1SHRUI, X1): + i2 = imm & 7; + i3 = (0xff << i2) & 0xff; + tcg_gen_andi_tl(tdest, tsrca, V1_IMM(i3)); + tcg_gen_shri_tl(tdest, tdest, i2); + mnemonic = "v1shrui"; + break; case OE_SH(V2SHLI, X0): case OE_SH(V2SHLI, X1): case OE_SH(V2SHRSI, X0): -- 2.4.3