[PATCH 00/14] ARM: dts: apq8064 dt cleanups and additions

[PATCH 00/14] ARM: dts: apq8064 dt cleanups and additions

[Srinivas Kandagatla]

Hi Andy, 

Here are few cleanup and additions to the existing APQ8064 device tree.

Some of the patches are to do with princtrl cleanup which was always not
in the right place and some of the pinctrls were missing.
Other set of patches is to do with adding more devices like rtc rng
and pwr key for pmic 8921.
Last set of patches are related to pwrseq and SD card detect taking Stephens
comments into consideration.

Am resending John Stultz patch which was forgotten in the mailing list.

I have tested these patches on IFC6410.

Thanks,
srini

John Stultz (1):
  devicetree: Add hardware rng entry to qcom-apq8064.dtsi

Srinivas Kandagatla (13):
  ARM: dts: apq8064: remove redundant i2c pinctrl properties
  ARM: dts: ifc6410: remove unnecessary eeprom label
  ARM: dts: qs600: remove unnecessary eeprom label
  ARM: dts: apq8064: add pm8921 rtc
  ARM: dts: apq8064: add pm8921 pwrkey support
  ARM: dts: apq8064: Prefix the gsbi6 uart pins correctly
  ARM: dts: apq8064: add missing gsbi7 uart pinctrl
  ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart
  ARM: dts: qs600: Add missing pinctrl property for gsbi7 uart
  ARM: dts: ifc6410: Add pwrseq support for WLAN
  ARM: dts: qs600: add pwrseq support to WLAN
  ARM: dts: apq8064-ifc6410: add notify led support.
  ARM: dts: qs600: Add SD card detect support.

 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 48 ++++++++++++++++++++---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts  | 60 +++++++++++++++++++++++++----
 arch/arm/boot/dts/qcom-apq8064.dtsi         | 50 +++++++++++++++++++++++-
 3 files changed, 144 insertions(+), 14 deletions(-)

-- 
1.9.1

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[PATCH 00/14] ARM: dts: apq8064 dt cleanups and additions

[Srinivas Kandagatla]

Hi Andy, 

Here are few cleanup and additions to the existing APQ8064 device tree.

Some of the patches are to do with princtrl cleanup which was always not
in the right place and some of the pinctrls were missing.
Other set of patches is to do with adding more devices like rtc rng
and pwr key for pmic 8921.
Last set of patches are related to pwrseq and SD card detect taking Stephens
comments into consideration.

Am resending John Stultz patch which was forgotten in the mailing list.

I have tested these patches on IFC6410.

Thanks,
srini

John Stultz (1):
  devicetree: Add hardware rng entry to qcom-apq8064.dtsi

Srinivas Kandagatla (13):
  ARM: dts: apq8064: remove redundant i2c pinctrl properties
  ARM: dts: ifc6410: remove unnecessary eeprom label
  ARM: dts: qs600: remove unnecessary eeprom label
  ARM: dts: apq8064: add pm8921 rtc
  ARM: dts: apq8064: add pm8921 pwrkey support
  ARM: dts: apq8064: Prefix the gsbi6 uart pins correctly
  ARM: dts: apq8064: add missing gsbi7 uart pinctrl
  ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart
  ARM: dts: qs600: Add missing pinctrl property for gsbi7 uart
  ARM: dts: ifc6410: Add pwrseq support for WLAN
  ARM: dts: qs600: add pwrseq support to WLAN
  ARM: dts: apq8064-ifc6410: add notify led support.
  ARM: dts: qs600: Add SD card detect support.

 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 48 ++++++++++++++++++++---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts  | 60 +++++++++++++++++++++++++----
 arch/arm/boot/dts/qcom-apq8064.dtsi         | 50 +++++++++++++++++++++++-
 3 files changed, 144 insertions(+), 14 deletions(-)

-- 
1.9.1

[PATCH 00/14] ARM: dts: apq8064 dt cleanups and additions

[Srinivas Kandagatla]

Hi Andy, 

Here are few cleanup and additions to the existing APQ8064 device tree.

Some of the patches are to do with princtrl cleanup which was always not
in the right place and some of the pinctrls were missing.
Other set of patches is to do with adding more devices like rtc rng
and pwr key for pmic 8921.
Last set of patches are related to pwrseq and SD card detect taking Stephens
comments into consideration.

Am resending John Stultz patch which was forgotten in the mailing list.

I have tested these patches on IFC6410.

Thanks,
srini

John Stultz (1):
  devicetree: Add hardware rng entry to qcom-apq8064.dtsi

Srinivas Kandagatla (13):
  ARM: dts: apq8064: remove redundant i2c pinctrl properties
  ARM: dts: ifc6410: remove unnecessary eeprom label
  ARM: dts: qs600: remove unnecessary eeprom label
  ARM: dts: apq8064: add pm8921 rtc
  ARM: dts: apq8064: add pm8921 pwrkey support
  ARM: dts: apq8064: Prefix the gsbi6 uart pins correctly
  ARM: dts: apq8064: add missing gsbi7 uart pinctrl
  ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart
  ARM: dts: qs600: Add missing pinctrl property for gsbi7 uart
  ARM: dts: ifc6410: Add pwrseq support for WLAN
  ARM: dts: qs600: add pwrseq support to WLAN
  ARM: dts: apq8064-ifc6410: add notify led support.
  ARM: dts: qs600: Add SD card detect support.

 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 48 ++++++++++++++++++++---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts  | 60 +++++++++++++++++++++++++----
 arch/arm/boot/dts/qcom-apq8064.dtsi         | 50 +++++++++++++++++++++++-
 3 files changed, 144 insertions(+), 14 deletions(-)

-- 
1.9.1

[PATCH 01/14] ARM: dts: apq8064: remove redundant i2c pinctrl properties

[Srinivas Kandagatla]

This patch removes i2c pinctrl properties from board which which are now
mentioned in the SOC specific file. This will avoid redundant properties
across multiple board fiiles.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 11 -----------
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts  |  5 -----
 arch/arm/boot/dts/qcom-apq8064.dtsi         |  4 ++++
 3 files changed, 4 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 47c0282..80ab5b8 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -13,15 +13,6 @@
 	};
 
 	soc {
-		pinctrl@800000 {
-			i2c1_pins: i2c1 {
-				mux {
-					pins = "gpio20", "gpio21";
-					function = "gsbi1";
-				};
-			};
-		};
-
 		rpm@108000 {
 			regulators {
 				vin_lvs1_3_6-supply = <&pm8921_s4>;
@@ -96,8 +87,6 @@
 			i2c@12460000 {
 				status = "okay";
 				clock-frequency = <200000>;
-				pinctrl-0 = <&i2c1_pins>;
-				pinctrl-names = "default";
 
 				eeprom: eeprom@50 {
 					compatible = "24c02";
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index f3100da..b701f33 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -119,8 +119,6 @@
 			qcom,mode = <GSBI_PROT_I2C>;
 			i2c3: i2c@16280000 {
 				status = "okay";
-				pinctrl-0 = <&i2c3_pins>;
-				pinctrl-names = "default";
 			};
 		};
 
@@ -131,8 +129,6 @@
 			i2c@12460000 {
 				status = "okay";
 				clock-frequency = <200000>;
-				pinctrl-0 = <&i2c1_pins>;
-				pinctrl-names = "default";
 
 				eeprom: eeprom@52 {
 					compatible = "atmel,24c128";
@@ -148,7 +144,6 @@
 
 			serial@16540000 {
 				status = "ok";
-
 				pinctrl-names = "default";
 				pinctrl-0 = <&uart_pins>;
 			};
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index d2e94d6..53d5311 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -213,6 +213,8 @@
 
 			i2c1: i2c@12460000 {
 				compatible = "qcom,i2c-qup-v1.1.1";
+				pinctrl-0 = <&i2c1_pins>;
+				pinctrl-names = "default";
 				reg = <0x12460000 0x1000>;
 				interrupts = <0 194 IRQ_TYPE_NONE>;
 				clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
@@ -258,6 +260,8 @@
 			ranges;
 			i2c3: i2c@16280000 {
 				compatible = "qcom,i2c-qup-v1.1.1";
+				pinctrl-0 = <&i2c3_pins>;
+				pinctrl-names = "default";
 				reg = <0x16280000 0x1000>;
 				interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
 				clocks = <&gcc GSBI3_QUP_CLK>,
-- 
1.9.1

[PATCH 01/14] ARM: dts: apq8064: remove redundant i2c pinctrl properties

[Srinivas Kandagatla]

This patch removes i2c pinctrl properties from board which which are now
mentioned in the SOC specific file. This will avoid redundant properties
across multiple board fiiles.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 11 -----------
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts  |  5 -----
 arch/arm/boot/dts/qcom-apq8064.dtsi         |  4 ++++
 3 files changed, 4 insertions(+), 16 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 47c0282..80ab5b8 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -13,15 +13,6 @@
 	};
 
 	soc {
-		pinctrl at 800000 {
-			i2c1_pins: i2c1 {
-				mux {
-					pins = "gpio20", "gpio21";
-					function = "gsbi1";
-				};
-			};
-		};
-
 		rpm at 108000 {
 			regulators {
 				vin_lvs1_3_6-supply = <&pm8921_s4>;
@@ -96,8 +87,6 @@
 			i2c at 12460000 {
 				status = "okay";
 				clock-frequency = <200000>;
-				pinctrl-0 = <&i2c1_pins>;
-				pinctrl-names = "default";
 
 				eeprom: eeprom at 50 {
 					compatible = "24c02";
diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index f3100da..b701f33 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -119,8 +119,6 @@
 			qcom,mode = <GSBI_PROT_I2C>;
 			i2c3: i2c at 16280000 {
 				status = "okay";
-				pinctrl-0 = <&i2c3_pins>;
-				pinctrl-names = "default";
 			};
 		};
 
@@ -131,8 +129,6 @@
 			i2c at 12460000 {
 				status = "okay";
 				clock-frequency = <200000>;
-				pinctrl-0 = <&i2c1_pins>;
-				pinctrl-names = "default";
 
 				eeprom: eeprom at 52 {
 					compatible = "atmel,24c128";
@@ -148,7 +144,6 @@
 
 			serial at 16540000 {
 				status = "ok";
-
 				pinctrl-names = "default";
 				pinctrl-0 = <&uart_pins>;
 			};
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index d2e94d6..53d5311 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -213,6 +213,8 @@
 
 			i2c1: i2c at 12460000 {
 				compatible = "qcom,i2c-qup-v1.1.1";
+				pinctrl-0 = <&i2c1_pins>;
+				pinctrl-names = "default";
 				reg = <0x12460000 0x1000>;
 				interrupts = <0 194 IRQ_TYPE_NONE>;
 				clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
@@ -258,6 +260,8 @@
 			ranges;
 			i2c3: i2c at 16280000 {
 				compatible = "qcom,i2c-qup-v1.1.1";
+				pinctrl-0 = <&i2c3_pins>;
+				pinctrl-names = "default";
 				reg = <0x16280000 0x1000>;
 				interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
 				clocks = <&gcc GSBI3_QUP_CLK>,
-- 
1.9.1

[PATCH 02/14] ARM: dts: ifc6410: remove unnecessary eeprom label

[Srinivas Kandagatla]

This patch removes unnecessary eeprom label, which is not used
anywhere in the board file.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index b701f33..2ad2ab8 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -130,7 +130,7 @@
 				status = "okay";
 				clock-frequency = <200000>;
 
-				eeprom: eeprom@52 {
+				eeprom@52 {
 					compatible = "atmel,24c128";
 					reg = <0x52>;
 					pagesize = <32>;
-- 
1.9.1

[PATCH 02/14] ARM: dts: ifc6410: remove unnecessary eeprom label

[Srinivas Kandagatla]

This patch removes unnecessary eeprom label, which is not used
anywhere in the board file.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index b701f33..2ad2ab8 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -130,7 +130,7 @@
 				status = "okay";
 				clock-frequency = <200000>;
 
-				eeprom: eeprom at 52 {
+				eeprom at 52 {
 					compatible = "atmel,24c128";
 					reg = <0x52>;
 					pagesize = <32>;
-- 
1.9.1

[PATCH 03/14] ARM: dts: qs600: remove unnecessary eeprom label

[Srinivas Kandagatla]

This patch removes unnecessary eeprom label, which is not used
anywhere in the board file.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 80ab5b8..bdea747 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -88,7 +88,7 @@
 				status = "okay";
 				clock-frequency = <200000>;
 
-				eeprom: eeprom@50 {
+				eeprom@50 {
 					compatible = "24c02";
 					reg = <0x50>;
 					pagesize = <32>;
-- 
1.9.1

[PATCH 03/14] ARM: dts: qs600: remove unnecessary eeprom label

[Srinivas Kandagatla]

This patch removes unnecessary eeprom label, which is not used
anywhere in the board file.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 80ab5b8..bdea747 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -88,7 +88,7 @@
 				status = "okay";
 				clock-frequency = <200000>;
 
-				eeprom: eeprom at 50 {
+				eeprom at 50 {
 					compatible = "24c02";
 					reg = <0x50>;
 					pagesize = <32>;
-- 
1.9.1

[PATCH 04/14] devicetree: Add hardware rng entry to qcom-apq8064.dtsi

[Srinivas Kandagatla]

From: John Stultz <john.stultz@linaro.org>

Add devicetree data to add support for hw_rng support
to the apq8064 dts.

Tested on the Nexus7 (2013).

Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: devicetree@vger.kernel.org
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 53d5311..d973832 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -315,6 +315,13 @@
 			};
 		};
 
+		rng@1a500000 {
+			compatible = "qcom,prng";
+			reg = <0x1a500000 0x200>;
+			clocks = <&gcc PRNG_CLK>;
+			clock-names = "core";
+		};
+
 		qcom,ssbi@500000 {
 			compatible = "qcom,ssbi";
 			reg = <0x00500000 0x1000>;
-- 
1.9.1

[PATCH 04/14] devicetree: Add hardware rng entry to qcom-apq8064.dtsi

[Srinivas Kandagatla]

From: John Stultz <john.stultz@linaro.org>

Add devicetree data to add support for hw_rng support
to the apq8064 dts.

Tested on the Nexus7 (2013).

Cc: Kumar Gala <galak@codeaurora.org>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: devicetree at vger.kernel.org
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 53d5311..d973832 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -315,6 +315,13 @@
 			};
 		};
 
+		rng at 1a500000 {
+			compatible = "qcom,prng";
+			reg = <0x1a500000 0x200>;
+			clocks = <&gcc PRNG_CLK>;
+			clock-names = "core";
+		};
+
 		qcom,ssbi at 500000 {
 			compatible = "qcom,ssbi";
 			reg = <0x00500000 0x1000>;
-- 
1.9.1

[PATCH 05/14] ARM: dts: apq8064: add pm8921 rtc

[Srinivas Kandagatla]

This patch adds rtc node for pmic8921.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index d973832..1d4fa2b 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -372,6 +372,14 @@
 					<136 1>, <137 1>, <138 1>, <139 1>;
 				};
 
+				rtc@11d {
+					compatible = "qcom,pm8921-rtc";
+					interrupt-parent = <&pmicintc>;
+					interrupts = <39 1>;
+					reg = <0x11d>;
+					allow-set-time;
+				};
+
 			};
 		};
 
-- 
1.9.1

[PATCH 05/14] ARM: dts: apq8064: add pm8921 rtc

[Srinivas Kandagatla]

This patch adds rtc node for pmic8921.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index d973832..1d4fa2b 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -372,6 +372,14 @@
 					<136 1>, <137 1>, <138 1>, <139 1>;
 				};
 
+				rtc at 11d {
+					compatible = "qcom,pm8921-rtc";
+					interrupt-parent = <&pmicintc>;
+					interrupts = <39 1>;
+					reg = <0x11d>;
+					allow-set-time;
+				};
+
 			};
 		};
 
-- 
1.9.1

[PATCH 06/14] ARM: dts: apq8064: add pm8921 pwrkey support

[Srinivas Kandagatla]

This patch adds support to pm8921 power button.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 1d4fa2b..4a2f159 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -380,6 +380,14 @@
 					allow-set-time;
 				};
 
+				pwrkey@1c {
+					compatible = "qcom,pm8921-pwrkey";
+					reg = <0x1c>;
+					interrupt-parent = <&pmicintc>;
+					interrupts = <50 1>, <51 1>;
+					debounce = <15625>;
+					pull-up;
+				};
 			};
 		};
 
-- 
1.9.1

[PATCH 06/14] ARM: dts: apq8064: add pm8921 pwrkey support

[Srinivas Kandagatla]

This patch adds support to pm8921 power button.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 1d4fa2b..4a2f159 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -380,6 +380,14 @@
 					allow-set-time;
 				};
 
+				pwrkey at 1c {
+					compatible = "qcom,pm8921-pwrkey";
+					reg = <0x1c>;
+					interrupt-parent = <&pmicintc>;
+					interrupts = <50 1>, <51 1>;
+					debounce = <15625>;
+					pull-up;
+				};
 			};
 		};
 
-- 
1.9.1

[PATCH 07/14] ARM: dts: apq8064: Prefix the gsbi6 uart pins correctly

[Srinivas Kandagatla]

Usage of generic names like "uart_pins" is confusing to the reader, given
the fact that there could be more than one uart on APQ8064.
This patch adds gsbi prefix to uart pinctrl nodes so as to avoid such
confusion.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 2 +-
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 9 ++++++++-
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 2ad2ab8..56eaf5a 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -145,7 +145,7 @@
 			serial@16540000 {
 				status = "ok";
 				pinctrl-names = "default";
-				pinctrl-0 = <&uart_pins>;
+				pinctrl-0 = <&gsbi6_uart_4pins>;
 			};
 		};
 
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 4a2f159..eb629c7 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -127,7 +127,14 @@
 				};
 			};
 
-			uart_pins: uart_pins {
+			gsbi6_uart_2pins: gsbi6_uart_2pins {
+				mux {
+					pins = "gpio14", "gpio15";
+					function = "gsbi6";
+				};
+			};
+
+			gsbi6_uart_4pins: gsbi6_uart_4pins {
 				mux {
 					pins = "gpio14", "gpio15", "gpio16", "gpio17";
 					function = "gsbi6";
-- 
1.9.1

[PATCH 07/14] ARM: dts: apq8064: Prefix the gsbi6 uart pins correctly

[Srinivas Kandagatla]

Usage of generic names like "uart_pins" is confusing to the reader, given
the fact that there could be more than one uart on APQ8064.
This patch adds gsbi prefix to uart pinctrl nodes so as to avoid such
confusion.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 2 +-
 arch/arm/boot/dts/qcom-apq8064.dtsi        | 9 ++++++++-
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 2ad2ab8..56eaf5a 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -145,7 +145,7 @@
 			serial at 16540000 {
 				status = "ok";
 				pinctrl-names = "default";
-				pinctrl-0 = <&uart_pins>;
+				pinctrl-0 = <&gsbi6_uart_4pins>;
 			};
 		};
 
diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index 4a2f159..eb629c7 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -127,7 +127,14 @@
 				};
 			};
 
-			uart_pins: uart_pins {
+			gsbi6_uart_2pins: gsbi6_uart_2pins {
+				mux {
+					pins = "gpio14", "gpio15";
+					function = "gsbi6";
+				};
+			};
+
+			gsbi6_uart_4pins: gsbi6_uart_4pins {
 				mux {
 					pins = "gpio14", "gpio15", "gpio16", "gpio17";
 					function = "gsbi6";
-- 
1.9.1

[PATCH 08/14] ARM: dts: apq8064: add missing gsbi7 uart pinctrl

[Srinivas Kandagatla]

This patch adds missing gsbi7 uart pinctrl, this is the default debug
uart on most boards.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index eb629c7..42286c6 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -140,6 +140,20 @@
 					function = "gsbi6";
 				};
 			};
+
+			gsbi7_uart_2pins: gsbi7_uart_2pins {
+				mux {
+					pins = "gpio82", "gpio83";
+					function = "gsbi7";
+				};
+			};
+
+			gsbi7_uart_4pins: gsbi7_uart_4pins {
+				mux {
+					pins = "gpio82", "gpio83", "gpio84", "gpio85";
+					function = "gsbi7";
+				};
+			};
 		};
 
 		intc: interrupt-controller@2000000 {
-- 
1.9.1

[PATCH 08/14] ARM: dts: apq8064: add missing gsbi7 uart pinctrl

[Srinivas Kandagatla]

This patch adds missing gsbi7 uart pinctrl, this is the default debug
uart on most boards.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi
index eb629c7..42286c6 100644
--- a/arch/arm/boot/dts/qcom-apq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-apq8064.dtsi
@@ -140,6 +140,20 @@
 					function = "gsbi6";
 				};
 			};
+
+			gsbi7_uart_2pins: gsbi7_uart_2pins {
+				mux {
+					pins = "gpio82", "gpio83";
+					function = "gsbi7";
+				};
+			};
+
+			gsbi7_uart_4pins: gsbi7_uart_4pins {
+				mux {
+					pins = "gpio82", "gpio83", "gpio84", "gpio85";
+					function = "gsbi7";
+				};
+			};
 		};
 
 		intc: interrupt-controller at 2000000 {
-- 
1.9.1

[PATCH 09/14] ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart

[Srinivas Kandagatla]

This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
IFC6410.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 56eaf5a..c1d5bd7 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -154,6 +154,8 @@
 			qcom,mode = <GSBI_PROT_I2C_UART>;
 			serial@16640000 {
 				status = "ok";
+				pinctrl-names = "default";
+				pinctrl-0 = <&gsbi7_uart_2pins>;
 			};
 		};
 
-- 
1.9.1

[PATCH 09/14] ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart

[Srinivas Kandagatla]

This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
IFC6410.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 56eaf5a..c1d5bd7 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -154,6 +154,8 @@
 			qcom,mode = <GSBI_PROT_I2C_UART>;
 			serial at 16640000 {
 				status = "ok";
+				pinctrl-names = "default";
+				pinctrl-0 = <&gsbi7_uart_2pins>;
 			};
 		};
 
-- 
1.9.1

[PATCH 10/14] ARM: dts: qs600: Add missing pinctrl property for gsbi7 uart

[Srinivas Kandagatla]

This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
CM-QS600.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index bdea747..8aac3be 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -101,6 +101,8 @@
 			qcom,mode = <GSBI_PROT_I2C_UART>;
 			serial@16640000 {
 				status = "ok";
+				pinctrl-names = "default";
+				pinctrl-0 = <&gsbi7_uart_2pins>;
 			};
 		};
 
-- 
1.9.1

[PATCH 10/14] ARM: dts: qs600: Add missing pinctrl property for gsbi7 uart

[Srinivas Kandagatla]

This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
CM-QS600.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index bdea747..8aac3be 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -101,6 +101,8 @@
 			qcom,mode = <GSBI_PROT_I2C_UART>;
 			serial at 16640000 {
 				status = "ok";
+				pinctrl-names = "default";
+				pinctrl-0 = <&gsbi7_uart_2pins>;
 			};
 		};
 
-- 
1.9.1

[PATCH 11/14] ARM: dts: ifc6410: Add pwrseq support for WLAN

[Srinivas Kandagatla]

This patch adds pwrseq for WLAN which resets the WLAN just before the
SDIO bus is up.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index c1d5bd7..9c71a51 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -1,5 +1,6 @@
 #include "qcom-apq8064-v2.0.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 
 / {
 	model = "Qualcomm APQ8064/IFC6410";
@@ -14,6 +15,17 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	pwrseq {
+		compatible = "simple-bus";
+
+		sdcc4_pwrseq: sdcc4_pwrseq {
+			pinctrl-names = "default";
+			pinctrl-0 = <&wlan_default_gpios>;
+			compatible = "mmc-pwrseq-simple";
+			reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>;
+		};
+	};
+
 	soc {
 		pinctrl@800000 {
 			card_detect: card_detect {
@@ -207,6 +219,21 @@
 			status = "okay";
 		};
 
+		qcom,ssbi@500000 {
+			pmic@0 {
+				gpio@150 {
+					wlan_default_gpios: wlan-gpios {
+						pios {
+							pins = "gpio43";
+							function = "normal";
+							bias-disable;
+							power-source = <PM8921_GPIO_S4>;
+						};
+					};
+				};
+			};
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc@12400000 {
@@ -228,6 +255,7 @@
 				status = "okay";
 				vmmc-supply = <&ext_3p3v>;
 				vqmmc-supply = <&pm8921_lvs1>;
+				mmc-pwrseq = <&sdcc4_pwrseq>;
 			};
 		};
 	};
-- 
1.9.1

[PATCH 11/14] ARM: dts: ifc6410: Add pwrseq support for WLAN

[Srinivas Kandagatla]

This patch adds pwrseq for WLAN which resets the WLAN just before the
SDIO bus is up.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index c1d5bd7..9c71a51 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -1,5 +1,6 @@
 #include "qcom-apq8064-v2.0.dtsi"
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 
 / {
 	model = "Qualcomm APQ8064/IFC6410";
@@ -14,6 +15,17 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	pwrseq {
+		compatible = "simple-bus";
+
+		sdcc4_pwrseq: sdcc4_pwrseq {
+			pinctrl-names = "default";
+			pinctrl-0 = <&wlan_default_gpios>;
+			compatible = "mmc-pwrseq-simple";
+			reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>;
+		};
+	};
+
 	soc {
 		pinctrl at 800000 {
 			card_detect: card_detect {
@@ -207,6 +219,21 @@
 			status = "okay";
 		};
 
+		qcom,ssbi at 500000 {
+			pmic at 0 {
+				gpio at 150 {
+					wlan_default_gpios: wlan-gpios {
+						pios {
+							pins = "gpio43";
+							function = "normal";
+							bias-disable;
+							power-source = <PM8921_GPIO_S4>;
+						};
+					};
+				};
+			};
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc at 12400000 {
@@ -228,6 +255,7 @@
 				status = "okay";
 				vmmc-supply = <&ext_3p3v>;
 				vqmmc-supply = <&pm8921_lvs1>;
+				mmc-pwrseq = <&sdcc4_pwrseq>;
 			};
 		};
 	};
-- 
1.9.1

[PATCH 12/14] ARM: dts: qs600: add pwrseq support to WLAN

[Srinivas Kandagatla]

Add pwrseq support to sdcc4 which would enable a proper reset of WLAN
without ugly hacks in the board support file.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 32 +++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 8aac3be..cc9d942 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -1,4 +1,6 @@
 #include "qcom-apq8064-v2.0.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 
 / {
 	model = "CompuLab CM-QS600";
@@ -12,6 +14,20 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	pwrseq {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+
+		sdcc4_pwrseq: sdcc4_pwrseq {
+			pinctrl-names = "default";
+			pinctrl-0 = <&wlan_default_gpios>;
+			compatible = "mmc-pwrseq-simple";
+			reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>;
+		};
+	};
+
 	soc {
 		rpm@108000 {
 			regulators {
@@ -154,6 +170,21 @@
 			regulator-always-on;
 		};
 
+		qcom,ssbi@500000 {
+			pmic@0 {
+				gpio@150 {
+					wlan_default_gpios: wlan-gpios {
+						pios {
+							pins = "gpio43";
+							function = "normal";
+							bias-disable;
+							power-source = <PM8921_GPIO_S4>;
+						};
+					};
+				};
+			};
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc@12400000 {
@@ -172,6 +203,7 @@
 				status = "okay";
 				vmmc-supply = <&v3p3_fixed>;
 				vqmmc-supply = <&v3p3_fixed>;
+				mmc-pwrseq = <&sdcc4_pwrseq>;
 			};
 		};
 	};
-- 
1.9.1

[PATCH 12/14] ARM: dts: qs600: add pwrseq support to WLAN

[Srinivas Kandagatla]

Add pwrseq support to sdcc4 which would enable a proper reset of WLAN
without ugly hacks in the board support file.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 32 +++++++++++++++++++++++++++++
 1 file changed, 32 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index 8aac3be..cc9d942 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -1,4 +1,6 @@
 #include "qcom-apq8064-v2.0.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
 
 / {
 	model = "CompuLab CM-QS600";
@@ -12,6 +14,20 @@
 		stdout-path = "serial0:115200n8";
 	};
 
+	pwrseq {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		compatible = "simple-bus";
+
+		sdcc4_pwrseq: sdcc4_pwrseq {
+			pinctrl-names = "default";
+			pinctrl-0 = <&wlan_default_gpios>;
+			compatible = "mmc-pwrseq-simple";
+			reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>;
+		};
+	};
+
 	soc {
 		rpm at 108000 {
 			regulators {
@@ -154,6 +170,21 @@
 			regulator-always-on;
 		};
 
+		qcom,ssbi at 500000 {
+			pmic at 0 {
+				gpio at 150 {
+					wlan_default_gpios: wlan-gpios {
+						pios {
+							pins = "gpio43";
+							function = "normal";
+							bias-disable;
+							power-source = <PM8921_GPIO_S4>;
+						};
+					};
+				};
+			};
+		};
+
 		amba {
 			/* eMMC */
 			sdcc1: sdcc at 12400000 {
@@ -172,6 +203,7 @@
 				status = "okay";
 				vmmc-supply = <&v3p3_fixed>;
 				vqmmc-supply = <&v3p3_fixed>;
+				mmc-pwrseq = <&sdcc4_pwrseq>;
 			};
 		};
 	};
-- 
1.9.1

[PATCH 13/14] ARM: dts: apq8064-ifc6410: add notify led support.

[Srinivas Kandagatla]

This patch adds notify led support on IFC6410, whose trigger can be
configured from userspace.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 9c71a51..11ac608 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -26,6 +26,18 @@
 		};
 	};
 
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&notify_led>;
+
+		led@1 {
+			label = "apq8064:green:user1";
+			gpios = <&pm8921_gpio 18 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+	};
+
 	soc {
 		pinctrl@800000 {
 			card_detect: card_detect {
@@ -230,6 +242,15 @@
 							power-source = <PM8921_GPIO_S4>;
 						};
 					};
+
+					notify_led: nled {
+						pios {
+							pins = "gpio18";
+							function = "normal";
+							bias-disable;
+							power-source = <PM8921_GPIO_S4>;
+						};
+					};
 				};
 			};
 		};
-- 
1.9.1

[PATCH 13/14] ARM: dts: apq8064-ifc6410: add notify led support.

[Srinivas Kandagatla]

This patch adds notify led support on IFC6410, whose trigger can be
configured from userspace.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-ifc6410.dts | 21 +++++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
index 9c71a51..11ac608 100644
--- a/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-ifc6410.dts
@@ -26,6 +26,18 @@
 		};
 	};
 
+	leds {
+		compatible = "gpio-leds";
+		pinctrl-names = "default";
+		pinctrl-0 = <&notify_led>;
+
+		led at 1 {
+			label = "apq8064:green:user1";
+			gpios = <&pm8921_gpio 18 GPIO_ACTIVE_HIGH>;
+			default-state = "on";
+		};
+	};
+
 	soc {
 		pinctrl at 800000 {
 			card_detect: card_detect {
@@ -230,6 +242,15 @@
 							power-source = <PM8921_GPIO_S4>;
 						};
 					};
+
+					notify_led: nled {
+						pios {
+							pins = "gpio18";
+							function = "normal";
+							bias-disable;
+							power-source = <PM8921_GPIO_S4>;
+						};
+					};
 				};
 			};
 		};
-- 
1.9.1

[PATCH 14/14] ARM: dts: qs600: Add SD card detect support.

[Srinivas Kandagatla]

This patch adds SD card detect support.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index cc9d942..03784f1 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -29,6 +29,16 @@
 	};
 
 	soc {
+		pinctrl@800000 {
+			card_detect: card_detect {
+				mux {
+					pins = "gpio26";
+					function = "gpio";
+					bias-disable;
+				};
+			};
+		};
+
 		rpm@108000 {
 			regulators {
 				vin_lvs1_3_6-supply = <&pm8921_s4>;
@@ -197,6 +207,9 @@
 			sdcc3: sdcc@12180000 {
 				status = "okay";
 				vmmc-supply = <&v3p3_fixed>;
+				pinctrl-names	= "default";
+				pinctrl-0	= <&card_detect>;
+				cd-gpios	= <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>;
 			};
 			/* WLAN */
 			sdcc4: sdcc@121c0000 {
-- 
1.9.1

[PATCH 14/14] ARM: dts: qs600: Add SD card detect support.

[Srinivas Kandagatla]

This patch adds SD card detect support.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
---
 arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
index cc9d942..03784f1 100644
--- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
+++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
@@ -29,6 +29,16 @@
 	};
 
 	soc {
+		pinctrl at 800000 {
+			card_detect: card_detect {
+				mux {
+					pins = "gpio26";
+					function = "gpio";
+					bias-disable;
+				};
+			};
+		};
+
 		rpm at 108000 {
 			regulators {
 				vin_lvs1_3_6-supply = <&pm8921_s4>;
@@ -197,6 +207,9 @@
 			sdcc3: sdcc at 12180000 {
 				status = "okay";
 				vmmc-supply = <&v3p3_fixed>;
+				pinctrl-names	= "default";
+				pinctrl-0	= <&card_detect>;
+				cd-gpios	= <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>;
 			};
 			/* WLAN */
 			sdcc4: sdcc at 121c0000 {
-- 
1.9.1

Re: [PATCH 00/14] ARM: dts: apq8064 dt cleanups and additions

[Andy Gross]

On Fri, Sep 18, 2015 at 01:29:31PM +0100, Srinivas Kandagatla wrote:
> Hi Andy, 
> 
> Here are few cleanup and additions to the existing APQ8064 device tree.
> 
> Some of the patches are to do with princtrl cleanup which was always not
> in the right place and some of the pinctrls were missing.
> Other set of patches is to do with adding more devices like rtc rng
> and pwr key for pmic 8921.
> Last set of patches are related to pwrseq and SD card detect taking Stephens
> comments into consideration.

These all look fine.  I tested in ifc6410 as well.  I'll test on qs600 to be
sure.

-- 
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

[PATCH 00/14] ARM: dts: apq8064 dt cleanups and additions

[Andy Gross]

On Fri, Sep 18, 2015 at 01:29:31PM +0100, Srinivas Kandagatla wrote:
> Hi Andy, 
> 
> Here are few cleanup and additions to the existing APQ8064 device tree.
> 
> Some of the patches are to do with princtrl cleanup which was always not
> in the right place and some of the pinctrls were missing.
> Other set of patches is to do with adding more devices like rtc rng
> and pwr key for pmic 8921.
> Last set of patches are related to pwrseq and SD card detect taking Stephens
> comments into consideration.

These all look fine.  I tested in ifc6410 as well.  I'll test on qs600 to be
sure.

-- 
Qualcomm Innovation Center, Inc.
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project

Re: [PATCH 10/14] ARM: dts: qs600: Add missing pinctrl property for gsbi7 uart

[Igor Grinberg]

On 09/18/15 15:31, Srinivas Kandagatla wrote:
> This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
> CM-QS600.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

Acked-by: Igor Grinberg <grinberg@compulab.co.il>

> ---
>  arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> index bdea747..8aac3be 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> @@ -101,6 +101,8 @@
>  			qcom,mode = <GSBI_PROT_I2C_UART>;
>  			serial@16640000 {
>  				status = "ok";
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&gsbi7_uart_2pins>;
>  			};
>  		};
>  
> 

-- 
Regards,
Igor.

[PATCH 10/14] ARM: dts: qs600: Add missing pinctrl property for gsbi7 uart

[Igor Grinberg]

On 09/18/15 15:31, Srinivas Kandagatla wrote:
> This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
> CM-QS600.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

Acked-by: Igor Grinberg <grinberg@compulab.co.il>

> ---
>  arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> index bdea747..8aac3be 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> @@ -101,6 +101,8 @@
>  			qcom,mode = <GSBI_PROT_I2C_UART>;
>  			serial at 16640000 {
>  				status = "ok";
> +				pinctrl-names = "default";
> +				pinctrl-0 = <&gsbi7_uart_2pins>;
>  			};
>  		};
>  
> 

-- 
Regards,
Igor.

Re: [PATCH 12/14] ARM: dts: qs600: add pwrseq support to WLAN

[Igor Grinberg]

On 09/18/15 15:32, Srinivas Kandagatla wrote:
> Add pwrseq support to sdcc4 which would enable a proper reset of WLAN
> without ugly hacks in the board support file.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

Thanks Srini!

Acked-by: Igor Grinberg <grinberg@compulab.co.il>

> ---
>  arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 32 +++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> index 8aac3be..cc9d942 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> @@ -1,4 +1,6 @@
>  #include "qcom-apq8064-v2.0.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
>  
>  / {
>  	model = "CompuLab CM-QS600";
> @@ -12,6 +14,20 @@
>  		stdout-path = "serial0:115200n8";
>  	};
>  
> +	pwrseq {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges;
> +		compatible = "simple-bus";
> +
> +		sdcc4_pwrseq: sdcc4_pwrseq {
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&wlan_default_gpios>;
> +			compatible = "mmc-pwrseq-simple";
> +			reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>;
> +		};
> +	};
> +
>  	soc {
>  		rpm@108000 {
>  			regulators {
> @@ -154,6 +170,21 @@
>  			regulator-always-on;
>  		};
>  
> +		qcom,ssbi@500000 {
> +			pmic@0 {
> +				gpio@150 {
> +					wlan_default_gpios: wlan-gpios {
> +						pios {
> +							pins = "gpio43";
> +							function = "normal";
> +							bias-disable;
> +							power-source = <PM8921_GPIO_S4>;
> +						};
> +					};
> +				};
> +			};
> +		};
> +
>  		amba {
>  			/* eMMC */
>  			sdcc1: sdcc@12400000 {
> @@ -172,6 +203,7 @@
>  				status = "okay";
>  				vmmc-supply = <&v3p3_fixed>;
>  				vqmmc-supply = <&v3p3_fixed>;
> +				mmc-pwrseq = <&sdcc4_pwrseq>;
>  			};
>  		};
>  	};
> 

-- 
Regards,
Igor.

[PATCH 12/14] ARM: dts: qs600: add pwrseq support to WLAN

[Igor Grinberg]

On 09/18/15 15:32, Srinivas Kandagatla wrote:
> Add pwrseq support to sdcc4 which would enable a proper reset of WLAN
> without ugly hacks in the board support file.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

Thanks Srini!

Acked-by: Igor Grinberg <grinberg@compulab.co.il>

> ---
>  arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 32 +++++++++++++++++++++++++++++
>  1 file changed, 32 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> index 8aac3be..cc9d942 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> @@ -1,4 +1,6 @@
>  #include "qcom-apq8064-v2.0.dtsi"
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
>  
>  / {
>  	model = "CompuLab CM-QS600";
> @@ -12,6 +14,20 @@
>  		stdout-path = "serial0:115200n8";
>  	};
>  
> +	pwrseq {
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges;
> +		compatible = "simple-bus";
> +
> +		sdcc4_pwrseq: sdcc4_pwrseq {
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&wlan_default_gpios>;
> +			compatible = "mmc-pwrseq-simple";
> +			reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>;
> +		};
> +	};
> +
>  	soc {
>  		rpm at 108000 {
>  			regulators {
> @@ -154,6 +170,21 @@
>  			regulator-always-on;
>  		};
>  
> +		qcom,ssbi at 500000 {
> +			pmic at 0 {
> +				gpio at 150 {
> +					wlan_default_gpios: wlan-gpios {
> +						pios {
> +							pins = "gpio43";
> +							function = "normal";
> +							bias-disable;
> +							power-source = <PM8921_GPIO_S4>;
> +						};
> +					};
> +				};
> +			};
> +		};
> +
>  		amba {
>  			/* eMMC */
>  			sdcc1: sdcc at 12400000 {
> @@ -172,6 +203,7 @@
>  				status = "okay";
>  				vmmc-supply = <&v3p3_fixed>;
>  				vqmmc-supply = <&v3p3_fixed>;
> +				mmc-pwrseq = <&sdcc4_pwrseq>;
>  			};
>  		};
>  	};
> 

-- 
Regards,
Igor.

Re: [PATCH 14/14] ARM: dts: qs600: Add SD card detect support.

[Igor Grinberg]

On 09/18/15 15:32, Srinivas Kandagatla wrote:
> This patch adds SD card detect support.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

Acked-by: Igor Grinberg <grinberg@compulab.co.il>

> ---
>  arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> index cc9d942..03784f1 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> @@ -29,6 +29,16 @@
>  	};
>  
>  	soc {
> +		pinctrl@800000 {
> +			card_detect: card_detect {
> +				mux {
> +					pins = "gpio26";
> +					function = "gpio";
> +					bias-disable;
> +				};
> +			};
> +		};
> +
>  		rpm@108000 {
>  			regulators {
>  				vin_lvs1_3_6-supply = <&pm8921_s4>;
> @@ -197,6 +207,9 @@
>  			sdcc3: sdcc@12180000 {
>  				status = "okay";
>  				vmmc-supply = <&v3p3_fixed>;
> +				pinctrl-names	= "default";
> +				pinctrl-0	= <&card_detect>;
> +				cd-gpios	= <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>;
>  			};
>  			/* WLAN */
>  			sdcc4: sdcc@121c0000 {
> 

-- 
Regards,
Igor.

[PATCH 14/14] ARM: dts: qs600: Add SD card detect support.

[Igor Grinberg]

On 09/18/15 15:32, Srinivas Kandagatla wrote:
> This patch adds SD card detect support.
> 
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

Acked-by: Igor Grinberg <grinberg@compulab.co.il>

> ---
>  arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> index cc9d942..03784f1 100644
> --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts
> @@ -29,6 +29,16 @@
>  	};
>  
>  	soc {
> +		pinctrl at 800000 {
> +			card_detect: card_detect {
> +				mux {
> +					pins = "gpio26";
> +					function = "gpio";
> +					bias-disable;
> +				};
> +			};
> +		};
> +
>  		rpm at 108000 {
>  			regulators {
>  				vin_lvs1_3_6-supply = <&pm8921_s4>;
> @@ -197,6 +207,9 @@
>  			sdcc3: sdcc at 12180000 {
>  				status = "okay";
>  				vmmc-supply = <&v3p3_fixed>;
> +				pinctrl-names	= "default";
> +				pinctrl-0	= <&card_detect>;
> +				cd-gpios	= <&tlmm_pinmux 26 GPIO_ACTIVE_LOW>;
>  			};
>  			/* WLAN */
>  			sdcc4: sdcc at 121c0000 {
> 

-- 
Regards,
Igor.

Re: [PATCH 09/14] ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart

[Kevin Hilman]

Hi Srini,

On Fri, Sep 18, 2015 at 5:31 AM, Srinivas Kandagatla
<srinivas.kandagatla@linaro.org> wrote:
> This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
> IFC6410.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

kernelci.org found some new boot failures in -next on 8064[1].  I
bisected it down to this patch, which landed in linux next in the form
of commit d3a578ed4310 ARM: dts: ifc6410: Add missing pinctrl to gsbi7
uart.

Kevin

[1] http://kernelci.org/boot/qcom-apq8064-ifc6410/job/next/kernel/next-20150925/defconfig/multi_v7_defconfig/lab/lab-khilman/?_id=5605083c59b51466d26c3250

Re: [PATCH 09/14] ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart

[Kevin Hilman]

Hi Srini,

On Fri, Sep 18, 2015 at 5:31 AM, Srinivas Kandagatla
<srinivas.kandagatla@linaro.org> wrote:
> This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
> IFC6410.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

kernelci.org found some new boot failures in -next on 8064[1].  I
bisected it down to this patch, which landed in linux next in the form
of commit d3a578ed4310 ARM: dts: ifc6410: Add missing pinctrl to gsbi7
uart.

Kevin

[1] http://kernelci.org/boot/qcom-apq8064-ifc6410/job/next/kernel/next-20150925/defconfig/multi_v7_defconfig/lab/lab-khilman/?_id=5605083c59b51466d26c3250

[PATCH 09/14] ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart

[Kevin Hilman]

Hi Srini,

On Fri, Sep 18, 2015 at 5:31 AM, Srinivas Kandagatla
<srinivas.kandagatla@linaro.org> wrote:
> This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
> IFC6410.
>
> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

kernelci.org found some new boot failures in -next on 8064[1].  I
bisected it down to this patch, which landed in linux next in the form
of commit d3a578ed4310 ARM: dts: ifc6410: Add missing pinctrl to gsbi7
uart.

Kevin

[1] http://kernelci.org/boot/qcom-apq8064-ifc6410/job/next/kernel/next-20150925/defconfig/multi_v7_defconfig/lab/lab-khilman/?_id=5605083c59b51466d26c3250

Re: [PATCH 09/14] ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart

[Srinivas Kandagatla]

Hi Kevin,

Thanks for reporting this issue.

On 25/09/15 19:54, Kevin Hilman wrote:
> Hi Srini,
>
> On Fri, Sep 18, 2015 at 5:31 AM, Srinivas Kandagatla
> <srinivas.kandagatla@linaro.org> wrote:
>> This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
>> IFC6410.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>
> kernelci.org found some new boot failures in -next on 8064[1].  I
> bisected it down to this patch, which landed in linux next in the form
> of commit d3a578ed4310 ARM: dts: ifc6410: Add missing pinctrl to gsbi7
> uart.
>
This issue is due to missing CONFIG_PINCTRL_APQ8064 Kconfig in 
multi_v7_defconfig.

In my tests I always enable this config which is why I could not spot 
this breakage.

This patch as it is the right thing to do however we need a fix to 
multi_v7_defconfig. I will send a patch for multi_v7_defconfig to 
address this and add few more missing configs too.


thanks,
--srini
> Kevin
>
> [1] http://kernelci.org/boot/qcom-apq8064-ifc6410/job/next/kernel/next-20150925/defconfig/multi_v7_defconfig/lab/lab-khilman/?_id=5605083c59b51466d26c3250
>

Re: [PATCH 09/14] ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart

[Srinivas Kandagatla]

Hi Kevin,

Thanks for reporting this issue.

On 25/09/15 19:54, Kevin Hilman wrote:
> Hi Srini,
>
> On Fri, Sep 18, 2015 at 5:31 AM, Srinivas Kandagatla
> <srinivas.kandagatla@linaro.org> wrote:
>> This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
>> IFC6410.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>
> kernelci.org found some new boot failures in -next on 8064[1].  I
> bisected it down to this patch, which landed in linux next in the form
> of commit d3a578ed4310 ARM: dts: ifc6410: Add missing pinctrl to gsbi7
> uart.
>
This issue is due to missing CONFIG_PINCTRL_APQ8064 Kconfig in 
multi_v7_defconfig.

In my tests I always enable this config which is why I could not spot 
this breakage.

This patch as it is the right thing to do however we need a fix to 
multi_v7_defconfig. I will send a patch for multi_v7_defconfig to 
address this and add few more missing configs too.


thanks,
--srini
> Kevin
>
> [1] http://kernelci.org/boot/qcom-apq8064-ifc6410/job/next/kernel/next-20150925/defconfig/multi_v7_defconfig/lab/lab-khilman/?_id=5605083c59b51466d26c3250
>

[PATCH 09/14] ARM: dts: ifc6410: Add missing pinctrl to gsbi7 uart

[Srinivas Kandagatla]

Hi Kevin,

Thanks for reporting this issue.

On 25/09/15 19:54, Kevin Hilman wrote:
> Hi Srini,
>
> On Fri, Sep 18, 2015 at 5:31 AM, Srinivas Kandagatla
> <srinivas.kandagatla@linaro.org> wrote:
>> This patch adds missing 2pin uart pinctrl property to gsbi7 uart on
>> IFC6410.
>>
>> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>
> kernelci.org found some new boot failures in -next on 8064[1].  I
> bisected it down to this patch, which landed in linux next in the form
> of commit d3a578ed4310 ARM: dts: ifc6410: Add missing pinctrl to gsbi7
> uart.
>
This issue is due to missing CONFIG_PINCTRL_APQ8064 Kconfig in 
multi_v7_defconfig.

In my tests I always enable this config which is why I could not spot 
this breakage.

This patch as it is the right thing to do however we need a fix to 
multi_v7_defconfig. I will send a patch for multi_v7_defconfig to 
address this and add few more missing configs too.


thanks,
--srini
> Kevin
>
> [1] http://kernelci.org/boot/qcom-apq8064-ifc6410/job/next/kernel/next-20150925/defconfig/multi_v7_defconfig/lab/lab-khilman/?_id=5605083c59b51466d26c3250
>

Re: [PATCH 04/14] devicetree: Add hardware rng entry to qcom-apq8064.dtsi

[Bjorn Andersson]

On Fri 18 Sep 05:31 PDT 2015, Srinivas Kandagatla wrote:

> From: John Stultz <john.stultz-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> 
> Add devicetree data to add support for hw_rng support
> to the apq8064 dts.
> 
> Tested on the Nexus7 (2013).
> 
> Cc: Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> Cc: Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> Cc: Srinivas Kandagatla <srinivas.kandagatla-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org

Reviewed-by: Bjorn Andersson <bjorn.andersson-/MT0OVThwyLZJqsBc5GL+g@public.gmane.org>

> Reviewed-by: Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
> Signed-off-by: John Stultz <john.stultz-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>

Regards,
Bjorn
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Re: [PATCH 04/14] devicetree: Add hardware rng entry to qcom-apq8064.dtsi

[Bjorn Andersson]

On Fri 18 Sep 05:31 PDT 2015, Srinivas Kandagatla wrote:

> From: John Stultz <john.stultz@linaro.org>
> 
> Add devicetree data to add support for hw_rng support
> to the apq8064 dts.
> 
> Tested on the Nexus7 (2013).
> 
> Cc: Kumar Gala <galak@codeaurora.org>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> Cc: devicetree@vger.kernel.org

Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>

> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
> Signed-off-by: John Stultz <john.stultz@linaro.org>

Regards,
Bjorn

[PATCH 04/14] devicetree: Add hardware rng entry to qcom-apq8064.dtsi

[Bjorn Andersson]

On Fri 18 Sep 05:31 PDT 2015, Srinivas Kandagatla wrote:

> From: John Stultz <john.stultz@linaro.org>
> 
> Add devicetree data to add support for hw_rng support
> to the apq8064 dts.
> 
> Tested on the Nexus7 (2013).
> 
> Cc: Kumar Gala <galak@codeaurora.org>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
> Cc: devicetree at vger.kernel.org

Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>

> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
> Signed-off-by: John Stultz <john.stultz@linaro.org>

Regards,
Bjorn