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From: Karol Herbst <nouveau-lIBOoy2+GI7scQ4cX5LuPg@public.gmane.org>
To: nouveau-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Subject: [PATCH 5/9] pci: implement pcie speed change on Fermi
Date: Mon, 12 Oct 2015 22:27:46 +0200	[thread overview]
Message-ID: <1444681670-2187-6-git-send-email-nouveau@karolherbst.de> (raw)
In-Reply-To: <1444681670-2187-1-git-send-email-nouveau-lIBOoy2+GI7scQ4cX5LuPg@public.gmane.org>

Signed-off-by: Karol Herbst <nouveau@karolherbst.de>
---
 drm/nouveau/nvkm/subdev/pci/gf100.c | 65 +++++++++++++++++++++++++++++++++++++
 drm/nouveau/nvkm/subdev/pci/gf106.c |  5 +++
 drm/nouveau/nvkm/subdev/pci/gk104.c |  3 ++
 drm/nouveau/nvkm/subdev/pci/priv.h  |  7 ++++
 4 files changed, 80 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/pci/gf100.c b/drm/nouveau/nvkm/subdev/pci/gf100.c
index bd88dd5..535d858 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf100.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf100.c
@@ -29,6 +29,66 @@ gf100_pci_msi_rearm(struct nvkm_pci *pci)
 	nvkm_pci_wr08(pci, 0x0704, 0xff);
 }
 
+void
+gf100_set_pcie_version(struct nvkm_pci *pci, u8 ver)
+{
+	struct nvkm_device *device = pci->subdev.device;
+
+	if (ver > 1)
+		ver = 1;
+	else
+		ver = 0;
+
+	nvkm_mask(device, 0x02241c, 0x1, ver);
+}
+
+u8
+gf100_get_pcie_version(struct nvkm_pci *pci)
+{
+	struct nvkm_device *device = pci->subdev.device;
+	return (nvkm_rd32(device, 0x02241c) & 0x1) + 1;
+}
+
+void
+gf100_set_pcie_cap_speed(struct nvkm_pci *pci, bool full_speed)
+{
+	struct nvkm_device *device = pci->subdev.device;
+	nvkm_mask(device, 0x02241c, 0x80, full_speed ? 0x80 : 0x0);
+}
+
+int
+gf100_get_pcie_cap_speed(struct nvkm_pci *pci)
+{
+	struct nvkm_device *device = pci->subdev.device;
+	u8 punits_pci_cap_speed = nvkm_rd32(device, 0x02241c) & 0x80;
+	if (punits_pci_cap_speed == 0x80)
+		return 1;
+	return 0;
+}
+
+int
+gf100_pcie_speed_init(struct nvkm_pci *pci)
+{
+	if (g84_get_real_speed(pci) == NVKM_PCIE_SPEED_2_5)
+		gf100_set_pcie_cap_speed(pci, false);
+	else
+		gf100_set_pcie_cap_speed(pci, true);
+	return 0;
+}
+
+int
+gf100_pcie_speed_set(struct nvkm_pci *pci, enum nvkm_pcie_speed req_speed, u8 req_width)
+{
+	if (req_speed == NVKM_PCIE_SPEED_5_0)
+		gf100_set_pcie_cap_speed(pci, true);
+	else
+		gf100_set_pcie_cap_speed(pci, false);
+
+	g84_set_pcie_sta_speed(pci, req_speed);
+
+	return 0;
+}
+
 static const struct nvkm_pci_func
 gf100_pci_func = {
 	.init = g84_pci_init,
@@ -37,9 +97,14 @@ gf100_pci_func = {
 	.wr32 = nv40_pci_wr32,
 	.msi_rearm = gf100_pci_msi_rearm,
 
+	.pcie_speed_init = gf100_pcie_speed_init,
+	.pcie_speed_set = gf100_pcie_speed_set,
+
 	.pcie_max_speed = g84_get_pcie_max_speed,
 	.pcie_current_speed = g84_get_real_speed,
 
+	.set_pcie_version = gf100_set_pcie_version,
+	.get_pcie_version = gf100_get_pcie_version,
 	.get_pcie_version_supported = g84_get_pcie_version_supported,
 };
 
diff --git a/drm/nouveau/nvkm/subdev/pci/gf106.c b/drm/nouveau/nvkm/subdev/pci/gf106.c
index e2223b9..0dee9b5 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf106.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf106.c
@@ -30,9 +30,14 @@ gf106_pci_func = {
 	.wr32 = nv40_pci_wr32,
 	.msi_rearm = nv40_pci_msi_rearm,
 
+	.pcie_speed_init = gf100_pcie_speed_init,
+	.pcie_speed_set = gf100_pcie_speed_set,
+
 	.pcie_max_speed = g84_get_pcie_max_speed,
 	.pcie_current_speed = g84_get_real_speed,
 
+	.set_pcie_version = gf100_set_pcie_version,
+	.get_pcie_version = gf100_get_pcie_version,
 	.get_pcie_version_supported = g84_get_pcie_version_supported,
 };
 
diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c b/drm/nouveau/nvkm/subdev/pci/gk104.c
index 7b6bb5b..353630f 100644
--- a/drm/nouveau/nvkm/subdev/pci/gk104.c
+++ b/drm/nouveau/nvkm/subdev/pci/gk104.c
@@ -31,6 +31,9 @@ gk104_pci_func = {
 	.msi_rearm = nv40_pci_msi_rearm,
 
 	.pcie_current_speed = g84_get_real_speed,
+
+	.set_pcie_version = gf100_set_pcie_version,
+	.get_pcie_version = gf100_get_pcie_version,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/pci/priv.h b/drm/nouveau/nvkm/subdev/pci/priv.h
index 9c62164..348d629 100644
--- a/drm/nouveau/nvkm/subdev/pci/priv.h
+++ b/drm/nouveau/nvkm/subdev/pci/priv.h
@@ -43,4 +43,11 @@ int g84_pcie_speed_init(struct nvkm_pci *);
 int g84_pcie_speed_set(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
 
 int nvkm_pci_pcie_init(struct nvkm_pci *pci);
+
+void gf100_set_pcie_version(struct nvkm_pci *, u8);
+u8 gf100_get_pcie_version(struct nvkm_pci *);
+void gf100_set_pcie_cap_speed(struct nvkm_pci *, bool);
+int gf100_get_pcie_cap_speed(struct nvkm_pci *);
+int gf100_pcie_speed_init(struct nvkm_pci *);
+int gf100_pcie_speed_set(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
 #endif
-- 
2.6.1

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  parent reply	other threads:[~2015-10-12 20:27 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-12 20:27 [PATCH 0/9] PCIe speed changes Karol Herbst
     [not found] ` <1444681670-2187-1-git-send-email-nouveau-lIBOoy2+GI7scQ4cX5LuPg@public.gmane.org>
2015-10-12 20:27   ` [PATCH 1/9] pci: add gk104 variant Karol Herbst
2015-10-12 20:27   ` [PATCH 2/9] pci: add gf106 variant Karol Herbst
2015-10-12 20:27   ` [PATCH 3/9] pci: implement generic code for PCIe speed change Karol Herbst
     [not found]     ` <1444681670-2187-4-git-send-email-nouveau-lIBOoy2+GI7scQ4cX5LuPg@public.gmane.org>
2015-10-12 21:13       ` Roy Spliet
2015-10-12 20:27   ` [PATCH 4/9] pci: implement pcie speed change for tesla Karol Herbst
     [not found]     ` <1444681670-2187-5-git-send-email-nouveau-lIBOoy2+GI7scQ4cX5LuPg@public.gmane.org>
2015-10-12 21:10       ` Roy Spliet
2015-10-12 20:27   ` Karol Herbst [this message]
2015-10-12 20:27   ` [PATCH 6/9] pci: implement PCIe speed change for kepler+ Karol Herbst
2015-10-12 20:27   ` [PATCH 7/9] bios/perf: parse the pci speed from the bios for tesla and newer cards Karol Herbst
2015-10-12 20:27   ` [PATCH 8/9] perf: add fields for pci speed and width and use it for the pstates Karol Herbst
2015-10-12 20:27   ` [PATCH 9/9] perf: change pcie speed on pstate change Karol Herbst
     [not found]     ` <1444681670-2187-10-git-send-email-nouveau-lIBOoy2+GI7scQ4cX5LuPg@public.gmane.org>
2015-10-12 21:16       ` Roy Spliet

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