From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752422AbbJNGCv (ORCPT ); Wed, 14 Oct 2015 02:02:51 -0400 Received: from mailout1.w1.samsung.com ([210.118.77.11]:33700 "EHLO mailout1.w1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750852AbbJNGCs (ORCPT ); Wed, 14 Oct 2015 02:02:48 -0400 X-AuditID: cbfec7f4-f79c56d0000012ee-46-561df0058d50 From: Krzysztof Kozlowski To: Kukjin Kim , Krzysztof Kozlowski , Javier Martinez Canillas , Marek Szyprowski , Andrzej Hajda , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH] dt-bindings: Correct the example for Exynos power domain clocks Date: Wed, 14 Oct 2015 15:02:06 +0900 Message-id: <1444802526-18518-1-git-send-email-k.kozlowski@samsung.com> X-Mailer: git-send-email 1.9.1 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrKJMWRmVeSWpSXmKPExsVy+t/xq7qsH2TDDD6sFbe4te4cq8X8I0Di 6O8Ci9cvDC36H79mttj0+BqrxeVdc9gsZpzfx2Sx9shddgdOj7/Pr7N4bFrVyeaxeUm9R9+W VYwenzfJBbBGcdmkpOZklqUW6dslcGUsm6dasJ6zoqmhm62BsYWji5GTQ0LAROJJz3JGCFtM 4sK99WxdjFwcQgJLGSXubP7GCuH8Z5T4+2sHM0gVm4CxxOblS9hAbBGBt0wSfx+rdTFycAgL BEh8n84HEmYRUJXYd7WJHcTmFXCX2PH+JxvEAjmJk8cms05g5FrAyLCKUTS1NLmgOCk911Cv ODG3uDQvXS85P3cTIyQwvuxgXHzM6hCjAAejEg9vxmrZMCHWxLLiytxDjBIczEoivErPgEK8 KYmVValF+fFFpTmpxYcYpTlYlMR55+56HyIkkJ5YkpqdmlqQWgSTZeLglGpgjBO+Inyq5Urk hr3ztbt+ObsL/GyqL5pg1PsuXeQq/yIBD8lbj+NVjmRVKkwPmfvpTvMW3eWz5d675Alca/5m 05qlxxgk9iHvyZkNV9vNV/6ezXOaS0WLLfdRaODBOMU9ucuiee4VKYZ1OH3+Wh325sgbll2b 9eq33vP8XF4Qc8ZBPuC8t769EktxRqKhFnNRcSIAsFbNiggCAAA= Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Since commit 29e5eea06bc1 ("ARM: EXYNOS: Get current parent clock for power domain on/off") the "pclkN" names of "clock-names" property is not parsed any more. The bindings and driver were updated but the example was not. Fix the example now. Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/exynos/power_domain.txt | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt index e151057d92f0..4e947372a693 100644 --- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt +++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt @@ -43,9 +43,8 @@ Example: mfc_pd: power-domain@10044060 { compatible = "samsung,exynos4210-pd"; reg = <0x10044060 0x20>; - clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>, - <&clock CLK_MOUT_USER_ACLK333>; - clock-names = "oscclk", "pclk0", "clk0"; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK333>; + clock-names = "oscclk", "clk0"; #power-domain-cells = <0>; }; -- 1.9.1 From mboxrd@z Thu Jan 1 00:00:00 1970 From: k.kozlowski@samsung.com (Krzysztof Kozlowski) Date: Wed, 14 Oct 2015 15:02:06 +0900 Subject: [PATCH] dt-bindings: Correct the example for Exynos power domain clocks Message-ID: <1444802526-18518-1-git-send-email-k.kozlowski@samsung.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Since commit 29e5eea06bc1 ("ARM: EXYNOS: Get current parent clock for power domain on/off") the "pclkN" names of "clock-names" property is not parsed any more. The bindings and driver were updated but the example was not. Fix the example now. Signed-off-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/exynos/power_domain.txt | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt index e151057d92f0..4e947372a693 100644 --- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt +++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt @@ -43,9 +43,8 @@ Example: mfc_pd: power-domain at 10044060 { compatible = "samsung,exynos4210-pd"; reg = <0x10044060 0x20>; - clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_SW_ACLK333>, - <&clock CLK_MOUT_USER_ACLK333>; - clock-names = "oscclk", "pclk0", "clk0"; + clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MOUT_USER_ACLK333>; + clock-names = "oscclk", "clk0"; #power-domain-cells = <0>; }; -- 1.9.1