From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55491) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZmUy2-0007k1-Ep for qemu-devel@nongnu.org; Wed, 14 Oct 2015 18:56:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZmUy1-00073f-8y for qemu-devel@nongnu.org; Wed, 14 Oct 2015 18:56:18 -0400 Received: from mail-pa0-x232.google.com ([2607:f8b0:400e:c03::232]:35704) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZmUy1-00073Z-0x for qemu-devel@nongnu.org; Wed, 14 Oct 2015 18:56:17 -0400 Received: by pacao1 with SMTP id ao1so2053649pac.2 for ; Wed, 14 Oct 2015 15:56:16 -0700 (PDT) From: "Edgar E. Iglesias" Date: Thu, 15 Oct 2015 00:55:38 +0200 Message-Id: <1444863346-9711-6-git-send-email-edgar.iglesias@gmail.com> In-Reply-To: <1444863346-9711-1-git-send-email-edgar.iglesias@gmail.com> References: <1444863346-9711-1-git-send-email-edgar.iglesias@gmail.com> Subject: [Qemu-devel] [PATCH v4 05/13] target-arm: lpae: Rename granule_sz to stride List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: laurent.desnogues@gmail.com, serge.fdrv@gmail.com, edgar.iglesias@xilinx.com, alex.bennee@linaro.org, agraf@suse.de From: "Edgar E. Iglesias" Rename granule_sz to stride to better match the reference manuals. No functional change. Signed-off-by: Edgar E. Iglesias --- target-arm/helper.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index 9da50ab..79b4c03 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -6423,7 +6423,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, uint32_t tableattrs; target_ulong page_size; uint32_t attrs; - int32_t granule_sz = 9; + int32_t stride = 9; int32_t va_size = 32; int inputsize; int32_t tbi = 0; @@ -6527,10 +6527,10 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, tg = extract32(tcr->raw_tcr, 14, 2); if (tg == 1) { /* 64KB pages */ - granule_sz = 13; + stride = 13; } if (tg == 2) { /* 16KB pages */ - granule_sz = 11; + stride = 11; } } else { /* We should only be here if TTBR1 is valid */ @@ -6542,15 +6542,15 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, tg = extract32(tcr->raw_tcr, 30, 2); if (tg == 3) { /* 64KB pages */ - granule_sz = 13; + stride = 13; } if (tg == 1) { /* 16KB pages */ - granule_sz = 11; + stride = 11; } } /* Here we should have set up all the parameters for the translation: - * va_size, inputsize, ttbr, epd, granule_sz, tbi + * va_size, inputsize, ttbr, epd, stride, tbi */ if (epd) { @@ -6562,16 +6562,16 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, /* The starting level depends on the virtual address size (which can be * up to 48 bits) and the translation granule size. It indicates the number - * of strides (granule_sz bits at a time) needed to consume the bits + * of strides (stride bits at a time) needed to consume the bits * of the input address. In the pseudocode this is: * level = 4 - RoundUp((inputsize - grainsize) / stride) * where their 'inputsize' is our 'inputsize', 'grainsize' is - * our 'granule_sz + 3' and 'stride' is our 'granule_sz'. + * our 'stride + 3' and 'stride' is our 'stride'. * Applying the usual "rounded up m/n is (m+n-1)/n" and simplifying: - * = 4 - (inputsize - granule_sz - 3 + granule_sz - 1) / granule_sz - * = 4 - (inputsize - 4) / granule_sz; + * = 4 - (inputsize - stride - 3 + stride - 1) / stride + * = 4 - (inputsize - 4) / stride; */ - level = 4 - (inputsize - 4) / granule_sz; + level = 4 - (inputsize - 4) / stride; /* Clear the vaddr bits which aren't part of the within-region address, * so that we don't have to special case things when calculating the @@ -6581,11 +6581,11 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, address &= (1ULL << inputsize) - 1; } - descmask = (1ULL << (granule_sz + 3)) - 1; + descmask = (1ULL << (stride + 3)) - 1; /* Now we can extract the actual base address from the TTBR */ descaddr = extract64(ttbr, 0, 48); - descaddr &= ~((1ULL << (inputsize - (granule_sz * (4 - level)))) - 1); + descaddr &= ~((1ULL << (inputsize - (stride * (4 - level)))) - 1); /* Secure accesses start with the page table in secure memory and * can be downgraded to non-secure at any step. Non-secure accesses @@ -6597,7 +6597,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, uint64_t descriptor; bool nstable; - descaddr |= (address >> (granule_sz * (4 - level))) & descmask; + descaddr |= (address >> (stride * (4 - level))) & descmask; descaddr &= ~7ULL; nstable = extract32(tableattrs, 4, 1); descriptor = arm_ldq_ptw(cs, descaddr, !nstable); @@ -6622,7 +6622,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address, * These are basically the same thing, although the number * of bits we pull in from the vaddr varies. */ - page_size = (1ULL << ((granule_sz * (4 - level)) + 3)); + page_size = (1ULL << ((stride * (4 - level)) + 3)); descaddr |= (address & (page_size - 1)); /* Extract attributes from the descriptor and merge with table attrs */ attrs = extract64(descriptor, 2, 10) -- 1.9.1